split 7.3 ready for merge
This commit is contained in:
@@ -310,7 +310,7 @@ static void TPencode(void * arg) {
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lte_rate_matching_turbo(hadlsch->RTC[rdata->r],
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rdata->G, //G
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hadlsch->w[rdata->r],
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hadlsch->e+rdata->r_offset,
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hadlsch->eDL+rdata->r_offset,
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hadlsch->C, // C
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rdata->dlsch->Nsoft, // Nsoft,
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rdata->dlsch->Mdlharq,
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@@ -389,7 +389,7 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
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for (int r=0, r_offset=0; r<hadlsch->C; r++) {
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union turboReqUnion id= {.s={dlsch->rnti,frame,subframe,r,0}};
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notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(turboEncode_t), id.p, &proc->respEncode, TPencode);
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notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(turboEncode_t), id.p, proc->respEncode, TPencode);
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turboEncode_t * rdata=(turboEncode_t *) NotifiedFifoData(req);
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rdata->input=hadlsch->c[r];
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rdata->Kr_bytes= ( r<hadlsch->Cminus ? hadlsch->Kminus : hadlsch->Kplus) >>3;
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@@ -404,8 +404,8 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
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rdata->r_offset=r_offset;
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rdata->G=G;
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if ( proc->threadPool.activated) {
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pushTpool(&proc->threadPool,req);
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if ( proc->threadPool->activated ) {
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pushTpool(proc->threadPool,req);
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proc->nbEncode++;
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} else {
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TPencode(rdata);
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@@ -158,7 +158,7 @@ int allocate_REs_in_RB_no_pilots_QPSK_siso(PHY_VARS_eNB* phy_vars_eNB,
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{
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LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->frame_parms;
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uint8_t *x0 = dlsch0_harq->e;
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uint8_t *x0 = dlsch0_harq->eDL;
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uint32_t qpsk_table_offset_re = 0;
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uint32_t qpsk_table_offset_im = 0;
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@@ -248,7 +248,7 @@ int allocate_REs_in_RB_pilots_QPSK_siso(PHY_VARS_eNB* phy_vars_eNB,
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LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_eNB->frame_parms;
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uint8_t *x0 = dlsch0_harq->e;
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uint8_t *x0 = dlsch0_harq->eDL;
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uint32_t qpsk_table_offset_re = 0;
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uint32_t qpsk_table_offset_im = 0;
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@@ -343,7 +343,7 @@ int allocate_REs_in_RB_no_pilots_16QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
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{
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LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->frame_parms;
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uint8_t *x0 = dlsch0_harq->e;
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uint8_t *x0 = dlsch0_harq->eDL;
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uint32_t qam16_table_offset_re = 0;
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uint32_t qam16_table_offset_im = 0;
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@@ -439,7 +439,7 @@ int allocate_REs_in_RB_pilots_16QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
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LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_eNB->frame_parms;
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uint8_t *x0 = dlsch0_harq->e;
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uint8_t *x0 = dlsch0_harq->eDL;
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uint32_t qam16_table_offset_re = 0;
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uint32_t qam16_table_offset_im = 0;
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@@ -542,7 +542,7 @@ int allocate_REs_in_RB_no_pilots_64QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
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LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->frame_parms;
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uint8_t *x0 = dlsch0_harq->e;
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uint8_t *x0 = dlsch0_harq->eDL;
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uint32_t qam64_table_offset_re = 0;
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uint32_t qam64_table_offset_im = 0;
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@@ -699,7 +699,7 @@ int allocate_REs_in_RB_pilots_64QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
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LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_eNB->frame_parms;
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uint8_t *x0 = dlsch0_harq->e;
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uint8_t *x0 = dlsch0_harq->eDL;
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uint32_t qam64_table_offset_re = 0;
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uint32_t qam64_table_offset_im = 0;
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@@ -866,12 +866,12 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
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if ((dlsch0_harq != NULL) && (dlsch1_harq != NULL)) { //this is for TM3, TM4
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x0 = dlsch0_harq->e;
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x0 = dlsch0_harq->eDL;
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mimo_mode = dlsch0_harq->mimo_mode;
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first_layer0 = dlsch0_harq->first_layer;
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Nlayers0 = dlsch0_harq->Nlayers;
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mod_order0 = dlsch0_harq->Qm;
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x1 = dlsch1_harq->e;
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x1 = dlsch1_harq->eDL;
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// Fill these in later for TM8-10
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// Nlayers1 = dlsch1_harq->Nlayers;
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// first_layer1 = dlsch1_harq->first_layer;
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@@ -879,7 +879,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
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} else if ((dlsch0_harq != NULL) && (dlsch1_harq == NULL)){ //This is for SIS0 TM1, TM6, etc
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x0 = dlsch0_harq->e;
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x0 = dlsch0_harq->eDL;
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mimo_mode = dlsch0_harq->mimo_mode;
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first_layer0 = dlsch0_harq->first_layer;
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Nlayers0 = dlsch0_harq->Nlayers;
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@@ -887,7 +887,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
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} else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){ // This is for TM4 retransmission
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x0 = dlsch1_harq->e;
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x0 = dlsch1_harq->eDL;
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mimo_mode = dlsch1_harq->mimo_mode;
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first_layer0 = dlsch1_harq->first_layer;
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Nlayers0 = dlsch1_harq->Nlayers;
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@@ -2692,7 +2692,7 @@ int dlsch_modulation_SIC(int32_t **sic_buffer,
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LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
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uint32_t i,jj,re_allocated=0;
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uint8_t mod_order0 = dlsch0_harq->Qm;
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uint8_t *x0 = dlsch0_harq->e;
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uint8_t *x0 = dlsch0_harq->eDL;
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uint8_t qam64_table_offset_re = 0;
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uint8_t qam64_table_offset_im = 0;
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uint8_t qam16_table_offset_re = 0;
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@@ -2883,7 +2883,7 @@ int mch_modulation(int32_t **txdataF,
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&jj,
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re_offset,
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symbol_offset,
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dlsch->harq_processes[0]->e,
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dlsch->harq_processes[0]->eDL,
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l,
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mod_order,
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amp,
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@@ -52,7 +52,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
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int n;
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// uint8_t reset;
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uint32_t x1, x2, s=0;
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uint8_t *dlsch_e=dlsch->harq_processes[harq_pid]->e;
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uint8_t *dlsch_e=dlsch->harq_processes[harq_pid]->eDL;
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uint8_t *e=dlsch_e;
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_SCRAMBLING, VCD_FUNCTION_IN);
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// Rule for accumulation of subframes for BL/CE UEs
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@@ -100,7 +100,7 @@ typedef struct {
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/// start symbold of pdsch
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uint8_t pdsch_start;
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/// Concatenated "e"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
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uint8_t e[MAX_NUM_CHANNEL_BITS] __attribute__((aligned(32)));
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uint8_t eDL[MAX_NUM_CHANNEL_BITS] __attribute__((aligned(32)));
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/// Turbo-code outputs (36-212 V8.6 2009-03, p.12
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uint8_t *d[MAX_NUM_DLSCH_SEGMENTS];//[(96+3+(3*6144))];
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/// Sub-block interleaver outputs (36-212 V8.6 2009-03, p.16-17)
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@@ -261,11 +261,11 @@ typedef struct {
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/// coded RI bits
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int16_t q_RI[MAX_RI_PAYLOAD];
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/// Concatenated "e"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
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int16_t e[MAX_NUM_CHANNEL_BITS] __attribute__((aligned(32)));
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int16_t eUL[MAX_NUM_CHANNEL_BITS] __attribute__((aligned(32)));
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/// Temporary h sequence to flag PUSCH_x/PUSCH_y symbols which are not scrambled
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uint8_t h[MAX_NUM_CHANNEL_BITS];
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/// Pointer to the payload
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uint8_t *b;
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uint8_t *decodedBytes;
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/// Pointers to transport block segments
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//TBD
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uint8_t *c[MAX_NUM_ULSCH_SEGMENTS];
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@@ -54,9 +54,9 @@ void free_eNB_ulsch(LTE_eNB_ULSCH_t *ulsch) {
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if (ulsch) {
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for (i=0; i<8; i++) {
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if (ulsch->harq_processes[i]) {
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if (ulsch->harq_processes[i]->b) {
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free16(ulsch->harq_processes[i]->b,MAX_ULSCH_PAYLOAD_BYTES);
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ulsch->harq_processes[i]->b = NULL;
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if (ulsch->harq_processes[i]->decodedBytes) {
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free16(ulsch->harq_processes[i]->decodedBytes,MAX_ULSCH_PAYLOAD_BYTES);
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ulsch->harq_processes[i]->decodedBytes = NULL;
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}
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for (r=0; r<MAX_NUM_ULSCH_SEGMENTS; r++) {
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@@ -115,10 +115,10 @@ LTE_eNB_ULSCH_t *new_eNB_ulsch(uint8_t max_turbo_iterations,uint8_t N_RB_UL, uin
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if (ulsch->harq_processes[i]) {
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memset(ulsch->harq_processes[i],0,sizeof(LTE_UL_eNB_HARQ_t));
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ulsch->harq_processes[i]->b = (uint8_t *)malloc16(MAX_ULSCH_PAYLOAD_BYTES/bw_scaling);
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ulsch->harq_processes[i]->decodedBytes = (uint8_t *)malloc16(MAX_ULSCH_PAYLOAD_BYTES/bw_scaling);
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if (ulsch->harq_processes[i]->b)
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memset(ulsch->harq_processes[i]->b,0,MAX_ULSCH_PAYLOAD_BYTES/bw_scaling);
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if (ulsch->harq_processes[i]->decodedBytes)
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memset(ulsch->harq_processes[i]->decodedBytes,0,MAX_ULSCH_PAYLOAD_BYTES/bw_scaling);
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else
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exit_flag=3;
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@@ -229,7 +229,7 @@ void processULSegment(void * arg) {
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G,
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ulsch_harq->w[r],
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(uint8_t *) &dummy_w[0],
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ulsch_harq->e+rdata->r_offset,
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ulsch_harq->eUL+rdata->r_offset,
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ulsch_harq->C,
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NSOFT,
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0, //Uplink
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@@ -327,19 +327,15 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB, L1_rxtx_proc_t *proc,
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E = ulsch_harq->Qm * (Gp/ulsch_harq->C);
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else
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E = ulsch_harq->Qm * ((GpmodC==0?0:1) + (Gp/ulsch_harq->C));
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#ifdef FS6
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if ( getenv("fs6") != NULL && strncasecmp( getenv("fs6"), "du", 2) == 0 ) {
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sendFs6Ul(eNB, UE_id, harq_pid, r, ulsch_harq->e+r_offset, E*sizeof(int16_t), r_offset);
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if ( split73 == SPLIT73_DU ) {
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sendFs6Ul(eNB, UE_id, harq_pid, r, ulsch_harq->eUL+r_offset, E*sizeof(int16_t), r_offset);
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r_offset += E;
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continue;
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}
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#endif
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union turboReqUnion id= {.s={ulsch->rnti,proc->frame_rx,proc->subframe_rx,0,0}};
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notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(turboDecode_t), id.p, &proc->respDecode, processULSegment);
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notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(turboDecode_t), id.p, proc->respDecode, processULSegment);
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turboDecode_t * rdata=(turboDecode_t *) NotifiedFifoData(req);
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rdata->eNB=eNB;
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@@ -359,7 +355,7 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB, L1_rxtx_proc_t *proc,
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rdata->function=td;
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int Fbytes=(r==0) ? rdata->Fbits>>3 : 0;
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int sz=Kr_bytes - Fbytes - ((ulsch_harq->C>1)?3:0);
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pushTpool(&proc->threadPool,req);
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pushTpool(proc->threadPool,req);
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proc->nbDecode++;
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LOG_D(PHY,"Added a block to decode, in pipe: %d\n",proc->nbDecode);
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r_offset+=E;
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@@ -892,8 +888,8 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,
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j2+=2;
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}
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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}
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break;
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@@ -905,10 +901,10 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,
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j2+=4;
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}
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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}
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break;
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@@ -920,12 +916,12 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,
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j2+=6;
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}
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->e[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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ulsch_harq->eUL[iprime++] = y[j2++];
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}
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break;
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@@ -963,7 +959,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,
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*/
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int16_t *yp,*ep;
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for (iprime=0,yp=&y[j2],ep=&ulsch_harq->e[0];
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for (iprime=0,yp=&y[j2],ep=&ulsch_harq->eUL[0];
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iprime<G;
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iprime+=8,j2+=8,ep+=8,yp+=8) {
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ep[0] = yp[0];
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@@ -793,7 +793,7 @@ int dlsch_encoding_SIC(PHY_VARS_UE *ue,
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r_offset += lte_rate_matching_turbo(dlsch->harq_processes[harq_pid]->RTC[r],
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G, //G
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dlsch->harq_processes[harq_pid]->w[r],
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dlsch->harq_processes[harq_pid]->e+r_offset,
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dlsch->harq_processes[harq_pid]->eDL+r_offset,
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dlsch->harq_processes[harq_pid]->C, // C
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dlsch->Nsoft, // Nsoft,
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dlsch->Mdlharq,
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@@ -2032,7 +2032,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
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ul_res_alloc_type_1 = 1;
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}
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uint8_t n_bits_freq_dom_res_assign_ul=0,n_ul_RGB_tmp;
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uint8_t n_bits_freq_dom_res_assign_ul=0,n_ul_RGB_tmp=0;
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if (ul_res_alloc_type_0 == 1) { // implementation of Table 6.1.2.2.1-1 TC 38.214 subclause 6.1.2.2.1
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// config1: PUSCH-Config IE contains rbg-Size ENUMERATED {config1 config2}
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