include BWP info in sched_pdsch and use also for RA and BCH
This commit is contained in:
@@ -1357,9 +1357,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
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int rnti,
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int rnti,
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int round,
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int round,
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int tb_scaling,
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int tb_scaling,
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int pduindex,
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int pduindex)
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long BWPStart,
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long BWPSize)
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{
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{
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// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
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// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
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// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
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// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
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@@ -1419,7 +1417,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
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dci_pdu_rel15_t dci_payload;
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dci_pdu_rel15_t dci_payload;
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dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
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dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
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pdsch_pdu_rel15->rbStart,
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pdsch_pdu_rel15->rbStart,
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BWPSize);
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pdsch_pdu_rel15->BWPSize);
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dci_payload.time_domain_assignment.val = time_domain_assignment;
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dci_payload.time_domain_assignment.val = time_domain_assignment;
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dci_payload.vrb_to_prb_mapping.val = 0;
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dci_payload.vrb_to_prb_mapping.val = 0;
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@@ -1507,7 +1505,6 @@ static void nr_generate_Msg2(module_id_t module_idP,
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NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
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NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
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NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
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NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
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NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_RA_t *ra = UE->ra;
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NR_RA_t *ra = UE->ra;
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long rrc_ra_ResponseWindow =
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long rrc_ra_ResponseWindow =
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@@ -1548,23 +1545,14 @@ static void nr_generate_Msg2(module_id_t module_idP,
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int mcsIndex = -1; // initialization value
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int mcsIndex = -1; // initialization value
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int rbStart = 0;
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int rbStart = 0;
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int rbSize = 8;
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int rbSize = 8;
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long BWPStart = 0;
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bwp_info_t bwp_info = get_pdsch_bwp_start_size(nr_mac, UE);
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long BWPSize = 0;
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = NULL;
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if (*ss->controlResourceSetId != 0) {
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BWPStart = dl_bwp->BWPStart;
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BWPSize = sc_info->initial_dl_BWPSize;
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} else {
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type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]];
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BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
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BWPSize = type0_PDCCH_CSS_config->num_rbs;
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}
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NR_ControlResourceSet_t *coreset = sched_ctrl->coreset;
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NR_ControlResourceSet_t *coreset = sched_ctrl->coreset;
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AssertFatal(coreset, "Coreset cannot be null for RA-Msg2\n");
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AssertFatal(coreset, "Coreset cannot be null for RA-Msg2\n");
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const int coresetid = coreset->controlResourceSetId;
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const int coresetid = coreset->controlResourceSetId;
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// Calculate number of symbols
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// Calculate number of symbols
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int time_domain_assignment = get_dl_tda(nr_mac, slotP);
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int time_domain_assignment = get_dl_tda(nr_mac, slotP);
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]];
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int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
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int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
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NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp,
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NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp,
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ss->searchSpaceType->present,
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ss->searchSpaceType->present,
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@@ -1578,14 +1566,14 @@ static void nr_generate_Msg2(module_id_t module_idP,
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return;
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return;
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uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
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uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
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for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
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for (int i = 0; (i < rbSize) && (rbStart <= (bwp_info.bwpSize - rbSize)); i++) {
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if (vrb_map[BWPStart + rbStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) {
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if (vrb_map[bwp_info.bwpStart + rbStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) {
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rbStart += i;
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rbStart += i;
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i = 0;
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i = 0;
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}
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}
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}
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}
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if (rbStart > (BWPSize - rbSize)) {
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if (rbStart > (bwp_info.bwpSize - rbSize)) {
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LOG_W(NR_MAC, "Cannot find free vrb_map for RA RNTI %04x!\n", ra->RA_rnti);
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LOG_W(NR_MAC, "Cannot find free vrb_map for RA RNTI %04x!\n", ra->RA_rnti);
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reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
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reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
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reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
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reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
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@@ -1673,6 +1661,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
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.tda_info = tda_info,
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.tda_info = tda_info,
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.pm_index = 0,
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.pm_index = 0,
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.tb_size = TBS,
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.tb_size = TBS,
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.bwp_info = bwp_info,
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.rbStart = rbStart,
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.rbStart = rbStart,
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.rbSize = rbSize
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.rbSize = rbSize
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};
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};
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@@ -1693,9 +1682,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
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ra->RA_rnti,
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ra->RA_rnti,
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0,
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0,
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tb_scaling,
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tb_scaling,
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pduindex,
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pduindex);
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BWPStart,
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BWPSize);
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// DL TX request
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// DL TX request
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nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[TX_req->Number_of_PDUs];
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nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[TX_req->Number_of_PDUs];
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@@ -1742,7 +1729,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
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// Mark the corresponding symbols RBs as used
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// Mark the corresponding symbols RBs as used
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fill_pdcch_vrb_map(nr_mac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, aggregation_level, beam.idx);
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fill_pdcch_vrb_map(nr_mac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, aggregation_level, beam.idx);
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for (int rb = 0; rb < rbSize; rb++) {
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for (int rb = 0; rb < rbSize; rb++) {
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vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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vrb_map[bwp_info.bwpStart + rb + rbStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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}
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}
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ra->ra_state = nrRA_WAIT_Msg3;
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ra->ra_state = nrRA_WAIT_Msg3;
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@@ -1796,18 +1783,6 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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if (beam.idx < 0)
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if (beam.idx < 0)
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return;
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return;
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long BWPStart = 0;
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long BWPSize = 0;
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = NULL;
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if(*ss->controlResourceSetId!=0) {
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BWPStart = dl_bwp->BWPStart;
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BWPSize = dl_bwp->BWPSize;
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} else {
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type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]];
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BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
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BWPSize = type0_PDCCH_CSS_config->num_rbs;
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}
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// get CCEindex, needed also for PUCCH and then later for PDCCH
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// get CCEindex, needed also for PUCCH and then later for PDCCH
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uint8_t aggregation_level;
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uint8_t aggregation_level;
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int CCEIndex = get_cce_index(nr_mac,
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int CCEIndex = get_cce_index(nr_mac,
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@@ -1835,6 +1810,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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}
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}
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uint8_t time_domain_assignment = get_dl_tda(nr_mac, slotP);
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uint8_t time_domain_assignment = get_dl_tda(nr_mac, slotP);
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[UE->UE_beam_index]];
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int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
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int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
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NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp,
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NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp,
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ss->searchSpaceType->present,
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ss->searchSpaceType->present,
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@@ -1848,7 +1824,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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return;
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return;
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NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc, dl_bwp, &msg4_tda, 1);
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NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc, dl_bwp, &msg4_tda, 1);
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bwp_info_t bwp_info = get_pdsch_bwp_start_size(nr_mac, UE);
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uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
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uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
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uint8_t mcsIndex = 0;
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uint8_t mcsIndex = 0;
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int rbStart = 0;
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int rbStart = 0;
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@@ -1860,8 +1836,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
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NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
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DevAssert(!harq->is_waiting);
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DevAssert(!harq->is_waiting);
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pdu_length = harq->tb_size;
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pdu_length = harq->tb_size;
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}
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} else {
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else {
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uint8_t subheader_len = (mac_sdu_length < 256) ? sizeof(NR_MAC_SUBHEADER_SHORT) : sizeof(NR_MAC_SUBHEADER_LONG);
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uint8_t subheader_len = (mac_sdu_length < 256) ? sizeof(NR_MAC_SUBHEADER_SHORT) : sizeof(NR_MAC_SUBHEADER_LONG);
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pdu_length = mac_sdu_length + subheader_len + 13; // 13 is contention resolution length of msgB. It is divided into 3 parts:
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pdu_length = mac_sdu_length + subheader_len + 13; // 13 is contention resolution length of msgB. It is divided into 3 parts:
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// BI MAC subheader (1 Oct) + SuccessRAR MAC subheader (1 Oct) + SuccessRAR (11 Oct)
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// BI MAC subheader (1 Oct) + SuccessRAR MAC subheader (1 Oct) + SuccessRAR (11 Oct)
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@@ -1869,7 +1844,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
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// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
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do {
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do {
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if(rbSize < BWPSize)
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if(rbSize < bwp_info.bwpSize)
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rbSize++;
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rbSize++;
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else
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else
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mcsIndex++;
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mcsIndex++;
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@@ -1887,8 +1862,8 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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int i = 0;
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int i = 0;
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uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
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uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
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while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
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while ((i < rbSize) && (rbStart + rbSize <= bwp_info.bwpSize)) {
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if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols)) {
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if (vrb_map[bwp_info.bwpStart + rbStart + i]&SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols)) {
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rbStart += i+1;
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rbStart += i+1;
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i = 0;
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i = 0;
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} else {
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} else {
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@@ -1896,7 +1871,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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}
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}
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}
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}
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if (rbStart > (BWPSize - rbSize)) {
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if (rbStart > (bwp_info.bwpSize - rbSize)) {
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LOG_E(NR_MAC, "Cannot find free vrb_map for RNTI %04x!\n", UE->rnti);
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LOG_E(NR_MAC, "Cannot find free vrb_map for RNTI %04x!\n", UE->rnti);
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reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
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reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
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return;
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return;
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@@ -1981,6 +1956,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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.tda_info = msg4_tda,
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.tda_info = msg4_tda,
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.pm_index = 0,
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.pm_index = 0,
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.tb_size = tb_size,
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.tb_size = tb_size,
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.bwp_info = bwp_info,
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.rbStart = rbStart,
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.rbStart = rbStart,
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.rbSize = rbSize
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.rbSize = rbSize
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};
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};
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@@ -2002,9 +1978,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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rnti,
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rnti,
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harq->round,
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harq->round,
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tb_scaling,
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tb_scaling,
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pduindex,
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pduindex);
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BWPStart,
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BWPSize);
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// Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR
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// Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR
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sched_ctrl->tpc1 = 1;
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sched_ctrl->tpc1 = 1;
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@@ -2041,7 +2015,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
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aggregation_level,
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aggregation_level,
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beam.idx);
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beam.idx);
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for (int rb = 0; rb < rbSize; rb++) {
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for (int rb = 0; rb < rbSize; rb++) {
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vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols);
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vrb_map[bwp_info.bwpStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols);
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}
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}
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ra->ra_state = nrRA_WAIT_Msg4_MsgB_ACK;
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ra->ra_state = nrRA_WAIT_Msg4_MsgB_ACK;
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@@ -274,8 +274,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
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}
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}
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}
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}
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static uint32_t get_tbs_bch(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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static uint32_t get_tbs_bch(NR_sched_pdsch_t *pdsch,
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NR_sched_pdsch_t *pdsch,
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uint32_t num_total_bytes,
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uint32_t num_total_bytes,
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uint16_t *vrb_map)
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uint16_t *vrb_map)
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{
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{
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@@ -287,8 +286,8 @@ static uint32_t get_tbs_bch(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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int mcsTableIdx = 0;
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int mcsTableIdx = 0;
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uint32_t TBS = 0;
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uint32_t TBS = 0;
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const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
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const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
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int bwpSize = type0_PDCCH_CSS_config->num_rbs;
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int bwpSize = pdsch->bwp_info.bwpSize;
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int bwpStart = type0_PDCCH_CSS_config->cset_start_rb;
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int bwpStart = pdsch->bwp_info.bwpStart;
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int rbStop = bwpSize - 1;
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int rbStop = bwpSize - 1;
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int rbStart = 0;
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int rbStart = 0;
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uint16_t rbSize = 0;
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uint16_t rbSize = 0;
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@@ -357,6 +356,7 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
|
||||||
uint16_t *vrb_map = cc->vrb_map[beam];
|
uint16_t *vrb_map = cc->vrb_map[beam];
|
||||||
NR_sched_pdsch_t *pdsch = &gNB_mac->sched_ctrlCommon->sched_pdsch;
|
NR_sched_pdsch_t *pdsch = &gNB_mac->sched_ctrlCommon->sched_pdsch;
|
||||||
|
pdsch->bwp_info = get_pdsch_bwp_start_size(gNB_mac, NULL);
|
||||||
pdsch->time_domain_allocation = time_domain_allocation;
|
pdsch->time_domain_allocation = time_domain_allocation;
|
||||||
pdsch->dmrs_parms = *dmrs_parms;
|
pdsch->dmrs_parms = *dmrs_parms;
|
||||||
pdsch->tda_info = *tda_info;
|
pdsch->tda_info = *tda_info;
|
||||||
@@ -383,8 +383,7 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
|
|||||||
|
|
||||||
AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n");
|
AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n");
|
||||||
|
|
||||||
uint32_t TBS = get_tbs_bch(type0_PDCCH_CSS_config,
|
uint32_t TBS = get_tbs_bch(&gNB_mac->sched_ctrlCommon->sched_pdsch,
|
||||||
&gNB_mac->sched_ctrlCommon->sched_pdsch,
|
|
||||||
gNB_mac->sched_ctrlCommon->num_total_bytes,
|
gNB_mac->sched_ctrlCommon->num_total_bytes,
|
||||||
vrb_map);
|
vrb_map);
|
||||||
|
|
||||||
@@ -726,6 +725,7 @@ static void other_sib_sched_control(module_id_t module_idP,
|
|||||||
|
|
||||||
NR_sched_pdsch_t sched_pdsch_otherSI = {0};
|
NR_sched_pdsch_t sched_pdsch_otherSI = {0};
|
||||||
sched_pdsch_otherSI.time_domain_allocation = time_domain_allocation;
|
sched_pdsch_otherSI.time_domain_allocation = time_domain_allocation;
|
||||||
|
sched_pdsch_otherSI.bwp_info = get_pdsch_bwp_start_size(gNB_mac, NULL);
|
||||||
sched_pdsch_otherSI.dmrs_parms = dmrs_parms;
|
sched_pdsch_otherSI.dmrs_parms = dmrs_parms;
|
||||||
sched_pdsch_otherSI.tda_info = tda_info;
|
sched_pdsch_otherSI.tda_info = tda_info;
|
||||||
sched_pdsch_otherSI.nrOfLayers = 1;
|
sched_pdsch_otherSI.nrOfLayers = 1;
|
||||||
@@ -735,7 +735,7 @@ static void other_sib_sched_control(module_id_t module_idP,
|
|||||||
uint16_t *vrb_map = cc->vrb_map[beam.idx];
|
uint16_t *vrb_map = cc->vrb_map[beam.idx];
|
||||||
uint8_t *sib_bcch_pdu = cc->other_sib_bcch_pdu[payload_idx];
|
uint8_t *sib_bcch_pdu = cc->other_sib_bcch_pdu[payload_idx];
|
||||||
int num_total_bytes = cc->other_sib_bcch_length[payload_idx];
|
int num_total_bytes = cc->other_sib_bcch_length[payload_idx];
|
||||||
sched_pdsch_otherSI.tb_size = get_tbs_bch(type0_PDCCH_CSS_config, &sched_pdsch_otherSI, num_total_bytes, vrb_map);
|
sched_pdsch_otherSI.tb_size = get_tbs_bch(&sched_pdsch_otherSI, num_total_bytes, vrb_map);
|
||||||
sched_pdsch_otherSI.R = nr_get_code_rate_dl(sched_pdsch_otherSI.mcs, 0);
|
sched_pdsch_otherSI.R = nr_get_code_rate_dl(sched_pdsch_otherSI.mcs, 0);
|
||||||
sched_pdsch_otherSI.Qm = nr_get_Qm_dl(sched_pdsch_otherSI.mcs, 0);
|
sched_pdsch_otherSI.Qm = nr_get_Qm_dl(sched_pdsch_otherSI.mcs, 0);
|
||||||
|
|
||||||
|
|||||||
@@ -384,7 +384,7 @@ void abort_nr_dl_harq(NR_UE_info_t* UE, int8_t harq_pid)
|
|||||||
UE->mac_stats.dl.errors++;
|
UE->mac_stats.dl.errors++;
|
||||||
}
|
}
|
||||||
|
|
||||||
static bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE)
|
bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE)
|
||||||
{
|
{
|
||||||
bwp_info_t bwp_info;
|
bwp_info_t bwp_info;
|
||||||
if (!UE) {
|
if (!UE) {
|
||||||
@@ -579,6 +579,7 @@ static bool allocate_dl_retransmission(module_id_t module_id,
|
|||||||
sched_ctrl->sched_pdsch = *retInfo;
|
sched_ctrl->sched_pdsch = *retInfo;
|
||||||
sched_ctrl->sched_pdsch.rbStart = rbStart - bwp_info.bwpStart;
|
sched_ctrl->sched_pdsch.rbStart = rbStart - bwp_info.bwpStart;
|
||||||
sched_ctrl->sched_pdsch.pucch_allocation = alloc;
|
sched_ctrl->sched_pdsch.pucch_allocation = alloc;
|
||||||
|
sched_ctrl->sched_pdsch.bwp_info = bwp_info;
|
||||||
/* retransmissions: directly allocate */
|
/* retransmissions: directly allocate */
|
||||||
*n_rb_sched -= sched_ctrl->sched_pdsch.rbSize;
|
*n_rb_sched -= sched_ctrl->sched_pdsch.rbSize;
|
||||||
|
|
||||||
@@ -768,10 +769,10 @@ static void pf_dl(module_id_t module_id,
|
|||||||
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
||||||
|
|
||||||
uint16_t *rballoc_mask = mac->common_channels[CC_id].vrb_map[beam.idx];
|
uint16_t *rballoc_mask = mac->common_channels[CC_id].vrb_map[beam.idx];
|
||||||
bwp_info_t bwp_info = get_pdsch_bwp_start_size(mac, iterator->UE);
|
sched_pdsch->bwp_info = get_pdsch_bwp_start_size(mac, iterator->UE);
|
||||||
int rbStart = 0; // WRT BWP start
|
int rbStart = 0; // WRT BWP start
|
||||||
int rbStop = bwp_info.bwpSize - 1;
|
int rbStop = sched_pdsch->bwp_info.bwpSize - 1;
|
||||||
int bwp_start = bwp_info.bwpStart;
|
int bwp_start = sched_pdsch->bwp_info.bwpStart;
|
||||||
// Freq-demain allocation
|
// Freq-demain allocation
|
||||||
while (rbStart < rbStop && (rballoc_mask[rbStart + bwp_start] & slbitmap))
|
while (rbStart < rbStop && (rballoc_mask[rbStart + bwp_start] & slbitmap))
|
||||||
rbStart++;
|
rbStart++;
|
||||||
@@ -941,9 +942,8 @@ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu
|
|||||||
pdsch_pdu->pduBitmap = 0;
|
pdsch_pdu->pduBitmap = 0;
|
||||||
pdsch_pdu->rnti = rnti;
|
pdsch_pdu->rnti = rnti;
|
||||||
pdsch_pdu->pduIndex = pdu_index;
|
pdsch_pdu->pduIndex = pdu_index;
|
||||||
bwp_info_t bwp_info = get_pdsch_bwp_start_size(mac, UE);
|
pdsch_pdu->BWPSize = sched_pdsch->bwp_info.bwpSize;
|
||||||
pdsch_pdu->BWPSize = bwp_info.bwpSize;
|
pdsch_pdu->BWPStart = sched_pdsch->bwp_info.bwpStart;
|
||||||
pdsch_pdu->BWPStart = bwp_info.bwpStart;
|
|
||||||
pdsch_pdu->SubcarrierSpacing = dl_bwp ? dl_bwp->scs : *scc->ssbSubcarrierSpacing;
|
pdsch_pdu->SubcarrierSpacing = dl_bwp ? dl_bwp->scs : *scc->ssbSubcarrierSpacing;
|
||||||
pdsch_pdu->CyclicPrefix = dl_bwp && dl_bwp->cyclicprefix ? *dl_bwp->cyclicprefix : 0;
|
pdsch_pdu->CyclicPrefix = dl_bwp && dl_bwp->cyclicprefix ? *dl_bwp->cyclicprefix : 0;
|
||||||
// Codeword information
|
// Codeword information
|
||||||
@@ -990,7 +990,7 @@ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu
|
|||||||
if (valid_ptrs_setup)
|
if (valid_ptrs_setup)
|
||||||
pdsch_pdu->pduBitmap |= 0x1; // Bit 0: pdschPtrs - Indicates PTRS included (FR2)
|
pdsch_pdu->pduBitmap |= 0x1; // Bit 0: pdschPtrs - Indicates PTRS included (FR2)
|
||||||
}
|
}
|
||||||
int dl_bw_tbslbrm = UE ? UE->sc_info.dl_bw_tbslbrm : bwp_info.bwpSize;
|
int dl_bw_tbslbrm = UE ? UE->sc_info.dl_bw_tbslbrm : sched_pdsch->bwp_info.bwpSize;
|
||||||
pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(pdsch_pdu->mcsTable[0], dl_bw_tbslbrm, nl_tbslbrm);
|
pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(pdsch_pdu->mcsTable[0], dl_bw_tbslbrm, nl_tbslbrm);
|
||||||
pdsch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pdsch->tb_size << 3, sched_pdsch->R);
|
pdsch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pdsch->tb_size << 3, sched_pdsch->R);
|
||||||
// Precoding and beamforming
|
// Precoding and beamforming
|
||||||
|
|||||||
@@ -435,7 +435,7 @@ NR_beam_alloc_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame,
|
|||||||
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame, bool new_beam);
|
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame, bool new_beam);
|
||||||
void beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE);
|
void beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE);
|
||||||
void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP);
|
void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP);
|
||||||
|
bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE);
|
||||||
size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset_rsrp);
|
size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset_rsrp);
|
||||||
|
|
||||||
long get_lcid_from_drbid(int drb_id);
|
long get_lcid_from_drbid(int drb_id);
|
||||||
|
|||||||
@@ -463,7 +463,7 @@ typedef struct NR_sched_pdsch {
|
|||||||
|
|
||||||
uint16_t pm_index;
|
uint16_t pm_index;
|
||||||
uint8_t nrOfLayers;
|
uint8_t nrOfLayers;
|
||||||
|
bwp_info_t bwp_info;
|
||||||
NR_pdsch_dmrs_t dmrs_parms;
|
NR_pdsch_dmrs_t dmrs_parms;
|
||||||
// time_domain_allocation is the index of a list of tda
|
// time_domain_allocation is the index of a list of tda
|
||||||
int time_domain_allocation;
|
int time_domain_allocation;
|
||||||
|
|||||||
Reference in New Issue
Block a user