Make number of UL/DL actors in NR UE fully configurable
Due to different processing requirements on different CPUs it might be beneficial to enable the users to set the number of UL/DL actors. Allow disabling UL/DL actor frameworks and processing inline or setting the number of DL/UL threads with --num-ul-actors/num-dl-actors This was tested to work with 0 UL/DL actors with rfsim.
This commit is contained in:
+13
-6
@@ -106,9 +106,12 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg);
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static void start_process_slot_tx(void* arg) {
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static void start_process_slot_tx(void* arg) {
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notifiedFIFO_elt_t *newTx = arg;
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notifiedFIFO_elt_t *newTx = arg;
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nr_rxtx_thread_data_t *curMsgTx = NotifiedFifoData(newTx);
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nr_rxtx_thread_data_t *curMsgTx = NotifiedFifoData(newTx);
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int num_ul_actors_to_use =
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int num_ul_actors = get_nrUE_params()->num_ul_actors;
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get_nrUE_params()->num_ul_actors == 0 ? NUM_UL_ACTORS : min(get_nrUE_params()->num_ul_actors, NUM_UL_ACTORS);
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if (num_ul_actors > 0) {
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pushNotifiedFIFO(&curMsgTx->UE->ul_actors[curMsgTx->proc.nr_slot_tx % num_ul_actors_to_use].fifo, newTx);
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pushNotifiedFIFO(&curMsgTx->UE->ul_actors[curMsgTx->proc.nr_slot_tx % num_ul_actors].fifo, newTx);
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} else {
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newTx->processingFunc(curMsgTx);
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}
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}
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}
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static size_t dump_L1_UE_meas_stats(PHY_VARS_NR_UE *ue, char *output, size_t max_len)
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static size_t dump_L1_UE_meas_stats(PHY_VARS_NR_UE *ue, char *output, size_t max_len)
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@@ -677,10 +680,10 @@ static int handle_sync_req_from_mac(PHY_VARS_NR_UE *UE)
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/* Clearing UE harq while DL actors are active causes race condition.
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/* Clearing UE harq while DL actors are active causes race condition.
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So we let the current execution to complete here.*/
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So we let the current execution to complete here.*/
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for (int i = 0; i < NUM_DL_ACTORS; i++) {
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for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
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flush_actor(UE->dl_actors + i);
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flush_actor(UE->dl_actors + i);
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}
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}
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for (int i = 0; i < NUM_UL_ACTORS; i++) {
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for (int i = 0; i < get_nrUE_params()->num_ul_actors; i++) {
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flush_actor(UE->ul_actors + i);
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flush_actor(UE->ul_actors + i);
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}
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}
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@@ -1183,7 +1186,11 @@ void *UE_thread(void *arg)
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int ret = UE_dl_preprocessing(UE, &curMsgRx->proc, tx_wait_for_dlsch, &curMsgRx->phy_data, &stats_printed);
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int ret = UE_dl_preprocessing(UE, &curMsgRx->proc, tx_wait_for_dlsch, &curMsgRx->phy_data, &stats_printed);
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if (ret != INT_MAX)
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if (ret != INT_MAX)
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shiftForNextFrame = ret;
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shiftForNextFrame = ret;
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pushNotifiedFIFO(&UE->dl_actors[curMsg.proc.nr_slot_rx % NUM_DL_ACTORS].fifo, newRx);
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if (get_nrUE_params()->num_dl_actors > 0) {
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pushNotifiedFIFO(&UE->dl_actors[curMsg.proc.nr_slot_rx % get_nrUE_params()->num_dl_actors].fifo, newRx);
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} else {
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newRx->processingFunc(curMsgRx);
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}
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// apply new NTN timing information
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// apply new NTN timing information
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apply_ntn_config(UE, fp, slot_nr, &duration_rx_to_tx, &timing_advance, &ntn_koffset);
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apply_ntn_config(UE, fp, slot_nr, &duration_rx_to_tx, &timing_advance, &ntn_koffset);
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@@ -506,11 +506,17 @@ int main(int argc, char **argv)
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UE[CC_id]->sl_mode = get_softmodem_params()->sl_mode;
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UE[CC_id]->sl_mode = get_softmodem_params()->sl_mode;
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init_actor(&UE[CC_id]->sync_actor, "SYNC_", -1);
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init_actor(&UE[CC_id]->sync_actor, "SYNC_", -1);
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for (int i = 0; i < NUM_DL_ACTORS; i++) {
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if (get_nrUE_params()->num_dl_actors > 0) {
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init_actor(&UE[CC_id]->dl_actors[i], "DL_", -1);
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UE[CC_id]->dl_actors = calloc_or_fail(get_nrUE_params()->num_dl_actors, sizeof(*UE[CC_id]->dl_actors));
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for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
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init_actor(&UE[CC_id]->dl_actors[i], "DL_", -1);
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}
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}
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}
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for (int i = 0; i < NUM_UL_ACTORS; i++) {
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if (get_nrUE_params()->num_ul_actors > 0) {
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init_actor(&UE[CC_id]->ul_actors[i], "UL_", -1);
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UE[CC_id]->ul_actors = calloc_or_fail(get_nrUE_params()->num_ul_actors, sizeof(*UE[CC_id]->ul_actors));
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for (int i = 0; i < get_nrUE_params()->num_ul_actors; i++) {
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init_actor(&UE[CC_id]->ul_actors[i], "UL_", -1);
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}
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}
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}
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init_nr_ue_vars(UE[CC_id], inst);
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init_nr_ue_vars(UE[CC_id], inst);
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@@ -576,10 +582,10 @@ int main(int argc, char **argv)
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for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
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for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
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PHY_VARS_NR_UE *phy_vars = PHY_vars_UE_g[0][CC_id];
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PHY_VARS_NR_UE *phy_vars = PHY_vars_UE_g[0][CC_id];
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if (phy_vars) {
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if (phy_vars) {
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for (int i = 0; i < NUM_UL_ACTORS; i++) {
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for (int i = 0; i < get_nrUE_params()->num_ul_actors; i++) {
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shutdown_actor(&phy_vars->ul_actors[i]);
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shutdown_actor(&phy_vars->ul_actors[i]);
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}
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}
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for (int i = 0; i < NUM_DL_ACTORS; i++) {
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for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
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shutdown_actor(&phy_vars->dl_actors[i]);
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shutdown_actor(&phy_vars->dl_actors[i]);
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}
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}
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int ret = pthread_join(phy_vars->main_thread, NULL);
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int ret = pthread_join(phy_vars->main_thread, NULL);
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@@ -22,7 +22,8 @@ extern uint16_t ue_id_g;
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#define CONFIG_HLP_FREQ_SYNC_I "coefficient for Integrating part of continuous frequency offset compensation PI controller\n"
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#define CONFIG_HLP_FREQ_SYNC_I "coefficient for Integrating part of continuous frequency offset compensation PI controller\n"
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#define CONFIG_HLP_CONT_FO_COMP "Enable continuous frequency offset (FO) estimation and compensation and specify main FO source (1 = local oscillator, 2 = Doppler shift)\n"
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#define CONFIG_HLP_CONT_FO_COMP "Enable continuous frequency offset (FO) estimation and compensation and specify main FO source (1 = local oscillator, 2 = Doppler shift)\n"
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#define CONFIG_HLP_AGC "Rx Gain control used for UE\n"
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#define CONFIG_HLP_AGC "Rx Gain control used for UE\n"
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#define CONFIG_HLP_NUM_UL_ACTORS "Number of UL actors to use. Set to 0 to use the default value\n"
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#define CONFIG_HLP_NUM_UL_ACTORS "Number of UL actors to use. Set to 0 to disable UL actor framework and do processing inline\n"
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#define CONFIG_HLP_NUM_DL_ACTORS "Number of DL actors to use. Set to 0 to disable DL actor framework and do processing inline\n"
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/***************************************************************************************************************************************/
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/***************************************************************************************************************************************/
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/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
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/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
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@@ -78,7 +79,8 @@ extern uint16_t ue_id_g;
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{"freq-sync-I", CONFIG_HLP_FREQ_SYNC_I, 0, .dblptr=&(nrUE_params.freq_sync_I), .defdblval=0.001, TYPE_DOUBLE, 0}, \
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{"freq-sync-I", CONFIG_HLP_FREQ_SYNC_I, 0, .dblptr=&(nrUE_params.freq_sync_I), .defdblval=0.001, TYPE_DOUBLE, 0}, \
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{"cont-fo-comp", CONFIG_HLP_CONT_FO_COMP, 0, .iptr=&(nrUE_params.cont_fo_comp), .defintval=0, TYPE_INT, 0}, \
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{"cont-fo-comp", CONFIG_HLP_CONT_FO_COMP, 0, .iptr=&(nrUE_params.cont_fo_comp), .defintval=0, TYPE_INT, 0}, \
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{"agc", CONFIG_HLP_AGC, PARAMFLAG_BOOL, .iptr=&(nrUE_params.agc), .defintval=0, TYPE_INT, 0}, \
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{"agc", CONFIG_HLP_AGC, PARAMFLAG_BOOL, .iptr=&(nrUE_params.agc), .defintval=0, TYPE_INT, 0}, \
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{"num-ul-actors", CONFIG_HLP_NUM_UL_ACTORS, 0, .iptr=&nrUE_params.num_ul_actors, .defintval=0, TYPE_INT, 0}, \
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{"num-ul-actors", CONFIG_HLP_NUM_UL_ACTORS, 0, .iptr=&nrUE_params.num_ul_actors, .defintval=2, TYPE_INT, 0}, \
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{"num-dl-actors", CONFIG_HLP_NUM_DL_ACTORS, 0, .iptr=&nrUE_params.num_dl_actors, .defintval=4, TYPE_INT, 0}, \
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}
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}
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// clang-format on
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// clang-format on
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@@ -119,6 +121,7 @@ typedef struct {
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int vcdflag;
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int vcdflag;
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int tx_max_power;
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int tx_max_power;
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int num_ul_actors;
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int num_ul_actors;
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int num_dl_actors;
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} nrUE_params_t;
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} nrUE_params_t;
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extern uint64_t get_nrUE_optmask(void);
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extern uint64_t get_nrUE_optmask(void);
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extern uint64_t set_nrUE_optmask(uint64_t bitmask);
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extern uint64_t set_nrUE_optmask(uint64_t bitmask);
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@@ -81,8 +81,6 @@
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#define bzero(s,n) (memset((s),0,(n)))
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#define bzero(s,n) (memset((s),0,(n)))
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/// suppress compiler warning for unused arguments
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/// suppress compiler warning for unused arguments
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#define UNUSED(x) (void)x;
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#define UNUSED(x) (void)x;
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#define NUM_DL_ACTORS 4
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#define NUM_UL_ACTORS 2
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// Set the number of barriers for processSlotTX to 512. This value has to be at least 483 for NTN where
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// Set the number of barriers for processSlotTX to 512. This value has to be at least 483 for NTN where
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// DL-to-UL offset is up to 483. The selected value is also half of the frame range so that
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// DL-to-UL offset is up to 483. The selected value is also half of the frame range so that
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@@ -519,8 +517,8 @@ typedef struct PHY_VARS_NR_UE_s {
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sl_nr_sidelink_mode_t sl_mode;
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sl_nr_sidelink_mode_t sl_mode;
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sl_nr_ue_phy_params_t SL_UE_PHY_PARAMS;
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sl_nr_ue_phy_params_t SL_UE_PHY_PARAMS;
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Actor_t sync_actor;
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Actor_t sync_actor;
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Actor_t dl_actors[NUM_DL_ACTORS];
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Actor_t *dl_actors;
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Actor_t ul_actors[NUM_UL_ACTORS];
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Actor_t *ul_actors;
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ntn_config_message_t* ntn_config_message;
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ntn_config_message_t* ntn_config_message;
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pthread_t main_thread;
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pthread_t main_thread;
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pthread_t stat_thread;
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pthread_t stat_thread;
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