diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 25ff417a96..6dbfd94517 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -2627,12 +2627,14 @@ target_link_libraries(nr_dlsim add_executable(nr_prachsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/prachsim.c - ${OPENAIR_DIR}/common/utils/backtrace.c ${OPENAIR_DIR}/common/utils/system.c ${OPENAIR_DIR}/common/utils/nr/nr_common.c ${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c - ${T_SOURCE}) -target_link_libraries(nr_prachsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl) + ${UTIL_SRC} + ${T_SOURCE} + ${SHLIB_LOADER_SOURCES}) +target_link_libraries(nr_prachsim + -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE MAC_NR_COMMON SCHED_NR_LIB SCHED_NR_UE_LIB RRC_LIB NR_RRC_LIB L2_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} ${ITTI_LIB} dl) add_executable(nr_ulschsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulschsim.c diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h index 32046d4982..babcc6404f 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h @@ -51,8 +51,8 @@ #define FAPI_NR_UL_CONFIG_LIST_NUM 10 #define FAPI_NR_UL_CONFIG_TYPE_PRACH 0x01 -#define FAPI_NR_UL_CONFIG_TYPE_UCI 0x02 -#define FAPI_NR_UL_CONFIG_TYPE_ULSCH 0x03 +#define FAPI_NR_UL_CONFIG_TYPE_PUCCH 0x02 +#define FAPI_NR_UL_CONFIG_TYPE_PUSCH 0x03 #define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04 diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h index 30020aaf23..c244c61968 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h @@ -1,5 +1,4 @@ -/* - * Copyright 2017 Cisco Systems, Inc. +/*Copyright 2017 Cisco Systems, Inc. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -197,11 +196,11 @@ typedef struct { } fapi_nr_rx_indication_body_t; /// -#define FAPI_RX_IND_MAX_PDU 100 +#define NFAPI_RX_IND_MAX_PDU 100 typedef struct { uint32_t sfn_slot; uint16_t number_pdus; - fapi_nr_rx_indication_body_t rx_indication_body[FAPI_RX_IND_MAX_PDU]; + fapi_nr_rx_indication_body_t rx_indication_body[NFAPI_RX_IND_MAX_PDU]; } fapi_nr_rx_indication_t; typedef struct { @@ -224,22 +223,22 @@ typedef struct { fapi_nr_tx_request_body_t *tx_request_body; } fapi_nr_tx_request_t; -typedef struct { - uint8_t preamble_index; - uint8_t prach_configuration_index; - uint16_t preamble_length; - uint8_t power_ramping_step; - uint16_t preamble_received_target_power; - uint8_t msg1_fdm; - uint8_t msg1_frequency_start; - uint8_t zero_correlation_zone_config; - uint8_t subcarrier_spacing; - uint8_t restrictedset_config; - uint16_t root_sequence_index; - uint16_t rsrp_threshold_ssb; - uint16_t rsrp_threshold_sul; - uint16_t prach_freq_offset; -} fapi_nr_ul_config_prach_pdu; + typedef struct { + uint8_t preamble_index; + uint8_t prach_configuration_index; + uint16_t preamble_length; + uint8_t power_ramping_step; + uint16_t preamble_received_target_power; + uint8_t msg1_fdm; + uint8_t msg1_frequency_start; + uint8_t zero_correlation_zone_config; + uint8_t subcarrier_spacing; + uint8_t restrictedset_config; + uint16_t root_sequence_index; + uint16_t rsrp_threshold_ssb; + uint16_t rsrp_threshold_sul; + uint16_t prach_freq_offset; + } fapi_nr_ul_config_prach_pdu; typedef struct { @@ -322,7 +321,7 @@ typedef struct { // pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M int8_t twoPUCCH_PC_AdjustmentStates; - } fapi_nr_ul_config_uci_pdu; + } fapi_nr_ul_config_pucch_pdu; typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t; typedef struct{ @@ -352,39 +351,23 @@ typedef struct { uint8_t maxCodeBlockGroupsPerTransportBlock; uint8_t ptrs_dmrs_association_port; uint8_t beta_offset_ind; - } fapi_nr_ul_config_ulsch_pdu_rel15_t; + } fapi_nr_ul_config_pusch_pdu_rel15_t; typedef struct { uint16_t rnti; - fapi_nr_ul_config_ulsch_pdu_rel15_t ulsch_pdu_rel15; -} fapi_nr_ul_config_ulsch_pdu; + fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15; +} fapi_nr_ul_config_pusch_pdu; typedef struct { } fapi_nr_ul_config_srs_pdu; -// nFAPI enums -typedef enum { - FAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0, - FAPI_NR_DL_CONFIG_BCH_PDU_TYPE, - FAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE, - FAPI_NR_DL_CONFIG_PCH_PDU_TYPE, -} fapi_nr_dl_config_pdu_type_e; - -// nFAPI enums -typedef enum { - FAPI_NR_UL_CONFIG_PRACH_PDU_TYPE = 0, - FAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE, - FAPI_NR_UL_CONFIG_UCI_PDU_TYPE, - FAPI_NR_UL_CONFIG_SRS_PDU_TYPE, -} fapi_nr_ul_config_pdu_type_e; - typedef struct { uint8_t pdu_type; union { fapi_nr_ul_config_prach_pdu prach_config_pdu; - fapi_nr_ul_config_uci_pdu uci_config_pdu; - fapi_nr_ul_config_ulsch_pdu ulsch_config_pdu; + fapi_nr_ul_config_pucch_pdu pucch_config_pdu; + fapi_nr_ul_config_pusch_pdu ulsch_config_pdu; fapi_nr_ul_config_srs_pdu srs_config_pdu; }; } fapi_nr_ul_config_request_pdu_t; @@ -452,20 +435,6 @@ typedef struct { // to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t } fapi_nr_dl_config_dlsch_pdu_rel15_t; -typedef struct { - - uint8_t subcarrier_spacing_common; - uint8_t ssb_subcarrier_offset; - uint8_t dmrs_type_a_position; - uint8_t pdcch_config_sib1; - uint8_t cell_barred; - uint8_t intra_frequency_reselection; - - uint16_t system_frame_number; - uint8_t ssb_index; - uint8_t half_frame_bit; -} fapi_nr_dl_config_bch_pdu; - typedef struct { uint16_t rnti; fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15; @@ -474,7 +443,6 @@ typedef struct { typedef struct { uint8_t pdu_type; union { - fapi_nr_dl_config_bch_pdu bch_config_pdu; fapi_nr_dl_config_dci_pdu dci_config_pdu; fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu; }; @@ -492,154 +460,6 @@ typedef struct { // -typedef struct { - uint8_t numerology_index_mu; - uint8_t duplex_mode; - uint8_t dl_cyclic_prefix_type; - uint8_t ul_cyclic_prefix_type; -} fapi_nr_subframe_config_t; - -typedef struct { - uint16_t dl_carrier_bandwidth; - uint16_t ul_carrier_bandwidth; - uint16_t dl_absolutefrequencypointA; - uint16_t ul_absolutefrequencypointA; - uint16_t dl_offsettocarrier; - uint16_t ul_offsettocarrier; - uint16_t dl_subcarrierspacing; - uint16_t ul_subcarrierspacing; - uint16_t dl_specificcarrier_k0; - uint16_t ul_specificcarrier_k0; - uint16_t NIA_subcarrierspacing; -} fapi_nr_rf_config_t; - -typedef struct { - uint16_t physical_cell_id; - uint8_t half_frame_index; - uint16_t ssb_subcarrier_offset; - uint16_t ssb_sib1_position_in_burst; // in sib1 - uint64_t ssb_scg_position_in_burst; // in servingcellconfigcommon - uint8_t ssb_periodicity; - uint16_t ss_pbch_block_power; - uint16_t n_ssb_crb; -} fapi_nr_sch_config_t; - -typedef struct { - uint16_t dl_bandwidth; - uint16_t ul_bandwidth; - uint16_t dl_offset; - uint16_t ul_offset; - uint8_t dl_subcarrierSpacing; - uint8_t ul_subcarrierSpacing; -} fapi_nr_initialBWP_config_t; - -#define FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS 16 -#define FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS 16 - -typedef struct { - uint16_t dmrs_TypeA_Position; - uint16_t num_PDSCHTimeDomainResourceAllocations; - uint16_t PDSCHTimeDomainResourceAllocation_k0[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS]; - uint16_t PDSCHTimeDomainResourceAllocation_mappingType[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS]; - uint16_t PDSCHTimeDomainResourceAllocation_startSymbolAndLength[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS]; -} fapi_nr_pdsch_config_t; - -typedef struct { - uint16_t prach_RootSequenceIndex; ///// L1 parameter 'PRACHRootSequenceIndex' - uint16_t prach_msg1_SubcarrierSpacing; ///// L1 parameter 'prach-Msg1SubcarrierSpacing' - uint16_t restrictedSetConfig; - uint16_t msg3_transformPrecoding; ///// L1 parameter 'msg3-tp' - uint16_t ssb_perRACH_OccasionAndCB_PreamblesPerSSB; - uint16_t ra_ContentionResolutionTimer; - uint16_t rsrp_ThresholdSSB; - /////////////////--------------------NR RACH-ConfigGeneric--------------------///////////////// - uint16_t prach_ConfigurationIndex; ///// L1 parameter 'PRACHConfigurationIndex' - uint16_t prach_msg1_FDM; ///// L1 parameter 'prach-FDM' - uint16_t prach_msg1_FrequencyStart; ///// L1 parameter 'prach-frequency-start' - uint16_t zeroCorrelationZoneConfig; - uint16_t preambleReceivedTargetPower; - uint16_t preambleTransMax; - uint16_t powerRampingStep; - uint16_t ra_ResponseWindow; -} fapi_nr_rach_config_t; - -typedef struct { - uint16_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding' - uint16_t msg3_DeltaPreamble; ///// L1 parameter 'Delta-preamble-msg3' - uint16_t p0_NominalWithGrant; ///// L1 parameter 'p0-nominal-pusch-withgrant' - uint16_t dmrs_TypeA_Position; - uint16_t num_PUSCHTimeDomainResourceAllocations; - uint16_t PUSCHTimeDomainResourceAllocation_k2[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS]; ///// L1 parameter 'K2' - uint16_t PUSCHTimeDomainResourceAllocation_mappingType[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS]; ///// L1 parameter 'Mapping-type' - uint16_t PUSCHTimeDomainResourceAllocation_startSymbolAndLength[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS]; -} fapi_nr_pusch_config_t; - -typedef struct { - uint8_t pucch_resource_common; - uint16_t pucch_GroupHopping; ///// L1 parameter 'PUCCH-GroupHopping' - uint8_t hopping_id; - uint16_t p0_nominal; ///// L1 parameter 'p0-nominal-pucch' -} fapi_nr_pucch_config_t; - -typedef struct { - uint8_t controlResourceSetZero; - uint8_t searchSpaceZero; - - // fapi_nr_SearchSpace_t sib1searchSpace; - // fapi_nr_SearchSpace_t sibssearchSpace; - // fapi_nr_SearchSpace_t ra_SearchSpace; -} fapi_nr_pdcch_config_t; - -typedef struct { -//NR TDD-UL-DL-ConfigCommon ///// L1 parameter 'UL-DL-configuration-common' - uint16_t referenceSubcarrierSpacing; ///// L1 parameter 'reference-SCS' - uint16_t dl_ul_periodicity; ///// L1 parameter 'DL-UL-transmission-periodicity' - uint16_t nrofDownlinkSlots; ///// L1 parameter 'number-of-DL-slots' - uint16_t nrofDownlinkSymbols; ///// L1 parameter 'number-of-DL-symbols-common' - uint16_t nrofUplinkSlots; ///// L1 parameter 'number-of-UL-slots' - uint16_t nrofUplinkSymbols; ///// L1 parameter 'number-of-UL-symbols-common' - uint16_t Pattern2Present; - uint16_t Pattern2_dl_ul_periodicity; ///// L1 parameter 'DL-UL-transmission-periodicity' - uint16_t Pattern2_nrofDownlinkSlots; ///// L1 parameter 'number-of-DL-slots' - uint16_t Pattern2_nrofDownlinkSymbols; ///// L1 parameter 'number-of-DL-symbols-common' - uint16_t Pattern2_nrofUplinkSlots; ///// L1 parameter 'number-of-UL-slots' - uint16_t Pattern2_nrofUplinkSymbols; ///// L1 parameter 'number-of-UL-symbols-common' -} fapi_nr_tdd_ul_dl_config_t; - -#define FAPI_MAX_NUM_RF_BANDS 16 -typedef struct { - uint16_t number_rf_bands; - uint16_t rf_band[FAPI_MAX_NUM_RF_BANDS]; -} fapi_rf_bands_t; - -typedef struct -{ - fapi_rf_bands_t rf_bands; - - uint32_t nrarfcn; - - // nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands; - // nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands; - // nfapi_nmm_frequency_bands_t nmm_lte_frequency_bands; - // nfapi_uint8_tlv_t nmm_uplink_rssi_supported; - -} fapi_nr_fapi_t; - -typedef struct { - fapi_nr_fapi_t fapi_config; - fapi_nr_subframe_config_t subframe_config; - fapi_nr_rf_config_t rf_config; - fapi_nr_sch_config_t sch_config; - fapi_nr_initialBWP_config_t initialBWP_config; - fapi_nr_pdsch_config_t pdsch_config; - fapi_nr_rach_config_t rach_config; - fapi_nr_pusch_config_t pusch_config; - fapi_nr_pucch_config_t pucch_config; - fapi_nr_pdcch_config_t pdcch_config; - fapi_nr_tdd_ul_dl_config_t tdd_ul_dl_config; - // fapi_nr_ratematchpattern_t ratematchpattern; - // fapi_nr_ratematchpattern_lte_crs_t ratematchpattern_lte_crs; -} fapi_nr_config_request_t; typedef struct { fapi_nr_coreset_t coreset; @@ -723,6 +543,19 @@ typedef struct { uint8_t p0_nominal; } fapi_nr_pucch_config_common_t; +typedef struct { + + uint8_t subcarrier_spacing_common; + uint8_t ssb_subcarrier_offset; + uint8_t dmrs_type_a_position; + uint8_t pdcch_config_sib1; + uint8_t cell_barred; + uint8_t intra_frequency_reselection; + + uint16_t system_frame_number; + uint8_t ssb_index; + uint8_t half_frame_bit; +} fapi_nr_pbch_config_t; typedef struct { @@ -859,6 +692,7 @@ typedef struct { fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated; fapi_nr_sps_config_t sps_config; fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config; + } fapi_nr_dl_bwp_dedicated_config_t; typedef struct { @@ -1072,4 +906,18 @@ typedef struct { #define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED 0x08 #define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED 0x10 +typedef struct { + uint32_t config_mask; + + fapi_nr_pbch_config_t pbch_config; // MIB + + fapi_nr_dl_bwp_common_config_t dl_bwp_common; + fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated; + + fapi_nr_ul_bwp_common_config_t ul_bwp_common; + fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated; + +} fapi_nr_config_request_t; + #endif + diff --git a/openair1/SCHED_NR_UE/defs.h b/openair1/SCHED_NR_UE/defs.h index 0c2d030f81..e1f1ea0f42 100644 --- a/openair1/SCHED_NR_UE/defs.h +++ b/openair1/SCHED_NR_UE/defs.h @@ -121,10 +121,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e @param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying @param phy_vars_rn pointer to RN variables */ - -int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, - uint8_t do_pdcch_flag,runmode_t mode, - fapi_nr_dl_config_request_t *DLconfigreq); +int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode); int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type); @@ -373,11 +370,10 @@ void nr_compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsP void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx); int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx); -fapi_nr_dl_config_bch_pdu *is_pbch_in_slot(fapi_nr_dl_config_request_t *DLconfigreq, int frame, int slot, int periodicity, uint16_t slots_per_frame); +int is_pbch_in_slot(fapi_nr_pbch_config_t *pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame); /*@}*/ #endif - diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 5a3d14ca02..50f169f708 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -136,54 +136,55 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response) if(scheduled_response->ul_config != NULL){ fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config; for(i=0; inumber_pdus; ++i){ - if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_ULSCH){ + if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){ // pusch config pdu - fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15; - uint8_t current_harq_pid = ulsch_config_pdu->harq_process_nbr; - ulsch0->harq_processes[current_harq_pid]->nb_rb = ulsch_config_pdu->number_rbs; - ulsch0->harq_processes[current_harq_pid]->first_rb = ulsch_config_pdu->start_rb; - ulsch0->harq_processes[current_harq_pid]->number_of_symbols = ulsch_config_pdu->number_symbols; - ulsch0->harq_processes[current_harq_pid]->start_symbol = ulsch_config_pdu->start_symbol; - ulsch0->harq_processes[current_harq_pid]->mcs = ulsch_config_pdu->mcs; - ulsch0->harq_processes[current_harq_pid]->DCINdi = ulsch_config_pdu->ndi; - ulsch0->harq_processes[current_harq_pid]->rvidx = ulsch_config_pdu->rv; - ulsch0->f_pusch = ulsch_config_pdu->absolute_delta_PUSCH; + fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15; + uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr; + ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs; + ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb; + ulsch0->harq_processes[current_harq_pid]->number_of_symbols = pusch_config_pdu->number_symbols; + ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol; + ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs; + ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi; + ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv; + ulsch0->harq_processes[current_harq_pid]->Nl = pusch_config_pdu->n_layers; + ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH; } - if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_UCI){ + if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){ // pucch config pdu - fapi_nr_ul_config_uci_pdu *uci_config_pdu = &ul_config->ul_config_list[i].uci_config_pdu; + fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu; uint8_t pucch_resource_id = 0; //FIXME!!! uint8_t format = 1; // FIXME!!! - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = uci_config_pdu->initialCyclicShift; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = uci_config_pdu->nrofSymbols; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = uci_config_pdu->startingSymbolIndex; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = uci_config_pdu->nrofPRBs; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = uci_config_pdu->startingPRB; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = uci_config_pdu->timeDomainOCC; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = uci_config_pdu->occ_length; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = uci_config_pdu->occ_Index; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = uci_config_pdu->intraSlotFrequencyHopping; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = uci_config_pdu->secondHopPRB; // Not sure this parameter is used - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = uci_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used - PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = uci_config_pdu->pi2PBSK; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = uci_config_pdu->pucch_GroupHopping; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = uci_config_pdu->hoppingId; - PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = uci_config_pdu->p0_nominal; - /* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = uci_config_pdu->initialCyclicShift; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = uci_config_pdu->nrofSymbols; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = uci_config_pdu->startingSymbolIndex; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = uci_config_pdu->nrofPRBs; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = uci_config_pdu->startingPRB; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = uci_config_pdu->timeDomainOCC; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = uci_config_pdu->occ_length; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = uci_config_pdu->occ_Index; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = uci_config_pdu->intraSlotFrequencyHopping; - pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = uci_config_pdu->secondHopPRB; // Not sure this parameter is used - pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = uci_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used - pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = uci_config_pdu->pi2PBSK; - pucch_config_common->pucch_GroupHopping = uci_config_pdu->pucch_GroupHopping; - pucch_config_common->hoppingId = uci_config_pdu->hoppingId; - pucch_config_common->p0_nominal = uci_config_pdu->p0_nominal;*/ + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used + PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId; + PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal; + /* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; + pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used + pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used + pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; + pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; + pucch_config_common->hoppingId = pucch_config_pdu->hoppingId; + pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/ } if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){ // prach config pdu @@ -255,3 +256,4 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ return 0; } + diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 29c0141a14..52db68aebc 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -223,7 +223,7 @@ void nr_dump_dlsch_SI(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, exit(-1); } -//#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) +#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) //unsigned int gain_table[31] = {100,112,126,141,158,178,200,224,251,282,316,359,398,447,501,562,631,708,794,891,1000,1122,1258,1412,1585,1778,1995,2239,2512,2818,3162}; /* unsigned int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL) @@ -282,7 +282,7 @@ unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb return(0); } - +#endif void nr_dump_dlsch_ra(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t nr_tti_rx) { @@ -439,7 +439,6 @@ void nr_process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advan } - uint8_t nr_is_SR_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) { @@ -467,9 +466,9 @@ uint8_t nr_is_SR_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) } return(0); -} +} -uint8_t is_nr_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) +uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) { int nr_tti_tx = proc->nr_tti_tx; int frame = proc->frame_tx; @@ -487,7 +486,7 @@ uint8_t is_nr_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id else return(0); } -uint8_t is_nr_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) +uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) { @@ -566,8 +565,8 @@ void ue_compute_srs_occasion(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t // Simultaneous-AN-and-SRS is FALSE // check PUCCH format 2/2a/2b transmissions - is_pucch2_subframe = is_nr_cqi_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0); - is_pucch2_subframe = (is_nr_ri_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0)) || is_pucch2_subframe; + is_pucch2_subframe = is_cqi_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0); + is_pucch2_subframe = (is_ri_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0)) || is_pucch2_subframe; // check ACK/SR transmission if(frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission == FALSE) @@ -1428,137 +1427,6 @@ void ulsch_common_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_ } -void ue_prach_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode) { - - int frame_tx = proc->frame_tx; - int nr_tti_tx = proc->nr_tti_tx; - int prach_power; - PRACH_RESOURCES_t prach_resources_local; - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN); - - ue->generate_prach=0; - - if (ue->mac_enabled==0){ - ue->prach_resources[eNB_id] = &prach_resources_local; - prach_resources_local.ra_RNTI = 0xbeef; - prach_resources_local.ra_PreambleIndex = 0; - } - - if (ue->mac_enabled==1){ - // ask L2 for RACH transport - if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) { - LOG_D(PHY,"Getting PRACH resources\n"); - //ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(ue->Mod_id, - ue->CC_id, - frame_tx, - eNB_id, - nr_tti_tx); - LOG_D(PHY,"Got prach_resources for eNB %d address %p, RRCCommon %p\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[ue->Mod_id].radioResourceConfigCommon); - LOG_D(PHY,"Prach resources %p\n",ue->prach_resources[eNB_id]); - } -} - -if (ue->prach_resources[eNB_id]!=NULL) { - - ue->generate_prach=1; - ue->prach_cnt=0; -#ifdef SMBV - ue->prach_resources[eNB_id]->ra_PreambleIndex = 19; -#endif -#ifdef OAI_EMU - ue->prach_PreambleIndex=ue->prach_resources[eNB_id]->ra_PreambleIndex; -#endif - - if (abstraction_flag == 0) { - - LOG_I(PHY,"mode %d\n",mode); - - if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) { - ue->tx_power_dBm[nr_tti_tx] = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_nr_PL(ue,eNB_id); - } - else { - ue->tx_power_dBm[nr_tti_tx] = ue->tx_power_max_dBm; - ue->prach_resources[eNB_id]->ra_PreambleIndex = 19; - } - - LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : Generating PRACH, preamble %d,PL %d, P0_PRACH %d, TARGET_RECEIVED_POWER %d dBm, PRACH TDD Resource index %d, RA-RNTI %d\n", - ue->Mod_id, - frame_tx, - nr_tti_tx, - ue->prach_resources[eNB_id]->ra_PreambleIndex, - get_nr_PL(ue,eNB_id), - ue->tx_power_dBm[nr_tti_tx], - ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER, - ue->prach_resources[eNB_id]->ra_TDD_map_index, - ue->prach_resources[eNB_id]->ra_RNTI); - - ue->tx_total_RE[nr_tti_tx] = 96; - -#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) - ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm[nr_tti_tx], - ue->tx_power_max_dBm, - ue->frame_parms.N_RB_UL, - 6); -#else - ue->prach_vars[eNB_id]->amp = AMP; -#endif - if ((mode == calib_prach_tx) && (((proc->frame_tx&0xfffe)%100)==0)) - LOG_D(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : PRACH TX power %d dBm, amp %d\n", - ue->Mod_id, - proc->frame_rx, - proc->nr_tti_tx, - ue->tx_power_dBm[nr_tti_tx], - ue->prach_vars[eNB_id]->amp); - - - // start_meas(&ue->tx_prach); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN); - prach_power = generate_prach(ue,eNB_id,nr_tti_tx,frame_tx); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT); - // stop_meas(&ue->tx_prach); - LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n", - ue->Mod_id, - get_nr_PL(ue,eNB_id), - ue->tx_power_dBm[nr_tti_tx], - dB_fixed(prach_power), - ue->prach_vars[eNB_id]->amp); - } else { - UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_flag=1; - UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_id=ue->prach_resources[eNB_id]->ra_PreambleIndex; - } - - if (ue->mac_enabled==1){ - //mac_xface->Msg1_transmitted(ue->Mod_id, - ue->CC_id, - frame_tx, - eNB_id); - } - -LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n", - ue->Mod_id,frame_tx,nr_tti_tx,eNB_id, - ue->prach_resources[eNB_id]->ra_PreambleIndex, - ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_nr_PL(ue,eNB_id), - get_nr_PL(ue,eNB_id)); - -} - - -// if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue -if (mode == calib_prach_tx) - ue->prach_resources[eNB_id]=NULL; - -LOG_D(PHY,"[UE %d] frame %d nr_tti_rx %d : generate_prach %d, prach_cnt %d\n", - ue->Mod_id,frame_tx,nr_tti_tx,ue->generate_prach,ue->prach_cnt); - -ue->prach_cnt++; - -if (ue->prach_cnt==3) - ue->generate_prach=0; - -VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_OUT); -} - #endif void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue, @@ -1716,10 +1584,10 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue, // check Periodic CQI/RI reporting cqi_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0)&& - (is_nr_cqi_TXOp(ue,proc,eNB_id)==1)); + (is_cqi_TXOp(ue,proc,eNB_id)==1)); ri_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0) && - (is_nr_ri_TXOp(ue,proc,eNB_id)==1)); + (is_ri_TXOp(ue,proc,eNB_id)==1)); // compute CQI/RI resources compute_cqi_ri_resources(ue, ue->ulsch[eNB_id], eNB_id, ue->ulsch[eNB_id]->rnti, P_RNTI, CBA_RNTI, cqi_status, ri_status); @@ -1933,7 +1801,7 @@ if (abstraction_flag == 0) { #endif #if T_TRACER T(T_UE_PHY_PUSCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx),T_INT(ue->tx_power_dBm[nr_tti_tx]), - T_INT(tx_amp),T_INT(ue->ulsch[eNB_id]->f_pusch),T_INT(get_nr_PL(ue,eNB_id)),T_INT(nb_rb)); + T_INT(tx_amp),T_INT(ue->ulsch[eNB_id]->f_pusch),T_INT(get_PL(Mod_id,0,eNB_id)),T_INT(nb_rb)); #endif #ifdef UE_DEBUG_TRACE @@ -2240,10 +2108,10 @@ void ue_pucch_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_ nb_cw = ( (ack_status_cw0 != 0) ? 1:0) + ( (ack_status_cw1 != 0) ? 1:0); cqi_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0)&& - (is_nr_cqi_TXOp(ue,proc,eNB_id)==1)); + (is_cqi_TXOp(ue,proc,eNB_id)==1)); ri_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0) && - (is_nr_ri_TXOp(ue,proc,eNB_id)==1)); + (is_ri_TXOp(ue,proc,eNB_id)==1)); // Part - II // if nothing to report ==> exit function @@ -2307,7 +2175,7 @@ void ue_pucch_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_ #endif #if T_TRACER T(T_UE_PHY_PUCCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx),T_INT(ue->tx_power_dBm[nr_tti_tx]), - T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_nr_PL(ue,eNB_id))); + T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_PL(ue->Mod_id,ue->CC_id,eNB_id))); #endif #ifdef UE_DEBUG_TRACE @@ -2415,7 +2283,7 @@ void ue_pucch_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_ #endif #if T_TRACER T(T_UE_PHY_PUCCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx),T_INT(ue->tx_power_dBm[nr_tti_tx]), - T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_nr_PL(ue,eNB_id))); + T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_PL(ue->Mod_id,ue->CC_id,eNB_id))); #endif #ifdef UE_DEBUG_TRACE LOG_I(PHY,"[UE %d][RNTI %x] AbsSubFrame %d.%d Generating PUCCH 2 (RI or CQI), Po_PUCCH %d, isShortenPucch %d, amp %d\n", @@ -2535,6 +2403,136 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, } +void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode) { + + int frame_tx = proc->frame_tx; + int nr_tti_tx = proc->nr_tti_tx; + int prach_power; + uint16_t preamble_tx=50; + PRACH_RESOURCES_t prach_resources; + + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN); + + ue->generate_nr_prach=0; + if (ue->mac_enabled==0){ + ue->prach_resources[eNB_id] = &prach_resources; + ue->prach_resources[eNB_id]->ra_PreambleIndex = preamble_tx; + ue->prach_resources[eNB_id]->ra_TDD_map_index = 0; + } + + if (ue->mac_enabled==1){ + + // ask L2 for RACH transport + if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) { + LOG_D(PHY,"Getting PRACH resources\n"); + //ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(ue->Mod_id,ue->CC_id,frame_tx,eNB_id,nr_tti_tx); + // LOG_D(PHY,"Got prach_resources for eNB %d address %p, RRCCommon %p\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[ue->Mod_id].radioResourceConfigCommon); + // LOG_D(PHY,"Prach resources %p\n",ue->prach_resources[eNB_id]); + } +} + +if (ue->prach_resources[eNB_id]!=NULL) { + + ue->generate_nr_prach=1; + ue->prach_cnt=0; +#ifdef SMBV +ue->prach_resources[eNB_id]->ra_PreambleIndex = preamble_tx; +#endif + +#ifdef OAI_EMU + ue->prach_PreambleIndex=ue->prach_resources[eNB_id]->ra_PreambleIndex; +#endif + + if (abstraction_flag == 0) { + + LOG_I(PHY,"mode %d\n",mode); + + if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) { + + ue->tx_power_dBm[nr_tti_tx] = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_nr_PL(ue,eNB_id); + } + else { + ue->tx_power_dBm[nr_tti_tx] = ue->tx_power_max_dBm; + ue->prach_resources[eNB_id]->ra_PreambleIndex = preamble_tx; + } + + LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : Generating PRACH, preamble %d,PL %d, P0_PRACH %d, TARGET_RECEIVED_POWER %d dBm, PRACH TDD Resource index %d, RA-RNTI %d\n", + ue->Mod_id, + frame_tx, + nr_tti_tx, + ue->prach_resources[eNB_id]->ra_PreambleIndex, + get_nr_PL(ue,eNB_id), + ue->tx_power_dBm[nr_tti_tx], + ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER, + ue->prach_resources[eNB_id]->ra_TDD_map_index, + ue->prach_resources[eNB_id]->ra_RNTI); + + ue->tx_total_RE[nr_tti_tx] = 96; + +#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) + ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm[nr_tti_tx], + ue->tx_power_max_dBm, + ue->frame_parms.N_RB_UL, + 6); +#else + ue->prach_vars[eNB_id]->amp = AMP; +#endif + if ((mode == calib_prach_tx) && (((proc->frame_tx&0xfffe)%100)==0)) + LOG_D(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : PRACH TX power %d dBm, amp %d\n", + ue->Mod_id, + proc->frame_rx, + proc->nr_tti_tx, + ue->tx_power_dBm[nr_tti_tx], + ue->prach_vars[eNB_id]->amp); + + + // start_meas(&ue->tx_prach); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN); + +// prach_power = generate_nr_prach(ue,eNB_id,nr_tti_tx,frame_tx); +prach_power = generate_nr_prach(ue,0,9,0); //subframe number hardcoded according to the simulator + + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT); + // stop_meas(&ue->tx_prach); + LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n", + ue->Mod_id, + get_nr_PL(ue,eNB_id), + ue->tx_power_dBm[nr_tti_tx], + dB_fixed(prach_power), + ue->prach_vars[eNB_id]->amp); + }/* else { + UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_flag=1; + UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_id=ue->prach_resources[eNB_id]->ra_PreambleIndex; + }*/ // commented for compiling as abstraction flag is 0 + + if (ue->mac_enabled==1){ + //mac_xface->Msg1_transmitted(ue->Mod_id,ue->CC_id,frame_tx,eNB_id); + } + +LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n", + ue->Mod_id,frame_tx,nr_tti_tx,eNB_id, + ue->prach_resources[eNB_id]->ra_PreambleIndex, + ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_nr_PL(ue,eNB_id), + get_nr_PL(ue,eNB_id)); + +} + + +// if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue +if (mode == calib_prach_tx) + ue->prach_resources[eNB_id]=NULL; + +LOG_D(PHY,"[UE %d] frame %d nr_tti_rx %d : generate_nr_prach %d, prach_cnt %d\n", + ue->Mod_id,frame_tx,nr_tti_tx,ue->generate_nr_prach,ue->prach_cnt); + +ue->prach_cnt++; + +if (ue->prach_cnt==3) + ue->generate_nr_prach=0; + +VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_OUT); +} + /* void phy_procedures_UE_S_TX(PHY_VARS_NR_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag,relaying_type_t r_type) { @@ -2577,14 +2575,14 @@ void nr_ue_measurement_procedures(uint16_t l, // symbol index of each slot [0 if (l==2) { // UE measurements on symbol 0 LOG_D(PHY,"Calling measurements nr_tti_rx %d, rxdata %p\n",nr_tti_rx,ue->common_vars.rxdata); - /* +/* nr_ue_measurements(ue, 0, 0, 0, 0, nr_tti_rx); - */ +*/ //(nr_tti_rx*frame_parms->samples_per_tti+ue->rx_offset)%(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) #if T_TRACER @@ -2700,9 +2698,9 @@ void restart_phy(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc, uint8_t eNB_id,uint #endif //(0) void nr_ue_pbch_procedures(uint8_t eNB_id, - PHY_VARS_NR_UE *ue, - UE_nr_rxtx_proc_t *proc, - uint8_t ssb_index) + PHY_VARS_NR_UE *ue, + UE_nr_rxtx_proc_t *proc, + uint8_t abstraction_flag) { // int i; //int pbch_tx_ant=0; @@ -2724,7 +2722,7 @@ void nr_ue_pbch_procedures(uint8_t eNB_id, ue->pbch_vars[eNB_id], &ue->frame_parms, eNB_id, - ssb_index, + ue->nrUE_config.pbch_config.ssb_index, SISO, ue->high_speed_flag); @@ -3517,13 +3515,13 @@ void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmod #endif void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, - UE_nr_rxtx_proc_t *proc, - int eNB_id, - PDSCH_t pdsch, - NR_UE_DLSCH_t *dlsch0, - NR_UE_DLSCH_t *dlsch1, - int *dlsch_errors, - runmode_t mode) { + UE_nr_rxtx_proc_t *proc, + int eNB_id, + PDSCH_t pdsch, + NR_UE_DLSCH_t *dlsch0, + NR_UE_DLSCH_t *dlsch1, + int *dlsch_errors, + runmode_t mode) { int harq_pid; int frame_rx = proc->frame_rx; @@ -3533,23 +3531,23 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, NR_UE_PDSCH *pdsch_vars; uint8_t is_cw0_active = 0; uint8_t is_cw1_active = 0; + //nfapi_nr_config_request_t *cfg = &ue->nrUE_config; + //uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value; + uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4; + uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value; + uint16_t nb_symb_sch = 9; nr_downlink_indication_t dl_indication; fapi_nr_rx_indication_t rx_ind; - if (dlsch0==NULL) AssertFatal(0,"dlsch0 should be defined at this level \n"); harq_pid = dlsch0->current_harq_pid; is_cw0_active = dlsch0->harq_processes[harq_pid]->status; - uint16_t nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols; + nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols; + - nfapi_nr_dl_tti_pdsch_pdu_rel15_t *dl_config_pdu = &dlsch0->harq_processes[harq_pid]->dl_config_pdu; - uint8_t dmrs_Type = dl_config_pdu->dmrsConfigType; - AssertFatal(dmrs_Type == 1 || dmrs_Type == 2,"Illegal dmrs_type %d\n",dmrs_Type); - uint8_t nb_re_dmrs = (dmrs_Type==1)?6:4; - uint8_t num_dmrs_symbols = get_num_dmrs(dl_config_pdu->dlDmrsSymbPos); if(dlsch1) is_cw1_active = dlsch1->harq_processes[harq_pid]->status; @@ -3610,17 +3608,17 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, dlsch0->harq_processes[harq_pid]->G = nr_get_G(dlsch0->harq_processes[harq_pid]->nb_rb, nb_symb_sch, nb_re_dmrs, - num_dmrs_symbols, + length_dmrs, dlsch0->harq_processes[harq_pid]->Qm, dlsch0->harq_processes[harq_pid]->Nl); #if UE_TIMING_TRACE start_meas(&ue->dlsch_unscrambling_stats); #endif nr_dlsch_unscrambling(pdsch_vars->llr[0], - dlsch0->harq_processes[harq_pid]->G, - 0, - ue->frame_parms.Nid_cell, - dlsch0->rnti); + dlsch0->harq_processes[harq_pid]->G, + 0, + ue->frame_parms.Nid_cell, + dlsch0->rnti); #if UE_TIMING_TRACE @@ -3694,7 +3692,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, dlsch1->harq_processes[harq_pid]->G = nr_get_G(dlsch1->harq_processes[harq_pid]->nb_rb, nb_symb_sch, nb_re_dmrs, - num_dmrs_symbols, + length_dmrs, dlsch1->harq_processes[harq_pid]->Qm, dlsch1->harq_processes[harq_pid]->Nl); #if UE_TIMING_TRACE @@ -3971,9 +3969,7 @@ void *UE_thread_slot1_dl_processing(void *arg) { if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1)) { - // fix this for multi-threaded case - uint8_t ssb_index=0; - ue_pbch_procedures(0,ue,proc,0,ssb_index); + ue_pbch_procedures(0,ue,proc,0); } proc->chan_est_slot1_available = 1; @@ -4108,40 +4104,36 @@ void *UE_thread_slot1_dl_processing(void *arg) { #endif +int is_pbch_in_slot(fapi_nr_pbch_config_t *pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame) { -fapi_nr_dl_config_bch_pdu *is_pbch_in_slot(fapi_nr_dl_config_request_t *DLconfigreq, int frame, int slot, int periodicity, uint16_t slots_per_frame) { + int ssb_slot_decoded = (pbch_config->ssb_index)/2; - for (int i=0;inumber_pdus;i++) { - - if (DLconfigreq->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_BCH_PDU_TYPE) { - int ssb_slot_decoded = (DLconfigreq->dl_config_list[i].bch_config_pdu.ssb_index)/2; - // All this checking should be done MAC - if (periodicity == 5) { - // check for pbch in corresponding slot each half frame - if (DLconfigreq->dl_config_list[i].bch_config_pdu.half_frame_bit) { - if (slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2) return(&DLconfigreq->dl_config_list[i].bch_config_pdu); - } - else { - if (slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2) return(&DLconfigreq->dl_config_list[i].bch_config_pdu); - } - } - else { - // if the current frame is supposed to contain ssb - if (!((frame-(DLconfigreq->dl_config_list[i].bch_config_pdu.system_frame_number))%(periodicity/10))) { - if (slot == ssb_slot_decoded) return(&DLconfigreq->dl_config_list[i].bch_config_pdu); - } - } - } + if (periodicity == 5) { + // check for pbch in corresponding slot each half frame + if (pbch_config->half_frame_bit) + return(slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2); + else + return(slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2); + } + else { + // if the current frame is supposed to contain ssb + if (!((frame-(pbch_config->system_frame_number))%(periodicity/10))) + return(slot == ssb_slot_decoded); + else + return 0; } - return NULL; } -int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, - uint8_t do_pdcch_flag,runmode_t mode, - fapi_nr_dl_config_request_t *DLconfigreq) { +int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, + UE_nr_rxtx_proc_t *proc, + uint8_t eNB_id, + uint8_t do_pdcch_flag, + runmode_t mode) +{ int frame_rx = proc->frame_rx; int nr_tti_rx = proc->nr_tti_rx; + int slot_pbch; NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0]; NR_UE_DLSCH_t **dlsch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id]; uint8_t harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid; @@ -4151,7 +4143,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration; uint8_t ssb_periodicity = 10;// ue->ssb_periodicity; // initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE) uint8_t dci_cnt = 0; - + fapi_nr_pbch_config_t *pbch_config = &ue->nrUE_config.pbch_config; LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx); @@ -4175,11 +4167,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN uint16_t coreset_nb_rb = 6 * coreset_count; uint16_t coreset_start_rb = 6 * coreset_start; - - fapi_nr_dl_config_bch_pdu *bch_config = is_pbch_in_slot(DLconfigreq, frame_rx, nr_tti_rx, ssb_periodicity, ue->frame_parms.slots_per_frame); + slot_pbch = is_pbch_in_slot(pbch_config, frame_rx, nr_tti_rx, ssb_periodicity, ue->frame_parms.slots_per_frame); // looking for pbch only in slot where it is supposed to be - if ((ue->decode_MIB == 1) && bch_config) + if ((ue->decode_MIB == 1) && slot_pbch) { LOG_I(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx); @@ -4194,13 +4185,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN #if UE_TIMING_TRACE start_meas(&ue->dlsch_channel_estimation_stats); #endif - nr_pbch_channel_estimation(ue, - 0, - nr_tti_rx, - (ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot), - i-1, - (bch_config->ssb_index)&7, - bch_config->half_frame_bit); + nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot),i-1,(pbch_config->ssb_index)&7,pbch_config->half_frame_bit); #if UE_TIMING_TRACE stop_meas(&ue->dlsch_channel_estimation_stats); #endif @@ -4236,11 +4221,11 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN 0); nr_pdcch_channel_estimation(ue, - 0, - nr_tti_rx, - l, - ue->frame_parms.first_carrier_offset+coreset_start_rb*12, - coreset_nb_rb); + 0, + nr_tti_rx, + l, + ue->frame_parms.first_carrier_offset+coreset_start_rb*12, + coreset_nb_rb); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT); #if UE_TIMING_TRACE @@ -4263,6 +4248,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN } #endif //NR_PDCCH_SCHED + if (dci_cnt > 0){ LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx); //to update from pdsch config @@ -4523,6 +4509,9 @@ stop_meas(&ue->generic_stat); printf("after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0)); #endif +#ifdef EMOS +phy_procedures_emos_UE_RX(ue,slot,eNB_id); +#endif VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT); @@ -4541,195 +4530,49 @@ LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_tti_rx,ue->phy_proc_ LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx); return (0); } - -void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode) { +uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue, + UE_nr_rxtx_proc_t *proc, + uint8_t gNB_id) +{ + int subframe = proc->subframe_tx; + int frame = proc->frame_tx; + CQI_REPORTPERIODIC *cqirep = &ue->cqi_report_config[gNB_id].CQI_ReportPeriodic; - int frame_tx = proc->frame_tx; - int nr_tti_tx = proc->nr_tti_tx; - int prach_power; - uint16_t preamble_tx=50; - PRACH_RESOURCES_t prach_resources; - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN); - - ue->generate_nr_prach=0; - if (ue->mac_enabled==0){ - ue->prach_resources[eNB_id] = &prach_resources; - ue->prach_resources[eNB_id]->ra_PreambleIndex = preamble_tx; - ue->prach_resources[eNB_id]->ra_TDD_map_index = 0; - } - - if (ue->mac_enabled==1){ - - // ask L2 for RACH transport - if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) { - LOG_D(PHY,"Getting PRACH resources\n"); - //ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(ue->Mod_id,ue->CC_id,frame_tx,eNB_id,nr_tti_tx); - // LOG_D(PHY,"Got prach_resources for eNB %d address %p, RRCCommon %p\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[ue->Mod_id].radioResourceConfigCommon); - // LOG_D(PHY,"Prach resources %p\n",ue->prach_resources[eNB_id]); - } -} - -if (ue->prach_resources[eNB_id]!=NULL) { - - ue->generate_nr_prach=1; - ue->prach_cnt=0; -#ifdef SMBV -ue->prach_resources[eNB_id]->ra_PreambleIndex = preamble_tx; -#endif - -#ifdef OAI_EMU - ue->prach_PreambleIndex=ue->prach_resources[eNB_id]->ra_PreambleIndex; -#endif - - if (abstraction_flag == 0) { - - LOG_I(PHY,"mode %d\n",mode); - - if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) { - - ue->tx_power_dBm[nr_tti_tx] = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_nr_PL(ue,eNB_id); - } - else { - ue->tx_power_dBm[nr_tti_tx] = ue->tx_power_max_dBm; - ue->prach_resources[eNB_id]->ra_PreambleIndex = preamble_tx; - } - - LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : Generating PRACH, preamble %d,PL %d, P0_PRACH %d, TARGET_RECEIVED_POWER %d dBm, PRACH TDD Resource index %d, RA-RNTI %d\n", - ue->Mod_id, - frame_tx, - nr_tti_tx, - ue->prach_resources[eNB_id]->ra_PreambleIndex, - get_nr_PL(ue,eNB_id), - ue->tx_power_dBm[nr_tti_tx], - ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER, - ue->prach_resources[eNB_id]->ra_TDD_map_index, - ue->prach_resources[eNB_id]->ra_RNTI); - - ue->tx_total_RE[nr_tti_tx] = 96; - -#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) - ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm[nr_tti_tx], - ue->tx_power_max_dBm, - ue->frame_parms.N_RB_UL, - 6); -#else - ue->prach_vars[eNB_id]->amp = AMP; -#endif - if ((mode == calib_prach_tx) && (((proc->frame_tx&0xfffe)%100)==0)) - LOG_D(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : PRACH TX power %d dBm, amp %d\n", - ue->Mod_id, - proc->frame_rx, - proc->nr_tti_tx, - ue->tx_power_dBm[nr_tti_tx], - ue->prach_vars[eNB_id]->amp); - - - // start_meas(&ue->tx_prach); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN); - -// prach_power = generate_nr_prach(ue,eNB_id,nr_tti_tx,frame_tx); -prach_power = generate_nr_prach(ue,0,9,0); //subframe number hardcoded according to the simulator - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT); - // stop_meas(&ue->tx_prach); - LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n", - ue->Mod_id, - get_nr_PL(ue,eNB_id), - ue->tx_power_dBm[nr_tti_tx], - dB_fixed(prach_power), - ue->prach_vars[eNB_id]->amp); - }/* else { - UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_flag=1; - UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_id=ue->prach_resources[eNB_id]->ra_PreambleIndex; - }*/ // commented for compiling as abstraction flag is 0 - - if (ue->mac_enabled==1){ - //mac_xface->Msg1_transmitted(ue->Mod_id,ue->CC_id,frame_tx,eNB_id); - } - -LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n", - ue->Mod_id,frame_tx,nr_tti_tx,eNB_id, - ue->prach_resources[eNB_id]->ra_PreambleIndex, - ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_nr_PL(ue,eNB_id), - get_nr_PL(ue,eNB_id)); + //LOG_I(PHY,"[UE %d][CRNTI %x] AbsSubFrame %d.%d Checking for CQI TXOp (cqi_ConfigIndex %d) isCQIOp %d\n", + // ue->Mod_id,ue->pdcch_vars[gNB_id]->crnti,frame,subframe, + // cqirep->cqi_PMI_ConfigIndex, + // (((10*frame + subframe) % cqirep->Npd) == cqirep->N_OFFSET_CQI)); + if (cqirep->cqi_PMI_ConfigIndex==-1) + return(0); + else if (((10*frame + subframe) % cqirep->Npd) == cqirep->N_OFFSET_CQI) + return(1); + else + return(0); } -// if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue -if (mode == calib_prach_tx) - ue->prach_resources[eNB_id]=NULL; +uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue, + UE_nr_rxtx_proc_t *proc, + uint8_t gNB_id) +{ + int subframe = proc->subframe_tx; + int frame = proc->frame_tx; + CQI_REPORTPERIODIC *cqirep = &ue->cqi_report_config[gNB_id].CQI_ReportPeriodic; + int log2Mri = cqirep->ri_ConfigIndex/161; + int N_OFFSET_RI = cqirep->ri_ConfigIndex % 161; -LOG_D(PHY,"[UE %d] frame %d nr_tti_rx %d : generate_nr_prach %d, prach_cnt %d\n", - ue->Mod_id,frame_tx,nr_tti_tx,ue->generate_nr_prach,ue->prach_cnt); - -ue->prach_cnt++; - -if (ue->prach_cnt==3) - ue->generate_nr_prach=0; - -VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_OUT); + //LOG_I(PHY,"[UE %d][CRNTI %x] AbsSubFrame %d.%d Checking for RI TXOp (ri_ConfigIndex %d) isRIOp %d\n", + // ue->Mod_id,ue->pdcch_vars[gNB_id]->crnti,frame,subframe, + // cqirep->ri_ConfigIndex, + // (((10*frame + subframe + cqirep->N_OFFSET_CQI - N_OFFSET_RI) % (cqirep->Npd<ri_ConfigIndex==-1) + return(0); + else if (((10*frame + subframe + cqirep->N_OFFSET_CQI - N_OFFSET_RI) % (cqirep->Npd<frame_parms; - int32_t ulsch_start=0; - int nr_tti_tx = proc->nr_tti_tx; - int frame_tx = proc->frame_tx; - unsigned int aa; - uint8_t isSubframeSRS; - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN); - - LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, nr_tti_tx); - ue->generate_ul_signal[eNB_id] = 0; - - -#if UE_TIMING_TRACE - start_meas(&ue->phy_proc_tx); -#endif - - ue->tx_power_dBm[nr_tti_tx]=-127; -printf("ue mode =%d\n",ue->UE_mode[eNB_id]); - - if (abstraction_flag==0) { - for (aa=0; aanb_antennas_tx; aa++) { - memset(&ue->common_vars.txdataF[aa][nr_tti_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti],0,frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t)); - } - } - -if (abstraction_flag == 0) { - ulsch_common_procedures(ue,proc, (ue->generate_ul_signal[eNB_id] == 0)); - } - -ue->UE_mode[eNB_id]=1; -ue->frame_parms.prach_config_common.prach_Config_enabled=1; -printf("S: ue->UE_mode[eNB_id] == PRACH is %d and ue->frame_parms.prach_config_common.prach_Config_enabled is %d\n", ue->UE_mode[eNB_id],ue->frame_parms.prach_config_common.prach_Config_enabled); - if ((ue->UE_mode[eNB_id] == PRACH) && - (ue->frame_parms.prach_config_common.prach_Config_enabled==1)) { - - // check if we have PRACH opportunity - if (is_nr_prach_subframe(&ue->frame_parms,frame_tx,nr_tti_tx)) { -printf("the value of is_nr_prach subframe is %d\n",is_nr_prach_subframe(&ue->frame_parms,frame_tx,nr_tti_tx)); - nr_ue_prach_procedures(ue,proc,eNB_id,abstraction_flag,mode); - } - } // mode is PRACH - else { - ue->generate_prach=0; - } - -LOG_D(PHY,"****** end TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, nr_tti_tx); - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT); -#if UE_TIMING_TRACE - stop_meas(&ue->phy_proc_tx); -#endif -} */ - - diff --git a/openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c b/openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c index d43f4ade05..d955cbb242 100644 --- a/openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c +++ b/openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c @@ -103,7 +103,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, int P_O_PUCCH = P_O_NOMINAL_PUCCH + P_O_UE_PUCCH; - int16_t PL = get_nr_PL(ue,gNB_id); /* LTE function because NR path loss not yet implemented FFS TODO NR */ + int16_t PL = 100;//get_PL(ue->Mod_id, ue->CC_id, gNB_id); /* LTE function because NR path loss not yet implemented FFS TODO NR */ int16_t delta_F_PUCCH = power_config->deltaF_PUCCH_f[pucch_format]; @@ -214,3 +214,4 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, return (pucch_power); } + diff --git a/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c b/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c index c73f073033..8236c71c01 100644 --- a/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c +++ b/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c @@ -1,5 +1,4 @@ -/* - * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more +/* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The OpenAirInterface Software Alliance licenses this file to You under @@ -53,6 +52,8 @@ +uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id); +uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id); /* void nr_generate_pucch0(int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, @@ -109,9 +110,8 @@ void nr_generate_pucch3_4(int32_t **txdataF, /**************** functions **************************************/ -uint8_t is_nr_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) { return(0); } -uint8_t is_nr_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) { return(0);} - +//extern uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id); +//extern uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id); /******************************************************************* * * NAME : pucch_procedures_ue_nr @@ -226,10 +226,10 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ &n_HARQ_ACK, reset_harq); // 1 to reset ACK/NACK status : 0 otherwise cqi_status = ((ue->cqi_report_config[gNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0) && - (is_nr_cqi_TXOp(ue,proc,gNB_id) == 1)); + (is_cqi_TXOp(ue,proc,gNB_id) == 1)); ri_status = ((ue->cqi_report_config[gNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0) && - (is_nr_ri_TXOp(ue,proc,gNB_id) == 1)); + (is_ri_TXOp(ue,proc,gNB_id) == 1)); csi_status = get_csi_nr(ue, gNB_id, &csi_payload); @@ -1214,3 +1214,4 @@ void set_csi_nr(int csi_status, uint32_t csi_payload) } } + diff --git a/openair1/SIMULATION/NR_PHY/dlschsim.c b/openair1/SIMULATION/NR_PHY/dlschsim.c index 851217d6a4..ad71818383 100644 --- a/openair1/SIMULATION/NR_PHY/dlschsim.c +++ b/openair1/SIMULATION/NR_PHY/dlschsim.c @@ -59,43 +59,6 @@ double cpuf; int nfapi_mode = 0; uint16_t NB_UE_INST = 1; -int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req) { - return (0); -} -int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) { - return (0); -} - -int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) { - return (0); -} - -int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { - return (0); -} - -int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) { - return (0); -} - -uint32_t from_nrarfcn(int nr_bandP, uint32_t dl_earfcn) { - return (0); -} -int32_t get_nr_uldl_offset(int eutra_bandP) { - return (0); -} - -NR_IF_Module_t * -NR_IF_Module_init(int Mod_id) { - return (NULL); -} - -void exit_function(const char *file, const char *function, const int line, - const char *s) { - const char *msg = s == NULL ? "no comment" : s; - printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg); - exit(-1); -} // needed for some functions @@ -460,7 +423,7 @@ int main(int argc, char **argv) UE->dlsch_ra[0] = new_nr_ue_dlsch(1, 1, Nsoft, 5, N_RB_DL, 0); unsigned char harq_pid = 0; //dlsch->harq_ids[subframe]; NR_gNB_DLSCH_t *dlsch = gNB->dlsch[0][0]; - nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->pdsch_pdu.pdsch_pdu_rel15; //time_stats_t *rm_stats, *te_stats, *i_stats; uint8_t is_crnti = 0, llr8_flag = 0; unsigned int TBS = 8424; @@ -482,12 +445,13 @@ int main(int argc, char **argv) TBS = nr_compute_tbs(mod_order,rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, Nl); printf("available bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order); //dlsch->harq_ids[subframe]= 0; - rel15->n_prb = nb_rb; - rel15->nb_symbols = nb_symb_sch; - rel15->modulation_order = mod_order; - rel15->nb_layers = Nl; - rel15->transport_block_size = TBS; - rel15->coding_rate = rate; + rel15->rbSize = nb_rb; + rel15->NrOfSymbols = nb_symb_sch; + rel15->qamModOrder[0] = mod_order; + rel15->nrOfLayers = Nl; + rel15->TBSize[0] = TBS; + rel15->targetCodeRate[0] = rate; + rel15->NrOfCodewords = 1; double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384); // [hna] 16 segments, 68*Zc short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384); short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384); diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 00f47d52d8..3e04e3e5af 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -92,8 +92,8 @@ int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id, uint16_t NB_UE_INST = 1; //Dummy Functions -lte_subframe_t subframe_select(LTE_DL_FRAME_PARMS *frame_parms, unsigned char subframe) {return(SF_DL);} -int rlc_module_init (void) {return(0);} +//lte_subframe_t subframe_select(LTE_DL_FRAME_PARMS *frame_parms, unsigned char subframe) {return(SF_DL);} +int rlc_module_init (int eNB_id) {return(0);} void pdcp_layer_init(void) {} @@ -195,7 +195,7 @@ int main(int argc, char **argv) //double pbch_sinr; //int pbch_tx_ant; int N_RB_DL=106,mu=1; - nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config; uint16_t ssb_periodicity = 10; @@ -662,7 +662,7 @@ int main(int argc, char **argv) // generate signal if (input_fd==NULL) { gNB->pbch_configured = 1; - for (int i=0;i<4;i++) gNB->pbch_pdu[i]=i+1; + gNB->ssb_pdu.ssb_pdu_rel15.bchPayload=0x001234; if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&dlsch_config); else nr_schedule_css_dlsch_phytest(0,frame,slot); @@ -674,7 +674,7 @@ int main(int argc, char **argv) Sched_INFO.slot = slot; Sched_INFO.DL_req = &gNB_mac->DL_req[0]; Sched_INFO.UL_tti_req = &gNB_mac->UL_tti_req[0]; - Sched_INFO.HI_DCI0_req = NULL; + Sched_INFO.UL_dci_req = NULL; Sched_INFO.TX_req = &gNB_mac->TX_req[0]; nr_schedule_response(&Sched_INFO); @@ -761,8 +761,10 @@ int main(int argc, char **argv) dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234; uint64_t mask = 0x0; - uint16_t num_rbs=24; - uint16_t rb_offset=gNB->pdcch_vars.dci_alloc[0].pdcch_params.rb_offset; + uint16_t num_rbs; + uint16_t rb_offset; + + get_coreset_rballoc(gNB->pdcch_pdu->pdcch_pdu_rel15.FreqDomainResource,&num_rbs,&rb_offset); uint16_t cell_id=0; uint16_t num_symbols=2; for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs @@ -859,13 +861,11 @@ int main(int argc, char **argv) nr_ue_scheduled_response(&UE_mac->scheduled_response); printf("Running phy procedures UE RX %d.%d\n",frame,slot); - - phy_procedures_nrUE_RX(UE, - &UE_proc, - 0, - do_pdcch_flag, - normal_txrx, - &UE_mac->dl_config_request); + phy_procedures_nrUE_RX(UE, + &UE_proc, + 0, + do_pdcch_flag, + normal_txrx); if (n_trials==1) { LOG_M("rxsigF0.m","rxsF0", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[0],slot_length_complex_samples_no_prefix,1,1); @@ -873,10 +873,6 @@ int main(int argc, char **argv) LOG_M("rxsigF1.m","rxsF1", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[1],slot_length_complex_samples_no_prefix,1,1); } - if (UE_mac->dl_config_request.number_pdus==0) n_errors++; - - - if (UE->dlsch[UE->current_thread_id[slot]][0][0]->last_iteration_cnt >= UE->dlsch[UE->current_thread_id[slot]][0][0]->max_ldpc_iterations+1) n_errors++; @@ -894,7 +890,7 @@ int main(int argc, char **argv) NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]]; int16_t *UE_llr = pdsch_vars[0]->llr[0]; - nfapi_nr_dl_config_dlsch_pdu_rel15_t rel15 = gNB_dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t rel15 = gNB_dlsch->harq_processes[harq_pid]->pdsch_pdu.pdsch_pdu_rel15; uint32_t TBS = rel15.TBSize[0]; uint16_t length_dmrs = 1; uint16_t nb_rb = rel15.rbSize; diff --git a/openair1/SIMULATION/NR_PHY/prachsim.c b/openair1/SIMULATION/NR_PHY/prachsim.c index f3a83870d6..80eed8063d 100644 --- a/openair1/SIMULATION/NR_PHY/prachsim.c +++ b/openair1/SIMULATION/NR_PHY/prachsim.c @@ -50,7 +50,7 @@ PHY_VARS_gNB *gNB; PHY_VARS_NR_UE *UE; RAN_CONTEXT_t RC; -RU_t *RU; +RU_t *ru; double cpuf; @@ -58,6 +58,9 @@ extern uint16_t prach_root_sequence_map0_3[838]; void dump_nr_prach_config(NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe); +uint16_t NB_UE_INST=1; +volatile int oai_exit=0; + void exit_function(const char* file, const char* function, const int line,const char *s) { const char * msg= s==NULL ? "no comment": s; printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg); @@ -70,8 +73,6 @@ int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t e return 0; } -int32_t get_nr_uldl_offset(int nr_bandP) {return(0);} - int oai_nfapi_rach_ind(nfapi_rach_indication_t *rach_ind) {return(0);} openair0_config_t openair0_cfg[MAX_CARDS]; @@ -79,9 +80,6 @@ int nfapi_mode=0; NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);} int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0); } -int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {return(0);} -int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) { return(0); } -uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn) {return(0);} int main(int argc, char **argv) { @@ -132,7 +130,7 @@ int main(int argc, char **argv) cpuf = get_cpu_freq_GHz(); - if ( load_configmodule(argc,argv) == 0) { + if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) { exit_fun("[SOFTMODEM] Error, configuration module init failed\n"); } @@ -358,7 +356,7 @@ int main(int argc, char **argv) RC.nb_RU = 1; gNB = RC.gNB[0]; - RU = RC.ru[0]; + ru = RC.ru[0]; if (ue_speed1set==0) { @@ -397,10 +395,10 @@ int main(int argc, char **argv) printf("FFT Size %d, Extended Prefix %d, Samples per subframe %d,Frame type %s, Frequency Range %s\n",NUMBER_OF_OFDM_CARRIERS, frame_parms->Ncp,frame_parms->samples_per_slot<<1,frame_parms->frame_type == FDD ? "FDD" : "TDD", frame_parms->freq_range == nr_FR1 ? "FR1" : "FR2"); - RU->nr_frame_parms=frame_parms; - RU->if_south = LOCAL_RF; - RU->nb_tx = n_tx; - RU->nb_rx = n_rx; + ru->nr_frame_parms=frame_parms; + ru->if_south = LOCAL_RF; + ru->nb_tx = n_tx; + ru->nb_rx = n_rx; RC.nb_nr_L1_inst=1; phy_init_nr_gNB(gNB,0,0); @@ -480,7 +478,7 @@ int main(int argc, char **argv) gNB->proc.slot_rx = subframe<<1; - gNB->common_vars.rxdata = RU->common.rxdata; + gNB->common_vars.rxdata = ru->common.rxdata; compute_nr_prach_seq(gNB->frame_parms.prach_config_common.rootSequenceIndex, @@ -595,7 +593,7 @@ nr_ue_prach_procedures(UE,&proc,0,0,0); rx_nr_prach_ru(RU, 0, subframe); - gNB->prach_vars.rxsigF = RU->prach_rxsigF; + gNB->prach_vars.rxsigF = ru->prach_rxsigF; rx_nr_prach(gNB, 0, diff --git a/openair1/SIMULATION/NR_PHY/ulschsim.c b/openair1/SIMULATION/NR_PHY/ulschsim.c index fbfc0c3b1c..00f5bc237f 100644 --- a/openair1/SIMULATION/NR_PHY/ulschsim.c +++ b/openair1/SIMULATION/NR_PHY/ulschsim.c @@ -58,43 +58,6 @@ double cpuf; int nfapi_mode = 0; uint16_t NB_UE_INST = 1; -int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req) { - return (0); -} -int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) { - return (0); -} - -int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) { - return (0); -} - -int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { - return (0); -} - -int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) { - return (0); -} - -uint32_t from_nrarfcn(int nr_bandP, uint32_t dl_earfcn) { - return (0); -} -int32_t get_nr_uldl_offset(int eutra_bandP) { - return (0); -} - -NR_IF_Module_t * -NR_IF_Module_init(int Mod_id) { - return (NULL); -} - -void exit_function(const char *file, const char *function, const int line, const char *s) { - const char *msg = s == NULL ? "no comment" : s; - printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg); - exit(-1); -} - // needed for some functions PHY_VARS_NR_UE *PHY_vars_UE_g[1][1] = { { NULL } }; uint16_t n_rnti = 0x1234; diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c index 94c7740eef..a9b268ee27 100644 --- a/openair1/SIMULATION/NR_PHY/ulsim.c +++ b/openair1/SIMULATION/NR_PHY/ulsim.c @@ -67,41 +67,6 @@ double cpuf; int nfapi_mode = 0; uint16_t NB_UE_INST = 1; -int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req) { - return (0); -} -int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) { - return (0); -} - -int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) { - return (0); -} - -int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { - return (0); -} - -int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) { - return (0); -} - -int32_t get_uldl_offset(int eutra_bandP) { - return (0); -} - -NR_IF_Module_t * -NR_IF_Module_init(int Mod_id) { - return (NULL); -} - -void exit_function(const char *file, const char *function, const int line, const char *s) { - const char *msg = s == NULL ? "no comment" : s; - printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg); - exit(-1); -} - -// dummy functions int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id, const int CC_id, const uint8_t gNB_index, const int8_t channel, const uint8_t* pduP, const sdu_size_t pdu_len) { return 0; } void mac_rlc_data_ind ( const module_id_t module_idP, @@ -537,8 +502,8 @@ int main(int argc, char **argv) /////////////////////////////////////////////////// */ - UL_tti_req->sfn = frame; - UL_tti_req->slot = slot; + UL_tti_req->SFN = frame; + UL_tti_req->Slot = slot; UL_tti_req->n_pdus = 1; UL_tti_req->pdus_list[0].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; UL_tti_req->pdus_list[0].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 4fc48d3999..759b8fd782 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -42,9 +42,8 @@ void config_common_ue(NR_UE_MAC_INST_t *mac) { fapi_nr_config_request_t *cfg = &mac->phy_config.config_req; NR_ServingCellConfigCommon_t *scc = mac->scc; - +/* mac->if_module->phy_config_request(&mac->phy_config); - cfg->sch_config.physical_cell_id = *scc->physCellId; cfg->sch_config.ssb_scg_position_in_burst = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0]; @@ -127,6 +126,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac) { for (int i=0;ipusch_config.num_PUSCHTimeDomainResourceAllocations;i++) { cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[i]=*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2; } +*/ } int nr_rrc_mac_config_req_ue( diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index b428eb2f1c..9e4a0873ff 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -58,515 +58,576 @@ extern void mac_rlc_data_ind ( uint32_t get_ssb_slot(uint32_t ssb_index){ - // this function now only support f <= 3GHz - return ssb_index & 0x3 ; + // this function now only support f <= 3GHz + return ssb_index & 0x3 ; - // return first_symbol(case, freq, ssb_index) / 14 + // return first_symbol(case, freq, ssb_index) / 14 } uint8_t table_9_2_2_1[16][8]={ - {0,12,2, 0, 0,3,0,0}, - {0,12,2, 0, 0,4,8,0}, - {0,12,2, 3, 0,4,8,0}, - {1,10,4, 0, 0,6,0,0}, - {1,10,4, 0, 0,3,6,9}, - {1,10,4, 2, 0,3,6,9}, - {1,10,4, 4, 0,3,6,9}, - {1,4, 10,0, 0,6,0,0}, - {1,4, 10,0, 0,3,6,9}, - {1,4, 10,2, 0,3,6,9}, - {1,4, 10,4, 0,3,6,9}, - {1,0, 14,0, 0,6,0,0}, - {1,0, 14,0, 0,3,6,9}, - {1,0, 14,2, 0,3,6,9}, - {1,0, 14,4, 0,3,6,9}, - {1,0, 14,26,0,3,0,0} +{0,12,2, 0, 0,3,0,0}, +{0,12,2, 0, 0,4,8,0}, +{0,12,2, 3, 0,4,8,0}, +{1,10,4, 0, 0,6,0,0}, +{1,10,4, 0, 0,3,6,9}, +{1,10,4, 2, 0,3,6,9}, +{1,10,4, 4, 0,3,6,9}, +{1,4, 10,0, 0,6,0,0}, +{1,4, 10,0, 0,3,6,9}, +{1,4, 10,2, 0,3,6,9}, +{1,4, 10,4, 0,3,6,9}, +{1,0, 14,0, 0,6,0,0}, +{1,0, 14,0, 0,3,6,9}, +{1,0, 14,2, 0,3,6,9}, +{1,0, 14,4, 0,3,6,9}, +{1,0, 14,26,0,3,0,0} }; int8_t nr_ue_process_dlsch(module_id_t module_id, - int cc_id, - uint8_t gNB_index, - fapi_nr_dci_indication_t *dci_ind, - void *pduP, - uint32_t pdu_len) + int cc_id, + uint8_t gNB_index, + fapi_nr_dci_indication_t *dci_ind, + void *pduP, + uint32_t pdu_len) { - NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); - fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request; - //fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; - nr_phy_config_t *phy_config = &mac->phy_config; + NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); + fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request; + //fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; + nr_phy_config_t *phy_config = &mac->phy_config; - //ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti; - // First we need to verify if DCI ind contains a ul-sch to be perfomred. If it does, we will handle a PUSCH in the UL_CONFIG_REQ. - - /* - ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH; - for (int i=0; i<10; i++) { - if (dci_ind->dci_list[i].dci_format < 2) ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; - } - if (ul_config->ul_config_list[ul_config->number_pdus].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) { - // fill in the elements in config request inside P5 message - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.bandwidth_part_ind = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.frame_offset = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.pusch_freq_hopping = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.mcs = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.rv = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.accumulated_delta_PUSCH = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.absolute_delta_PUSCH = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.tpmi = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_dmrs_cdm_groups = 0; - for (int i=0;i<4;i++) ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[i]=0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_front_load_symb = 0; - //ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.srs_config = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.csi_reportTriggerSize = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.maxCodeBlockGroupsPerTransportBlock = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ptrs_dmrs_association_port = 0; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.beta_offset_ind = 0; - } else { // If DCI ind is not format 0_0 or 0_1, we will handle a PUCCH in the UL_CONFIG_REQ + //ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti; + // First we need to verify if DCI ind contains a ul-sch to be perfomred. If it does, we will handle a PUSCH in the UL_CONFIG_REQ. ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH; - for (int i=0; i<10; i++) { if(dci_ind!=NULL){ if (dci_ind->dci_list[i].dci_format < 2) ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; } } - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].initial_cyclic_shift; // x x - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_symbols; // x x x x x - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_symbol_index; // x x x x x - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].time_domain_occ; // x - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_prbs; // x x - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_prb; // maxNrofPhysicalResourceBlocks = 275 - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_length; // x - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_index; // x - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.intraSlotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].intra_slot_frequency_hopping; - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.secondHopPRB = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].second_hop_prb; + if (ul_config->ul_config_list[ul_config->number_pdus].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) { + // fill in the elements in config request inside P5 message + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.bandwidth_part_ind = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.frame_offset = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.pusch_freq_hopping = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.mcs = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.rv = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.accumulated_delta_PUSCH = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.absolute_delta_PUSCH = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.tpmi = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_dmrs_cdm_groups = 0; + for (int i=0;i<4;i++) ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[i]=0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_front_load_symb = 0; + //ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.srs_config = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.csi_reportTriggerSize = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.maxCodeBlockGroupsPerTransportBlock = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ptrs_dmrs_association_port = 0; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.beta_offset_ind = 0; + } else { // If DCI ind is not format 0_0 or 0_1, we will handle a PUCCH in the UL_CONFIG_REQ + ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH; + // If we handle PUCCH common + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][0]; /* format 0 1 2 3 4 */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][4]; /* x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][2]; /* x x x x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][1]; /* x x x x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC = 0; /* x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs = 0; /* x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][3]; /* maxNrofPhysicalResourceBlocks = 275 */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length = 0; /* x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index = 0; /* x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.intraSlotFrequencyHopping = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.secondHopPRB = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal; + for (int i=0;iul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0; + // If we handle PUCCH dedicated + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].format; /* format 0 1 2 3 4 */ + switch (ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format){ + case pucch_format1_nr: + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.inter_slot_frequency_hopping; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.additional_dmrs; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.max_code_rate; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.number_of_slots; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.pi2bpsk; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.simultaneous_harq_ack_csi; + break; + case pucch_format2_nr: + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.inter_slot_frequency_hopping; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.additional_dmrs; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.max_code_rate; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.number_of_slots; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.pi2bpsk; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.simultaneous_harq_ack_csi; + break; + case pucch_format3_nr: + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.inter_slot_frequency_hopping; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.additional_dmrs; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.max_code_rate; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.number_of_slots; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.pi2bpsk; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.simultaneous_harq_ack_csi; + break; + case pucch_format4_nr: + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.inter_slot_frequency_hopping; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.additional_dmrs; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.max_code_rate; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.number_of_slots; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.pi2bpsk; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.simultaneous_harq_ack_csi; + break; + default: + break; + } + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].initial_cyclic_shift; /* x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_symbols; /* x x x x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_symbol_index; /* x x x x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].time_domain_occ; /* x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_prbs; /* x x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_prb; /* maxNrofPhysicalResourceBlocks = 275 */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_length; /* x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_index; /* x */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.intraSlotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].intra_slot_frequency_hopping; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.secondHopPRB = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].second_hop_prb; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal; + for (int i=0;iul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */ + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0; + ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0; - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.pucch_config.pucch_group_hopping; - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.pucch_config.hopping_id; - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.pucch_config.p0_nominal; - for (int i=0;iul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0; - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; // INTEGER (1..8) - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0; - ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0; - - } - */ - if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){ - mac->if_module->scheduled_response(&mac->scheduled_response); - } - return 0; + } + if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){ + mac->if_module->scheduled_response(&mac->scheduled_response); + } + return 0; } int8_t nr_ue_decode_mib( - UE_nr_rxtx_proc_t *proc, - module_id_t module_id, - int cc_id, - uint8_t gNB_index, - uint8_t extra_bits, // 8bits 38.212 c7.1.1 - uint32_t ssb_length, - uint32_t ssb_index, - void *pduP, - uint16_t cell_id ){ + UE_nr_rxtx_proc_t *proc, + module_id_t module_id, + int cc_id, + uint8_t gNB_index, + uint8_t extra_bits, // 8bits 38.212 c7.1.1 + uint32_t ssb_length, + uint32_t ssb_index, + void *pduP, + uint16_t cell_id ){ - LOG_I(MAC,"[L2][MAC] decode mib\n"); + LOG_I(MAC,"[L2][MAC] decode mib\n"); - NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); + NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); - nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU + nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU - AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n"); - //if(mac->mib != NULL){ - uint16_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused); - uint16_t frame_number_4lsb = 0; - for (int i=0; i<4; i++) - frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); - uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] - uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] + AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n"); + //if(mac->mib != NULL){ + uint16_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused); + uint16_t frame_number_4lsb = 0; + for (int i=0; i<4; i++) + frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); + uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] + uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] - uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset; + uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset; - //uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64 + //uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64 - frame = frame << 4; - frame = frame | frame_number_4lsb; + frame = frame << 4; + frame = frame | frame_number_4lsb; - if(ssb_length == 64){ - ssb_index = ssb_index & (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] } - }else{ - if(ssb_subcarrier_offset_msb){ - ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; - } - } + if(ssb_length == 64){ + ssb_index = ssb_index & (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] } + }else{ + if(ssb_subcarrier_offset_msb){ + ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; + } + } #ifdef DEBUG_MIB - LOG_I(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]); - LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame); - LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon); - LOG_I(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset); - LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position); - LOG_I(MAC,"pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1); - LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred); - LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection); - LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); - LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); + LOG_I(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]); + LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame); + LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon); + LOG_I(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset); + LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position); + LOG_I(MAC,"pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1); + LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred); + LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection); + LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); + LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); #endif - subcarrier_spacing_t scs_ssb = scs_30kHz; // default for - //const uint32_t scs_index = 0; - const uint32_t num_slot_per_frame = 20; - subcarrier_spacing_t scs_pdcch; + subcarrier_spacing_t scs_ssb = scs_30kHz; // default for + //const uint32_t scs_index = 0; + const uint32_t num_slot_per_frame = 20; + subcarrier_spacing_t scs_pdcch; - // assume carrier frequency < 6GHz - if(mac->mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){ - scs_pdcch = scs_15kHz; - }else{ //NR_MIB__subCarrierSpacingCommon_scs30or120 - scs_pdcch = scs_30kHz; - } + // assume carrier frequency < 6GHz + if(mac->mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){ + scs_pdcch = scs_15kHz; + }else{ //NR_MIB__subCarrierSpacingCommon_scs30or120 + scs_pdcch = scs_30kHz; + } - channel_bandwidth_t min_channel_bw = bw_10MHz; // deafult for testing + channel_bandwidth_t min_channel_bw = bw_10MHz; // deafult for testing - uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13 - frequency_range_t frequency_range = FR1; -#if (NR_RRC_VERSION >= MAKE_VERSION(15, 3, 0)) - uint32_t index_4msb = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero); - uint32_t index_4lsb = (mac->mib->pdcch_ConfigSIB1.searchSpaceZero); -#else - uint32_t index_4msb = (mac->mib->pdcch_ConfigSIB1 >> 4) & 0xf; - uint32_t index_4lsb = (mac->mib->pdcch_ConfigSIB1 & 0xf); -#endif - int32_t num_rbs = -1; - int32_t num_symbols = -1; - int32_t rb_offset = -1; - //LOG_I(MAC,"<<<<<<<<mib->pdcch_ConfigSIB1,index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch); + uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13 + frequency_range_t frequency_range = FR1; + uint32_t index_4msb = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero); + uint32_t index_4lsb = (mac->mib->pdcch_ConfigSIB1.searchSpaceZero); + int32_t num_rbs = -1; + int32_t num_symbols = -1; + int32_t rb_offset = -1; + //LOG_I(MAC,"<<<<<<<<mib->pdcch_ConfigSIB1,index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch); - // type0-pdcch coreset - switch( (scs_ssb << 5)|scs_pdcch ){ - case (scs_15kHz << 5) | scs_15kHz : - AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_1_c2[index_4msb]; - num_symbols = table_38213_13_1_c3[index_4msb]; - rb_offset = table_38213_13_1_c4[index_4msb]; - break; + // type0-pdcch coreset + switch( (scs_ssb << 5)|scs_pdcch ){ + case (scs_15kHz << 5) | scs_15kHz : + AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n"); + mac->type0_pdcch_ss_mux_pattern = 1; + num_rbs = table_38213_13_1_c2[index_4msb]; + num_symbols = table_38213_13_1_c3[index_4msb]; + rb_offset = table_38213_13_1_c4[index_4msb]; + break; - case (scs_15kHz << 5) | scs_30kHz: - AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_2_c2[index_4msb]; - num_symbols = table_38213_13_2_c3[index_4msb]; - rb_offset = table_38213_13_2_c4[index_4msb]; - break; + case (scs_15kHz << 5) | scs_30kHz: + AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n"); + mac->type0_pdcch_ss_mux_pattern = 1; + num_rbs = table_38213_13_2_c2[index_4msb]; + num_symbols = table_38213_13_2_c3[index_4msb]; + rb_offset = table_38213_13_2_c4[index_4msb]; + break; - case (scs_30kHz << 5) | scs_15kHz: - if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ - AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_3_c2[index_4msb]; - num_symbols = table_38213_13_3_c3[index_4msb]; - rb_offset = table_38213_13_3_c4[index_4msb]; - }else if(min_channel_bw & bw_40MHz){ - AssertFatal(index_4msb < 9, "38.213 Table 13-5 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_5_c2[index_4msb]; - num_symbols = table_38213_13_5_c3[index_4msb]; - rb_offset = table_38213_13_5_c4[index_4msb]; - }else{ ; } + case (scs_30kHz << 5) | scs_15kHz: + if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ + AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n"); + mac->type0_pdcch_ss_mux_pattern = 1; + num_rbs = table_38213_13_3_c2[index_4msb]; + num_symbols = table_38213_13_3_c3[index_4msb]; + rb_offset = table_38213_13_3_c4[index_4msb]; + }else if(min_channel_bw & bw_40MHz){ + AssertFatal(index_4msb < 9, "38.213 Table 13-5 4 MSB out of range\n"); + mac->type0_pdcch_ss_mux_pattern = 1; + num_rbs = table_38213_13_5_c2[index_4msb]; + num_symbols = table_38213_13_5_c3[index_4msb]; + rb_offset = table_38213_13_5_c4[index_4msb]; + }else{ ; } - break; + break; - case (scs_30kHz << 5) | scs_30kHz: - if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_4_c2[index_4msb]; - num_symbols = table_38213_13_4_c3[index_4msb]; - rb_offset = table_38213_13_4_c4[index_4msb]; - LOG_I(MAC,"<<<<<<<<type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_6_c2[index_4msb]; - num_symbols = table_38213_13_6_c3[index_4msb]; - rb_offset = table_38213_13_6_c4[index_4msb]; - }else{ ; } - break; + case (scs_30kHz << 5) | scs_30kHz: + if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ + mac->type0_pdcch_ss_mux_pattern = 1; + num_rbs = table_38213_13_4_c2[index_4msb]; + num_symbols = table_38213_13_4_c3[index_4msb]; + rb_offset = table_38213_13_4_c4[index_4msb]; + LOG_I(MAC,"<<<<<<<<type0_pdcch_ss_mux_pattern = 1; + num_rbs = table_38213_13_6_c2[index_4msb]; + num_symbols = table_38213_13_6_c3[index_4msb]; + rb_offset = table_38213_13_6_c4[index_4msb]; + }else{ ; } + break; - case (scs_120kHz << 5) | scs_60kHz: - AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n"); - if(index_4msb & 0x7){ - mac->type0_pdcch_ss_mux_pattern = 1; - }else if(index_4msb & 0x18){ - mac->type0_pdcch_ss_mux_pattern = 2; - }else{ ; } + case (scs_120kHz << 5) | scs_60kHz: + AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n"); + if(index_4msb & 0x7){ + mac->type0_pdcch_ss_mux_pattern = 1; + }else if(index_4msb & 0x18){ + mac->type0_pdcch_ss_mux_pattern = 2; + }else{ ; } - num_rbs = table_38213_13_7_c2[index_4msb]; - num_symbols = table_38213_13_7_c3[index_4msb]; - if(!is_condition_A && (index_4msb == 8 || index_4msb == 10)){ - rb_offset = table_38213_13_7_c4[index_4msb] - 1; - }else{ - rb_offset = table_38213_13_7_c4[index_4msb]; - } - break; + num_rbs = table_38213_13_7_c2[index_4msb]; + num_symbols = table_38213_13_7_c3[index_4msb]; + if(!is_condition_A && (index_4msb == 8 || index_4msb == 10)){ + rb_offset = table_38213_13_7_c4[index_4msb] - 1; + }else{ + rb_offset = table_38213_13_7_c4[index_4msb]; + } + break; - case (scs_120kHz << 5) | scs_120kHz: - AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n"); - if(index_4msb & 0x3){ - mac->type0_pdcch_ss_mux_pattern = 1; - }else if(index_4msb & 0x0c){ - mac->type0_pdcch_ss_mux_pattern = 3; - } + case (scs_120kHz << 5) | scs_120kHz: + AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n"); + if(index_4msb & 0x3){ + mac->type0_pdcch_ss_mux_pattern = 1; + }else if(index_4msb & 0x0c){ + mac->type0_pdcch_ss_mux_pattern = 3; + } - num_rbs = table_38213_13_8_c2[index_4msb]; - num_symbols = table_38213_13_8_c3[index_4msb]; - if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ - rb_offset = table_38213_13_8_c4[index_4msb] - 1; - }else{ - rb_offset = table_38213_13_8_c4[index_4msb]; - } - break; + num_rbs = table_38213_13_8_c2[index_4msb]; + num_symbols = table_38213_13_8_c3[index_4msb]; + if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ + rb_offset = table_38213_13_8_c4[index_4msb] - 1; + }else{ + rb_offset = table_38213_13_8_c4[index_4msb]; + } + break; - case (scs_240kHz << 5) | scs_60kHz: - AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_9_c2[index_4msb]; - num_symbols = table_38213_13_9_c3[index_4msb]; - rb_offset = table_38213_13_9_c4[index_4msb]; - break; + case (scs_240kHz << 5) | scs_60kHz: + AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n"); + mac->type0_pdcch_ss_mux_pattern = 1; + num_rbs = table_38213_13_9_c2[index_4msb]; + num_symbols = table_38213_13_9_c3[index_4msb]; + rb_offset = table_38213_13_9_c4[index_4msb]; + break; - case (scs_240kHz << 5) | scs_120kHz: - AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n"); - if(index_4msb & 0x3){ - mac->type0_pdcch_ss_mux_pattern = 1; - }else if(index_4msb & 0x0c){ - mac->type0_pdcch_ss_mux_pattern = 2; - } - num_rbs = table_38213_13_10_c2[index_4msb]; - num_symbols = table_38213_13_10_c3[index_4msb]; - if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ - rb_offset = table_38213_13_10_c4[index_4msb]-1; - }else{ - rb_offset = table_38213_13_10_c4[index_4msb]; - } - break; + case (scs_240kHz << 5) | scs_120kHz: + AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n"); + if(index_4msb & 0x3){ + mac->type0_pdcch_ss_mux_pattern = 1; + }else if(index_4msb & 0x0c){ + mac->type0_pdcch_ss_mux_pattern = 2; + } + num_rbs = table_38213_13_10_c2[index_4msb]; + num_symbols = table_38213_13_10_c3[index_4msb]; + if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ + rb_offset = table_38213_13_10_c4[index_4msb]-1; + }else{ + rb_offset = table_38213_13_10_c4[index_4msb]; + } + + break; - default: - break; - } + default: + break; + } - AssertFatal(num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined"); - AssertFatal(num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined"); - AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined"); + AssertFatal(num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined"); + AssertFatal(num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined"); + AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined"); + //uint32_t cell_id = 0; // obtain from L1 later - //uint32_t cell_id = 0; // obtain from L1 later + //mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset; + //mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1; + uint64_t mask = 0x0; + uint8_t i; + for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs + mask = mask >> 1; + mask = mask | 0x100000000000; + } + //LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset); + mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask; + mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset - //mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset; - //mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1; - uint64_t mask = 0x0; - uint8_t i; - for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs - mask = mask >> 1; - mask = mask | 0x100000000000; - } - //LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset); - mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask; - mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset - - //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols; - mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED; - mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2 - mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2 - mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id; - mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE; - mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id; + //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols; + mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED; + mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2 + mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2 + mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id; + mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE; + mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id; - // type0-pdcch search space - float big_o; - float big_m; - uint32_t temp; - SFN_C_TYPE sfn_c; // only valid for mux=1 - uint32_t n_c; - uint32_t number_of_search_space_per_slot; - uint32_t first_symbol_index; - uint32_t search_space_duration; // element of search space - uint32_t coreset_duration; // element of coreset + // type0-pdcch search space + float big_o; + float big_m; + uint32_t temp; + SFN_C_TYPE sfn_c=SFN_C_IMPOSSIBLE; // only valid for mux=1 + uint32_t n_c=UINT_MAX; + uint32_t number_of_search_space_per_slot=UINT_MAX; + uint32_t first_symbol_index=UINT_MAX; + uint32_t search_space_duration; // element of search space + uint32_t coreset_duration; // element of coreset - // 38.213 table 10.1-1 + // 38.213 table 10.1-1 - /// MUX PATTERN 1 - if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){ - big_o = table_38213_13_11_c1[index_4lsb]; - number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; - big_m = table_38213_13_11_c3[index_4lsb]; + /// MUX PATTERN 1 + if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){ + big_o = table_38213_13_11_c1[index_4lsb]; + number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; + big_m = table_38213_13_11_c3[index_4lsb]; - temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(ssb_index*big_m); - n_c = temp / num_slot_per_frame; - if((temp/num_slot_per_frame) & 0x1){ - sfn_c = SFN_C_MOD_2_EQ_1; - }else{ - sfn_c = SFN_C_MOD_2_EQ_0; - } + temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(ssb_index*big_m); + n_c = temp / num_slot_per_frame; + if((temp/num_slot_per_frame) & 0x1){ + sfn_c = SFN_C_MOD_2_EQ_1; + }else{ + sfn_c = SFN_C_MOD_2_EQ_0; + } - if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (ssb_index&1)){ - first_symbol_index = num_symbols; - }else{ - first_symbol_index = table_38213_13_11_c4[index_4lsb]; - } - // 38.213 chapter 13: over two consecutive slots - search_space_duration = 2; - } + if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (ssb_index&1)){ + first_symbol_index = num_symbols; + }else{ + first_symbol_index = table_38213_13_11_c4[index_4lsb]; + } + // 38.213 chapter 13: over two consecutive slots + search_space_duration = 2; + } - if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){ - big_o = table_38213_13_12_c1[index_4lsb]; - number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; - big_m = table_38213_13_12_c3[index_4lsb]; + if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){ + big_o = table_38213_13_12_c1[index_4lsb]; + number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; + big_m = table_38213_13_12_c3[index_4lsb]; - if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (ssb_index&1)){ - first_symbol_index = 7; - }else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (ssb_index&1)){ - first_symbol_index = num_symbols; - }else{ - first_symbol_index = 0; - } - // 38.213 chapter 13: over two consecutive slots - search_space_duration = 2; - } + if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (ssb_index&1)){ + first_symbol_index = 7; + }else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (ssb_index&1)){ + first_symbol_index = num_symbols; + }else{ + first_symbol_index = 0; + } + // 38.213 chapter 13: over two consecutive slots + search_space_duration = 2; + } - /// MUX PATTERN 2 - if(mac->type0_pdcch_ss_mux_pattern == 2){ + /// MUX PATTERN 2 + if(mac->type0_pdcch_ss_mux_pattern == 2){ - if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){ - // 38.213 Table 13-13 - AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n"); - // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot - // sfn_c = SFN_C_EQ_SFN_SSB; - n_c = get_ssb_slot(ssb_index); - switch(ssb_index & 0x3){ // ssb_index(i) mod 4 - case 0: - first_symbol_index = 0; - break; - case 1: - first_symbol_index = 1; - break; - case 2: - first_symbol_index = 6; - break; - case 3: - first_symbol_index = 7; - break; - default: break; - } - }else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){ - // 38.213 Table 13-14 - AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n"); - // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot - // sfn_c = SFN_C_EQ_SFN_SSB; - n_c = get_ssb_slot(ssb_index); - switch(ssb_index & 0x7){ // ssb_index(i) mod 8 - case 0: - first_symbol_index = 0; - break; - case 1: - first_symbol_index = 1; - break; - case 2: - first_symbol_index = 2; - break; - case 3: - first_symbol_index = 3; - break; - case 4: - first_symbol_index = 12; - n_c = get_ssb_slot(ssb_index) - 1; - break; - case 5: - first_symbol_index = 13; - n_c = get_ssb_slot(ssb_index) - 1; - break; - case 6: - first_symbol_index = 0; - break; - case 7: - first_symbol_index = 1; - break; - default: break; - } - }else{ ; } - // 38.213 chapter 13: over one slot - search_space_duration = 1; - } + if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){ + // 38.213 Table 13-13 + AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n"); + // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot +// sfn_c = SFN_C_EQ_SFN_SSB; + n_c = get_ssb_slot(ssb_index); + switch(ssb_index & 0x3){ // ssb_index(i) mod 4 + case 0: + first_symbol_index = 0; + break; + case 1: + first_symbol_index = 1; + break; + case 2: + first_symbol_index = 6; + break; + case 3: + first_symbol_index = 7; + break; + default: break; + } + + }else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){ + // 38.213 Table 13-14 + AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n"); + // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot +// sfn_c = SFN_C_EQ_SFN_SSB; + n_c = get_ssb_slot(ssb_index); + switch(ssb_index & 0x7){ // ssb_index(i) mod 8 + case 0: + first_symbol_index = 0; + break; + case 1: + first_symbol_index = 1; + break; + case 2: + first_symbol_index = 2; + break; + case 3: + first_symbol_index = 3; + break; + case 4: + first_symbol_index = 12; + n_c = get_ssb_slot(ssb_index) - 1; + break; + case 5: + first_symbol_index = 13; + n_c = get_ssb_slot(ssb_index) - 1; + break; + case 6: + first_symbol_index = 0; + break; + case 7: + first_symbol_index = 1; + break; + default: break; + } + }else{ ; } + // 38.213 chapter 13: over one slot + search_space_duration = 1; + } - /// MUX PATTERN 3 - if(mac->type0_pdcch_ss_mux_pattern == 3){ - if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){ - // 38.213 Table 13-15 - AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n"); - // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot - // sfn_c = SFN_C_EQ_SFN_SSB; - n_c = get_ssb_slot(ssb_index); - switch(ssb_index & 0x3){ // ssb_index(i) mod 4 - case 0: - first_symbol_index = 4; - break; - case 1: - first_symbol_index = 8; - break; - case 2: - first_symbol_index = 2; - break; - case 3: - first_symbol_index = 6; - break; - default: break; - } - }else{ ; } - // 38.213 chapter 13: over one slot - search_space_duration = 1; - } + /// MUX PATTERN 3 + if(mac->type0_pdcch_ss_mux_pattern == 3){ + if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){ + // 38.213 Table 13-15 + AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n"); + // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot +// sfn_c = SFN_C_EQ_SFN_SSB; + n_c = get_ssb_slot(ssb_index); + switch(ssb_index & 0x3){ // ssb_index(i) mod 4 + case 0: + first_symbol_index = 4; + break; + case 1: + first_symbol_index = 8; + break; + case 2: + first_symbol_index = 2; + break; + case 3: + first_symbol_index = 6; + break; + default: break; + } + }else{ ; } + // 38.213 chapter 13: over one slot + search_space_duration = 1; + } - coreset_duration = num_symbols * number_of_search_space_per_slot; + AssertFatal(number_of_search_space_per_slot!=UINT_MAX,""); + coreset_duration = num_symbols * number_of_search_space_per_slot; - mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0]; - mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1]; - mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4 - mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8 - mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16 - mac->type0_pdcch_dci_config.duration = search_space_duration; - mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset - mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff; + mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0]; + mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1]; + mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4 + mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8 + mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16 + mac->type0_pdcch_dci_config.duration = search_space_duration; + mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset + AssertFatal(first_symbol_index!=UINT_MAX,""); + mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff; - mac->type0_pdcch_ss_sfn_c = sfn_c; - mac->type0_pdcch_ss_n_c = n_c; + AssertFatal(sfn_c!=SFN_C_IMPOSSIBLE,""); + AssertFatal(n_c!=UINT_MAX,""); + mac->type0_pdcch_ss_sfn_c = sfn_c; + mac->type0_pdcch_ss_n_c = n_c; - // fill in the elements in config request inside P5 message - - //mac->phy_config.config_req.pbch_config.system_frame_number = frame; // after calculation - mac->phy_config.config_req.rf_config.dl_subcarrierspacing = mac->mib->subCarrierSpacingCommon; - mac->phy_config.config_req.sch_config.ssb_subcarrier_offset = ssb_subcarrier_offset; // after calculation - mac->phy_config.config_req.pdsch_config.dmrs_TypeA_Position = mac->mib->dmrs_TypeA_Position; - mac->phy_config.config_req.pdcch_config.controlResourceSetZero = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero); - mac->phy_config.config_req.pdcch_config.searchSpaceZero = mac->mib->pdcch_ConfigSIB1.searchSpaceZero; + // fill in the elements in config request inside P5 message + mac->phy_config.Mod_id = module_id; + mac->phy_config.CC_id = cc_id; - if(mac->if_module != NULL && mac->if_module->phy_config_request != NULL){ - mac->if_module->phy_config_request(&mac->phy_config); - } - proc->decoded_frame_rx=frame; - //} - return 0; + mac->phy_config.config_req.pbch_config.system_frame_number = frame; // after calculation + mac->phy_config.config_req.pbch_config.subcarrier_spacing_common = mac->mib->subCarrierSpacingCommon; + mac->phy_config.config_req.pbch_config.ssb_subcarrier_offset = ssb_subcarrier_offset; // after calculation + mac->phy_config.config_req.pbch_config.dmrs_type_a_position = mac->mib->dmrs_TypeA_Position; + mac->phy_config.config_req.pbch_config.pdcch_config_sib1 = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero) * 16 + (mac->mib->pdcch_ConfigSIB1.searchSpaceZero); + mac->phy_config.config_req.pbch_config.cell_barred = mac->mib->cellBarred; + mac->phy_config.config_req.pbch_config.intra_frequency_reselection = mac->mib->intraFreqReselection; + mac->phy_config.config_req.pbch_config.half_frame_bit = half_frame_bit; + mac->phy_config.config_req.pbch_config.ssb_index = ssb_index; + mac->phy_config.config_req.config_mask |= FAPI_NR_CONFIG_REQUEST_MASK_PBCH; + + if(mac->if_module != NULL && mac->if_module->phy_config_request != NULL){ + mac->if_module->phy_config_request(&mac->phy_config); + } + proc->decoded_frame_rx=frame; + //} + return 0; } // TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms uint32_t get_ssb_frame(uint32_t test){ - return test; + return test; } // Performs : @@ -574,84 +635,84 @@ uint32_t get_ssb_frame(uint32_t test){ // 2. TODO: Perform SR/BSR procedures for scheduling feedback // 3. TODO: Perform PHR procedures NR_UE_L2_STATE_t nr_ue_scheduler( - const module_id_t module_id, - const uint8_t gNB_index, - const int cc_id, - const frame_t rx_frame, - const slot_t rx_slot, - const int32_t ssb_index, - const frame_t tx_frame, - const slot_t tx_slot ){ + const module_id_t module_id, + const uint8_t gNB_index, + const int cc_id, + const frame_t rx_frame, + const slot_t rx_slot, + const int32_t ssb_index, + const frame_t tx_frame, + const slot_t tx_slot ){ - uint32_t search_space_mask = 0; - NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); + uint32_t search_space_mask = 0; + NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); - // check type0 from 38.213 13 - if(ssb_index != -1){ + // check type0 from 38.213 13 + if(ssb_index != -1){ - if(mac->type0_pdcch_ss_mux_pattern == 1){ - // 38.213 chapter 13 - if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; - } - if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; - } + if(mac->type0_pdcch_ss_mux_pattern == 1){ + // 38.213 chapter 13 + if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; + } + if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; + } + } + if(mac->type0_pdcch_ss_mux_pattern == 2){ + // 38.213 Table 13-13, 13-14 + if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; + } + } + if(mac->type0_pdcch_ss_mux_pattern == 3){ + // 38.213 Table 13-15 + if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; + } + } } - if(mac->type0_pdcch_ss_mux_pattern == 2){ - // 38.213 Table 13-13, 13-14 - if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; - } - } - if(mac->type0_pdcch_ss_mux_pattern == 3){ - // 38.213 Table 13-15 - if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; - } - } - } - fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; - // Type0 PDCCH search space - if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){ - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1; + fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; + // Type0 PDCCH search space + if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){ + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1; - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config; - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; - /* - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set + /* + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set - LOG_I(MAC,"nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n", - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti, - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP); - */ - dl_config->number_pdus = dl_config->number_pdus + 1; - } + LOG_I(MAC,"nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n", + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti, + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP); + */ + dl_config->number_pdus = dl_config->number_pdus + 1; + } - if(search_space_mask & type0a_pdcch){ - } + if(search_space_mask & type0a_pdcch){ + } - if(search_space_mask & type1_pdcch){ - } + if(search_space_mask & type1_pdcch){ + } - if(search_space_mask & type2_pdcch){ - } + if(search_space_mask & type2_pdcch){ + } - if(search_space_mask & type3_pdcch){ - } + if(search_space_mask & type3_pdcch){ + } - mac->scheduled_response.dl_config = dl_config; + mac->scheduled_response.dl_config = dl_config; - return UE_CONNECTION_OK; + return UE_CONNECTION_OK; } ////////////// @@ -665,381 +726,381 @@ NR_UE_L2_STATE_t nr_ue_scheduler( // next four columns contain table 7.3.1.1.2-4: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder=disabled and maxRank = 2 // next four columns contain table 7.3.1.1.2-5: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder= enabled, or if transformPrecoder= disabled and maxRank = 1 uint8_t table_7_3_1_1_2_2_3_4_5[64][20] = { - {1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}, - {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, - {1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 2, 0, 2, 0, 1, 2, 0, 0}, - {1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 2, 0, 0, 1, 3, 0, 0}, - {2, 0, 2, 0, 2, 0, 1, 4, 1, 4, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0}, - {2, 1, 2, 1, 2, 1, 1, 5, 1, 5, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0}, - {2, 2, 2, 2, 2, 2, 1, 6, 1, 6, 0, 0, 1, 5, 0, 0, 0, 0, 0, 0}, - {2, 3, 2, 3, 2, 3, 1, 7, 1, 7, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0}, - {2, 4, 2, 4, 2, 4, 1, 8, 1, 8, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0}, - {2, 5, 2, 5, 2, 5, 1, 9, 1, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 0, 3, 0, 3, 0, 1, 10, 1, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 0, 4, 0, 4, 0, 1, 11, 1, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 4, 1, 4, 0, 0, 1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 5, 1, 5, 0, 0, 1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 6, 1, 6, 0, 0, 1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 7, 1, 7, 0, 0, 1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 8, 1, 8, 0, 0, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 9, 1, 9, 0, 0, 1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 10, 1, 10, 0, 0, 1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 11, 1, 11, 0, 0, 1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 6, 2, 6, 0, 0, 1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 7, 2, 7, 0, 0, 1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 8, 2, 8, 0, 0, 1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 9, 2, 9, 0, 0, 1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 10, 2, 10, 0, 0, 1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 11, 2, 11, 0, 0, 1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 12, 2, 12, 0, 0, 1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 13, 2, 13, 0, 0, 1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 2, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 2, 4, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +{1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}, +{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, +{1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 2, 0, 2, 0, 1, 2, 0, 0}, +{1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 2, 0, 0, 1, 3, 0, 0}, +{2, 0, 2, 0, 2, 0, 1, 4, 1, 4, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0}, +{2, 1, 2, 1, 2, 1, 1, 5, 1, 5, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0}, +{2, 2, 2, 2, 2, 2, 1, 6, 1, 6, 0, 0, 1, 5, 0, 0, 0, 0, 0, 0}, +{2, 3, 2, 3, 2, 3, 1, 7, 1, 7, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0}, +{2, 4, 2, 4, 2, 4, 1, 8, 1, 8, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0}, +{2, 5, 2, 5, 2, 5, 1, 9, 1, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{3, 0, 3, 0, 3, 0, 1, 10, 1, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{4, 0, 4, 0, 4, 0, 1, 11, 1, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 4, 1, 4, 0, 0, 1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 5, 1, 5, 0, 0, 1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 6, 1, 6, 0, 0, 1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 7, 1, 7, 0, 0, 1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 8, 1, 8, 0, 0, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 9, 1, 9, 0, 0, 1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 10, 1, 10, 0, 0, 1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 11, 1, 11, 0, 0, 1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 6, 2, 6, 0, 0, 1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 7, 2, 7, 0, 0, 1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 8, 2, 8, 0, 0, 1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 9, 2, 9, 0, 0, 1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 10, 2, 10, 0, 0, 1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 11, 2, 11, 0, 0, 1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 12, 2, 12, 0, 0, 1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 13, 2, 13, 0, 0, 1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{3, 2, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{4, 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{4, 2, 4, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{2, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{3, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{3, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{4, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} }; uint8_t table_7_3_1_1_2_12[14][3] = { - {1,0,1}, - {1,1,1}, - {2,0,1}, - {2,1,1}, - {2,2,1}, - {2,3,1}, - {2,0,2}, - {2,1,2}, - {2,2,2}, - {2,3,2}, - {2,4,2}, - {2,5,2}, - {2,6,2}, - {2,7,2} +{1,0,1}, +{1,1,1}, +{2,0,1}, +{2,1,1}, +{2,2,1}, +{2,3,1}, +{2,0,2}, +{2,1,2}, +{2,2,2}, +{2,3,2}, +{2,4,2}, +{2,5,2}, +{2,6,2}, +{2,7,2} }; uint8_t table_7_3_1_1_2_13[10][4] = { - {1,0,1,1}, - {2,0,1,1}, - {2,2,3,1}, - {2,0,2,1}, - {2,0,1,2}, - {2,2,3,2}, - {2,4,5,2}, - {2,6,7,2}, - {2,0,4,2}, - {2,2,6,2} +{1,0,1,1}, +{2,0,1,1}, +{2,2,3,1}, +{2,0,2,1}, +{2,0,1,2}, +{2,2,3,2}, +{2,4,5,2}, +{2,6,7,2}, +{2,0,4,2}, +{2,2,6,2} }; uint8_t table_7_3_1_1_2_14[3][5] = { - {2,0,1,2,1}, - {2,0,1,4,2}, - {2,2,3,6,2} +{2,0,1,2,1}, +{2,0,1,4,2}, +{2,2,3,6,2} }; uint8_t table_7_3_1_1_2_15[4][6] = { - {2,0,1,2,3,1}, - {2,0,1,4,5,2}, - {2,2,3,6,7,2}, - {2,0,2,4,6,2} +{2,0,1,2,3,1}, +{2,0,1,4,5,2}, +{2,2,3,6,7,2}, +{2,0,2,4,6,2} }; uint8_t table_7_3_1_1_2_16[12][2] = { - {1,0}, - {1,1}, - {2,0}, - {2,1}, - {2,2}, - {2,3}, - {3,0}, - {3,1}, - {3,2}, - {3,3}, - {3,4}, - {3,5} +{1,0}, +{1,1}, +{2,0}, +{2,1}, +{2,2}, +{2,3}, +{3,0}, +{3,1}, +{3,2}, +{3,3}, +{3,4}, +{3,5} }; uint8_t table_7_3_1_1_2_17[7][3] = { - {1,0,1}, - {2,0,1}, - {2,2,3}, - {3,0,1}, - {3,2,3}, - {3,4,5}, - {2,0,2} +{1,0,1}, +{2,0,1}, +{2,2,3}, +{3,0,1}, +{3,2,3}, +{3,4,5}, +{2,0,2} }; uint8_t table_7_3_1_1_2_18[3][4] = { - {2,0,1,2}, - {3,0,1,2}, - {3,3,4,5} +{2,0,1,2}, +{3,0,1,2}, +{3,3,4,5} }; uint8_t table_7_3_1_1_2_19[2][5] = { - {2,0,1,2,3}, - {3,0,1,2,3} +{2,0,1,2,3}, +{3,0,1,2,3} }; uint8_t table_7_3_1_1_2_20[28][3] = { - {1,0,1}, - {1,1,1}, - {2,0,1}, - {2,1,1}, - {2,2,1}, - {2,3,1}, - {3,0,1}, - {3,1,1}, - {3,2,1}, - {3,3,1}, - {3,4,1}, - {3,5,1}, - {3,0,2}, - {3,1,2}, - {3,2,2}, - {3,3,2}, - {3,4,2}, - {3,5,2}, - {3,6,2}, - {3,7,2}, - {3,8,2}, - {3,9,2}, - {3,10,2}, - {3,11,2}, - {1,0,2}, - {1,1,2}, - {1,6,2}, - {1,7,2} +{1,0,1}, +{1,1,1}, +{2,0,1}, +{2,1,1}, +{2,2,1}, +{2,3,1}, +{3,0,1}, +{3,1,1}, +{3,2,1}, +{3,3,1}, +{3,4,1}, +{3,5,1}, +{3,0,2}, +{3,1,2}, +{3,2,2}, +{3,3,2}, +{3,4,2}, +{3,5,2}, +{3,6,2}, +{3,7,2}, +{3,8,2}, +{3,9,2}, +{3,10,2}, +{3,11,2}, +{1,0,2}, +{1,1,2}, +{1,6,2}, +{1,7,2} }; uint8_t table_7_3_1_1_2_21[19][4] = { - {1,0,1,1}, - {2,0,1,1}, - {2,2,3,1}, - {3,0,1,1}, - {3,2,3,1}, - {3,4,5,1}, - {2,0,2,1}, - {3,0,1,2}, - {3,2,3,2}, - {3,4,5,2}, - {3,6,7,2}, - {3,8,9,2}, - {3,10,11,2}, - {1,0,1,2}, - {1,6,7,2}, - {2,0,1,2}, - {2,2,3,2}, - {2,6,7,2}, - {2,8,9,2} +{1,0,1,1}, +{2,0,1,1}, +{2,2,3,1}, +{3,0,1,1}, +{3,2,3,1}, +{3,4,5,1}, +{2,0,2,1}, +{3,0,1,2}, +{3,2,3,2}, +{3,4,5,2}, +{3,6,7,2}, +{3,8,9,2}, +{3,10,11,2}, +{1,0,1,2}, +{1,6,7,2}, +{2,0,1,2}, +{2,2,3,2}, +{2,6,7,2}, +{2,8,9,2} }; uint8_t table_7_3_1_1_2_22[6][5] = { - {2,0,1,2,1}, - {3,0,1,2,1}, - {3,3,4,5,1}, - {3,0,1,6,2}, - {3,2,3,8,2}, - {3,4,5,10,2} +{2,0,1,2,1}, +{3,0,1,2,1}, +{3,3,4,5,1}, +{3,0,1,6,2}, +{3,2,3,8,2}, +{3,4,5,10,2} }; uint8_t table_7_3_1_1_2_23[5][6] = { - {2,0,1,2,3,1}, - {3,0,1,2,3,1}, - {3,0,1,6,7,2}, - {3,2,3,8,9,2}, - {3,4,5,10,11,2} +{2,0,1,2,3,1}, +{3,0,1,2,3,1}, +{3,0,1,6,7,2}, +{3,2,3,8,9,2}, +{3,4,5,10,11,2} }; uint8_t table_7_3_2_3_3_1[12][5] = { - {1,0,0,0,0}, - {1,1,0,0,0}, - {1,0,1,0,0}, - {2,0,0,0,0}, - {2,1,0,0,0}, - {2,2,0,0,0}, - {2,3,0,0,0}, - {2,0,1,0,0}, - {2,2,3,0,0}, - {2,0,1,2,0}, - {2,0,1,2,3}, - {2,0,2,0,0} +{1,0,0,0,0}, +{1,1,0,0,0}, +{1,0,1,0,0}, +{2,0,0,0,0}, +{2,1,0,0,0}, +{2,2,0,0,0}, +{2,3,0,0,0}, +{2,0,1,0,0}, +{2,2,3,0,0}, +{2,0,1,2,0}, +{2,0,1,2,3}, +{2,0,2,0,0} }; uint8_t table_7_3_2_3_3_2_oneCodeword[31][6] = { - {1,0,0,0,0,1}, - {1,1,0,0,0,1}, - {1,0,1,0,0,1}, - {2,0,0,0,0,1}, - {2,1,0,0,0,1}, - {2,2,0,0,0,1}, - {2,3,0,0,0,1}, - {2,0,1,0,0,1}, - {2,2,3,0,0,1}, - {2,0,1,2,0,1}, - {2,0,1,2,3,1}, - {2,0,2,0,0,1}, - {2,0,0,0,0,2}, - {2,1,0,0,0,2}, - {2,2,0,0,0,2}, - {2,3,0,0,0,2}, - {2,4,0,0,0,2}, - {2,5,0,0,0,2}, - {2,6,0,0,0,2}, - {2,7,0,0,0,2}, - {2,0,1,0,0,2}, - {2,2,3,0,0,2}, - {2,4,5,0,0,2}, - {2,6,7,0,0,2}, - {2,0,4,0,0,2}, - {2,2,6,0,0,2}, - {2,0,1,4,0,2}, - {2,2,3,6,0,2}, - {2,0,1,4,5,2}, - {2,2,3,6,7,2}, - {2,0,2,4,6,2} +{1,0,0,0,0,1}, +{1,1,0,0,0,1}, +{1,0,1,0,0,1}, +{2,0,0,0,0,1}, +{2,1,0,0,0,1}, +{2,2,0,0,0,1}, +{2,3,0,0,0,1}, +{2,0,1,0,0,1}, +{2,2,3,0,0,1}, +{2,0,1,2,0,1}, +{2,0,1,2,3,1}, +{2,0,2,0,0,1}, +{2,0,0,0,0,2}, +{2,1,0,0,0,2}, +{2,2,0,0,0,2}, +{2,3,0,0,0,2}, +{2,4,0,0,0,2}, +{2,5,0,0,0,2}, +{2,6,0,0,0,2}, +{2,7,0,0,0,2}, +{2,0,1,0,0,2}, +{2,2,3,0,0,2}, +{2,4,5,0,0,2}, +{2,6,7,0,0,2}, +{2,0,4,0,0,2}, +{2,2,6,0,0,2}, +{2,0,1,4,0,2}, +{2,2,3,6,0,2}, +{2,0,1,4,5,2}, +{2,2,3,6,7,2}, +{2,0,2,4,6,2} }; uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = { - {2,0,1,2,3,4,0,0,0,2}, - {2,0,1,2,3,4,6,0,0,2}, - {2,0,1,2,3,4,5,6,0,2}, - {2,0,1,2,3,4,5,6,7,2} +{2,0,1,2,3,4,0,0,0,2}, +{2,0,1,2,3,4,6,0,0,2}, +{2,0,1,2,3,4,5,6,0,2}, +{2,0,1,2,3,4,5,6,7,2} }; uint8_t table_7_3_2_3_3_3_oneCodeword[24][5] = { - {1,0,0,0,0}, - {1,1,0,0,0}, - {1,0,1,0,0}, - {2,0,0,0,0}, - {2,1,0,0,0}, - {2,2,0,0,0}, - {2,3,0,0,0}, - {2,0,1,0,0}, - {2,2,3,0,0}, - {2,0,1,2,0}, - {2,0,1,2,3}, - {3,0,0,0,0}, - {3,1,0,0,0}, - {3,2,0,0,0}, - {3,3,0,0,0}, - {3,4,0,0,0}, - {3,5,0,0,0}, - {3,0,1,0,0}, - {3,2,3,0,0}, - {3,4,5,0,0}, - {3,0,1,2,0}, - {3,3,4,5,0}, - {3,0,1,2,3}, - {2,0,2,0,0} +{1,0,0,0,0}, +{1,1,0,0,0}, +{1,0,1,0,0}, +{2,0,0,0,0}, +{2,1,0,0,0}, +{2,2,0,0,0}, +{2,3,0,0,0}, +{2,0,1,0,0}, +{2,2,3,0,0}, +{2,0,1,2,0}, +{2,0,1,2,3}, +{3,0,0,0,0}, +{3,1,0,0,0}, +{3,2,0,0,0}, +{3,3,0,0,0}, +{3,4,0,0,0}, +{3,5,0,0,0}, +{3,0,1,0,0}, +{3,2,3,0,0}, +{3,4,5,0,0}, +{3,0,1,2,0}, +{3,3,4,5,0}, +{3,0,1,2,3}, +{2,0,2,0,0} }; uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = { - {3,0,1,2,3,4,0}, - {3,0,1,2,3,4,5} +{3,0,1,2,3,4,0}, +{3,0,1,2,3,4,5} }; uint8_t table_7_3_2_3_3_4_oneCodeword[58][6] = { - {1,0,0,0,0,1}, - {1,1,0,0,0,1}, - {1,0,1,0,0,1}, - {2,0,0,0,0,1}, - {2,1,0,0,0,1}, - {2,2,0,0,0,1}, - {2,3,0,0,0,1}, - {2,0,1,0,0,1}, - {2,2,3,0,0,1}, - {2,0,1,2,0,1}, - {2,0,1,2,3,1}, - {3,0,0,0,0,1}, - {3,1,0,0,0,1}, - {3,2,0,0,0,1}, - {3,3,0,0,0,1}, - {3,4,0,0,0,1}, - {3,5,0,0,0,1}, - {3,0,1,0,0,1}, - {3,2,3,0,0,1}, - {3,4,5,0,0,1}, - {3,0,1,2,0,1}, - {3,3,4,5,0,1}, - {3,0,1,2,3,1}, - {2,0,2,0,0,1}, - {3,0,0,0,0,2}, - {3,1,0,0,0,2}, - {3,2,0,0,0,2}, - {3,3,0,0,0,2}, - {3,4,0,0,0,2}, - {3,5,0,0,0,2}, - {3,6,0,0,0,2}, - {3,7,0,0,0,2}, - {3,8,0,0,0,2}, - {3,9,0,0,0,2}, - {3,10,0,0,0,2}, - {3,11,0,0,0,2}, - {3,0,1,0,0,2}, - {3,2,3,0,0,2}, - {3,4,5,0,0,2}, - {3,6,7,0,0,2}, - {3,8,9,0,0,2}, - {3,10,11,0,0,2}, - {3,0,1,6,0,2}, - {3,2,3,8,0,2}, - {3,4,5,10,0,2}, - {3,0,1,6,7,2}, - {3,2,3,8,9,2}, - {3,4,5,10,11,2}, - {1,0,0,0,0,2}, - {1,1,0,0,0,2}, - {1,6,0,0,0,2}, - {1,7,0,0,0,2}, - {1,0,1,0,0,2}, - {1,6,7,0,0,2}, - {2,0,1,0,0,2}, - {2,2,3,0,0,2}, - {2,6,7,0,0,2}, - {2,8,9,0,0,2} +{1,0,0,0,0,1}, +{1,1,0,0,0,1}, +{1,0,1,0,0,1}, +{2,0,0,0,0,1}, +{2,1,0,0,0,1}, +{2,2,0,0,0,1}, +{2,3,0,0,0,1}, +{2,0,1,0,0,1}, +{2,2,3,0,0,1}, +{2,0,1,2,0,1}, +{2,0,1,2,3,1}, +{3,0,0,0,0,1}, +{3,1,0,0,0,1}, +{3,2,0,0,0,1}, +{3,3,0,0,0,1}, +{3,4,0,0,0,1}, +{3,5,0,0,0,1}, +{3,0,1,0,0,1}, +{3,2,3,0,0,1}, +{3,4,5,0,0,1}, +{3,0,1,2,0,1}, +{3,3,4,5,0,1}, +{3,0,1,2,3,1}, +{2,0,2,0,0,1}, +{3,0,0,0,0,2}, +{3,1,0,0,0,2}, +{3,2,0,0,0,2}, +{3,3,0,0,0,2}, +{3,4,0,0,0,2}, +{3,5,0,0,0,2}, +{3,6,0,0,0,2}, +{3,7,0,0,0,2}, +{3,8,0,0,0,2}, +{3,9,0,0,0,2}, +{3,10,0,0,0,2}, +{3,11,0,0,0,2}, +{3,0,1,0,0,2}, +{3,2,3,0,0,2}, +{3,4,5,0,0,2}, +{3,6,7,0,0,2}, +{3,8,9,0,0,2}, +{3,10,11,0,0,2}, +{3,0,1,6,0,2}, +{3,2,3,8,0,2}, +{3,4,5,10,0,2}, +{3,0,1,6,7,2}, +{3,2,3,8,9,2}, +{3,4,5,10,11,2}, +{1,0,0,0,0,2}, +{1,1,0,0,0,2}, +{1,6,0,0,0,2}, +{1,7,0,0,0,2}, +{1,0,1,0,0,2}, +{1,6,7,0,0,2}, +{2,0,1,0,0,2}, +{2,2,3,0,0,2}, +{2,6,7,0,0,2}, +{2,8,9,0,0,2} }; uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = { - {3,0,1,2,3,4,0,0,0,1}, - {3,0,1,2,3,4,5,0,0,1}, - {2,0,1,2,3,6,0,0,0,2}, - {2,0,1,2,3,6,8,0,0,2}, - {2,0,1,2,3,6,7,8,0,2}, - {2,0,1,2,3,6,7,8,9,2} +{3,0,1,2,3,4,0,0,0,1}, +{3,0,1,2,3,4,5,0,0,1}, +{2,0,1,2,3,6,0,0,0,2}, +{2,0,1,2,3,6,8,0,0,2}, +{2,0,1,2,3,6,7,8,0,2}, +{2,0,1,2,3,6,7,8,9,2} }; int8_t nr_ue_process_dci_freq_dom_resource_assignment( - fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu, - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, - uint16_t n_RB_ULBWP, - uint16_t n_RB_DLBWP, - uint16_t riv - ){ + fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu, + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, + uint16_t n_RB_ULBWP, + uint16_t n_RB_DLBWP, + uint16_t riv +){ uint16_t l_RB; uint16_t start_RB; uint16_t tmp_RIV; - /* - * TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink) - * when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used - */ +/* + * TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink) + * when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used + */ if(dlsch_config_pdu != NULL){ - /* - * TS 38.214 subclause 5.1.2.2.1 Downlink resource allocation type 0 - */ - /* - * TS 38.214 subclause 5.1.2.2.2 Downlink resource allocation type 1 - */ + /* + * TS 38.214 subclause 5.1.2.2.1 Downlink resource allocation type 0 + */ + /* + * TS 38.214 subclause 5.1.2.2.2 Downlink resource allocation type 1 + */ // For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV): // RIV = n_RB_DLBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_DLBWP/2) // RIV = n_RB_DLBWP * (n_RB_DLBWP - l_RB + 1) + (n_RB_DLBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_DLBWP/2) @@ -1056,15 +1117,15 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment( dlsch_config_pdu->start_rb = start_RB; } if(ulsch_config_pdu != NULL){ - /* - * TS 38.214 subclause 6.1.2.2 Resource allocation in frequency domain (uplink) - */ - /* - * TS 38.214 subclause 6.1.2.2.1 Uplink resource allocation type 0 - */ - /* - * TS 38.214 subclause 6.1.2.2.2 Uplink resource allocation type 1 - */ +/* + * TS 38.214 subclause 6.1.2.2 Resource allocation in frequency domain (uplink) + */ + /* + * TS 38.214 subclause 6.1.2.2.1 Uplink resource allocation type 0 + */ + /* + * TS 38.214 subclause 6.1.2.2.2 Uplink resource allocation type 1 + */ // For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV): // RIV = n_RB_ULBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_ULBWP/2) // RIV = n_RB_ULBWP * (n_RB_ULBWP - l_RB + 1) + (n_RB_ULBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_ULBWP/2) @@ -1074,8 +1135,8 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment( // if (l_RB - 1) > floor (n_RB_ULBWP/2) we need to recalculate them using the following lines tmp_RIV = n_RB_ULBWP * (l_RB - 1) + start_RB; if (tmp_RIV != riv) { // then (l_RB - 1) > floor (n_RB_ULBWP/2) and we need to recalculate l_RB and start_RB - l_RB = n_RB_ULBWP - l_RB + 2; - start_RB = n_RB_ULBWP - start_RB - 1; + l_RB = n_RB_ULBWP - l_RB + 2; + start_RB = n_RB_ULBWP - start_RB - 1; } ulsch_config_pdu->number_rbs = l_RB; ulsch_config_pdu->start_rb = start_RB; @@ -1084,158 +1145,158 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment( } int8_t nr_ue_process_dci_time_dom_resource_assignment( - fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu, - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, - uint8_t time_domain_ind, - long dmrs_typeA_pos //0=pos2,1=pos3 - ){ + fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu, + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, + uint8_t time_domain_ind, + long dmrs_typeA_pos //0=pos2,1=pos3 +){ uint8_t k_offset=0; uint8_t sliv_S=0; uint8_t sliv_L=0; uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?12:11}, // row index 1 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9}, // row index 2 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8}, // row index 3 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6}, // row index 4 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4}, // row index 5 - {0,(dmrs_typeA_pos == 0)?9:10,(dmrs_typeA_pos == 0)?4:4}, // row index 6 - {0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4}, // row index 7 - {0,5,7}, // row index 8 - {0,5,2}, // row index 9 - {0,9,2}, // row index 10 - {0,12,2}, // row index 11 - {0,1,13}, // row index 12 - {0,1,6}, // row index 13 - {0,2,4}, // row index 14 - {0,4,7}, // row index 15 - {0,8,4} // row index 16 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?12:11}, // row index 1 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9}, // row index 2 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8}, // row index 3 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6}, // row index 4 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4}, // row index 5 + {0,(dmrs_typeA_pos == 0)?9:10,(dmrs_typeA_pos == 0)?4:4}, // row index 6 + {0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4}, // row index 7 + {0,5,7}, // row index 8 + {0,5,2}, // row index 9 + {0,9,2}, // row index 10 + {0,12,2}, // row index 11 + {0,1,13}, // row index 12 + {0,1,6}, // row index 13 + {0,2,4}, // row index 14 + {0,4,7}, // row index 15 + {0,8,4} // row index 16 }; /*uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?6:5}, // row index 1 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9}, // row index 2 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8}, // row index 3 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6}, // row index 4 - {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4}, // row index 5 - {0,(dmrs_typeA_pos == 0)?6:8, (dmrs_typeA_pos == 0)?4:2}, // row index 6 - {0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4}, // row index 7 - {0,5,6}, // row index 8 - {0,5,2}, // row index 9 - {0,9,2}, // row index 10 - {0,10,2}, // row index 11 - {0,1,11}, // row index 12 - {0,1,6}, // row index 13 - {0,2,4}, // row index 14 - {0,4,6}, // row index 15 - {0,8,4} // row index 16 - };*/ + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?6:5}, // row index 1 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9}, // row index 2 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8}, // row index 3 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6}, // row index 4 + {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4}, // row index 5 + {0,(dmrs_typeA_pos == 0)?6:8, (dmrs_typeA_pos == 0)?4:2}, // row index 6 + {0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4}, // row index 7 + {0,5,6}, // row index 8 + {0,5,2}, // row index 9 + {0,9,2}, // row index 10 + {0,10,2}, // row index 11 + {0,1,11}, // row index 12 + {0,1,6}, // row index 13 + {0,2,4}, // row index 14 + {0,4,6}, // row index 15 + {0,8,4} // row index 16 + };*/ /*uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1 - {0,2,2}, // row index 1 - {0,4,2}, // row index 2 - {0,6,2}, // row index 3 - {0,8,2}, // row index 4 - {0,10,2}, // row index 5 - {1,2,2}, // row index 6 - {1,4,2}, // row index 7 - {0,2,4}, // row index 8 - {0,4,4}, // row index 9 - {0,6,4}, // row index 10 - {0,8,4}, // row index 11 - {0,10,4}, // row index 12 - {0,2,7}, // row index 13 - {0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11}, // row index 14 - {1,2,4}, // row index 15 - {0,0,0} // row index 16 - };*/ + {0,2,2}, // row index 1 + {0,4,2}, // row index 2 + {0,6,2}, // row index 3 + {0,8,2}, // row index 4 + {0,10,2}, // row index 5 + {1,2,2}, // row index 6 + {1,4,2}, // row index 7 + {0,2,4}, // row index 8 + {0,4,4}, // row index 9 + {0,6,4}, // row index 10 + {0,8,4}, // row index 11 + {0,10,4}, // row index 12 + {0,2,7}, // row index 13 + {0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11}, // row index 14 + {1,2,4}, // row index 15 + {0,0,0} // row index 16 + };*/ /*uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1 - {0,2,2}, // row index 1 - {0,4,2}, // row index 2 - {0,6,2}, // row index 3 - {0,8,2}, // row index 4 - {0,10,2}, // row index 5 - {0,0,0}, // row index 6 - {0,0,0}, // row index 7 - {0,2,4}, // row index 8 - {0,4,4}, // row index 9 - {0,6,4}, // row index 10 - {0,8,4}, // row index 11 - {0,10,4}, // row index 12 - {0,2,7}, // row index 13 - {0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11}, // row index 14 - {0,0,6}, // row index 15 - {0,2,6} // row index 16 - };*/ + {0,2,2}, // row index 1 + {0,4,2}, // row index 2 + {0,6,2}, // row index 3 + {0,8,2}, // row index 4 + {0,10,2}, // row index 5 + {0,0,0}, // row index 6 + {0,0,0}, // row index 7 + {0,2,4}, // row index 8 + {0,4,4}, // row index 9 + {0,6,4}, // row index 10 + {0,8,4}, // row index 11 + {0,10,4}, // row index 12 + {0,2,7}, // row index 13 + {0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11}, // row index 14 + {0,0,6}, // row index 15 + {0,2,6} // row index 16 + };*/ uint8_t mu_pusch = 1; // definition table j Table 6.1.2.1.1-4 uint8_t j = (mu_pusch==3)?3:(mu_pusch==2)?2:1; uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1 - {j, 0,14}, // row index 1 - {j, 0,12}, // row index 2 - {j, 0,10}, // row index 3 - {j, 2,10}, // row index 4 - {j, 4,10}, // row index 5 - {j, 4,8}, // row index 6 - {j, 4,6}, // row index 7 - {j+1,0,14}, // row index 8 - {j+1,0,12}, // row index 9 - {j+1,0,10}, // row index 10 - {j+2,0,14}, // row index 11 - {j+2,0,12}, // row index 12 - {j+2,0,10}, // row index 13 - {j, 8,6}, // row index 14 - {j+3,0,14}, // row index 15 - {j+3,0,10} // row index 16 + {j, 0,14}, // row index 1 + {j, 0,12}, // row index 2 + {j, 0,10}, // row index 3 + {j, 2,10}, // row index 4 + {j, 4,10}, // row index 5 + {j, 4,8}, // row index 6 + {j, 4,6}, // row index 7 + {j+1,0,14}, // row index 8 + {j+1,0,12}, // row index 9 + {j+1,0,10}, // row index 10 + {j+2,0,14}, // row index 11 + {j+2,0,12}, // row index 12 + {j+2,0,10}, // row index 13 + {j, 8,6}, // row index 14 + {j+3,0,14}, // row index 15 + {j+3,0,10} // row index 16 }; /*uint8_t table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1 - {j, 0,8}, // row index 1 - {j, 0,12}, // row index 2 - {j, 0,10}, // row index 3 - {j, 2,10}, // row index 4 - {j, 4,4}, // row index 5 - {j, 4,8}, // row index 6 - {j, 4,6}, // row index 7 - {j+1,0,8}, // row index 8 - {j+1,0,12}, // row index 9 - {j+1,0,10}, // row index 10 - {j+2,0,6}, // row index 11 - {j+2,0,12}, // row index 12 - {j+2,0,10}, // row index 13 - {j, 8,4}, // row index 14 - {j+3,0,8}, // row index 15 - {j+3,0,10} // row index 16 - };*/ + {j, 0,8}, // row index 1 + {j, 0,12}, // row index 2 + {j, 0,10}, // row index 3 + {j, 2,10}, // row index 4 + {j, 4,4}, // row index 5 + {j, 4,8}, // row index 6 + {j, 4,6}, // row index 7 + {j+1,0,8}, // row index 8 + {j+1,0,12}, // row index 9 + {j+1,0,10}, // row index 10 + {j+2,0,6}, // row index 11 + {j+2,0,12}, // row index 12 + {j+2,0,10}, // row index 13 + {j, 8,4}, // row index 14 + {j+3,0,8}, // row index 15 + {j+3,0,10} // row index 16 + };*/ - /* - * TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink) - */ +/* + * TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink) + */ if(dlsch_config_pdu != NULL){ - k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; - sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1]; - sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2]; - // k_offset = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0]; - // sliv_S = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1]; - // sliv_L = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2]; - // k_offset = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][0]; - // sliv_S = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][1]; - // sliv_L = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][2]; - // k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0]; - // sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1]; - // sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2]; - dlsch_config_pdu->frame_offset = k_offset; - dlsch_config_pdu->number_symbols = sliv_L; - dlsch_config_pdu->start_symbol = sliv_S; + k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; + sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1]; + sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2]; + // k_offset = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0]; + // sliv_S = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1]; + // sliv_L = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2]; + // k_offset = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][0]; + // sliv_S = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][1]; + // sliv_L = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][2]; + // k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0]; + // sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1]; + // sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2]; + dlsch_config_pdu->frame_offset = k_offset; + dlsch_config_pdu->number_symbols = sliv_L; + dlsch_config_pdu->start_symbol = sliv_S; } /* - * TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink) - */ + * TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink) + */ if(ulsch_config_pdu != NULL){ - k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; - sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1]; - sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2]; - // k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0]; - // sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1]; - // sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2]; - ulsch_config_pdu->frame_offset = k_offset; - ulsch_config_pdu->number_symbols = sliv_L; - ulsch_config_pdu->start_symbol = sliv_S; + k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; + sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1]; + sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2]; + // k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0]; + // sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1]; + // sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2]; + ulsch_config_pdu->frame_offset = k_offset; + ulsch_config_pdu->number_symbols = sliv_L; + ulsch_config_pdu->start_symbol = sliv_S; } return 0; } @@ -1243,920 +1304,906 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment( int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format){ - NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); - fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; - fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request; + NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); + fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; + fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request; - //const uint16_t n_RB_DLBWP = dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP; //make sure this has been set - const uint16_t n_RB_DLBWP = mac->initial_bwp_dl.N_RB; - const uint16_t n_RB_ULBWP = mac->initial_bwp_ul.N_RB; + //const uint16_t n_RB_DLBWP = dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP; //make sure this has been set + const uint16_t n_RB_DLBWP = mac->initial_bwp_dl.N_RB; + const uint16_t n_RB_ULBWP = mac->initial_bwp_ul.N_RB; - LOG_I(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP); + LOG_I(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP); - switch(dci_format){ - case format0_0: - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 32 TPC_PUSCH: - * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space - * 50 SUL_IND_0_0: - */ - ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti; - fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15; - /* IDENTIFIER_DCI_FORMATS */ - /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ - nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL); - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); - /* FREQ_HOPPING_FLAG */ - /* - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0)) - ulsch_config_pdu_0_0->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;*/ - /* MCS */ - ulsch_config_pdu_0_0->mcs = dci->mcs; - /* NDI */ - ulsch_config_pdu_0_0->ndi = dci->ndi; - /* RV */ - ulsch_config_pdu_0_0->rv = dci->rv; - /* HARQ_PROCESS_NUMBER */ - ulsch_config_pdu_0_0->harq_process_nbr = dci->harq_process_number; - /* TPC_PUSCH */ - // according to TS 38.213 Table Table 7.1.1-1 - if (dci->tpc_pusch == 0) { - ulsch_config_pdu_0_0->accumulated_delta_PUSCH = -1; - ulsch_config_pdu_0_0->absolute_delta_PUSCH = -4; - } - if (dci->tpc_pusch == 1) { - ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 0; - ulsch_config_pdu_0_0->absolute_delta_PUSCH = -1; - } - if (dci->tpc_pusch == 2) { - ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 1; - ulsch_config_pdu_0_0->absolute_delta_PUSCH = 1; - } - if (dci->tpc_pusch == 3) { - ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 3; - ulsch_config_pdu_0_0->absolute_delta_PUSCH = 4; - } - /* SUL_IND_0_0 */ // To be implemented, FIXME!!! + switch(dci_format){ + case format0_0: +/* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 32 TPC_PUSCH: + * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space + * 50 SUL_IND_0_0: + */ + ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti; + fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15; + /* IDENTIFIER_DCI_FORMATS */ + /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ + nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL); + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); + /* FREQ_HOPPING_FLAG */ + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0)) + ulsch_config_pdu_0_0->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled; + /* MCS */ + ulsch_config_pdu_0_0->mcs = dci->mcs; + /* NDI */ + ulsch_config_pdu_0_0->ndi = dci->ndi; + /* RV */ + ulsch_config_pdu_0_0->rv = dci->rv; + /* HARQ_PROCESS_NUMBER */ + ulsch_config_pdu_0_0->harq_process_nbr = dci->harq_process_number; + /* TPC_PUSCH */ + // according to TS 38.213 Table Table 7.1.1-1 + if (dci->tpc_pusch == 0) { + ulsch_config_pdu_0_0->accumulated_delta_PUSCH = -1; + ulsch_config_pdu_0_0->absolute_delta_PUSCH = -4; + } + if (dci->tpc_pusch == 1) { + ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 0; + ulsch_config_pdu_0_0->absolute_delta_PUSCH = -1; + } + if (dci->tpc_pusch == 2) { + ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 1; + ulsch_config_pdu_0_0->absolute_delta_PUSCH = 1; + } + if (dci->tpc_pusch == 3) { + ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 3; + ulsch_config_pdu_0_0->absolute_delta_PUSCH = 4; + } + /* SUL_IND_0_0 */ // To be implemented, FIXME!!! - ul_config->number_pdus = ul_config->number_pdus + 1; - break; + ul_config->number_pdus = ul_config->number_pdus + 1; + break; - case format0_1: - /* - * with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 1 CARRIER_IND - * 2 SUL_IND_0_1 - * 7 BANDWIDTH_PART_IND - * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 29 FIRST_DAI - * 30 SECOND_DAI - * 32 TPC_PUSCH: - * 36 SRS_RESOURCE_IND: - * 37 PRECOD_NBR_LAYERS: - * 38 ANTENNA_PORTS: - * 40 SRS_REQUEST: - * 42 CSI_REQUEST: - * 43 CBGTI - * 45 PTRS_DMRS - * 46 BETA_OFFSET_IND - * 47 DMRS_SEQ_INI - * 48 UL_SCH_IND - * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space - */ - ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE; - ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti; - fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15; - /* IDENTIFIER_DCI_FORMATS */ - /* CARRIER_IND */ - /* SUL_IND_0_1 */ - /* BANDWIDTH_PART_IND */ - ulsch_config_pdu_0_1->bandwidth_part_ind = dci->bandwidth_part_ind; - /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ - nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL); - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); - /* FREQ_HOPPING_FLAG */ - /* - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0)) - ulsch_config_pdu_0_1->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;*/ - /* MCS */ - ulsch_config_pdu_0_1->mcs = dci->mcs; - /* NDI */ - ulsch_config_pdu_0_1->ndi = dci->ndi; - /* RV */ - ulsch_config_pdu_0_1->rv = dci->rv; - /* HARQ_PROCESS_NUMBER */ - ulsch_config_pdu_0_1->harq_process_nbr = dci->harq_process_number; - /* FIRST_DAI */ //To be implemented, FIXME!!! - /* SECOND_DAI */ //To be implemented, FIXME!!! - /* TPC_PUSCH */ - // according to TS 38.213 Table Table 7.1.1-1 - if (dci->tpc_pusch == 0) { - ulsch_config_pdu_0_1->accumulated_delta_PUSCH = -1; - ulsch_config_pdu_0_1->absolute_delta_PUSCH = -4; - } - if (dci->tpc_pusch == 1) { - ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 0; - ulsch_config_pdu_0_1->absolute_delta_PUSCH = -1; - } - if (dci->tpc_pusch == 2) { - ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 1; - ulsch_config_pdu_0_1->absolute_delta_PUSCH = 1; - } - if (dci->tpc_pusch == 3) { - ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 3; - ulsch_config_pdu_0_1->absolute_delta_PUSCH = 4; - } - /* SRS_RESOURCE_IND */ - //FIXME!! - /* PRECOD_NBR_LAYERS */ - /* - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.tx_config == tx_config_nonCodebook)); - // 0 bits if the higher layer parameter txConfig = nonCodeBook - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.tx_config == tx_config_codebook)){ - uint8_t n_antenna_port = 0; //FIXME!!! - if (n_antenna_port == 1); // 1 antenna port and the higher layer parameter txConfig = codebook 0 bits - if (n_antenna_port == 4){ // 4 antenna port and the higher layer parameter txConfig = codebook - // Table 7.3.1.1.2-2: transformPrecoder=disabled and maxRank = 2 or 3 or 4 - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) - && ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 2) || - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 3) || - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 4))){ - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][0]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][1]; - } - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_partialAndNonCoherent){ - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][2]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][3]; - } - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][4]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][5]; - } - } - // Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1 - if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) - || (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled)) - && (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1)){ - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][6]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][7]; - } - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_partialAndNonCoherent){ - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][8]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][9]; - } - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][10]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][11]; - } - } - } - if (n_antenna_port == 4){ // 2 antenna port and the higher layer parameter txConfig = codebook - // Table 7.3.1.1.2-4: transformPrecoder=disabled and maxRank = 2 - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) - && (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 2)){ - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][12]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][13]; - } - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][14]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][15]; - } - } - // Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1 - if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) - || (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled)) - && (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1)){ - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][16]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][17]; - } - if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ - ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][18]; - ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][19]; - } - } - } - } - */ - /* ANTENNA_PORTS */ - - uint8_t rank=0; // We need to initialize rank FIXME!!! - /* - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-6 - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; - ulsch_config_pdu_0_1->dmrs_ports[0] = dci->antenna_ports; - } - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-7 - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; - ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 3)?(dci->antenna_ports-4):(dci->antenna_ports); - ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 3)?2:1; - } - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-8/9/10/11 - if (rank == 1){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 1)?2:1; - ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports-2):(dci->antenna_ports); - } - if (rank == 2){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?2:1; - ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?0:2):0; - ulsch_config_pdu_0_1->dmrs_ports[1] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?2:3):1; - } - if (rank == 3){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; - ulsch_config_pdu_0_1->dmrs_ports[0] = 0; - ulsch_config_pdu_0_1->dmrs_ports[1] = 1; - ulsch_config_pdu_0_1->dmrs_ports[2] = 2; - } - if (rank == 4){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; - ulsch_config_pdu_0_1->dmrs_ports[0] = 0; - ulsch_config_pdu_0_1->dmrs_ports[1] = 1; - ulsch_config_pdu_0_1->dmrs_ports[2] = 2; - ulsch_config_pdu_0_1->dmrs_ports[3] = 3; - } - } - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-12/13/14/15 - if (rank == 1){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 1)?2:1; - ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 5 ?(dci->antenna_ports-6):(dci->antenna_ports-2)):dci->antenna_ports; - ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 6)?2:1; - } - if (rank == 2){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?2:1; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_13[dci->antenna_ports][2]; - ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 3)?2:1; - } - if (rank == 3){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_14[dci->antenna_ports][2]; - ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_14[dci->antenna_ports][3]; - ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 1)?2:1; - } - if (rank == 4){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_15[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_15[dci->antenna_ports][2]; - ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_15[dci->antenna_ports][3]; - ulsch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_15[dci->antenna_ports][4]; - ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 1)?2:1; - } - } - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 2) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-16/17/18/19 - if (rank == 1){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 1)?((dci->antenna_ports > 5)?3:2):1; - ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 5 ?(dci->antenna_ports-6):(dci->antenna_ports-2)):dci->antenna_ports; - } - if (rank == 2){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?((dci->antenna_ports > 2)?3:2):1; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_17[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_17[dci->antenna_ports][2]; - } - if (rank == 3){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?3:2; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_18[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_18[dci->antenna_ports][2]; - ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_18[dci->antenna_ports][3]; - } - if (rank == 4){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = dci->antenna_ports + 2; - ulsch_config_pdu_0_1->dmrs_ports[0] = 0; - ulsch_config_pdu_0_1->dmrs_ports[1] = 1; - ulsch_config_pdu_0_1->dmrs_ports[2] = 2; - ulsch_config_pdu_0_1->dmrs_ports[3] = 3; - } - } - if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 2) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-20/21/22/23 - if (rank == 1){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_20[dci->antenna_ports][0]; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_20[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports][2]; - } - if (rank == 2){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_21[dci->antenna_ports][0]; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports][2]; - ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports][3]; - } - if (rank == 3){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_22[dci->antenna_ports][0]; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_22[dci->antenna_ports][2]; - ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_22[dci->antenna_ports][3]; - ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports][4]; - } - if (rank == 4){ - ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_23[dci->antenna_ports][0]; - ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_23[dci->antenna_ports][1]; - ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_23[dci->antenna_ports][2]; - ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_23[dci->antenna_ports][3]; - ulsch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_23[dci->antenna_ports][4]; - ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports][5]; - } - } - */ - /* SRS_REQUEST */ - // if SUL is supported in the cell, there is an additional bit in thsi field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! - ulsch_config_pdu_0_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 - /* CSI_REQUEST */ - ulsch_config_pdu_0_1->csi_reportTriggerSize = dci->csi_request; - /* CBGTI */ - ulsch_config_pdu_0_1->maxCodeBlockGroupsPerTransportBlock = dci->cbgti; - /* PTRS_DMRS */ - /* - if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.ptrs_uplink_config == 0)) || - ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) && - (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1))){ - } else { - ulsch_config_pdu_0_1->ptrs_dmrs_association_port = dci->ptrs_dmrs; - } - */ - /* BETA_OFFSET_IND */ - // Table 9.3-3 in [5, TS 38.213] - ulsch_config_pdu_0_1->beta_offset_ind = dci->beta_offset_ind; - /* DMRS_SEQ_INI */ - // FIXME!! - /* UL_SCH_IND */ - // A value of "1" indicates UL-SCH shall be transmitted on the PUSCH and - // a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH + case format0_1: +/* + * with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 1 CARRIER_IND + * 2 SUL_IND_0_1 + * 7 BANDWIDTH_PART_IND + * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 29 FIRST_DAI + * 30 SECOND_DAI + * 32 TPC_PUSCH: + * 36 SRS_RESOURCE_IND: + * 37 PRECOD_NBR_LAYERS: + * 38 ANTENNA_PORTS: + * 40 SRS_REQUEST: + * 42 CSI_REQUEST: + * 43 CBGTI + * 45 PTRS_DMRS + * 46 BETA_OFFSET_IND + * 47 DMRS_SEQ_INI + * 48 UL_SCH_IND + * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space + */ + ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; + ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti; + fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15; + /* IDENTIFIER_DCI_FORMATS */ + /* CARRIER_IND */ + /* SUL_IND_0_1 */ + /* BANDWIDTH_PART_IND */ + ulsch_config_pdu_0_1->bandwidth_part_ind = dci->bandwidth_part_ind; + /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ + nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL); + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); + /* FREQ_HOPPING_FLAG */ + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0)) + ulsch_config_pdu_0_1->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled; + /* MCS */ + ulsch_config_pdu_0_1->mcs = dci->mcs; + /* NDI */ + ulsch_config_pdu_0_1->ndi = dci->ndi; + /* RV */ + ulsch_config_pdu_0_1->rv = dci->rv; + /* HARQ_PROCESS_NUMBER */ + ulsch_config_pdu_0_1->harq_process_nbr = dci->harq_process_number; + /* FIRST_DAI */ //To be implemented, FIXME!!! + /* SECOND_DAI */ //To be implemented, FIXME!!! + /* TPC_PUSCH */ + // according to TS 38.213 Table Table 7.1.1-1 + if (dci->tpc_pusch == 0) { + ulsch_config_pdu_0_1->accumulated_delta_PUSCH = -1; + ulsch_config_pdu_0_1->absolute_delta_PUSCH = -4; + } + if (dci->tpc_pusch == 1) { + ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 0; + ulsch_config_pdu_0_1->absolute_delta_PUSCH = -1; + } + if (dci->tpc_pusch == 2) { + ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 1; + ulsch_config_pdu_0_1->absolute_delta_PUSCH = 1; + } + if (dci->tpc_pusch == 3) { + ulsch_config_pdu_0_1->accumulated_delta_PUSCH = 3; + ulsch_config_pdu_0_1->absolute_delta_PUSCH = 4; + } + /* SRS_RESOURCE_IND */ + //FIXME!! + /* PRECOD_NBR_LAYERS */ + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.tx_config == tx_config_nonCodebook)); + // 0 bits if the higher layer parameter txConfig = nonCodeBook + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.tx_config == tx_config_codebook)){ + uint8_t n_antenna_port = 0; //FIXME!!! + if (n_antenna_port == 1); // 1 antenna port and the higher layer parameter txConfig = codebook 0 bits + if (n_antenna_port == 4){ // 4 antenna port and the higher layer parameter txConfig = codebook + // Table 7.3.1.1.2-2: transformPrecoder=disabled and maxRank = 2 or 3 or 4 + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) + && ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 2) || + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 3) || + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 4))){ + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][0]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][1]; + } + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_partialAndNonCoherent){ + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][2]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][3]; + } + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][4]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][5]; + } + } + // Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1 + if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) + || (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled)) + && (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1)){ + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][6]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][7]; + } + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_partialAndNonCoherent){ + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][8]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][9]; + } + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][10]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][11]; + } + } + } + if (n_antenna_port == 4){ // 2 antenna port and the higher layer parameter txConfig = codebook + // Table 7.3.1.1.2-4: transformPrecoder=disabled and maxRank = 2 + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) + && (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 2)){ + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][12]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][13]; + } + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][14]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][15]; + } + } + // Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1 + if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) + || (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled)) + && (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1)){ + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_fullyAndPartialAndNonCoherent) { + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][16]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][17]; + } + if (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.codebook_subset == codebook_subset_nonCoherent){ + ulsch_config_pdu_0_1->n_layers = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][18]; + ulsch_config_pdu_0_1->tpmi = table_7_3_1_1_2_2_3_4_5[dci->precod_nbr_layers][19]; + } + } + } + } + /* ANTENNA_PORTS */ + uint8_t rank=0; // We need to initialize rank FIXME!!! + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-6 + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; + ulsch_config_pdu_0_1->dmrs_ports[0] = dci->antenna_ports; + } + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-7 + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; + ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 3)?(dci->antenna_ports-4):(dci->antenna_ports); + ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 3)?2:1; + } + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-8/9/10/11 + if (rank == 1){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 1)?2:1; + ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports-2):(dci->antenna_ports); + } + if (rank == 2){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?2:1; + ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?0:2):0; + ulsch_config_pdu_0_1->dmrs_ports[1] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?2:3):1; + } + if (rank == 3){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; + ulsch_config_pdu_0_1->dmrs_ports[0] = 0; + ulsch_config_pdu_0_1->dmrs_ports[1] = 1; + ulsch_config_pdu_0_1->dmrs_ports[2] = 2; + } + if (rank == 4){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; + ulsch_config_pdu_0_1->dmrs_ports[0] = 0; + ulsch_config_pdu_0_1->dmrs_ports[1] = 1; + ulsch_config_pdu_0_1->dmrs_ports[2] = 2; + ulsch_config_pdu_0_1->dmrs_ports[3] = 3; + } + } + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-12/13/14/15 + if (rank == 1){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 1)?2:1; + ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 5 ?(dci->antenna_ports-6):(dci->antenna_ports-2)):dci->antenna_ports; + ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 6)?2:1; + } + if (rank == 2){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?2:1; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_13[dci->antenna_ports][2]; + ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 3)?2:1; + } + if (rank == 3){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_14[dci->antenna_ports][2]; + ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_14[dci->antenna_ports][3]; + ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 1)?2:1; + } + if (rank == 4){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = 2; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_15[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_15[dci->antenna_ports][2]; + ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_15[dci->antenna_ports][3]; + ulsch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_15[dci->antenna_ports][4]; + ulsch_config_pdu_0_1->n_front_load_symb = (dci->antenna_ports > 1)?2:1; + } + } + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 2) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-16/17/18/19 + if (rank == 1){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 1)?((dci->antenna_ports > 5)?3:2):1; + ulsch_config_pdu_0_1->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 5 ?(dci->antenna_ports-6):(dci->antenna_ports-2)):dci->antenna_ports; + } + if (rank == 2){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?((dci->antenna_ports > 2)?3:2):1; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_17[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_17[dci->antenna_ports][2]; + } + if (rank == 3){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = (dci->antenna_ports > 0)?3:2; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_18[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_18[dci->antenna_ports][2]; + ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_18[dci->antenna_ports][3]; + } + if (rank == 4){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = dci->antenna_ports + 2; + ulsch_config_pdu_0_1->dmrs_ports[0] = 0; + ulsch_config_pdu_0_1->dmrs_ports[1] = 1; + ulsch_config_pdu_0_1->dmrs_ports[2] = 2; + ulsch_config_pdu_0_1->dmrs_ports[3] = 3; + } + } + if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 2) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 2)) { // tables 7.3.1.1.2-20/21/22/23 + if (rank == 1){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_20[dci->antenna_ports][0]; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_20[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports][2]; + } + if (rank == 2){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_21[dci->antenna_ports][0]; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports][2]; + ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports][3]; + } + if (rank == 3){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_22[dci->antenna_ports][0]; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_22[dci->antenna_ports][2]; + ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_22[dci->antenna_ports][3]; + ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports][4]; + } + if (rank == 4){ + ulsch_config_pdu_0_1->n_dmrs_cdm_groups = table_7_3_1_1_2_23[dci->antenna_ports][0]; + ulsch_config_pdu_0_1->dmrs_ports[0] = table_7_3_1_1_2_23[dci->antenna_ports][1]; + ulsch_config_pdu_0_1->dmrs_ports[1] = table_7_3_1_1_2_23[dci->antenna_ports][2]; + ulsch_config_pdu_0_1->dmrs_ports[2] = table_7_3_1_1_2_23[dci->antenna_ports][3]; + ulsch_config_pdu_0_1->dmrs_ports[3] = table_7_3_1_1_2_23[dci->antenna_ports][4]; + ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports][5]; + } + } + /* SRS_REQUEST */ + // if SUL is supported in the cell, there is an additional bit in thsi field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! + ulsch_config_pdu_0_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 + /* CSI_REQUEST */ + ulsch_config_pdu_0_1->csi_reportTriggerSize = dci->csi_request; + /* CBGTI */ + ulsch_config_pdu_0_1->maxCodeBlockGroupsPerTransportBlock = dci->cbgti; + /* PTRS_DMRS */ + if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.ptrs_uplink_config == 0)) || + ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) && + (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.max_rank == 1))){ + } else { + ulsch_config_pdu_0_1->ptrs_dmrs_association_port = dci->ptrs_dmrs; + } + /* BETA_OFFSET_IND */ + // Table 9.3-3 in [5, TS 38.213] + ulsch_config_pdu_0_1->beta_offset_ind = dci->beta_offset_ind; + /* DMRS_SEQ_INI */ + // FIXME!! + /* UL_SCH_IND */ + // A value of "1" indicates UL-SCH shall be transmitted on the PUSCH and + // a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH - ul_config->number_pdus = ul_config->number_pdus + 1; - break; + ul_config->number_pdus = ul_config->number_pdus + 1; + break; - case format1_0: - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - * 34 PUCCH_RESOURCE_IND: - * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: - * 55 RESERVED_NR_DCI - * with CRC scrambled by P-RNTI - * 8 SHORT_MESSAGE_IND - * 9 SHORT_MESSAGES - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 31 TB_SCALING - * 55 RESERVED_NR_DCI - * with CRC scrambled by SI-RNTI - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 26 RV: - * 55 RESERVED_NR_DCI - * with CRC scrambled by RA-RNTI - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 31 TB_SCALING - * 55 RESERVED_NR_DCI - * with CRC scrambled by TC-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - */ - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; - //fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_pdu_1_0 = dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - /* IDENTIFIER_DCI_FORMATS */ - /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ - nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->freq_dom_resource_assignment_DL); - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - nr_ue_process_dci_time_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); - /* VRB_TO_PRB_MAPPING */ - dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; - /* MCS */ - dlsch_config_pdu_1_0->mcs = dci->mcs; - /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->ndi = dci->ndi; - /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->rv = dci->rv; - /* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->harq_process_nbr = dci->harq_process_number; - /* DAI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->dai = dci ->dai; - /* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */ - // according to TS 38.214 Table 5.1.3.2-3 - if (dci->tb_scaling == 0) dlsch_config_pdu_1_0->scaling_factor_S = 1; - if (dci->tb_scaling == 1) dlsch_config_pdu_1_0->scaling_factor_S = 0.5; - if (dci->tb_scaling == 2) dlsch_config_pdu_1_0->scaling_factor_S = 0.25; - if (dci->tb_scaling == 3) dlsch_config_pdu_1_0->scaling_factor_S = 0; // value not defined in table - /* TPC_PUCCH (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - // according to TS 38.213 Table 7.2.1-1 - if (dci->tpc_pucch == 0) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = -1; - if (dci->tpc_pucch == 1) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 0; - if (dci->tpc_pucch == 2) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 1; - if (dci->tpc_pucch == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3; - /* PUCCH_RESOURCE_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/ - //if (dci->pucch_resource_ind == 0) dlsch_config_pdu_1_0->pucch_resource_id = 1; //pucch-ResourceId obtained from the 1st value of resourceList FIXME!!! - //if (dci->pucch_resource_ind == 1) dlsch_config_pdu_1_0->pucch_resource_id = 2; //pucch-ResourceId obtained from the 2nd value of resourceList FIXME!! - //if (dci->pucch_resource_ind == 2) dlsch_config_pdu_1_0->pucch_resource_id = 3; //pucch-ResourceId obtained from the 3rd value of resourceList FIXME!! - //if (dci->pucch_resource_ind == 3) dlsch_config_pdu_1_0->pucch_resource_id = 4; //pucch-ResourceId obtained from the 4th value of resourceList FIXME!! - //if (dci->pucch_resource_ind == 4) dlsch_config_pdu_1_0->pucch_resource_id = 5; //pucch-ResourceId obtained from the 5th value of resourceList FIXME!! - //if (dci->pucch_resource_ind == 5) dlsch_config_pdu_1_0->pucch_resource_id = 6; //pucch-ResourceId obtained from the 6th value of resourceList FIXME!! - //if (dci->pucch_resource_ind == 6) dlsch_config_pdu_1_0->pucch_resource_id = 7; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!! - //if (dci->pucch_resource_ind == 7) dlsch_config_pdu_1_0->pucch_resource_id = 8; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!! - dlsch_config_pdu_1_0->pucch_resource_id = dci->pucch_resource_ind; - /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/ - dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_time_ind; + case format1_0: +/* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + * 34 PUCCH_RESOURCE_IND: + * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: + * 55 RESERVED_NR_DCI + * with CRC scrambled by P-RNTI + * 8 SHORT_MESSAGE_IND + * 9 SHORT_MESSAGES + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 31 TB_SCALING + * 55 RESERVED_NR_DCI + * with CRC scrambled by SI-RNTI + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 26 RV: + * 55 RESERVED_NR_DCI + * with CRC scrambled by RA-RNTI + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 31 TB_SCALING + * 55 RESERVED_NR_DCI + * with CRC scrambled by TC-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + */ + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; + //fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_pdu_1_0 = dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + /* IDENTIFIER_DCI_FORMATS */ + /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ + nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->freq_dom_resource_assignment_DL); + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + nr_ue_process_dci_time_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); + /* VRB_TO_PRB_MAPPING */ + dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; + /* MCS */ + dlsch_config_pdu_1_0->mcs = dci->mcs; + /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->ndi = dci->ndi; + /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->rv = dci->rv; + /* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->harq_process_nbr = dci->harq_process_number; + /* DAI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->dai = dci ->dai; + /* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */ + // according to TS 38.214 Table 5.1.3.2-3 + if (dci->tb_scaling == 0) dlsch_config_pdu_1_0->scaling_factor_S = 1; + if (dci->tb_scaling == 1) dlsch_config_pdu_1_0->scaling_factor_S = 0.5; + if (dci->tb_scaling == 2) dlsch_config_pdu_1_0->scaling_factor_S = 0.25; + if (dci->tb_scaling == 3) dlsch_config_pdu_1_0->scaling_factor_S = 0; // value not defined in table + /* TPC_PUCCH (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + // according to TS 38.213 Table 7.2.1-1 + if (dci->tpc_pucch == 0) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = -1; + if (dci->tpc_pucch == 1) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 0; + if (dci->tpc_pucch == 2) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 1; + if (dci->tpc_pucch == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3; + /* PUCCH_RESOURCE_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/ + //if (dci->pucch_resource_ind == 0) dlsch_config_pdu_1_0->pucch_resource_id = 1; //pucch-ResourceId obtained from the 1st value of resourceList FIXME!!! + //if (dci->pucch_resource_ind == 1) dlsch_config_pdu_1_0->pucch_resource_id = 2; //pucch-ResourceId obtained from the 2nd value of resourceList FIXME!! + //if (dci->pucch_resource_ind == 2) dlsch_config_pdu_1_0->pucch_resource_id = 3; //pucch-ResourceId obtained from the 3rd value of resourceList FIXME!! + //if (dci->pucch_resource_ind == 3) dlsch_config_pdu_1_0->pucch_resource_id = 4; //pucch-ResourceId obtained from the 4th value of resourceList FIXME!! + //if (dci->pucch_resource_ind == 4) dlsch_config_pdu_1_0->pucch_resource_id = 5; //pucch-ResourceId obtained from the 5th value of resourceList FIXME!! + //if (dci->pucch_resource_ind == 5) dlsch_config_pdu_1_0->pucch_resource_id = 6; //pucch-ResourceId obtained from the 6th value of resourceList FIXME!! + //if (dci->pucch_resource_ind == 6) dlsch_config_pdu_1_0->pucch_resource_id = 7; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!! + //if (dci->pucch_resource_ind == 7) dlsch_config_pdu_1_0->pucch_resource_id = 8; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!! + dlsch_config_pdu_1_0->pucch_resource_id = dci->pucch_resource_ind; + /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/ + dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_time_ind; - LOG_D(MAC,"(nr_ue_procedures.c) rnti=%d dl_config->number_pdus=%d\n", - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti, - dl_config->number_pdus); - LOG_D(MAC,"(nr_ue_procedures.c) frequency_domain_resource_assignment=%d \t number_rbs=%d \t start_rb=%d\n", - dci->freq_dom_resource_assignment_DL, - dlsch_config_pdu_1_0->number_rbs, - dlsch_config_pdu_1_0->start_rb); - LOG_D(MAC,"(nr_ue_procedures.c) time_domain_resource_assignment=%d \t number_symbols=%d \t start_symbol=%d\n", - dci->time_dom_resource_assignment, - dlsch_config_pdu_1_0->number_symbols, - dlsch_config_pdu_1_0->start_symbol); - LOG_D(MAC,"(nr_ue_procedures.c) vrb_to_prb_mapping=%d \n>>> mcs=%d\n>>> ndi=%d\n>>> rv=%d\n>>> harq_process_nbr=%d\n>>> dai=%d\n>>> scaling_factor_S=%f\n>>> tpc_pucch=%d\n>>> pucch_res_ind=%d\n>>> pdsch_to_harq_feedback_time_ind=%d\n", - dlsch_config_pdu_1_0->vrb_to_prb_mapping, - dlsch_config_pdu_1_0->mcs, - dlsch_config_pdu_1_0->ndi, - dlsch_config_pdu_1_0->rv, - dlsch_config_pdu_1_0->harq_process_nbr, - dlsch_config_pdu_1_0->dai, - dlsch_config_pdu_1_0->scaling_factor_S, - dlsch_config_pdu_1_0->accumulated_delta_PUCCH, - dlsch_config_pdu_1_0->pucch_resource_id, - dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind); + LOG_D(MAC,"(nr_ue_procedures.c) rnti=%d dl_config->number_pdus=%d\n", + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti, + dl_config->number_pdus); + LOG_D(MAC,"(nr_ue_procedures.c) frequency_domain_resource_assignment=%d \t number_rbs=%d \t start_rb=%d\n", + dci->freq_dom_resource_assignment_DL, + dlsch_config_pdu_1_0->number_rbs, + dlsch_config_pdu_1_0->start_rb); + LOG_D(MAC,"(nr_ue_procedures.c) time_domain_resource_assignment=%d \t number_symbols=%d \t start_symbol=%d\n", + dci->time_dom_resource_assignment, + dlsch_config_pdu_1_0->number_symbols, + dlsch_config_pdu_1_0->start_symbol); + LOG_D(MAC,"(nr_ue_procedures.c) vrb_to_prb_mapping=%d \n>>> mcs=%d\n>>> ndi=%d\n>>> rv=%d\n>>> harq_process_nbr=%d\n>>> dai=%d\n>>> scaling_factor_S=%f\n>>> tpc_pucch=%d\n>>> pucch_res_ind=%d\n>>> pdsch_to_harq_feedback_time_ind=%d\n", + dlsch_config_pdu_1_0->vrb_to_prb_mapping, + dlsch_config_pdu_1_0->mcs, + dlsch_config_pdu_1_0->ndi, + dlsch_config_pdu_1_0->rv, + dlsch_config_pdu_1_0->harq_process_nbr, + dlsch_config_pdu_1_0->dai, + dlsch_config_pdu_1_0->scaling_factor_S, + dlsch_config_pdu_1_0->accumulated_delta_PUCCH, + dlsch_config_pdu_1_0->pucch_resource_id, + dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind); - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; - LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); + LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); - dl_config->number_pdus = dl_config->number_pdus + 1; - break; + dl_config->number_pdus = dl_config->number_pdus + 1; + break; - case format1_1: - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 1 CARRIER_IND: - * 7 BANDWIDTH_PART_IND: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 14 PRB_BUNDLING_SIZE_IND: - * 15 RATE_MATCHING_IND: - * 16 ZP_CSI_RS_TRIGGER: - * 18 TB1_MCS: - * 19 TB1_NDI: - * 20 TB1_RV: - * 21 TB2_MCS: - * 22 TB2_NDI: - * 23 TB2_RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - * 34 PUCCH_RESOURCE_IND: - * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: - * 38 ANTENNA_PORTS: - * 39 TCI: - * 40 SRS_REQUEST: - * 43 CBGTI: - * 44 CBGFI: - * 47 DMRS_SEQ_INI: - */ - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - /* IDENTIFIER_DCI_FORMATS */ - /* CARRIER_IND */ - /* BANDWIDTH_PART_IND */ - dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind; - /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ - nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->freq_dom_resource_assignment_DL); - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - nr_ue_process_dci_time_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); - /* VRB_TO_PRB_MAPPING */ - /* - if (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.resource_allocation != 0) - dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; - */ - /* PRB_BUNDLING_SIZE_IND */ - dlsch_config_pdu_1_1->prb_bundling_size_ind = dci->prb_bundling_size_ind; - /* RATE_MATCHING_IND */ - dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_ind; - /* ZP_CSI_RS_TRIGGER */ - dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger; - /* MCS (for transport block 1)*/ - dlsch_config_pdu_1_1->mcs = dci->tb1_mcs; - /* NDI (for transport block 1)*/ - dlsch_config_pdu_1_1->ndi = dci->tb1_ndi; - /* RV (for transport block 1)*/ - dlsch_config_pdu_1_1->rv = dci->tb1_rv; - /* MCS (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_mcs = dci->tb2_mcs; - /* NDI (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_ndi = dci->tb2_ndi; - /* RV (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_rv = dci->tb2_rv; - /* HARQ_PROCESS_NUMBER */ - dlsch_config_pdu_1_1->harq_process_nbr = dci->harq_process_number; - /* DAI */ - dlsch_config_pdu_1_1->dai = dci ->dai; - /* TPC_PUCCH */ - // according to TS 38.213 Table 7.2.1-1 - if (dci->tpc_pucch == 0) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = -1; - if (dci->tpc_pucch == 1) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 0; - if (dci->tpc_pucch == 2) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 1; - if (dci->tpc_pucch == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3; - /* PUCCH_RESOURCE_IND */ - if (dci->pucch_resource_ind == 0) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 1st value of resourceList FIXME!!! - if (dci->pucch_resource_ind == 1) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 2nd value of resourceList FIXME!! - if (dci->pucch_resource_ind == 2) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 3rd value of resourceList FIXME!! - if (dci->pucch_resource_ind == 3) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 4th value of resourceList FIXME!! - if (dci->pucch_resource_ind == 4) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 5th value of resourceList FIXME!! - if (dci->pucch_resource_ind == 5) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 6th value of resourceList FIXME!! - if (dci->pucch_resource_ind == 6) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!! - if (dci->pucch_resource_ind == 7) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!! - /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ - // according to TS 38.213 Table 9.2.3-1 - /* - dlsch_config_pdu_1_1-> pdsch_to_harq_feedback_time_ind = mac->phy_config.config_req.ul_bwp_dedicated.pucch_config_dedicated.dl_data_to_ul_ack[dci->pdsch_to_harq_feedback_time_ind];*/ - /* ANTENNA_PORTS */ - uint8_t n_codewords = 1; // FIXME!!! - /* - if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 1) && - (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 1)){ - // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports][4]; - } - if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 1) && - (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 2)){ - // Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][4]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][5]; - } - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][6]; - dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][7]; - dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][8]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][9]; - } - } - if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 2) && - (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 1)){ - // Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][4]; - } - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][6]; - } - } - if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 2) && - (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 2)){ - // Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][4]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][5]; - } - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][6]; - dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][7]; - dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][8]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][9]; - } - } - */ - /* TCI */ - if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){ - // 0 bit if higher layer parameter tci-PresentInDCI is not enabled - // otherwise 3 bits as defined in Subclause 5.1.5 of [6, TS38.214] - dlsch_config_pdu_1_1->tci_state = dci->tci; - } - /* SRS_REQUEST */ - // if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! - dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 - /* CBGTI */ - dlsch_config_pdu_1_1->cbgti = dci->cbgti; - /* CBGFI */ - dlsch_config_pdu_1_1->codeBlockGroupFlushIndicator = dci->cbgfi; - /* DMRS_SEQ_INI */ - //FIXME!!! + case format1_1: +/* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 1 CARRIER_IND: + * 7 BANDWIDTH_PART_IND: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 14 PRB_BUNDLING_SIZE_IND: + * 15 RATE_MATCHING_IND: + * 16 ZP_CSI_RS_TRIGGER: + * 18 TB1_MCS: + * 19 TB1_NDI: + * 20 TB1_RV: + * 21 TB2_MCS: + * 22 TB2_NDI: + * 23 TB2_RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + * 34 PUCCH_RESOURCE_IND: + * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: + * 38 ANTENNA_PORTS: + * 39 TCI: + * 40 SRS_REQUEST: + * 43 CBGTI: + * 44 CBGFI: + * 47 DMRS_SEQ_INI: + */ + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + /* IDENTIFIER_DCI_FORMATS */ + /* CARRIER_IND */ + /* BANDWIDTH_PART_IND */ + dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind; + /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ + nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->freq_dom_resource_assignment_DL); + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + nr_ue_process_dci_time_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position); + /* VRB_TO_PRB_MAPPING */ + if (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.resource_allocation != 0) + dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; + /* PRB_BUNDLING_SIZE_IND */ + dlsch_config_pdu_1_1->prb_bundling_size_ind = dci->prb_bundling_size_ind; + /* RATE_MATCHING_IND */ + dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_ind; + /* ZP_CSI_RS_TRIGGER */ + dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger; + /* MCS (for transport block 1)*/ + dlsch_config_pdu_1_1->mcs = dci->tb1_mcs; + /* NDI (for transport block 1)*/ + dlsch_config_pdu_1_1->ndi = dci->tb1_ndi; + /* RV (for transport block 1)*/ + dlsch_config_pdu_1_1->rv = dci->tb1_rv; + /* MCS (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_mcs = dci->tb2_mcs; + /* NDI (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_ndi = dci->tb2_ndi; + /* RV (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_rv = dci->tb2_rv; + /* HARQ_PROCESS_NUMBER */ + dlsch_config_pdu_1_1->harq_process_nbr = dci->harq_process_number; + /* DAI */ + dlsch_config_pdu_1_1->dai = dci ->dai; + /* TPC_PUCCH */ + // according to TS 38.213 Table 7.2.1-1 + if (dci->tpc_pucch == 0) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = -1; + if (dci->tpc_pucch == 1) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 0; + if (dci->tpc_pucch == 2) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 1; + if (dci->tpc_pucch == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3; + /* PUCCH_RESOURCE_IND */ + if (dci->pucch_resource_ind == 0) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 1st value of resourceList FIXME!!! + if (dci->pucch_resource_ind == 1) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 2nd value of resourceList FIXME!! + if (dci->pucch_resource_ind == 2) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 3rd value of resourceList FIXME!! + if (dci->pucch_resource_ind == 3) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 4th value of resourceList FIXME!! + if (dci->pucch_resource_ind == 4) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 5th value of resourceList FIXME!! + if (dci->pucch_resource_ind == 5) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 6th value of resourceList FIXME!! + if (dci->pucch_resource_ind == 6) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!! + if (dci->pucch_resource_ind == 7) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!! + /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ + // according to TS 38.213 Table 9.2.3-1 + dlsch_config_pdu_1_1-> pdsch_to_harq_feedback_time_ind = mac->phy_config.config_req.ul_bwp_dedicated.pucch_config_dedicated.dl_data_to_ul_ack[dci->pdsch_to_harq_feedback_time_ind]; + /* ANTENNA_PORTS */ + uint8_t n_codewords = 1; // FIXME!!! + if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 1) && + (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 1)){ + // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports][4]; + } + if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 1) && + (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 2)){ + // Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][4]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports][5]; + } + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][6]; + dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][7]; + dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][8]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports][9]; + } + } + if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 2) && + (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 1)){ + // Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports][4]; + } + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports][6]; + } + } + if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 2) && + (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 2)){ + // Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][4]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports][5]; + } + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][6]; + dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][7]; + dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][8]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][9]; + } + } + /* TCI */ + if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){ + // 0 bit if higher layer parameter tci-PresentInDCI is not enabled + // otherwise 3 bits as defined in Subclause 5.1.5 of [6, TS38.214] + dlsch_config_pdu_1_1->tci_state = dci->tci; + } + /* SRS_REQUEST */ + // if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! + dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 + /* CBGTI */ + dlsch_config_pdu_1_1->cbgti = dci->cbgti; + /* CBGFI */ + dlsch_config_pdu_1_1->codeBlockGroupFlushIndicator = dci->cbgfi; + /* DMRS_SEQ_INI */ + //FIXME!!! - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); - dl_config->number_pdus = dl_config->number_pdus + 1; + dl_config->number_pdus = dl_config->number_pdus + 1; - break; + break; - case format2_0: - break; + case format2_0: + break; - case format2_1: - break; + case format2_1: + break; - case format2_2: - break; + case format2_2: + break; - case format2_3: - break; + case format2_3: + break; - default: - break; - } + default: + break; + } - if(rnti == SI_RNTI){ + if(rnti == SI_RNTI){ - }else if(rnti == mac->ra_rnti){ + }else if(rnti == mac->ra_rnti){ - }else if(rnti == P_RNTI){ + }else if(rnti == P_RNTI){ - }else{ // c-rnti + }else{ // c-rnti - /// check if this is pdcch order - //dci->random_access_preamble_index; - //dci->ss_pbch_index; - //dci->prach_mask_index; + /// check if this is pdcch order + //dci->random_access_preamble_index; + //dci->ss_pbch_index; + //dci->prach_mask_index; - /// else normal DL-SCH grant - } - return 0; + /// else normal DL-SCH grant + } + return 0; } int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe){ - return 0; + return 0; } void nr_ue_process_mac_pdu( - module_id_t module_idP, - uint8_t CC_id, - uint8_t *pduP, - uint16_t mac_pdu_len, - uint8_t eNB_index){ + module_id_t module_idP, + uint8_t CC_id, + uint8_t *pduP, + uint16_t mac_pdu_len, + uint8_t eNB_index){ - uint8_t *pdu_ptr = pduP; - uint16_t pdu_len = mac_pdu_len; + uint8_t *pdu_ptr = pduP; + uint16_t pdu_len = mac_pdu_len; - uint16_t mac_ce_len; - uint16_t mac_subheader_len; - uint16_t mac_sdu_len; + uint16_t mac_ce_len; + uint16_t mac_subheader_len; + uint16_t mac_sdu_len; - // For both DL/UL-SCH - // Except: - // - UL/DL-SCH: fixed-size MAC CE(known by LCID) - // - UL/DL-SCH: padding - // - UL-SCH: MSG3 48-bits - // |0|1|2|3|4|5|6|7| bit-wise - // |R|F| LCID | - // | L | - // |0|1|2|3|4|5|6|7| bit-wise - // |R|F| LCID | - // | L | - // | L | + // For both DL/UL-SCH + // Except: + // - UL/DL-SCH: fixed-size MAC CE(known by LCID) + // - UL/DL-SCH: padding + // - UL-SCH: MSG3 48-bits + // |0|1|2|3|4|5|6|7| bit-wise + // |R|F| LCID | + // | L | + // |0|1|2|3|4|5|6|7| bit-wise + // |R|F| LCID | + // | L | + // | L | - // For both DL/UL-SCH - // For: - // - UL/DL-SCH: fixed-size MAC CE(known by LCID) - // - UL/DL-SCH: padding, for single/multiple 1-oct padding CE(s) - // - UL-SCH: MSG3 48-bits - // |0|1|2|3|4|5|6|7| bit-wise - // |R|R| LCID | - // LCID: The Logical Channel ID field identifies the logical channel instance of the corresponding MAC SDU or the type of the corresponding MAC CE or padding as described in Tables 6.2.1-1 and 6.2.1-2 for the DL-SCH and UL-SCH respectively. There is one LCID field per MAC subheader. The LCID field size is 6 bits; - // L: The Length field indicates the length of the corresponding MAC SDU or variable-sized MAC CE in bytes. There is one L field per MAC subheader except for subheaders corresponding to fixed-sized MAC CEs and padding. The size of the L field is indicated by the F field; - // F: lenght of L is 0:8 or 1:16 bits wide - // R: Reserved bit, set to zero. + // For both DL/UL-SCH + // For: + // - UL/DL-SCH: fixed-size MAC CE(known by LCID) + // - UL/DL-SCH: padding, for single/multiple 1-oct padding CE(s) + // - UL-SCH: MSG3 48-bits + // |0|1|2|3|4|5|6|7| bit-wise + // |R|R| LCID | + // LCID: The Logical Channel ID field identifies the logical channel instance of the corresponding MAC SDU or the type of the corresponding MAC CE or padding as described in Tables 6.2.1-1 and 6.2.1-2 for the DL-SCH and UL-SCH respectively. There is one LCID field per MAC subheader. The LCID field size is 6 bits; + // L: The Length field indicates the length of the corresponding MAC SDU or variable-sized MAC CE in bytes. There is one L field per MAC subheader except for subheaders corresponding to fixed-sized MAC CEs and padding. The size of the L field is indicated by the F field; + // F: lenght of L is 0:8 or 1:16 bits wide + // R: Reserved bit, set to zero. - uint8_t done = 0; + uint8_t done = 0; - while (!done || pdu_len <= 0){ - mac_ce_len = 0x0000; - mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct - mac_sdu_len = 0x0000; - switch(((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID){ - // MAC CE - case DL_SCH_LCID_CCCH: - // MSG4 RRC Connection Setup 38.331 - // varialbe length - mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; - mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ - mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; - mac_subheader_len = 3; - } - break; - case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH: - // 38.321 Ch6.1.3.14 - // varialbe length - mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; - mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ - mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; - mac_subheader_len = 3; - } - break; - case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL: - // 38.321 Ch6.1.3.13 - // varialbe length - mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; - mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ - mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; - mac_subheader_len = 3; - } - break; - case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT: - // 38.321 Ch6.1.3.12 - // varialbe length - mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; - mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ - mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; - mac_subheader_len = 3; - } - break; - case DL_SCH_LCID_SP_SRS_ACTIVATION: - // 38.321 Ch6.1.3.17 - // varialbe length - mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; - mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ - mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; - mac_subheader_len = 3; - } - break; + while (!done || pdu_len <= 0){ + mac_ce_len = 0x0000; + mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct + mac_sdu_len = 0x0000; + switch(((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID){ + // MAC CE + case DL_SCH_LCID_CCCH: + // MSG4 RRC Connection Setup 38.331 + // varialbe length + mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; + mac_subheader_len = 2; + if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ + mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; + mac_subheader_len = 3; + } + break; + case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH: + // 38.321 Ch6.1.3.14 + // varialbe length + mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; + mac_subheader_len = 2; + if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ + mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; + mac_subheader_len = 3; + } + break; + case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL: + // 38.321 Ch6.1.3.13 + // varialbe length + mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; + mac_subheader_len = 2; + if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ + mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; + mac_subheader_len = 3; + } + break; + case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT: + // 38.321 Ch6.1.3.12 + // varialbe length + mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; + mac_subheader_len = 2; + if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ + mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; + mac_subheader_len = 3; + } + break; + case DL_SCH_LCID_SP_SRS_ACTIVATION: + // 38.321 Ch6.1.3.17 + // varialbe length + mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; + mac_subheader_len = 2; + if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ + mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; + mac_subheader_len = 3; + } + break; - case DL_SCH_LCID_RECOMMENDED_BITRATE: - // 38.321 Ch6.1.3.20 - mac_ce_len = 2; - break; - case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT: - // 38.321 Ch6.1.3.19 - mac_ce_len = 2; - break; - case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT: - // 38.321 Ch6.1.3.18 - mac_ce_len = 3; - break; - case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT: - // 38.321 Ch6.1.3.16 - mac_ce_len = 2; - break; - case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH: - // 38.321 Ch6.1.3.15 - mac_ce_len = 2; - break; - case DL_SCH_LCID_DUPLICATION_ACT: - // 38.321 Ch6.1.3.11 - mac_ce_len = 1; - break; - case DL_SCH_LCID_SCell_ACT_4_OCT: - // 38.321 Ch6.1.3.10 - mac_ce_len = 4; - break; - case DL_SCH_LCID_SCell_ACT_1_OCT: - // 38.321 Ch6.1.3.10 - mac_ce_len = 1; - break; - case DL_SCH_LCID_L_DRX: - // 38.321 Ch6.1.3.6 - // fixed length but not yet specify. - mac_ce_len = 0; - break; - case DL_SCH_LCID_DRX: - // 38.321 Ch6.1.3.5 - // fixed length but not yet specify. - mac_ce_len = 0; - break; - case DL_SCH_LCID_TA_COMMAND: - // 38.321 Ch6.1.3.4 - mac_ce_len = 1; - break; - case DL_SCH_LCID_CON_RES_ID: - // 38.321 Ch6.1.3.3 - mac_ce_len = 6; - break; - case DL_SCH_LCID_PADDING: - done = 1; - // end of MAC PDU, can ignore the rest. - break; + case DL_SCH_LCID_RECOMMENDED_BITRATE: + // 38.321 Ch6.1.3.20 + mac_ce_len = 2; + break; + case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT: + // 38.321 Ch6.1.3.19 + mac_ce_len = 2; + break; + case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT: + // 38.321 Ch6.1.3.18 + mac_ce_len = 3; + break; + case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT: + // 38.321 Ch6.1.3.16 + mac_ce_len = 2; + break; + case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH: + // 38.321 Ch6.1.3.15 + mac_ce_len = 2; + break; + case DL_SCH_LCID_DUPLICATION_ACT: + // 38.321 Ch6.1.3.11 + mac_ce_len = 1; + break; + case DL_SCH_LCID_SCell_ACT_4_OCT: + // 38.321 Ch6.1.3.10 + mac_ce_len = 4; + break; + case DL_SCH_LCID_SCell_ACT_1_OCT: + // 38.321 Ch6.1.3.10 + mac_ce_len = 1; + break; + case DL_SCH_LCID_L_DRX: + // 38.321 Ch6.1.3.6 + // fixed length but not yet specify. + mac_ce_len = 0; + break; + case DL_SCH_LCID_DRX: + // 38.321 Ch6.1.3.5 + // fixed length but not yet specify. + mac_ce_len = 0; + break; + case DL_SCH_LCID_TA_COMMAND: + // 38.321 Ch6.1.3.4 + mac_ce_len = 1; + break; + case DL_SCH_LCID_CON_RES_ID: + // 38.321 Ch6.1.3.3 + mac_ce_len = 6; + break; + case DL_SCH_LCID_PADDING: + done = 1; + // end of MAC PDU, can ignore the rest. + break; - // MAC SDU - case DL_SCH_LCID_SRB1: - // check if LCID is valid at current time. - case UL_SCH_LCID_SRB2: - // check if LCID is valid at current time. - case UL_SCH_LCID_SRB3: - // check if LCID is valid at current time. - default: - // check if LCID is valid at current time. - mac_sdu_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; - mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ - mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; - mac_subheader_len = 3; - } - // DRB LCID by RRC - break; + // MAC SDU + case DL_SCH_LCID_SRB1: + // check if LCID is valid at current time. + case UL_SCH_LCID_SRB2: + // check if LCID is valid at current time. + case UL_SCH_LCID_SRB3: + // check if LCID is valid at current time. + default: + // check if LCID is valid at current time. + mac_sdu_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; + mac_subheader_len = 2; + if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ + mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; + mac_subheader_len = 3; + } + // DRB LCID by RRC + break; + } + pdu_ptr += ( mac_subheader_len + mac_ce_len + mac_sdu_len ); + pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len ); + AssertFatal(pdu_len >= 0, "[MAC] nr_ue_process_mac_pdu, residual mac pdu length < 0!\n"); } - pdu_ptr += ( mac_subheader_len + mac_ce_len + mac_sdu_len ); - pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len ); - AssertFatal(pdu_len >= 0, "[MAC] nr_ue_process_mac_pdu, residual mac pdu length < 0!\n"); - } } //--------------------------------------------------------------------------------- @@ -2368,3 +2415,4 @@ nr_ue_send_sdu(module_id_t module_idP, +