update of pucch scheduler
This commit is contained in:
@@ -318,7 +318,6 @@ void nr_schedule_pucch(int Mod_idP,
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uint16_t O_uci;
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uint16_t O_uci;
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uint16_t O_ack;
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uint16_t O_ack;
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uint8_t SR_flag = 0; // no SR in PUCCH implemented for now
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uint8_t SR_flag = 0; // no SR in PUCCH implemented for now
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uint8_t pucch_resource = 0; // in PHY test only one UE -> only one PUCCH resource used
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
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AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
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@@ -340,15 +339,14 @@ void nr_schedule_pucch(int Mod_idP,
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UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
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UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
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nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
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nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
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memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
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memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
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UL_tti_req->n_pdus+=1;
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UL_tti_req->n_pdus+=1;
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O_ack = curr_pucch->dai_c;
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O_ack = curr_pucch->dai_c;
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O_uci = O_ack; // for now we are just sending acknacks in pucch
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O_uci = O_ack; // for now we are just sending acknacks in pucch
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nr_configure_pucch(pucch_pdu,
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nr_configure_pucch(pucch_pdu,
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scc,
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scc,
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ubwp,
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ubwp,
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pucch_resource,
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curr_pucch->resource_indicator,
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O_uci,
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O_uci,
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O_ack,
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O_ack,
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SR_flag);
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SR_flag);
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@@ -261,8 +261,6 @@ int configure_fapi_dl_Tx(int Mod_idP,
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NR_COMMON_channels_t *cc = nr_mac->common_channels;
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NR_COMMON_channels_t *cc = nr_mac->common_channels;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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int pucch_fb_timing = pucch_sched->ul_slot - slotP;
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu;
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu;
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu;
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu;
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int TBS;
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int TBS;
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@@ -356,8 +354,8 @@ int configure_fapi_dl_Tx(int Mod_idP,
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dci_pdu_rel15[0].harq_pid = 0;
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dci_pdu_rel15[0].harq_pid = 0;
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dci_pdu_rel15[0].dai = (pucch_sched->dai_c-1)&3;
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dci_pdu_rel15[0].dai = (pucch_sched->dai_c-1)&3;
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dci_pdu_rel15[0].tpc = 2;
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dci_pdu_rel15[0].tpc = 2;
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dci_pdu_rel15[0].pucch_resource_indicator = 0; //FIXME this is fixed to 0 in phy test with only one user
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dci_pdu_rel15[0].pucch_resource_indicator = pucch_sched->resource_indicator;
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dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_fb_timing-1; //FIXME valid only for format 1_0
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dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_sched->timing_indicator;
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LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
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LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
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dci_pdu_rel15[0].frequency_domain_assignment,
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dci_pdu_rel15[0].frequency_domain_assignment,
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@@ -1248,6 +1248,53 @@ int add_new_nr_ue(module_id_t mod_idP,
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return -1;
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return -1;
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}
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}
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void get_pdsch_to_harq_feedback(int Mod_idP,
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int UE_id,
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NR_SearchSpace__searchSpaceType_PR ss_type,
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uint8_t *pdsch_to_harq_feedback) {
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int bwp_id=1;
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id];
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NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
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NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1];
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NR_SearchSpace_t *ss;
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// common search type uses DCI format 1_0
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if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
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for (int i=0; i<8; i++)
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pdsch_to_harq_feedback[i] = i+1;
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}
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else {
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// searching for a ue specific search space
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int found=0;
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for (int i=0;i<bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) {
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ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i];
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AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n");
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AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n");
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if (ss->searchSpaceType->present == ss_type) {
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found=1;
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break;
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}
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}
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AssertFatal(found==1,"Couldn't find a ue specific searchspace\n");
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if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) {
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for (int i=0; i<8; i++)
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pdsch_to_harq_feedback[i] = i+1;
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}
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else {
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if(ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK != NULL)
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pdsch_to_harq_feedback = (uint8_t *)ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK;
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else
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AssertFatal(found==1,"There is no allocated dl_DataToUL_ACK for pdsch to harq feedback\n");
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}
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}
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}
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// function to update pucch scheduling parameters in UE list when a USS DL is scheduled
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// function to update pucch scheduling parameters in UE list when a USS DL is scheduled
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void nr_update_pucch_scheduling(int Mod_idP,
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void nr_update_pucch_scheduling(int Mod_idP,
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int UE_id,
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int UE_id,
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@@ -1258,50 +1305,111 @@ void nr_update_pucch_scheduling(int Mod_idP,
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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int first_ul_slot_tdd,next_slot;
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int first_ul_slot_tdd,k;
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NR_sched_pucch *curr_pucch;
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NR_sched_pucch *curr_pucch;
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uint8_t pdsch_to_harq_feedback[8];
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int found = 0;
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int i = 0;
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int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
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nr_ulmix_slots++;
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// this is hardcoded for now as ue specific
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NR_SearchSpace__searchSpaceType_PR ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
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get_pdsch_to_harq_feedback(Mod_idP,UE_id,ss_type,pdsch_to_harq_feedback);
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// if the list of pucch to be scheduled is empty
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// if the list of pucch to be scheduled is empty
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if (UE_list->UE_sched_ctrl[UE_id].sched_pucch == NULL) {
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if (UE_list->UE_sched_ctrl[UE_id].sched_pucch == NULL) {
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sched_pucch->frame = frameP;
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sched_pucch->frame = frameP;
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sched_pucch->next_sched_pucch = NULL;
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sched_pucch->next_sched_pucch = NULL;
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sched_pucch->dai_c = 1;
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sched_pucch->dai_c = 1;
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if ( (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots!=0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)) {
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sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource
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if ( nr_ulmix_slots > 0 ) {
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// first pucch occasion in first UL or MIXED slot
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// first pucch occasion in first UL or MIXED slot
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first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
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first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
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// computing slot in which pucch is scheduled
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for (k=0; k<nr_ulmix_slots; k++) { // for each possible UL or mixed slot
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sched_pucch->ul_slot = first_ul_slot_tdd + slotP - (slotP % slots_per_tdd);
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while (i<8 && found == 0) { // look if timing indicator is among allowed values
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if (pdsch_to_harq_feedback[i]==(first_ul_slot_tdd+k)-(slotP % slots_per_tdd))
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found = 1;
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if (found == 0) i++;
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}
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if (found == 1) break;
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}
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if (found == 1) {
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// computing slot in which pucch is scheduled
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sched_pucch->ul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd));
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sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
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}
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else
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AssertFatal(1==0,"No Uplink slot available in accordance to allowed timing indicator\n");
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}
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}
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else
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else
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AssertFatal(1==0,"No Uplink Slots in this Frame\n");
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AssertFatal(1==0,"No Uplink Slots in this Frame\n");
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UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch;
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UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch;
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}
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}
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else {
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else { // to be tested
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curr_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch;
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curr_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch;
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while (curr_pucch->next_sched_pucch != NULL)
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if (curr_pucch->dai_c<11) { // we are scheduling at most 11 harq-ack in the same pucch
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curr_pucch = curr_pucch->next_sched_pucch;
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while (i<8 && found == 0) { // look if timing indicator is among allowed values for current pucch
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// we are scheduling at most 11 ack nacks in the same pucch
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if (pdsch_to_harq_feedback[i]==(curr_pucch->ul_slot % slots_per_tdd)-(slotP % slots_per_tdd))
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if (curr_pucch->dai_c==11) {
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found = 1;
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next_slot = curr_pucch->ul_slot + 1;
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if (found == 0) i++;
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if (next_slot == slots_per_tdd)
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}
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AssertFatal(1==0,"No more slots in this TDD period\n");
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if (found == 1) { // scheduling this harq-ack in current pucch
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else {
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sched_pucch = curr_pucch;
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// generating a new item in the list
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sched_pucch->dai_c = 1 + sched_pucch->dai_c;
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sched_pucch->frame = frameP;
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sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
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sched_pucch->next_sched_pucch = NULL;
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sched_pucch->dai_c = 1;
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sched_pucch->ul_slot = next_slot;
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curr_pucch->next_sched_pucch = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch));
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curr_pucch->next_sched_pucch = sched_pucch;
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}
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}
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}
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}
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else {
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if (curr_pucch->dai_c==11 || found == 0) { // if current pucch is full or no timing indicator allowed
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sched_pucch = curr_pucch;
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// look for pucch occasions in other UL of mixed slots
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sched_pucch->dai_c = 1 + sched_pucch->dai_c;
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for (k=scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; k<slots_per_tdd; k++) { // for each possible UL or mixed slot
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if (k!=(curr_pucch->ul_slot % slots_per_tdd)) { // skip current scheduled slot (already checked)
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i = 0;
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while (i<8 && found == 0) { // look if timing indicator is among allowed values
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if (pdsch_to_harq_feedback[i]==k-(slotP % slots_per_tdd))
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found = 1;
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if (found == 0) i++;
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}
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if (found == 1) {
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if (k<(curr_pucch->ul_slot % slots_per_tdd)) { // we need to add a pucch occasion before current pucch
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sched_pucch->frame = frameP;
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sched_pucch->ul_slot = k + (slotP - (slotP % slots_per_tdd));
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sched_pucch->next_sched_pucch = curr_pucch;
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sched_pucch->dai_c = 1;
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sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource
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sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
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UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch;
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}
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else {
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while (curr_pucch->next_sched_pucch != NULL && k!=(curr_pucch->ul_slot % slots_per_tdd))
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curr_pucch = curr_pucch->next_sched_pucch;
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if (curr_pucch == NULL) { // creating a new item in the list
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sched_pucch->frame = frameP;
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sched_pucch->next_sched_pucch = NULL;
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sched_pucch->dai_c = 1;
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sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
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sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource
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sched_pucch->ul_slot = k + (slotP - (slotP % slots_per_tdd));
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curr_pucch->next_sched_pucch = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch));
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curr_pucch->next_sched_pucch = sched_pucch;
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}
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else {
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if (curr_pucch->dai_c==11)
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found = 0; // if pucch at index k is already full we have to find a new one in a following occasion
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else { // scheduling this harq-ack in current pucch
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sched_pucch = curr_pucch;
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sched_pucch->dai_c = 1 + sched_pucch->dai_c;
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sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
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}
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}
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}
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}
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}
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}
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}
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}
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}
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}
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}
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}
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@@ -94,6 +94,11 @@ void nr_update_pucch_scheduling(int Mod_idP,
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sub_frame_t slotP,
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sub_frame_t slotP,
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int slots_per_tdd,
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int slots_per_tdd,
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NR_sched_pucch *sched_pucch);
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NR_sched_pucch *sched_pucch);
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void get_pdsch_to_harq_feedback(int Mod_idP,
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int UE_id,
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NR_SearchSpace__searchSpaceType_PR ss_type,
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uint8_t *pdsch_to_harq_feedback);
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void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
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void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
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nr_scs_e scs_common,
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nr_scs_e scs_common,
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@@ -104,7 +104,8 @@ typedef struct NR_sched_pucch {
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int frame;
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int frame;
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int ul_slot;
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int ul_slot;
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uint8_t dai_c;
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uint8_t dai_c;
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uint8_t dai_t;
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uint8_t timing_indicator;
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|
uint8_t resource_indicator;
|
||||||
struct NR_sched_pucch *next_sched_pucch;
|
struct NR_sched_pucch *next_sched_pucch;
|
||||||
} NR_sched_pucch;
|
} NR_sched_pucch;
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user