From 58dbf7d4b9b0901d0b5a36499021076a80c9e96f Mon Sep 17 00:00:00 2001 From: cig Date: Sun, 3 May 2020 14:38:30 +0200 Subject: [PATCH] New design UE scheduler --- executables/nr-ue.c | 32 ++-- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 20 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 191 ++++++++++--------- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 11 +- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h | 5 +- 5 files changed, 126 insertions(+), 133 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index fb9d260541..25fe092401 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -431,32 +431,24 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { - nr_dcireq_t dcireq; - nr_scheduled_response_t scheduled_response; fapi_nr_config_request_t *cfg = &UE->nrUE_config; int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_tti_rx); - uint8_t ssb_period = UE->nrUE_config.ssb_table.ssb_period; + uint8_t gNB_id = 0; + + nr_downlink_indication_t dl_indication; + memset((void*)&dl_indication, 0, sizeof(dl_indication)); - //program DCI for slot 1 - //TODO: all of this has to be moved to the MAC!!! if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){ - dcireq.module_id = UE->Mod_id; - dcireq.gNB_index = 0; - dcireq.cc_id = 0; - dcireq.frame = proc->frame_rx; - dcireq.slot = proc->nr_tti_rx; - nr_ue_dcireq(&dcireq); //to be replaced with function pointer later - // we should have received a DL DCI here, so configure DL accordingly - scheduled_response.dl_config = &dcireq.dl_config_req; - scheduled_response.ul_config = NULL; - scheduled_response.tx_request = NULL; - scheduled_response.module_id = UE->Mod_id; - scheduled_response.CC_id = 0; - scheduled_response.frame = proc->frame_rx; - scheduled_response.slot = proc->nr_tti_rx; + if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) { + dl_indication.module_id = UE->Mod_id; + dl_indication.gNB_index = gNB_id; + dl_indication.cc_id = UE->CC_id; + dl_indication.frame = proc->frame_rx; + dl_indication.slot = proc->nr_tti_rx; + } - nr_ue_scheduled_response(&scheduled_response); + nr_ue_scheduler(&dl_indication, NULL); // Process Rx data for one sub-frame #ifdef UE_SLOT_PARALLELISATION diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index 1516b2a08c..7b71c0c00f 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -84,23 +84,9 @@ NR_UE_MAC_INST_t *get_mac_inst( /**\brief called at each slot, slot length based on numerology. now use u=0, scs=15kHz, slot=1ms performs BSR/SR/PHR procedures, random access procedure handler and DLSCH/ULSCH procedures. - \param module_id module id - \param gNB_index corresponding gNB index - \param cc_id component carrier id - \param rx_frame receive frame number - \param rx_slot receive slot number - \param tx_frame transmit frame number - \param tx_slot transmit slot number*/ -NR_UE_L2_STATE_t nr_ue_scheduler( - const module_id_t module_id, - const uint8_t gNB_index, - const int cc_id, - const frame_t rx_frame, - const slot_t rx_slot, - const int32_t ssb_index, - const frame_t tx_frame, - const slot_t tx_slot); - + \param dl_info DL indication + \param ul_info UL indication*/ +NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_indication_t *ul_info); /* \brief Get SR payload (0,1) from UE MAC @param Mod_id Instance id of UE in machine diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index c7fadbdafe..1b87c37b55 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -651,99 +651,120 @@ uint32_t get_ssb_frame(uint32_t test){ // 1. TODO: Call RRC for link status return to PHY // 2. TODO: Perform SR/BSR procedures for scheduling feedback // 3. TODO: Perform PHR procedures -NR_UE_L2_STATE_t nr_ue_scheduler(const module_id_t module_id, - const uint8_t gNB_index, - const int cc_id, - const frame_t rx_frame, - const slot_t rx_slot, - const int32_t ssb_index, - const frame_t tx_frame, - const slot_t tx_slot ){ +NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_indication_t *ul_info){ uint32_t search_space_mask = 0; - NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); - fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; + if (dl_info){ + + module_id_t mod_id = dl_info->module_id; + NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); + int cc_id = dl_info->cc_id; + fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; + nr_scheduled_response_t scheduled_response; + nr_dcireq_t dcireq; + frame_t rx_frame = dl_info->frame; + slot_t rx_slot = dl_info->slot; - // check type0 from 38.213 13 if we have no CellGroupConfig - if ( mac->scd == NULL) { - if( ssb_index != -1){ - - if(mac->type0_pdcch_ss_mux_pattern == 1){ - // 38.213 chapter 13 - if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; - } - if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; - } + // check type0 from 38.213 13 if we have no CellGroupConfig + // TODO: implementation to be completed + if (mac->scd == NULL) { + if(dl_info->ssb_index != -1){ + + if(mac->type0_pdcch_ss_mux_pattern == 1){ + // 38.213 chapter 13 + if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; + } + if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; + } + } + if(mac->type0_pdcch_ss_mux_pattern == 2){ + // 38.213 Table 13-13, 13-14 + if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; + } + } + if(mac->type0_pdcch_ss_mux_pattern == 3){ + // 38.213 Table 13-15 + if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ + search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; + } + } + } // ssb_index != -1 + + // Type0 PDCCH search space + if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){ + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1; + + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; + + /* + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set + + LOG_I(MAC,"nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n", + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti, + dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP); + */ + dl_config->number_pdus = dl_config->number_pdus + 1; + mac->scheduled_response.dl_config = dl_config; } - if(mac->type0_pdcch_ss_mux_pattern == 2){ - // 38.213 Table 13-13, 13-14 - if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; - } - } - if(mac->type0_pdcch_ss_mux_pattern == 3){ - // 38.213 Table 13-15 - if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){ - search_space_mask = search_space_mask | type0_pdcch; - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration; - } - } - } // ssb_index != -1 - - // Type0 PDCCH search space - if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){ - mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1; - - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config; - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; - + } else { // get PDCCH configuration(s) from SCGConfig + // get Coreset and SearchSpace Information from spCellConfigDedicated + // DCI configuration done for BWP 1, Coreset 0, SearchSpace 0 + + // TBR first thing to do : schedule msg2 + + // TBR program DCI for slot 1 if PDSCH + // TBR program DCI for slot 7 if RAR DCI PDSCH + + dcireq.module_id = mod_id; + dcireq.gNB_index = 0; + dcireq.cc_id = 0; + dcireq.frame = rx_frame; // TBR not needed + dcireq.slot = rx_slot; + nr_ue_dcireq(&dcireq); //to be replaced with function pointer later + + // we should have received a DL DCI here, so configure DL accordingly + scheduled_response.dl_config = &dcireq.dl_config_req; + scheduled_response.ul_config = NULL; + scheduled_response.tx_request = NULL; + scheduled_response.module_id = mod_id; + scheduled_response.CC_id = cc_id; + scheduled_response.frame = rx_frame; + scheduled_response.slot = rx_slot; + + nr_ue_scheduled_response(&scheduled_response); + /* - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set - - LOG_I(MAC,"nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n", - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti, - dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP); - */ - dl_config->number_pdus = dl_config->number_pdus + 1; + if(search_space_mask & type0a_pdcch){ + } + + if(search_space_mask & type1_pdcch){ + } + + if(search_space_mask & type2_pdcch){ + } + + if(search_space_mask & type3_pdcch){ + } + */ } + } else if (ul_info) { + module_id_t mod_id = ul_info->module_id; + NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); + // TODO: expand + // Note: Contention resolution is currently not active + if (mac->RA_contention_resolution_timer_active == 1) + ue_contention_resolution(mod_id, ul_info->gNB_index, ul_info->cc_id, ul_info->frame_tx); } - else { // get PDCCH configuration(s) from SCGConfig - - - - - // get Coreset and SearchSpace Information from spCellConfigDedicated - - - - /* - if(search_space_mask & type0a_pdcch){ - } - - if(search_space_mask & type1_pdcch){ - } - - if(search_space_mask & type2_pdcch){ - } - - if(search_space_mask & type3_pdcch){ - } - */ - } - - if (mac->RA_contention_resolution_timer_active == 1) { - ue_contention_resolution(module_id, gNB_index, cc_id, tx_frame); - } - - mac->scheduled_response.dl_config = dl_config; - return UE_CONNECTION_OK; } diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 3688d095f1..b250f84c7b 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -113,14 +113,7 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ mac->dl_config_request.number_pdus = 0; // clean previous FAPI messages - ret = nr_ue_scheduler(ul_info->module_id, - ul_info->gNB_index, - ul_info->cc_id, - ul_info->frame_rx, - ul_info->slot_rx, - ul_info->ssb_index, - ul_info->frame_tx, - ul_info->slot_tx); + ret = nr_ue_scheduler(NULL, ul_info); if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && get_softmodem_params()->do_ra) nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx); @@ -313,6 +306,8 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) { dl_config->slot=UE_mac->dl_config_request.slot; dl_config->number_pdus=0; + printf(" UE_mac->dl_config_request.slot %d VS dcireq->slot %d \n", UE_mac->dl_config_request.slot, dcireq->slot); + LOG_D(PHY, "Entering UE DCI configuration frame %d slot %d \n", dcireq->frame, dcireq->slot); ue_dci_configuration(UE_mac, dl_config, dcireq->slot); diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h index b7ddfc0c57..df2d78f0cb 100755 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h @@ -72,7 +72,8 @@ typedef struct { /// NR UE FAPI-like P7 message, direction: L1 to L2 /// data reception indication structure fapi_nr_rx_indication_t *rx_ind; - + /// ssb_index, if ssb is not present in current TTI, value set to -1 + int ssb_index; /// dci reception indication structure fapi_nr_dci_indication_t *dci_ind; @@ -94,8 +95,6 @@ typedef struct { frame_t frame_tx; /// slot tx uint32_t slot_tx; - /// ssb_index, if ssb is not present in current TTI, thie value set to -1 - int ssb_index; /// dci reception indication structure fapi_nr_dci_indication_t *dci_ind; } nr_uplink_indication_t;