From ce405789d366a315c09a5e426c8fd26758dbb293 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Wed, 4 Dec 2019 09:57:52 +0900 Subject: [PATCH 01/54] Fix: interference power measurement on DRS. --- .../PHY/LTE_TRANSPORT/ulsch_demodulation.c | 20 ++++-- openair1/PHY/TOOLS/signal_energy.c | 63 +++++++++++++++++++ openair1/PHY/TOOLS/tools_defs.h | 3 + openair1/PHY/defs_eNB.h | 2 + openair1/SCHED/phy_procedures_lte_eNb.c | 2 +- 5 files changed, 85 insertions(+), 5 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index 1b23fc99bf..62fabc87af 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -1072,10 +1072,22 @@ void rx_ulsch(PHY_VARS_eNB *eNB, } for (i=0; inb_antennas_rx; i++) { - pusch_vars->ulsch_power[i] = signal_energy_nodc(pusch_vars->drs_ch_estimates[i], - ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)/correction_factor; - LOG_D(PHY,"%4.4d.%d power harq_pid %d rb %2.2d TBS %2.2d (MPR_times_Ks %d correction %d) power %d dBtimes10\n", proc->frame_rx, proc->subframe_rx, harq_pid, - ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, ulsch[UE_id]->harq_processes[harq_pid]->TBS,MPR_times_100Ks,correction_factor,dB_fixed_times10(pusch_vars->ulsch_power[i])); + + + pusch_vars->ulsch_interference_power[i] = interference_power(pusch_vars->drs_ch_estimates[i],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)/correction_factor; + pusch_vars->ulsch_power[i] = signal_power(pusch_vars->drs_ch_estimates[i],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)/correction_factor; + + if(pusch_vars->ulsch_power[i]>0x20000000){ + pusch_vars->ulsch_power[i] = 0x20000000; + pusch_vars->ulsch_interference_power[i] = 1; + }else{ + pusch_vars->ulsch_power[i] -= pusch_vars->ulsch_interference_power[i]; + if(pusch_vars->ulsch_power[i]<1) pusch_vars->ulsch_power[i] = 1; + if(pusch_vars->ulsch_interference_power[i]<1)pusch_vars->ulsch_interference_power[i] = 1; + } + + LOG_D(PHY,"%4.4d.%d power harq_pid %d rb %2.2d TBS %2.2d (MPR_times_Ks %d correction %d) power %d dBtimes10\n", proc->frame_rx, proc->subframe_rx, harq_pid, ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, ulsch[UE_id]->harq_processes[harq_pid]->TBS,MPR_times_100Ks,correction_factor,dB_fixed_times10(pusch_vars->ulsch_power[i])); + } ulsch_channel_level(pusch_vars->drs_ch_estimates, diff --git a/openair1/PHY/TOOLS/signal_energy.c b/openair1/PHY/TOOLS/signal_energy.c index 83bcb7b764..687d38bda7 100644 --- a/openair1/PHY/TOOLS/signal_energy.c +++ b/openair1/PHY/TOOLS/signal_energy.c @@ -364,3 +364,66 @@ main(int argc,char **argv) } #endif +#define SHRT_MIN -32768 +int32_t signal_power(int32_t *input, uint32_t length) +{ + + uint32_t i; + int32_t temp; + + __m128i in, in_clp, i16_min; + __m128 num0, num1; + __m128 recp1; + + //init + num0 = _mm_setzero_ps(); + i16_min = _mm_set1_epi16(SHRT_MIN); + recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length))); + //Acc + for (i = 0; i < (length >> 2); i++) { + in = _mm_loadu_si128((__m128i *)input); + in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in + num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp))); + input += 4; + } + //Ave + num1 = _mm_dp_ps(num0, recp1, 0xFF); + temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num1)); + + return temp; +} + +int32_t interference_power(int32_t *input, uint32_t length) +{ + + uint32_t i; + int32_t temp; + + __m128i in, in_clp, i16_min; + __m128i num0, num1, num2, num3; + __m128 num4, num5, num6; + __m128 recp1; + + //init + i16_min = _mm_set1_epi16(SHRT_MIN); + num5 = _mm_setzero_ps(); + recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length>>2)));// 1/n, n= length/4 + //Acc + for (i = 0; i < (length >> 2); i++) { + in = _mm_loadu_si128((__m128i *)input); + in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min)); //if in=SHRT_MIN, in+1, else in + num0 = _mm_cvtepi16_epi32(in_clp); //lower 2 complex [0], [1] + num1 = _mm_cvtepi16_epi32(_mm_shuffle_epi32(in_clp, 0x4E)); //upper 2 complex [2], [3] + num2 = _mm_srai_epi32(_mm_add_epi32(num0, num1), 0x01); //average A=complex( [0] + [2] ) / 2, B=complex( [1] + [3] ) / 2 + num3 = _mm_sub_epi32(num2, _mm_shuffle_epi32(num2, 0x4E)); //complexA-complexB, B-A + num4 = _mm_dp_ps(_mm_cvtepi32_ps(num3), _mm_cvtepi32_ps(num3), 0x3F);//C = num3 lower complex power, C, C, C + num5 = _mm_add_ps(num5, num4); //Acc Cn, Cn, Cn, Cn, + input += 4; + } + //Interference ve + num6 = _mm_mul_ps(num5, recp1); //Cn / n + temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num6)); + + return temp; +} + diff --git a/openair1/PHY/TOOLS/tools_defs.h b/openair1/PHY/TOOLS/tools_defs.h index 9c9b8aa821..9f0a089903 100644 --- a/openair1/PHY/TOOLS/tools_defs.h +++ b/openair1/PHY/TOOLS/tools_defs.h @@ -431,6 +431,9 @@ int32_t subcarrier_energy(int32_t *,uint32_t, int32_t* subcarrier_energy, uint16 */ int32_t signal_energy_nodc(int32_t *,uint32_t); +int32_t signal_power(int32_t *,uint32_t); +int32_t interference_power(int32_t *,uint32_t); + /*!\fn double signal_energy_fp(double *s_re[2], double *s_im[2],uint32_t, uint32_t,uint32_t); \brief Computes the signal energy per subcarrier */ diff --git a/openair1/PHY/defs_eNB.h b/openair1/PHY/defs_eNB.h index 557b8bfc30..b3f7e1ef70 100644 --- a/openair1/PHY/defs_eNB.h +++ b/openair1/PHY/defs_eNB.h @@ -166,6 +166,8 @@ typedef struct { int32_t **ul_ch_magb; /// measured RX power based on DRS int ulsch_power[2]; + /// measured Interference power based on DRS + int ulsch_interference_power[2]; /// \brief llr values. /// - first index: ? [0..1179743] (hard coded) int16_t *llr; diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index 5f0ff6cff0..f2a246fbc3 100644 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -1605,7 +1605,7 @@ void fill_rx_indication(PHY_VARS_eNB *eNB, pdu->rx_indication_rel8.timing_advance = timing_advance_update; // estimate UL_CQI for MAC (from antenna port 0 only) - int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - 10 * eNB->measurements.n0_subband_power_dB[0][0]; + int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_interference_power[0]); if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi = 0; From 2edcf2647c42680d0cd07cb735a50286476419be Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Thu, 12 Dec 2019 17:20:12 +0900 Subject: [PATCH 02/54] Fix: freq_offset_estimation overflow. (cherry picked from commit 5e7eb7c94857f5765bb7f18afc7f4c748acb048b) --- .../lte_ul_channel_estimation.c | 39 +++++++++++-------- 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c b/openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c index 755111feb8..1d1b16e036 100644 --- a/openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c +++ b/openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c @@ -786,33 +786,38 @@ int16_t lte_ul_freq_offset_estimation(LTE_DL_FRAME_PARMS *frame_parms, Ravg[0]=0; Ravg[1]=0; int16_t iv, rv, phase_idx = 0; - __m128i avg128U1, avg128U2, R[3], mmtmpD0, mmtmpD1, mmtmpD2, mmtmpD3; + __m128i R[3], mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3; + __m128 avg128U1, avg128U2; // round(tan((pi/4)*[1:1:N]/N)*pow2(15)) int16_t alpha[128] = {201, 402, 603, 804, 1006, 1207, 1408, 1610, 1811, 2013, 2215, 2417, 2619, 2822, 3024, 3227, 3431, 3634, 3838, 4042, 4246, 4450, 4655, 4861, 5066, 5272, 5479, 5686, 5893, 6101, 6309, 6518, 6727, 6937, 7147, 7358, 7570, 7782, 7995, 8208, 8422, 8637, 8852, 9068, 9285, 9503, 9721, 9940, 10160, 10381, 10603, 10825, 11049, 11273, 11498, 11725, 11952, 12180, 12410, 12640, 12872, 13104, 13338, 13573, 13809, 14046, 14285, 14525, 14766, 15009, 15253, 15498, 15745, 15993, 16243, 16494, 16747, 17001, 17257, 17515, 17774, 18035, 18298, 18563, 18829, 19098, 19368, 19640, 19915, 20191, 20470, 20750, 21033, 21318, 21605, 21895, 22187, 22481, 22778, 23078, 23380, 23685, 23992, 24302, 24615, 24931, 25250, 25572, 25897, 26226, 26557, 26892, 27230, 27572, 27917, 28266, 28618, 28975, 29335, 29699, 30067, 30440, 30817, 31198, 31583, 31973, 32368, 32767}; // compute log2_maxh (output_shift) - avg128U1 = _mm_setzero_si128(); - avg128U2 = _mm_setzero_si128(); + avg128U1 = _mm_setzero_ps(); + avg128U2 = _mm_setzero_ps(); for (rb=0; rb Date: Wed, 4 Dec 2019 10:25:46 +0900 Subject: [PATCH 03/54] Fix: TPC control with average SNR value. (cherry picked from commit 243c90f647a1f97dc3a1486502dc6263b5705e39) --- openair2/LAYER2/MAC/eNB_scheduler_primitives.c | 1 + openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 9 ++++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index 89c2ecc83d..a3046a9939 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2216,6 +2216,7 @@ add_new_ue(module_id_t mod_idP, sizeof(eNB_UE_STATS)); UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0; UE_info->UE_sched_ctrl[UE_id].ta_update = 31; + UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; for (j = 0; j < 8; j++) { UE_info->UE_template[cc_idP][UE_id].oldNDI[j] = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 997fc6691e..049267ed14 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -166,7 +166,14 @@ rx_sdu(const module_id_t enb_mod_idP, * maybe it's even not correct at all? */ UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; - UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; + + if(UE_scheduling_control->pusch_snr[CC_idP] == 0) { + UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; + } + else { + UE_scheduling_control->pusch_snr[CC_idP] = (UE_scheduling_control->pusch_snr[CC_idP] * 3 + ul_cqi) / 4; + } + UE_scheduling_control->ul_consecutive_errors = 0; first_rb = UE_template_ptr->first_rb_ul[harq_pid]; From 04d6de7d58926e458fe835b40b9521bcf15566cd Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Thu, 5 Dec 2019 13:01:56 +0900 Subject: [PATCH 04/54] add variables TPC command interval and forgetting filter of UL SNR. --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 10 ++++++---- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 4 ++-- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index f6220fa46d..1e82da6d6f 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2003,9 +2003,10 @@ schedule_ue_spec_fairRR(module_id_t module_idP, // this assumes accumulated tpc // make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out int32_t framex10psubframe = UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_frame*10+UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe; + int pucch_tpc_interval=10; - if (((framex10psubframe+10)<=(frameP*10+subframeP)) || //normal case - ((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=10)))) //frame wrap-around + if (((framex10psubframe+pucch_tpc_interval)<=(frameP*10+subframeP)) || //normal case + ((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pucch_tpc_interval)))) //frame wrap-around if (ue_sched_ctl->pucch1_cqi_update[CC_id] == 1) { ue_sched_ctl->pucch1_cqi_update[CC_id] = 0; UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_frame=frameP; @@ -3087,9 +3088,10 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, // this assumes accumulated tpc // make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out int32_t framex10psubframe = UE_template->pusch_tpc_tx_frame*10+UE_template->pusch_tpc_tx_subframe; + int pusch_tpc_interval=10; - if (((framex10psubframe+10)<=(frameP*10+subframeP)) || //normal case - ((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=10)))) { //frame wrap-around + if (((framex10psubframe+pusch_tpc_interval)<=(frameP*10+subframeP)) || //normal case + ((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pusch_tpc_interval)))) { //frame wrap-around UE_template->pusch_tpc_tx_frame=frameP; UE_template->pusch_tpc_tx_subframe=subframeP; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 049267ed14..9459cd121a 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -166,12 +166,12 @@ rx_sdu(const module_id_t enb_mod_idP, * maybe it's even not correct at all? */ UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; - + double tpc_forgetting_filter=0.75; if(UE_scheduling_control->pusch_snr[CC_idP] == 0) { UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; } else { - UE_scheduling_control->pusch_snr[CC_idP] = (UE_scheduling_control->pusch_snr[CC_idP] * 3 + ul_cqi) / 4; + UE_scheduling_control->pusch_snr[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr[CC_idP] * tpc_foggot_filter + (double)ul_cqi * (1-tpc_foggot_filter)); } UE_scheduling_control->ul_consecutive_errors = 0; From 1b61e10af6a7de3c3d9105ad410b83d9aebdcb38 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Fri, 13 Dec 2019 11:39:51 +0900 Subject: [PATCH 05/54] fix compilation. --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 9459cd121a..9cfdc3622b 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -171,7 +171,7 @@ rx_sdu(const module_id_t enb_mod_idP, UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; } else { - UE_scheduling_control->pusch_snr[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr[CC_idP] * tpc_foggot_filter + (double)ul_cqi * (1-tpc_foggot_filter)); + UE_scheduling_control->pusch_snr[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr[CC_idP] * tpc_forgetting_filter + (double)ul_cqi * (1-tpc_forgetting_filter)); } UE_scheduling_control->ul_consecutive_errors = 0; From 66f99a9020516e06a2802e1590b85986e1f339ce Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Mon, 16 Dec 2019 15:17:25 +0900 Subject: [PATCH 06/54] Fix: ULSCH AMC by instantaneous SINR value. --- openair2/LAYER2/MAC/defs.h | 1346 +++++++++++++++++ openair2/LAYER2/MAC/eNB_scheduler.c | 2 +- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 12 +- .../LAYER2/MAC/eNB_scheduler_primitives.c | 1 + openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 12 +- openair2/LAYER2/MAC/mac.h | 1 + 6 files changed, 1366 insertions(+), 8 deletions(-) create mode 100644 openair2/LAYER2/MAC/defs.h diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h new file mode 100644 index 0000000000..7c18d958ab --- /dev/null +++ b/openair2/LAYER2/MAC/defs.h @@ -0,0 +1,1346 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.1 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ + +/*! \file LAYER2/MAC/defs.h +* \brief MAC data structures, constant, and function prototype +* \author Navid Nikaein and Raymond Knopp +* \date 2011 +* \version 0.5 +* \email navid.nikaein@eurecom.fr + +*/ +/** @defgroup _oai2 openair2 Reference Implementation + * @ingroup _ref_implementation_ + * @{ + */ + +/*@}*/ + +#ifndef __LAYER2_MAC_DEFS_H__ +#define __LAYER2_MAC_DEFS_H__ + + + +#ifdef USER_MODE +#include +#include +#include +#endif + +//#include "COMMON/openair_defs.h" + + + +#include "PHY/defs.h" +#include "PHY/LTE_TRANSPORT/defs.h" +#include "COMMON/platform_constants.h" +#include "BCCH-BCH-Message.h" +#include "RadioResourceConfigCommon.h" +#include "RadioResourceConfigDedicated.h" +#include "MeasGapConfig.h" +#include "SchedulingInfoList.h" +#include "TDD-Config.h" +#include "RACH-ConfigCommon.h" +#include "MeasObjectToAddModList.h" +#include "MobilityControlInfo.h" +#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) +#include "MBSFN-AreaInfoList-r9.h" +#include "MBSFN-SubframeConfigList.h" +#include "PMCH-InfoList-r9.h" +#include "SCellToAddMod-r10.h" +#endif +#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) +#include "SystemInformationBlockType1-v1310-IEs.h" +#endif + +#include "nfapi_interface.h" +#include "PHY_INTERFACE/IF_Module.h" + +/** @defgroup _mac MAC + * @ingroup _oai2 + * @{ + */ + +#define BCCH_PAYLOAD_SIZE_MAX 128 +#define CCCH_PAYLOAD_SIZE_MAX 128 +#define PCCH_PAYLOAD_SIZE_MAX 128 +#define RAR_PAYLOAD_SIZE_MAX 128 + +#define SCH_PAYLOAD_SIZE_MAX 4096 +/// Logical channel ids from 36-311 (Note BCCH is not specified in 36-311, uses the same as first DRB) + +#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) + +// Mask for identifying subframe for MBMS +#define MBSFN_TDD_SF3 0x80// for TDD +#define MBSFN_TDD_SF4 0x40 +#define MBSFN_TDD_SF7 0x20 +#define MBSFN_TDD_SF8 0x10 +#define MBSFN_TDD_SF9 0x08 +#define MBSFN_FDD_SF1 0x80// for FDD +#define MBSFN_FDD_SF2 0x40 +#define MBSFN_FDD_SF3 0x20 +#define MBSFN_FDD_SF6 0x10 +#define MBSFN_FDD_SF7 0x08 +#define MBSFN_FDD_SF8 0x04 + +#define MAX_MBSFN_AREA 8 +#define MAX_PMCH_perMBSFN 15 +/*!\brief MAX MCCH payload size */ +#define MCCH_PAYLOAD_SIZE_MAX 128 +//#define MCH_PAYLOAD_SIZE_MAX 16384// this value is using in case mcs and TBS index are high +#endif + +#ifdef USER_MODE +#define printk printf +#endif //USER_MODE + +/*!\brief Maximum number of logical channl group IDs */ +#define MAX_NUM_LCGID 4 +/*!\brief logical channl group ID 0 */ +#define LCGID0 0 +/*!\brief logical channl group ID 1 */ +#define LCGID1 1 +/*!\brief logical channl group ID 2 */ +#define LCGID2 2 +/*!\brief logical channl group ID 3 */ +#define LCGID3 3 +/*!\brief Maximum number of logical chanels */ +#define MAX_NUM_LCID 11 +/*!\brief Maximum number od control elemenets */ +#define MAX_NUM_CE 5 +/*!\brief Maximum number of random access process */ +#define NB_RA_PROC_MAX 4 +/*!\brief size of buffer status report table */ +#define BSR_TABLE_SIZE 64 +/*!\brief The power headroom reporting range is from -23 ...+40 dB and beyond, with step 1 */ +#define PHR_MAPPING_OFFSET 23 // if ( x>= -23 ) val = floor (x + 23) +/*!\brief maximum number of resource block groups */ +#define N_RBG_MAX 25 // for 20MHz channel BW +/*!\brief minimum value for channel quality indicator */ +#define MIN_CQI_VALUE 0 +/*!\brief maximum value for channel quality indicator */ +#define MAX_CQI_VALUE 15 +/*!\briefmaximum number of supported bandwidth (1.4, 5, 10, 20 MHz) */ +#define MAX_SUPPORTED_BW 4 +/*!\brief CQI values range from 1 to 15 (4 bits) */ +#define CQI_VALUE_RANGE 16 + +/*!\brief value for indicating BSR Timer is not running */ +#define MAC_UE_BSR_TIMER_NOT_RUNNING (0xFFFF) + +#define LCID_EMPTY 0 +#define LCID_NOT_EMPTY 1 + +/*!\brief minimum RLC PDU size to be transmitted = min RLC Status PDU or RLC UM PDU SN 5 bits */ +#define MIN_RLC_PDU_SIZE (2) + +/*!\brief minimum MAC data needed for transmitting 1 min RLC PDU size + 1 byte MAC subHeader */ +#define MIN_MAC_HDR_RLC_SIZE (1 + MIN_RLC_PDU_SIZE) + +/*!\brief maximum number of slices / groups */ +#define MAX_NUM_SLICES 4 + +/* + * eNB part + */ + + +/* + * UE/ENB common part + */ +/*!\brief MAC header of Random Access Response for Random access preamble identifier (RAPID) */ +typedef struct { + uint8_t RAPID:6; + uint8_t T:1; + uint8_t E:1; +} __attribute__((__packed__))RA_HEADER_RAPID; + +/*!\brief MAC header of Random Access Response for backoff indicator (BI)*/ +typedef struct { + uint8_t BI:4; + uint8_t R:2; + uint8_t T:1; + uint8_t E:1; +} __attribute__((__packed__))RA_HEADER_BI; +/* +typedef struct { + uint64_t padding:16; + uint64_t t_crnti:16; + uint64_t hopping_flag:1; + uint64_t rb_alloc:10; + uint64_t mcs:4; + uint64_t TPC:3; + uint64_t UL_delay:1; + uint64_t cqi_req:1; + uint64_t Timing_Advance_Command:11; // first/2nd octet LSB + uint64_t R:1; // octet MSB + } __attribute__((__packed__))RAR_PDU; + +typedef struct { + uint64_t padding:16; + uint64_t R:1; // octet MSB + uint64_t Timing_Advance_Command:11; // first/2nd octet LSB + uint64_t cqi_req:1; + uint64_t UL_delay:1; + uint64_t TPC:3; + uint64_t mcs:4; + uint64_t rb_alloc:10; + uint64_t hopping_flag:1; + uint64_t t_crnti:16; + } __attribute__((__packed__))RAR_PDU; + +#define sizeof_RAR_PDU 6 +*/ +/*!\brief MAC subheader short with 7bit Length field */ +typedef struct { + uint8_t LCID:5; // octet 1 LSB + uint8_t E:1; + uint8_t R:2; // octet 1 MSB + uint8_t L:7; // octet 2 LSB + uint8_t F:1; // octet 2 MSB +} __attribute__((__packed__))SCH_SUBHEADER_SHORT; +/*!\brief MAC subheader long with 15bit Length field */ +typedef struct { + uint8_t LCID:5; // octet 1 LSB + uint8_t E:1; + uint8_t R:2; // octet 1 MSB + uint8_t L_MSB:7; + uint8_t F:1; // octet 2 MSB + uint8_t L_LSB:8; + uint8_t padding; +} __attribute__((__packed__))SCH_SUBHEADER_LONG; +/*!\brief MAC subheader short without length field */ +typedef struct { + uint8_t LCID:5; + uint8_t E:1; + uint8_t R:2; +} __attribute__((__packed__))SCH_SUBHEADER_FIXED; + +/*!\brief mac control element: short buffer status report for a specific logical channel group ID*/ +typedef struct { + uint8_t Buffer_size:6; // octet 1 LSB + uint8_t LCGID:2; // octet 1 MSB +} __attribute__((__packed__))BSR_SHORT; + +typedef BSR_SHORT BSR_TRUNCATED; +/*!\brief mac control element: long buffer status report for all logical channel group ID*/ +typedef struct { + uint8_t Buffer_size3:6; + uint8_t Buffer_size2:6; + uint8_t Buffer_size1:6; + uint8_t Buffer_size0:6; +} __attribute__((__packed__))BSR_LONG; + +#define BSR_LONG_SIZE (sizeof(BSR_LONG)) +/*!\brief mac control element: timing advance */ +typedef struct { + uint8_t TA:6; + uint8_t R:2; +} __attribute__((__packed__))TIMING_ADVANCE_CMD; +/*!\brief mac control element: power headroom report */ +typedef struct { + uint8_t PH:6; + uint8_t R:2; +} __attribute__((__packed__))POWER_HEADROOM_CMD; + +/*! \brief MIB payload */ +typedef struct { + uint8_t payload[3] ; +} __attribute__((__packed__))MIB_PDU; +/*! \brief CCCH payload */ +typedef struct { + uint8_t payload[CCCH_PAYLOAD_SIZE_MAX] ; +} __attribute__((__packed__))CCCH_PDU; +/*! \brief BCCH payload */ +typedef struct { + uint8_t payload[BCCH_PAYLOAD_SIZE_MAX] ; +} __attribute__((__packed__))BCCH_PDU; +/*! \brief RAR payload */ +typedef struct { + uint8_t payload[RAR_PAYLOAD_SIZE_MAX]; +} __attribute__ ((__packed__)) RAR_PDU; +/*! \brief BCCH payload */ +typedef struct { + uint8_t payload[PCCH_PAYLOAD_SIZE_MAX] ; +} __attribute__((__packed__))PCCH_PDU; + +#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) +/*! \brief MCCH payload */ +typedef struct { + uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ; +} __attribute__((__packed__))MCCH_PDU; +/*!< \brief MAC control element for activation and deactivation of component carriers */ +typedef struct { + uint8_t C7:1;/*!< \brief Component carrier 7 */ + uint8_t C6:1;/*!< \brief Component carrier 6 */ + uint8_t C5:1;/*!< \brief Component carrier 5 */ + uint8_t C4:1;/*!< \brief Component carrier 4 */ + uint8_t C3:1;/*!< \brief Component carrier 3 */ + uint8_t C2:1;/*!< \brief Component carrier 2 */ + uint8_t C1:1;/*!< \brief Component carrier 1 */ + uint8_t R:1;/*!< \brief Reserved */ +} __attribute__((__packed__))CC_ELEMENT; +/*! \brief MAC control element: MCH Scheduling Information */ +typedef struct { + uint8_t stop_sf_MSB:3; // octet 1 LSB + uint8_t lcid:5; // octet 2 MSB + uint8_t stop_sf_LSB:8; +} __attribute__((__packed__))MSI_ELEMENT; +#endif +/*! \brief Values of CCCH LCID for DLSCH */ +#define CCCH_LCHANID 0 +/*!\brief Values of BCCH logical channel (fake)*/ +#define BCCH 3 // SI +/*!\brief Values of PCCH logical channel (fake)*/ +#define PCCH 4 // Paging +/*!\brief Values of PCCH logical channel (fake) */ +#define MIBCH 5 // MIB +/*!\brief Values of BCCH SIB1_BR logical channel (fake) */ +#define BCCH_SIB1_BR 6 // SIB1_BR +/*!\brief Values of BCCH SIB_BR logical channel (fake) */ +#define BCCH_SI_BR 7 // SI-BR +/*!\brief Value of CCCH / SRB0 logical channel */ +#define CCCH 0 // srb0 +/*!\brief DCCH / SRB1 logical channel */ +#define DCCH 1 // srb1 +/*!\brief DCCH1 / SRB2 logical channel */ +#define DCCH1 2 // srb2 +/*!\brief DTCH DRB1 logical channel */ +#define DTCH 3 // LCID +/*!\brief MCCH logical channel */ +#define MCCH 4 +/*!\brief MTCH logical channel */ +#define MTCH 1 +// DLSCH LCHAN ID +/*!\brief LCID of UE contention resolution identity for DLSCH*/ +#define UE_CONT_RES 28 +/*!\brief LCID of timing advance for DLSCH */ +#define TIMING_ADV_CMD 29 +/*!\brief LCID of discontinous reception mode for DLSCH */ +#define DRX_CMD 30 +/*!\brief LCID of padding LCID for DLSCH */ +#define SHORT_PADDING 31 + +#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) +// MCH LCHAN IDs (table6.2.1-4 TS36.321) +/*!\brief LCID of MCCH for DL */ +#define MCCH_LCHANID 0 +/*!\brief LCID of MCH scheduling info for DL */ +#define MCH_SCHDL_INFO 3 +/*!\brief LCID of Carrier component activation/deactivation */ +#define CC_ACT_DEACT 27 +#endif + +// ULSCH LCHAN IDs +/*!\brief LCID of extended power headroom for ULSCH */ +#define EXTENDED_POWER_HEADROOM 25 +/*!\brief LCID of power headroom for ULSCH */ +#define POWER_HEADROOM 26 +/*!\brief LCID of CRNTI for ULSCH */ +#define CRNTI 27 +/*!\brief LCID of truncated BSR for ULSCH */ +#define TRUNCATED_BSR 28 +/*!\brief LCID of short BSR for ULSCH */ +#define SHORT_BSR 29 +/*!\brief LCID of long BSR for ULSCH */ +#define LONG_BSR 30 +/*!\bitmaps for BSR Triggers */ +#define BSR_TRIGGER_NONE (0) /* No BSR Trigger */ +#define BSR_TRIGGER_REGULAR (1) /* For Regular and ReTxBSR Expiry Triggers */ +#define BSR_TRIGGER_PERIODIC (2) /* For BSR Periodic Timer Expiry Trigger */ +#define BSR_TRIGGER_PADDING (4) /* For Padding BSR Trigger */ + + +/*! \brief Downlink SCH PDU Structure */ +typedef struct { + uint8_t payload[8][SCH_PAYLOAD_SIZE_MAX]; + uint16_t Pdu_size[8]; +} __attribute__ ((__packed__)) DLSCH_PDU; + + +/*! \brief MCH PDU Structure */ +typedef struct { + int8_t payload[SCH_PAYLOAD_SIZE_MAX]; + uint16_t Pdu_size; + uint8_t mcs; + uint8_t sync_area; + uint8_t msi_active; + uint8_t mcch_active; + uint8_t mtch_active; +} __attribute__ ((__packed__)) MCH_PDU; + +/*! \brief Uplink SCH PDU Structure */ +typedef struct { + int8_t payload[SCH_PAYLOAD_SIZE_MAX]; /*!< \brief SACH payload */ + uint16_t Pdu_size; +} __attribute__ ((__packed__)) ULSCH_PDU; + +#include "PHY/impl_defs_top.h" + +/*!\brief UE ULSCH scheduling states*/ +typedef enum { + S_UL_NONE =0, + S_UL_WAITING, + S_UL_SCHEDULED, + S_UL_BUFFERED, + S_UL_NUM_STATUS +} UE_ULSCH_STATUS; + +/*!\brief UE DLSCH scheduling states*/ +typedef enum { + S_DL_NONE =0, + S_DL_WAITING, + S_DL_SCHEDULED, + S_DL_BUFFERED, + S_DL_NUM_STATUS +} UE_DLSCH_STATUS; + +/*!\brief scheduling policy for the contention-based access */ +typedef enum { + CBA_ES=0, /// equal share of RB among groups w + CBA_ES_S, /// equal share of RB among groups with small allocation + CBA_PF, /// proportional fair (kind of) + CBA_PF_S, /// proportional fair (kind of) with small RB allocation + CBA_RS /// random allocation +} CBA_POLICY; + + +/*! \brief temporary struct for ULSCH sched */ +typedef struct { + rnti_t rnti; + uint16_t subframe; + uint16_t serving_num; + UE_ULSCH_STATUS status; +} eNB_ULSCH_INFO; +/*! \brief temp struct for DLSCH sched */ +typedef struct { + rnti_t rnti; + uint16_t weight; + uint16_t subframe; + uint16_t serving_num; + UE_DLSCH_STATUS status; +} eNB_DLSCH_INFO; +/*! \brief eNB overall statistics */ +typedef struct { + /// num BCCH PDU per CC + uint32_t total_num_bcch_pdu; + /// BCCH buffer size + uint32_t bcch_buffer; + /// total BCCH buffer size + uint32_t total_bcch_buffer; + /// BCCH MCS + uint32_t bcch_mcs; + + /// num CCCH PDU per CC + uint32_t total_num_ccch_pdu; + /// BCCH buffer size + uint32_t ccch_buffer; + /// total BCCH buffer size + uint32_t total_ccch_buffer; + /// BCCH MCS + uint32_t ccch_mcs; + +/// num active users + uint16_t num_dlactive_UEs; + /// available number of PRBs for a give SF + uint16_t available_prbs; + /// total number of PRB available for the user plane + uint32_t total_available_prbs; + /// aggregation + /// total avilable nccc : num control channel element + uint16_t available_ncces; + // only for a new transmission, should be extended for retransmission + // current dlsch bit rate for all transport channels + uint32_t dlsch_bitrate; + // + uint32_t dlsch_bytes_tx; + // + uint32_t dlsch_pdus_tx; + // + uint32_t total_dlsch_bitrate; + // + uint32_t total_dlsch_bytes_tx; + // + uint32_t total_dlsch_pdus_tx; + + // here for RX + // + uint32_t ulsch_bitrate; + // + uint32_t ulsch_bytes_rx; + // + uint64_t ulsch_pdus_rx; + + uint32_t total_ulsch_bitrate; + // + uint32_t total_ulsch_bytes_rx; + // + uint32_t total_ulsch_pdus_rx; + + + /// MAC agent-related stats + /// total number of scheduling decisions + int sched_decisions; + /// missed deadlines + int missed_deadlines; + +} eNB_STATS; +/*! \brief eNB statistics for the connected UEs*/ +typedef struct { + + /// CRNTI of UE + rnti_t crnti; ///user id (rnti) of connected UEs + // rrc status + uint8_t rrc_status; + /// harq pid + uint8_t harq_pid; + /// harq rounf + uint8_t harq_round; + /// total available number of PRBs for a new transmission + uint16_t rbs_used; + /// total available number of PRBs for a retransmission + uint16_t rbs_used_retx; + /// total nccc used for a new transmission: num control channel element + uint16_t ncce_used; + /// total avilable nccc for a retransmission: num control channel element + uint16_t ncce_used_retx; + + // mcs1 before the rate adaptaion + uint8_t dlsch_mcs1; + /// Target mcs2 after rate-adaptation + uint8_t dlsch_mcs2; + // current TBS with mcs2 + uint32_t TBS; + // total TBS with mcs2 + // uint32_t total_TBS; + // total rb used for a new transmission + uint32_t total_rbs_used; + // total rb used for retransmission + uint32_t total_rbs_used_retx; + + /// TX + /// Num pkt + uint32_t num_pdu_tx[NB_RB_MAX]; + /// num bytes + uint32_t num_bytes_tx[NB_RB_MAX]; + /// num retransmission / harq + uint32_t num_retransmission; + /// instantaneous tx throughput for each TTI + // uint32_t tti_throughput[NB_RB_MAX]; + + /// overall + // + uint32_t dlsch_bitrate; + //total + uint32_t total_dlsch_bitrate; + /// headers+ CE + padding bytes for a MAC PDU + uint64_t overhead_bytes; + /// headers+ CE + padding bytes for a MAC PDU + uint64_t total_overhead_bytes; + /// headers+ CE + padding bytes for a MAC PDU + uint64_t avg_overhead_bytes; + // MAC multiplexed payload + uint64_t total_sdu_bytes; + // total MAC pdu bytes + uint64_t total_pdu_bytes; + + // total num pdu + uint32_t total_num_pdus; + // + // uint32_t avg_pdu_size; + + /// RX + + /// PUCCH1a/b power (dBm) + int32_t Po_PUCCH_dBm; + /// Indicator that Po_PUCCH has been updated by PHY + int32_t Po_PUCCH_update; + /// Uplink measured RSSI + int32_t UL_rssi; + /// preassigned mcs after rate adaptation + uint8_t ulsch_mcs1; + /// adjusted mcs + uint8_t ulsch_mcs2; + + /// estimated average pdu inter-departure time + uint32_t avg_pdu_idt; + /// estimated average pdu size + uint32_t avg_pdu_ps; + /// + uint32_t aggregated_pdu_size; + uint32_t aggregated_pdu_arrival; + + /// uplink transport block size + uint32_t ulsch_TBS; + + /// total rb used for a new uplink transmission + uint32_t num_retransmission_rx; + /// total rb used for a new uplink transmission + uint32_t rbs_used_rx; + /// total rb used for a new uplink retransmission + uint32_t rbs_used_retx_rx; + /// total rb used for a new uplink transmission + uint32_t total_rbs_used_rx; + /// snr + int32_t snr; + /// target snr + int32_t target_snr; + + /// num rx pdu + uint32_t num_pdu_rx[NB_RB_MAX]; + /// num bytes rx + uint32_t num_bytes_rx[NB_RB_MAX]; + /// instantaneous rx throughput for each TTI + // uint32_t tti_goodput[NB_RB_MAX]; + /// errors + uint32_t num_errors_rx; + + uint64_t overhead_bytes_rx; + /// headers+ CE + padding bytes for a MAC PDU + uint64_t total_overhead_bytes_rx; + /// headers+ CE + padding bytes for a MAC PDU + uint64_t avg_overhead_bytes_rx; + // + uint32_t ulsch_bitrate; + //total + uint32_t total_ulsch_bitrate; + /// overall + /// MAC pdu bytes + uint64_t pdu_bytes_rx; + /// total MAC pdu bytes + uint64_t total_pdu_bytes_rx; + /// total num pdu + uint32_t total_num_pdus_rx; + /// num of error pdus + uint32_t total_num_errors_rx; + +} eNB_UE_STATS; +/*! \brief eNB template for UE context information */ +typedef struct { + /// C-RNTI of UE + rnti_t rnti; + /// NDI from last scheduling + uint8_t oldNDI[8]; + /// mcs1 from last scheduling + uint8_t oldmcs1[8]; + /// mcs2 from last scheduling + uint8_t oldmcs2[8]; + /// NDI from last UL scheduling + uint8_t oldNDI_UL[8]; + /// mcs from last UL scheduling + uint8_t mcs_UL[8]; + /// TBS from last UL scheduling + uint8_t TBS_UL[8]; + /// CQI_req from last scheduling + uint8_t oldCQI_UL[8]; + /// TPC from last scheduling + uint8_t oldTPC_UL[8]; + /// Flag to indicate UL has been scheduled at least once + boolean_t ul_active; + /// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received) + boolean_t configured; + + /// MCS from last scheduling + uint8_t mcs[8]; + + /// TPC from last scheduling + uint8_t oldTPC[8]; + + // PHY interface info + + /// Number of Allocated RBs for DL after scheduling (prior to frequency allocation) + uint16_t nb_rb[8]; // num_max_harq + + /// Number of Allocated RBs for UL after scheduling + uint16_t nb_rb_ul[8]; // num_max_harq + + /// Number of Allocated RBs for UL after scheduling + uint16_t first_rb_ul[8]; // num_max_harq + + /// Is CQI requested for UL after scheduling 1st transmission + uint8_t cqi_req[8]; // num_max_harq + + /// Cyclic shift for DMRS after scheduling + uint16_t cshift[8]; // num_max_harq + + /// Number of Allocated RBs by the ulsch preprocessor + uint8_t pre_allocated_nb_rb_ul; + + /// index of Allocated RBs by the ulsch preprocessor + int8_t pre_allocated_rb_table_index_ul; + + /// total allocated RBs + int8_t total_allocated_rbs; + + /// pre-assigned MCS by the ulsch preprocessor + uint8_t pre_assigned_mcs_ul; + + /// assigned MCS by the ulsch scheduler + uint8_t assigned_mcs_ul; + + /// DL DAI + uint8_t DAI; + + /// UL DAI + uint8_t DAI_ul[10]; + + /// UL Scheduling Request Received + uint8_t ul_SR; + + ///Resource Block indication for each sub-band in MU-MIMO + uint8_t rballoc_subband[8][50]; + + // Logical channel info for link with RLC + + /// Last received UE BSR info for each logical channel group id + uint8_t bsr_info[MAX_NUM_LCGID]; + + /// LCGID mapping + long lcgidmap[11]; + + /// phr information + int8_t phr_info; + + /// phr information + int8_t phr_info_configured; + + ///dl buffer info + uint32_t dl_buffer_info[MAX_NUM_LCID]; + /// total downlink buffer info + uint32_t dl_buffer_total; + /// total downlink pdus + uint32_t dl_pdus_total; + /// downlink pdus for each LCID + uint32_t dl_pdus_in_buffer[MAX_NUM_LCID]; + /// creation time of the downlink buffer head for each LCID + uint32_t dl_buffer_head_sdu_creation_time[MAX_NUM_LCID]; + /// maximum creation time of the downlink buffer head across all LCID + uint32_t dl_buffer_head_sdu_creation_time_max; + /// a flag indicating that the downlink head SDU is segmented + uint8_t dl_buffer_head_sdu_is_segmented[MAX_NUM_LCID]; + /// size of remaining size to send for the downlink head SDU + uint32_t dl_buffer_head_sdu_remaining_size_to_send[MAX_NUM_LCID]; + + /// total uplink buffer size + uint32_t ul_total_buffer; + /// uplink buffer creation time for each LCID + uint32_t ul_buffer_creation_time[MAX_NUM_LCGID]; + /// maximum uplink buffer creation time across all the LCIDs + uint32_t ul_buffer_creation_time_max; + /// uplink buffer size per LCID + uint32_t ul_buffer_info[MAX_NUM_LCGID]; + + /// UE tx power + int32_t ue_tx_power; + + /// stores the frame where the last TPC was transmitted + uint32_t pusch_tpc_tx_frame; + uint32_t pusch_tpc_tx_subframe; + uint32_t pucch_tpc_tx_frame; + uint32_t pucch_tpc_tx_subframe; + +#ifdef LOCALIZATION + eNB_UE_estimated_distances distance; +#endif + +#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) + uint8_t rach_resource_type; + + uint16_t mpdcch_repetition_cnt; + struct PhysicalConfigDedicated *physicalConfigDedicated; + frame_t Msg2_frame; + sub_frame_t Msg2_subframe; +#endif +} UE_TEMPLATE; + +/*! \brief scheduling control information set through an API (not used)*/ +typedef struct { + ///UL transmission bandwidth in RBs + uint8_t ul_bandwidth[MAX_NUM_LCID]; + ///DL transmission bandwidth in RBs + uint8_t dl_bandwidth[MAX_NUM_LCID]; + + //To do GBR bearer + uint8_t min_ul_bandwidth[MAX_NUM_LCID]; + + uint8_t min_dl_bandwidth[MAX_NUM_LCID]; + + ///aggregated bit rate of non-gbr bearer per UE + uint64_t ue_AggregatedMaximumBitrateDL; + ///aggregated bit rate of non-gbr bearer per UE + uint64_t ue_AggregatedMaximumBitrateUL; + ///CQI scheduling interval in subframes. + uint16_t cqiSchedInterval; + ///Contention resolution timer used during random access + uint8_t mac_ContentionResolutionTimer; + + uint16_t max_allowed_rbs[MAX_NUM_LCID]; + + uint8_t max_mcs[MAX_NUM_LCID]; + + uint16_t priority[MAX_NUM_LCID]; + + // resource scheduling information + + /// Current DL harq round per harq_pid on each CC + uint8_t round[MAX_NUM_CCs][10]; + /// Current Active TBs per harq_pid on each CC + uint8_t tbcnt[MAX_NUM_CCs][10]; + /// Current UL harq round per harq_pid on each CC + uint8_t round_UL[MAX_NUM_CCs][8]; + uint8_t dl_pow_off[MAX_NUM_CCs]; + uint16_t pre_nb_available_rbs[MAX_NUM_CCs]; + unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX]; + uint16_t ta_timer; + int16_t ta_update; + uint16_t ul_consecutive_errors; + int32_t context_active_timer; + int32_t cqi_req_timer; + int32_t ul_inactivity_timer; + int32_t ul_failure_timer; + int32_t ul_scheduled; + int32_t ra_pdcch_order_sent; + int32_t ul_out_of_sync; + int32_t phr_received; + uint8_t periodic_ri_received[NFAPI_CC_MAX]; + uint8_t aperiodic_ri_received[NFAPI_CC_MAX]; + uint32_t pucch_tpc_accumulated[NFAPI_CC_MAX]; + uint8_t pucch1_cqi_update[NFAPI_CC_MAX]; + uint8_t pucch1_snr[NFAPI_CC_MAX]; + uint8_t pucch2_cqi_update[NFAPI_CC_MAX]; + uint8_t pucch2_snr[NFAPI_CC_MAX]; + uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; + uint8_t pucch3_snr[NFAPI_CC_MAX]; + uint8_t pusch_snr[NFAPI_CC_MAX]; + uint8_t pusch_snr_avg[NFAPI_CC_MAX]; + uint16_t feedback_cnt[NFAPI_CC_MAX]; + uint16_t timing_advance; + uint16_t timing_advance_r9; + uint8_t periodic_wideband_cqi[NFAPI_CC_MAX]; + uint8_t periodic_wideband_spatial_diffcqi[NFAPI_CC_MAX]; + uint8_t periodic_wideband_pmi[NFAPI_CC_MAX]; + uint8_t periodic_subband_cqi[NFAPI_CC_MAX][16]; + uint8_t periodic_subband_spatial_diffcqi[NFAPI_CC_MAX][16]; + uint8_t aperiodic_subband_cqi0[NFAPI_CC_MAX][25]; + uint8_t aperiodic_subband_pmi[NFAPI_CC_MAX][25]; + uint8_t aperiodic_subband_diffcqi0[NFAPI_CC_MAX][25]; + uint8_t aperiodic_subband_cqi1[NFAPI_CC_MAX][25]; + uint8_t aperiodic_subband_diffcqi1[NFAPI_CC_MAX][25]; + uint8_t aperiodic_wideband_cqi0[NFAPI_CC_MAX]; + uint8_t aperiodic_wideband_pmi[NFAPI_CC_MAX]; + uint8_t aperiodic_wideband_cqi1[NFAPI_CC_MAX]; + uint8_t aperiodic_wideband_pmi1[NFAPI_CC_MAX]; + uint8_t dl_cqi[NFAPI_CC_MAX]; +} UE_sched_ctrl; +/*! \brief eNB template for the Random access information */ +typedef struct { + /// Flag to indicate this process is active + boolean_t RA_active; + /// Size of DCI for RA-Response (bytes) + uint8_t RA_dci_size_bytes1; + /// Size of DCI for RA-Response (bits) + uint8_t RA_dci_size_bits1; + /// Actual DCI to transmit for RA-Response + uint8_t RA_alloc_pdu1[(MAX_DCI_SIZE_BITS>>3)+1]; + /// DCI format for RA-Response (should be 1A) + uint8_t RA_dci_fmt1; + /// Size of DCI for Msg4/ContRes (bytes) + uint8_t RA_dci_size_bytes2; + /// Size of DCI for Msg4/ContRes (bits) + uint8_t RA_dci_size_bits2; + /// Actual DCI to transmit for Msg4/ContRes + uint8_t RA_alloc_pdu2[(MAX_DCI_SIZE_BITS>>3)+1]; + /// DCI format for Msg4/ContRes (should be 1A) + uint8_t RA_dci_fmt2; + /// Flag to indicate the eNB should generate RAR. This is triggered by detection of PRACH + uint8_t generate_rar; + /// Subframe where preamble was received + uint8_t preamble_subframe; + /// Subframe where Msg2 is to be sent + uint8_t Msg2_subframe; + /// Frame where Msg2 is to be sent + frame_t Msg2_frame; + /// Subframe where Msg3 is to be sent + sub_frame_t Msg3_subframe; + /// Frame where Msg3 is to be sent + frame_t Msg3_frame; + /// Subframe where Msg4 is to be sent + sub_frame_t Msg4_subframe; + /// Frame where Msg4 is to be sent + frame_t Msg4_frame; + /// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user. + uint8_t generate_Msg4; + /// Flag to indicate that eNB is waiting for ACK that UE has received Msg3. + uint8_t wait_ack_Msg4; + /// harq_pid used for Msg4 transmission + uint8_t harq_pid; + /// UE RNTI allocated during RAR + rnti_t rnti; + /// RA RNTI allocated from received PRACH + uint16_t RA_rnti; + /// Received preamble_index + uint8_t preamble_index; + /// Received UE Contention Resolution Identifier + uint8_t cont_res_id[6]; + /// Timing offset indicated by PHY + int16_t timing_offset; + /// Timeout for RRC connection + int16_t RRC_timer; + /// Msg3 first RB + uint8_t msg3_first_rb; + /// Msg3 number of RB + uint8_t msg3_nb_rb; + /// Msg3 MCS + uint8_t msg3_mcs; + /// Msg3 TPC command + uint8_t msg3_TPC; + /// Msg3 ULdelay command + uint8_t msg3_ULdelay; + /// Msg3 cqireq command + uint8_t msg3_cqireq; + /// Round of Msg3 HARQ + uint8_t msg3_round; + /// TBS used for Msg4 + int msg4_TBsize; + /// MCS used for Msg4 + int msg4_mcs; + /// size off piggybacked RRC SDU + uint8_t msg4_rrc_sdu_length; + uint32_t msg4_delay; + +#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) + uint8_t rach_resource_type; + uint8_t msg2_mpdcch_repetition_cnt; + uint8_t msg2_mpdcch_done; + uint8_t msg4_mpdcch_repetition_cnt; + uint8_t msg4_mpdcch_done; + uint8_t msg2_narrowband; + uint32_t msg34_narrowband; +#endif +} RA_TEMPLATE; + + +/*! \brief subband bitmap confguration (for ALU icic algo purpose), in test phase */ +typedef struct { + uint8_t sbmap[NUMBER_OF_SUBBANDS_MAX]; //13 = number of SB MAX for 100 PRB + uint8_t periodicity; + uint8_t first_subframe; + uint8_t sb_size; + uint8_t nb_active_sb; +} SBMAP_CONF; +/*! \brief UE list used by eNB to order UEs/CC for scheduling*/ +typedef struct { + /// Dedicated information for UEs + struct PhysicalConfigDedicated *physicalConfigDedicated[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; + /// DLSCH pdu + DLSCH_PDU DLSCH_pdu[MAX_NUM_CCs][2][NUMBER_OF_UE_MAX]; + /// DCI template and MAC connection parameters for UEs + UE_TEMPLATE UE_template[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; + /// DCI template and MAC connection for RA processes + int pCC_id[NUMBER_OF_UE_MAX]; + /// sorted downlink component carrier for the scheduler + int ordered_CCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; + /// number of downlink active component carrier + int numactiveCCs[NUMBER_OF_UE_MAX]; + /// sorted uplink component carrier for the scheduler + int ordered_ULCCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; + /// number of uplink active component carrier + int numactiveULCCs[NUMBER_OF_UE_MAX]; + /// number of downlink active component carrier + uint8_t dl_CC_bitmap[NUMBER_OF_UE_MAX]; + /// eNB to UE statistics + eNB_UE_STATS eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; + /// scheduling control info + UE_sched_ctrl UE_sched_ctrl[NUMBER_OF_UE_MAX]; + int next[NUMBER_OF_UE_MAX]; + int head; + int next_ul[NUMBER_OF_UE_MAX]; + int head_ul; + int avail; + int num_UEs; + boolean_t active[NUMBER_OF_UE_MAX]; +} UE_list_t; + +/*! \brief eNB common channels */ +typedef struct { + int physCellId; + int p_eNB; + int Ncp; + int eutra_band; + uint32_t dl_CarrierFreq; + BCCH_BCH_Message_t *mib; + RadioResourceConfigCommonSIB_t *radioResourceConfigCommon; +#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) + RadioResourceConfigCommonSIB_t *radioResourceConfigCommon_BR; +#endif + TDD_Config_t *tdd_Config; + SchedulingInfoList_t *schedulingInfoList; + ARFCN_ValueEUTRA_t ul_CarrierFreq; + long ul_Bandwidth; + /// Outgoing MIB PDU for PHY + MIB_PDU MIB_pdu; + /// Outgoing BCCH pdu for PHY + BCCH_PDU BCCH_pdu; + /// Outgoing BCCH DCI allocation + uint32_t BCCH_alloc_pdu; + /// Outgoing CCCH pdu for PHY + CCCH_PDU CCCH_pdu; + /// Outgoing RAR pdu for PHY + RAR_PDU RAR_pdu; + /// Template for RA computations + RA_TEMPLATE RA_template[NB_RA_PROC_MAX]; + /// VRB map for common channels + uint8_t vrb_map[100]; + /// VRB map for common channels and retransmissions by PHICH + uint8_t vrb_map_UL[100]; + /// MBSFN SubframeConfig + struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8]; + /// number of subframe allocation pattern available for MBSFN sync area + uint8_t num_sf_allocation_pattern; +#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) + /// MBMS Flag + uint8_t MBMS_flag; + /// Outgoing MCCH pdu for PHY + MCCH_PDU MCCH_pdu; + /// MCCH active flag + uint8_t msi_active; + /// MCCH active flag + uint8_t mcch_active; + /// MTCH active flag + uint8_t mtch_active; + /// number of active MBSFN area + uint8_t num_active_mbsfn_area; + /// MBSFN Area Info + struct MBSFN_AreaInfo_r9 *mbsfn_AreaInfo[MAX_MBSFN_AREA]; + /// PMCH Config + struct PMCH_Config_r9 *pmch_Config[MAX_PMCH_perMBSFN]; + /// MBMS session info list + struct MBMS_SessionInfoList_r9 *mbms_SessionList[MAX_PMCH_perMBSFN]; + /// Outgoing MCH pdu for PHY + MCH_PDU MCH_pdu; +#endif +#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) + /// Rel13 parameters from SIB1 + SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext; + /// Counter for SIB1-BR scheduling + int SIB1_BR_cnt; + /// Outgoing BCCH-BR pdu for PHY + BCCH_PDU BCCH_BR_pdu[20]; +#endif +} COMMON_channels_t; +/*! \brief top level eNB MAC structure */ +typedef struct eNB_MAC_INST_s { + /// Ethernet parameters for northbound midhaul interface + eth_params_t eth_params_n; + /// Ethernet parameters for fronthaul interface + eth_params_t eth_params_s; + /// + module_id_t Mod_id; + /// frame counter + frame_t frame; + /// subframe counter + sub_frame_t subframe; + /// Pointer to IF module instance for PHY + IF_Module_t *if_inst; + /// Common cell resources + COMMON_channels_t common_channels[MAX_NUM_CCs]; + /// current PDU index (BCH,MCH,DLSCH) + uint16_t pdu_index[MAX_NUM_CCs]; + + /// NFAPI Config Request Structure + nfapi_config_request_t config[MAX_NUM_CCs]; + /// Preallocated DL pdu list + nfapi_dl_config_request_pdu_t dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU]; + /// NFAPI DL Config Request Structure + nfapi_dl_config_request_t DL_req[MAX_NUM_CCs]; + /// Preallocated UL pdu list + nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU]; + /// Preallocated UL pdu list for ULSCH (n+k delay) + nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU]; + /// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place + nfapi_ul_config_request_t UL_req[MAX_NUM_CCs]; + /// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests + nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10]; + /// Preallocated HI_DCI0 pdu list + nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU]; + /// NFAPI HI/DCI0 Config Request Structure + nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs]; + /// Prealocated TX pdu list + nfapi_tx_request_pdu_t tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU]; + /// NFAPI DL PDU structure + nfapi_tx_request_t TX_req[MAX_NUM_CCs]; + /// UL handle + uint32_t ul_handle; + UE_list_t UE_list; + + ///subband bitmap configuration + SBMAP_CONF sbmap_conf; + /// CCE table used to build DCI scheduling information + int CCE_table[MAX_NUM_CCs][800]; + /// active flag for Other lcid + uint8_t lcid_active[NB_RB_MAX]; + /// eNB stats + eNB_STATS eNB_stats[MAX_NUM_CCs]; + // MAC function execution peformance profiler + /// processing time of eNB scheduler + time_stats_t eNB_scheduler; + /// processing time of eNB scheduler for SI + time_stats_t schedule_si; + /// processing time of eNB scheduler for Random access + time_stats_t schedule_ra; + /// processing time of eNB ULSCH scheduler + time_stats_t schedule_ulsch; + /// processing time of eNB DCI generation + time_stats_t fill_DLSCH_dci; + /// processing time of eNB MAC preprocessor + time_stats_t schedule_dlsch_preprocessor; + /// processing time of eNB DLSCH scheduler + time_stats_t schedule_dlsch; // include rlc_data_req + MAC header + preprocessor + /// processing time of eNB MCH scheduler + time_stats_t schedule_mch; + /// processing time of eNB ULSCH reception + time_stats_t rx_ulsch_sdu; // include rlc_data_ind +} eNB_MAC_INST; + +/* + * UE part + */ + +typedef enum { + TYPE0, + TYPE1, + TYPE1A, + TYPE2, + TYPE2A, + TYPEUESPEC +} MPDCCH_TYPES_t; + +/*!\brief UE layer 2 status */ +typedef enum { + CONNECTION_OK=0, + CONNECTION_LOST, + PHY_RESYNCH, + PHY_HO_PRACH +} UE_L2_STATE_t; + +/*!\brief UE scheduling info */ +typedef struct { + /// buffer status for each lcgid + uint8_t BSR[MAX_NUM_LCGID]; // should be more for mesh topology + /// keep the number of bytes in rlc buffer for each lcgid + int32_t BSR_bytes[MAX_NUM_LCGID]; + /// after multiplexing buffer remain for each lcid + int32_t LCID_buffer_remain[MAX_NUM_LCID]; + /// sum of all lcid buffer size + uint16_t All_lcid_buffer_size_lastTTI; + /// buffer status for each lcid + uint8_t LCID_status[MAX_NUM_LCID]; + /// SR pending as defined in 36.321 + uint8_t SR_pending; + /// SR_COUNTER as defined in 36.321 + uint16_t SR_COUNTER; + /// logical channel group ide for each LCID + uint8_t LCGID[MAX_NUM_LCID]; + /// retxBSR-Timer, default value is sf2560 + uint16_t retxBSR_Timer; + /// retxBSR_SF, number of subframe before triggering a regular BSR + uint16_t retxBSR_SF; + /// periodicBSR-Timer, default to infinity + uint16_t periodicBSR_Timer; + /// periodicBSR_SF, number of subframe before triggering a periodic BSR + uint16_t periodicBSR_SF; + /// default value is 0: not configured + uint16_t sr_ProhibitTimer; + /// sr ProhibitTime running + uint8_t sr_ProhibitTimer_Running; + /// default value to n5 + uint16_t maxHARQ_Tx; + /// default value is false + uint16_t ttiBundling; + /// default value is release + struct DRX_Config *drx_config; + /// default value is release + struct MAC_MainConfig__phr_Config *phr_config; + ///timer before triggering a periodic PHR + uint16_t periodicPHR_Timer; + ///timer before triggering a prohibit PHR + uint16_t prohibitPHR_Timer; + ///DL Pathloss change value + uint16_t PathlossChange; + ///number of subframe before triggering a periodic PHR + int16_t periodicPHR_SF; + ///number of subframe before triggering a prohibit PHR + int16_t prohibitPHR_SF; + ///DL Pathloss Change in db + uint16_t PathlossChange_db; + + /// default value is false + uint16_t extendedBSR_Sizes_r10; + /// default value is false + uint16_t extendedPHR_r10; + + //Bj bucket usage per lcid + int16_t Bj[MAX_NUM_LCID]; + // Bucket size per lcid + int16_t bucket_size[MAX_NUM_LCID]; +} UE_SCHEDULING_INFO; +/*!\brief Top level UE MAC structure */ +typedef struct { + uint16_t Node_id; + /// RX frame counter + frame_t rxFrame; + /// RX subframe counter + sub_frame_t rxSubframe; + /// TX frame counter + frame_t txFrame; + /// TX subframe counter + sub_frame_t txSubframe; + /// C-RNTI of UE + uint16_t crnti; + /// C-RNTI of UE before HO + rnti_t crnti_before_ho; ///user id (rnti) of connected UEs + /// uplink active flag + uint8_t ul_active; + /// pointer to RRC PHY configuration + RadioResourceConfigCommonSIB_t *radioResourceConfigCommon; + /// pointer to RACH_ConfigDedicated (NULL when not active, i.e. upon HO completion or T304 expiry) + struct RACH_ConfigDedicated *rach_ConfigDedicated; + /// pointer to RRC PHY configuration + struct PhysicalConfigDedicated *physicalConfigDedicated; +#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) + /// pointer to RRC PHY configuration SCEll + struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10; +#endif + /// pointer to TDD Configuration (NULL for FDD) + TDD_Config_t *tdd_Config; + /// Number of adjacent cells to measure + uint8_t n_adj_cells; + /// Array of adjacent physical cell ids + uint32_t adj_cell_id[6]; + /// Pointer to RRC MAC configuration + MAC_MainConfig_t *macConfig; + /// Pointer to RRC Measurement gap configuration + MeasGapConfig_t *measGapConfig; + /// Pointers to LogicalChannelConfig indexed by LogicalChannelIdentity. Note NULL means LCHAN is inactive. + LogicalChannelConfig_t *logicalChannelConfig[MAX_NUM_LCID]; + /// Scheduling Information + UE_SCHEDULING_INFO scheduling_info; + /// Outgoing CCCH pdu for PHY + CCCH_PDU CCCH_pdu; + /// Outgoing RAR pdu for PHY + RAR_PDU RAR_pdu; + /// Incoming DLSCH pdu for PHY + DLSCH_PDU DLSCH_pdu[NUMBER_OF_UE_MAX][2]; + /// number of attempt for rach + uint8_t RA_attempt_number; + /// Random-access procedure flag + uint8_t RA_active; + /// Random-access window counter + int8_t RA_window_cnt; + /// Random-access Msg3 size in bytes + uint8_t RA_Msg3_size; + /// Random-access prachMaskIndex + uint8_t RA_prachMaskIndex; + /// Flag indicating Preamble set (A,B) used for first Msg3 transmission + uint8_t RA_usedGroupA; + /// Random-access Resources + PRACH_RESOURCES_t RA_prach_resources; + /// Random-access PREAMBLE_TRANSMISSION_COUNTER + uint8_t RA_PREAMBLE_TRANSMISSION_COUNTER; + /// Random-access backoff counter + int16_t RA_backoff_cnt; + /// Random-access variable for window calculation (frame of last change in window counter) + uint32_t RA_tx_frame; + /// Random-access variable for window calculation (subframe of last change in window counter) + uint8_t RA_tx_subframe; + /// Random-access Group B maximum path-loss + /// Random-access variable for backoff (frame of last change in backoff counter) + uint32_t RA_backoff_frame; + /// Random-access variable for backoff (subframe of last change in backoff counter) + uint8_t RA_backoff_subframe; + /// Random-access Group B maximum path-loss + uint16_t RA_maxPL; + /// Random-access Contention Resolution Timer active flag + uint8_t RA_contention_resolution_timer_active; + /// Random-access Contention Resolution Timer count value + uint8_t RA_contention_resolution_cnt; + /// power headroom reporitng reconfigured + uint8_t PHR_reconfigured; + /// power headroom state as configured by the higher layers + uint8_t PHR_state; + /// power backoff due to power management (as allowed by P-MPRc) for this cell + uint8_t PHR_reporting_active; + /// power backoff due to power management (as allowed by P-MPRc) for this cell + uint8_t power_backoff_db[NUMBER_OF_eNB_MAX]; + /// BSR report falg management + uint8_t BSR_reporting_active; + /// retxBSR-Timer expires flag + uint8_t retxBSRTimer_expires_flag; + /// periodBSR-Timer expires flag + uint8_t periodBSRTimer_expires_flag; + + /// MBSFN_Subframe Configuration + struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8]; // FIXME replace 8 by MAX_MBSFN_AREA? + /// number of subframe allocation pattern available for MBSFN sync area + uint8_t num_sf_allocation_pattern; +#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) + /// number of active MBSFN area + uint8_t num_active_mbsfn_area; + /// MBSFN Area Info + struct MBSFN_AreaInfo_r9 *mbsfn_AreaInfo[MAX_MBSFN_AREA]; + /// PMCH Config + struct PMCH_Config_r9 *pmch_Config[MAX_PMCH_perMBSFN]; + /// MCCH status + uint8_t mcch_status; + /// MSI status + uint8_t msi_status;// could be an array if there are >1 MCH in one MBSFN area +#endif + //#ifdef CBA + /// CBA RNTI for each group + uint16_t cba_rnti[NUM_MAX_CBA_GROUP]; + /// last SFN for CBA channel access + uint8_t cba_last_access[NUM_MAX_CBA_GROUP]; + //#endif + /// total UE scheduler processing time + time_stats_t ue_scheduler; // total + /// UE ULSCH tx processing time inlcuding RLC interface (rlc_data_req) and mac header generation + time_stats_t tx_ulsch_sdu; + /// UE DLSCH rx processing time inlcuding RLC interface (mac_rrc_data_ind or mac_rlc_status_ind+mac_rlc_data_ind) and mac header parser + time_stats_t rx_dlsch_sdu ; + /// UE query for MCH subframe processing time + time_stats_t ue_query_mch; + /// UE MCH rx processing time + time_stats_t rx_mch_sdu; + /// UE BCCH rx processing time including RLC interface (mac_rrc_data_ind) + time_stats_t rx_si; + /// UE PCCH rx processing time including RLC interface (mac_rrc_data_ind) + time_stats_t rx_p; +} UE_MAC_INST; +/*! \brief ID of the neighboring cells used for HO*/ +typedef struct { + uint16_t cell_ids[6]; + uint8_t n_adj_cells; +} neigh_cell_id_t; + +#include "proto.h" +/*@}*/ +#endif /*__LAYER2_MAC_DEFS_H__ */ diff --git a/openair2/LAYER2/MAC/eNB_scheduler.c b/openair2/LAYER2/MAC/eNB_scheduler.c index 8f5aab99a7..b2bd428e89 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler.c +++ b/openair2/LAYER2/MAC/eNB_scheduler.c @@ -601,7 +601,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync", UE_info->UE_template[CC_id][UE_id].phr_info, UE_scheduling_control->dl_cqi[CC_id], - (5 * UE_scheduling_control->pusch_snr[CC_id] - 640) / 10, + (5 * UE_scheduling_control->pusch_snr_avg[CC_id] - 640) / 10, (5 * UE_scheduling_control->pucch1_snr[CC_id] - 640) / 10); } diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 1e82da6d6f..6b3f788ee0 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2571,6 +2571,8 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, uint8_t average_rbs; uint16_t first_rb[MAX_NUM_CCs]; uint8_t mcs; + uint8_t snr; + uint8_t snr2mcs_offset = 4; uint8_t rb_table_index; uint8_t num_pucch_rb; uint32_t tbs; @@ -2665,7 +2667,13 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, UE_template = &UE_info->UE_template[CC_id][UE_id]; if ( UE_info->UE_sched_ctrl[UE_id].phr_received == 1 ) { - mcs = 20; + snr = (5 * UE_info->UE_sched_ctrl[UE_id].pusch_snr[CC_id] - 640) / 10; + if((snr + snr2mcs_offset) >= 20) { + mcs = 20; + } + else { + mcs = snr + snr2mcs_offset; + } } else { mcs = 10; } @@ -3083,7 +3091,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, //power control //compute the expected ULSCH RX power (for the stats) // this is the normalized RX power and this should be constant (regardless of mcs - snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10; + snr = (5 * UE_sched_ctrl->pusch_snr_avg[CC_id] - 640) / 10; target_snr = eNB->puSch10xSnr / 10; // this assumes accumulated tpc // make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index a3046a9939..147becca3a 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2217,6 +2217,7 @@ add_new_ue(module_id_t mod_idP, UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0; UE_info->UE_sched_ctrl[UE_id].ta_update = 31; UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = 0; for (j = 0; j < 8; j++) { UE_info->UE_template[cc_idP][UE_id].oldNDI[j] = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 9cfdc3622b..a1b142eff4 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -166,14 +166,16 @@ rx_sdu(const module_id_t enb_mod_idP, * maybe it's even not correct at all? */ UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; + UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; + double tpc_forgetting_filter=0.75; - if(UE_scheduling_control->pusch_snr[CC_idP] == 0) { - UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; + if(UE_scheduling_control->pusch_snr_avg[CC_idP] == 0) { + UE_scheduling_control->pusch_snr_avg[CC_idP] = ul_cqi; } else { - UE_scheduling_control->pusch_snr[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr[CC_idP] * tpc_forgetting_filter + (double)ul_cqi * (1-tpc_forgetting_filter)); + UE_scheduling_control->pusch_snr_avg[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr_avg[CC_idP] * tpc_forgetting_filter + (double)ul_cqi * (1-tpc_forgetting_filter)); } - + UE_scheduling_control->ul_consecutive_errors = 0; first_rb = UE_template_ptr->first_rb_ul[harq_pid]; @@ -1992,7 +1994,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP, cqi_req = 0; /* Power control: compute the expected ULSCH RX snr (for the stats) */ /* This is the normalized snr and this should be constant (regardless of mcs) */ - snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10; + snr = (5 * UE_sched_ctrl->pusch_snr_avg[CC_id] - 640) / 10; target_snr = eNB->puSch10xSnr / 10; /* TODO: target_rx_power was 178, what to put? */ /* This assumes accumulated tpc */ /* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */ diff --git a/openair2/LAYER2/MAC/mac.h b/openair2/LAYER2/MAC/mac.h index 7eccc6222d..1727403631 100644 --- a/openair2/LAYER2/MAC/mac.h +++ b/openair2/LAYER2/MAC/mac.h @@ -961,6 +961,7 @@ typedef struct { uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; uint8_t pucch3_snr[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX]; + uint8_t pusch_snr_avg[NFAPI_CC_MAX]; uint16_t feedback_cnt[NFAPI_CC_MAX]; uint16_t timing_advance; uint16_t timing_advance_r9; From 55207a5062caae261e950d151b0d1b7121400ed7 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Wed, 18 Dec 2019 09:59:05 +0900 Subject: [PATCH 07/54] Fix: add SNR filter for ULSCH AMC. --- openair2/LAYER2/MAC/defs.h | 1 + openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 15 +++++++++------ openair2/LAYER2/MAC/eNB_scheduler_primitives.c | 2 +- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 12 ++++++++++-- openair2/LAYER2/MAC/mac.h | 1 + 5 files changed, 22 insertions(+), 9 deletions(-) diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h index 7c18d958ab..020be61fb1 100644 --- a/openair2/LAYER2/MAC/defs.h +++ b/openair2/LAYER2/MAC/defs.h @@ -832,6 +832,7 @@ typedef struct { uint8_t pucch3_snr[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; + uint8_t pusch_snr_amc[NFAPI_CC_MAX]; uint16_t feedback_cnt[NFAPI_CC_MAX]; uint16_t timing_advance; uint16_t timing_advance_r9; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 6b3f788ee0..13d02f9407 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2572,7 +2572,7 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, uint16_t first_rb[MAX_NUM_CCs]; uint8_t mcs; uint8_t snr; - uint8_t snr2mcs_offset = 4; + uint8_t snr2mcs_offset = 0; uint8_t rb_table_index; uint8_t num_pucch_rb; uint32_t tbs; @@ -2667,10 +2667,13 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, UE_template = &UE_info->UE_template[CC_id][UE_id]; if ( UE_info->UE_sched_ctrl[UE_id].phr_received == 1 ) { - snr = (5 * UE_info->UE_sched_ctrl[UE_id].pusch_snr[CC_id] - 640) / 10; + snr = (5 * UE_info->UE_sched_ctrl[UE_id].pusch_snr_amc[CC_id] - 640) / 10; if((snr + snr2mcs_offset) >= 20) { mcs = 20; } + else if((snr + snr2mcs_offset) < 3) { + mcs = 3; + } else { mcs = snr + snr2mcs_offset; } @@ -3204,8 +3207,8 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, nfapi_hi_dci0_request_t *nfapi_hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP]; nfapi_hi_dci0_req->sfn_sf = frameP<<4|subframeP; // sfnsf_add_subframe(sched_frame, sched_subframeP, 0); // sunday! nfapi_hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST; - LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n", - harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP); + LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d\n", + harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,UE_template->mcs_UL[harq_pid],first_rb[CC_id],rb_table[rb_table_index],0); ul_req_index = 0; dlsch_flag = 0; @@ -3355,8 +3358,8 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, hi_dci0_pdu->dci_pdu.dci_pdu_rel8.harq_pid = harq_pid; hi_dci0_req->number_of_dci++; // Add UL_config PDUs - LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n", - harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP); + LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d\n", + harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,mcs_rv,ulsch_ue_select[CC_id].list[ulsch_ue_num].start_rb,ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb,UE_sched_ctrl->round_UL[CC_id][harq_pid]); ul_req_index = 0; dlsch_flag = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index 147becca3a..95a5b48598 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2218,7 +2218,7 @@ add_new_ue(module_id_t mod_idP, UE_info->UE_sched_ctrl[UE_id].ta_update = 31; UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = 0; - + UE_info->UE_sched_ctrl[UE_id].pusch_snr_amc[cc_idP] = 0; for (j = 0; j < 8; j++) { UE_info->UE_template[cc_idP][UE_id].oldNDI[j] = 0; UE_info->UE_template[cc_idP][UE_id].oldNDI_UL[j] = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index a1b142eff4..d8a8983ac1 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -168,12 +168,20 @@ rx_sdu(const module_id_t enb_mod_idP, UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; - double tpc_forgetting_filter=0.75; + double snr_filter_tpc=0.75; if(UE_scheduling_control->pusch_snr_avg[CC_idP] == 0) { UE_scheduling_control->pusch_snr_avg[CC_idP] = ul_cqi; } else { - UE_scheduling_control->pusch_snr_avg[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr_avg[CC_idP] * tpc_forgetting_filter + (double)ul_cqi * (1-tpc_forgetting_filter)); + UE_scheduling_control->pusch_snr_avg[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr_avg[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc)); + } + + double snr_filter_amc=0.5; + if(UE_scheduling_control->pusch_snr_amc[CC_idP] == 0) { + UE_scheduling_control->pusch_snr_amc[CC_idP] = ul_cqi; + } + else { + UE_scheduling_control->pusch_snr_amc[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr_amc[CC_idP] * snr_filter_amc + (double)ul_cqi * (1-snr_filter_amc)); } UE_scheduling_control->ul_consecutive_errors = 0; diff --git a/openair2/LAYER2/MAC/mac.h b/openair2/LAYER2/MAC/mac.h index 1727403631..3c15bd5ac9 100644 --- a/openair2/LAYER2/MAC/mac.h +++ b/openair2/LAYER2/MAC/mac.h @@ -962,6 +962,7 @@ typedef struct { uint8_t pucch3_snr[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; + uint8_t pusch_snr_amc[NFAPI_CC_MAX]; uint16_t feedback_cnt[NFAPI_CC_MAX]; uint16_t timing_advance; uint16_t timing_advance_r9; From ffdc67daa4fbebfacba4c29ebd9ba0b5da39d63f Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Tue, 24 Dec 2019 19:10:52 +0900 Subject: [PATCH 08/54] Add: PUSCH AMC using average BLER. (cherry picked from commit 1ab0a979fdbcc933ae249838841dc7f61c0e5aba) --- openair2/LAYER2/MAC/defs.h | 12 ++- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 91 ++++++++++++++----- .../LAYER2/MAC/eNB_scheduler_primitives.c | 7 ++ openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 3 + openair2/LAYER2/MAC/mac.h | 11 +++ 5 files changed, 101 insertions(+), 23 deletions(-) diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h index 020be61fb1..a16b145039 100644 --- a/openair2/LAYER2/MAC/defs.h +++ b/openair2/LAYER2/MAC/defs.h @@ -757,7 +757,11 @@ typedef struct { uint32_t pusch_tpc_tx_subframe; uint32_t pucch_tpc_tx_frame; uint32_t pucch_tpc_tx_subframe; - + + /// stores the frame where the last bler was calculated + uint32_t pusch_bler_calc_frame; + uint32_t pusch_bler_calc_subframe; + #ifdef LOCALIZATION eNB_UE_estimated_distances distance; #endif @@ -833,6 +837,12 @@ typedef struct { uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; uint8_t pusch_snr_amc[NFAPI_CC_MAX]; + uint64_t pusch_rx_num[NFAPI_CC_MAX]; + uint64_t pusch_rx_num_old[NFAPI_CC_MAX]; + uint64_t pusch_rx_error_num[NFAPI_CC_MAX]; + uint64_t pusch_rx_error_num_old[NFAPI_CC_MAX]; + double pusch_bler[NFAPI_CC_MAX]; + uint8_t mcs_offset[NFAPI_CC_MAX]; uint16_t feedback_cnt[NFAPI_CC_MAX]; uint16_t timing_advance; uint16_t timing_advance_r9; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 13d02f9407..774fac80eb 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2570,9 +2570,11 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, uint8_t total_rbs=0; uint8_t average_rbs; uint16_t first_rb[MAX_NUM_CCs]; - uint8_t mcs; + int8_t mcs; uint8_t snr; - uint8_t snr2mcs_offset = 0; + uint8_t snr2mcs_offset = 3; + double bler_filter=0.9; + double bler; uint8_t rb_table_index; uint8_t num_pucch_rb; uint32_t tbs; @@ -2666,16 +2668,61 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, } else { UE_template = &UE_info->UE_template[CC_id][UE_id]; - if ( UE_info->UE_sched_ctrl[UE_id].phr_received == 1 ) { - snr = (5 * UE_info->UE_sched_ctrl[UE_id].pusch_snr_amc[CC_id] - 640) / 10; - if((snr + snr2mcs_offset) >= 20) { - mcs = 20; - } - else if((snr + snr2mcs_offset) < 3) { - mcs = 3; + int32_t framex10psubframe = UE_template->pusch_bler_calc_frame*10+UE_template->pusch_bler_calc_subframe; + int pusch_bler_interval=100; + double total_bler; + + if(UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id] == 0 && UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] == 0) { + total_bler = 0; + } + else { + total_bler = (double)UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] / (double)(UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] + UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id]) * 100; + } + + if (((framex10psubframe+pusch_bler_interval)<=(frameP*10+subframeP)) || //normal case + ((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pusch_bler_interval)))) { //frame wrap-around + + UE_template->pusch_bler_calc_frame=frameP; + UE_template->pusch_bler_calc_subframe=subframeP; + + int pusch_rx_num_diff = UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id] - UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[CC_id]; + int pusch_rx_error_num_diff = UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] - UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[CC_id]; + + if((pusch_rx_num_diff == 0) && (pusch_rx_error_num_diff == 0)) { /* first rx case or no rx among interval time */ + bler = UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id]; } else { - mcs = snr + snr2mcs_offset; + bler = (double)pusch_rx_error_num_diff / (double)(pusch_rx_num_diff + pusch_rx_error_num_diff) * 100; + } + UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id] * bler_filter + bler * (1.0-bler_filter); + UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id]; + UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id]; + + if(bler < 0.5) { + if(UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] !=0) { + UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]--; + } + } + if(bler >= 2) { + UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]++; + if(UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] >= 20) { + UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]=20; + } + } + } + + if ( UE_info->UE_sched_ctrl[UE_id].phr_received == 1 ) { + snr = (5 * UE_info->UE_sched_ctrl[UE_id].pusch_snr_amc[CC_id] - 640) / 10; + mcs = snr - snr2mcs_offset; + if(mcs > 20) { + mcs = 20; + } + + if(mcs - UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] < 6) { + mcs = 6; + } + else { + mcs = mcs - UE_list->UE_sched_ctrl[UE_id].mcs_offset[CC_id]; } } else { mcs = 10; @@ -2689,19 +2736,13 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ul_total_buffer > 0 ) { rb_table_index = 2; tbs = get_TBS_UL(mcs,rb_table[rb_table_index]); - tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0); - - while ( (((UE_template->phr_info - tx_power) < 0 ) || (tbs > bytes_to_schedule)) && (mcs > 3) ) { - mcs--; - tbs = get_TBS_UL(mcs,rb_table[rb_table_index]); - tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0); - } + tx_power = (int8_t)(hundred_times_log10_NPRB[rb_table[rb_table_index] - 1] / 100); while ( (tbs < bytes_to_schedule) && (rb_table[rb_table_index]<(frame_parms->N_RB_UL-num_pucch_rb-first_rb[CC_id])) && ((UE_template->phr_info - tx_power) > 0) && (rb_table_index < 32 )) { rb_table_index++; tbs = get_TBS_UL(mcs,rb_table[rb_table_index]); - tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0); + tx_power = (int8_t)(hundred_times_log10_NPRB[rb_table[rb_table_index] - 1] / 100); } if ( rb_table[rb_table_index]<3 ) { @@ -2731,6 +2772,11 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = rb_table_index; UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs; } + + LOG_D(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d snr %d mcs %d mcs_offset %d bler %lf total_bler %lf ( %d %d ) rb_num %d phr_info %d tx_power %d bsr %d\n", + module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id, snr, mcs, UE_list->UE_sched_ctrl[UE_id].mcs_offset[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_bler[CC_id], + total_bler, UE_list->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id], rb_table[rb_table_index-1], UE_template->phr_info, tx_power, bytes_to_schedule); + } else { if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) { // assigne RBS( 6 RBs) @@ -3207,8 +3253,8 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, nfapi_hi_dci0_request_t *nfapi_hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP]; nfapi_hi_dci0_req->sfn_sf = frameP<<4|subframeP; // sfnsf_add_subframe(sched_frame, sched_subframeP, 0); // sunday! nfapi_hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST; - LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d\n", - harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,UE_template->mcs_UL[harq_pid],first_rb[CC_id],rb_table[rb_table_index],0); + LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n", + harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,UE_template->mcs_UL[harq_pid],first_rb[CC_id],rb_table[rb_table_index],0,UE_template->mcs_UL[harq_pid],(5 * UE_sched_ctrl->pusch_snr_amc[CC_id] - 640) / 10,UE_sched_ctrl->pusch_bler[CC_id]); ul_req_index = 0; dlsch_flag = 0; @@ -3358,8 +3404,9 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, hi_dci0_pdu->dci_pdu.dci_pdu_rel8.harq_pid = harq_pid; hi_dci0_req->number_of_dci++; // Add UL_config PDUs - LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d\n", - harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,mcs_rv,ulsch_ue_select[CC_id].list[ulsch_ue_num].start_rb,ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb,UE_sched_ctrl->round_UL[CC_id][harq_pid]); + LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n", + harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,mcs_rv,ulsch_ue_select[CC_id].list[ulsch_ue_num].start_rb,ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb,UE_sched_ctrl->round_UL[CC_id][harq_pid],UE_template->mcs_UL[harq_pid],(5 * UE_sched_ctrl->pusch_snr_amc[CC_id] - 640) / 10,UE_sched_ctrl->pusch_bler[CC_id]); + ul_req_index = 0; dlsch_flag = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index 95a5b48598..82b640e7d0 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2219,6 +2219,13 @@ add_new_ue(module_id_t mod_idP, UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_snr_amc[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].pusch_bler[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].mcs_offset[cc_idP] = 0; + for (j = 0; j < 8; j++) { UE_info->UE_template[cc_idP][UE_id].oldNDI[j] = 0; UE_info->UE_template[cc_idP][UE_id].oldNDI_UL[j] = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index d8a8983ac1..73e3465817 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -160,6 +160,8 @@ rx_sdu(const module_id_t enb_mod_idP, UE_scheduling_control->ul_inactivity_timer = 0; UE_scheduling_control->ul_failure_timer = 0; UE_scheduling_control->ul_scheduled &= (~(1 << harq_pid)); + UE_scheduling_control->pusch_rx_num[CC_idP]++; + /* Update with smoothing: 3/4 of old value and 1/4 of new. * This is the logic that was done in the function * lte_est_timing_advance_pusch, maybe it's not necessary? @@ -199,6 +201,7 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->scheduled_ul_bytes = 0; } } else { // sduP == NULL => error + UE_scheduling_control->pusch_rx_error_num[CC_idP]++; LOG_W(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", enb_mod_idP, harq_pid, diff --git a/openair2/LAYER2/MAC/mac.h b/openair2/LAYER2/MAC/mac.h index 3c15bd5ac9..09edd00a80 100644 --- a/openair2/LAYER2/MAC/mac.h +++ b/openair2/LAYER2/MAC/mac.h @@ -906,6 +906,11 @@ typedef struct { uint32_t pucch_tpc_tx_frame; uint32_t pucch_tpc_tx_subframe; + /// stores the frame where the last bler was calculated + uint32_t pusch_bler_calc_frame; + uint32_t pusch_bler_calc_subframe; + + uint8_t rach_resource_type; uint16_t mpdcch_repetition_cnt; frame_t Msg2_frame; @@ -963,6 +968,12 @@ typedef struct { uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; uint8_t pusch_snr_amc[NFAPI_CC_MAX]; + uint64_t pusch_rx_num[NFAPI_CC_MAX]; + uint64_t pusch_rx_num_old[NFAPI_CC_MAX]; + uint64_t pusch_rx_error_num[NFAPI_CC_MAX]; + uint64_t pusch_rx_error_num_old[NFAPI_CC_MAX]; + double pusch_bler[NFAPI_CC_MAX]; + uint8_t mcs_offset[NFAPI_CC_MAX]; uint16_t feedback_cnt[NFAPI_CC_MAX]; uint16_t timing_advance; uint16_t timing_advance_r9; From 05eb88f0685f5ef54996aecba45d21722b313958 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Fri, 14 Feb 2020 13:18:48 +0900 Subject: [PATCH 09/54] Fix scheduled_ul_bytes size remain when no crc report has come from L1. (cherry picked from commit ce10221c2761fb3058ccb77b73ba87f97d5e2cd2) --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 11 +++++++++++ openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 8 ++++++++ 2 files changed, 19 insertions(+) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 774fac80eb..78f837884f 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -3192,6 +3192,17 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, UE_template->mcs_UL[harq_pid]=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs); rb_table_index=5; // for PHR } + if( (UE_sched_ctrl->ul_scheduled | (1<0 ){ + UE_template->scheduled_ul_bytes -= UE_template->TBS_UL[harq_pid]; + + if (UE_template->scheduled_ul_bytes < 0) { + UE_template->scheduled_ul_bytes = 0; + } + UE_template->estimated_ul_buffer -= UE_template->TBS_UL[harq_pid]; + if (UE_template->estimated_ul_buffer < 0) { + UE_template->estimated_ul_buffer = 0; + } + } UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=UE_template->mcs_UL[harq_pid]; UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],rb_table[rb_table_index]); diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 73e3465817..ee9e002803 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -200,6 +200,10 @@ rx_sdu(const module_id_t enb_mod_idP, if (UE_template_ptr->scheduled_ul_bytes < 0) { UE_template_ptr->scheduled_ul_bytes = 0; } + UE_template_ptr->estimated_ul_buffer -= UE_template_ptr->TBS_UL[harq_pid]; + if (UE_template_ptr->estimated_ul_buffer < 0) { + UE_template_ptr->estimated_ul_buffer = 0; + } } else { // sduP == NULL => error UE_scheduling_control->pusch_rx_error_num[CC_idP]++; LOG_W(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", @@ -233,6 +237,10 @@ rx_sdu(const module_id_t enb_mod_idP, if (UE_template_ptr->scheduled_ul_bytes < 0) { UE_template_ptr->scheduled_ul_bytes = 0; } + UE_template_ptr->estimated_ul_buffer -= UE_template_ptr->TBS_UL[harq_pid]; + if (UE_template_ptr->estimated_ul_buffer < 0) { + UE_template_ptr->estimated_ul_buffer = 0; + } if (find_RA_id(enb_mod_idP, CC_idP, current_rnti) != -1) { cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti); From b573fd4dbd420208ab986ef3e96873a0cdda56c4 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Sat, 22 Feb 2020 15:01:54 +0900 Subject: [PATCH 10/54] Fix: The remaining UL buffer size is incorrectly calculated and UL scheduling does not occur. (scheduled_ul_bytes is not subtracted correctly when receiving NACK rarely.) (cherry picked from commit 2fb4823b57320c4c4e4d800ae9bb0570f18ad353) --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 1 - 1 file changed, 1 deletion(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 78f837884f..c5e8577873 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -3379,7 +3379,6 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, mcs_rv = 31; } - UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb); UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid]; if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) From 52dfba49cd4a0c466d51d6dfead2457db588af66 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Thu, 20 Feb 2020 19:59:02 +0900 Subject: [PATCH 11/54] Fix: smooth ULSCH AMC and TPC control. (cherry picked from commit 56720c68864f6b04409deb00676e59a41c8f050b) --- openair1/SCHED/phy_procedures_lte_eNb.c | 4 ++ openair2/LAYER2/MAC/defs.h | 2 +- openair2/LAYER2/MAC/eNB_scheduler.c | 4 +- openair2/LAYER2/MAC/eNB_scheduler_dlsch.c | 4 +- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 38 +++++++------------ openair2/LAYER2/MAC/eNB_scheduler_phytest.c | 3 +- .../LAYER2/MAC/eNB_scheduler_primitives.c | 6 +-- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 26 +++++-------- openair2/LAYER2/MAC/mac.h | 2 +- 9 files changed, 39 insertions(+), 50 deletions(-) diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index f2a246fbc3..ac31326d9c 100644 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -1606,6 +1606,10 @@ void fill_rx_indication(PHY_VARS_eNB *eNB, pdu->rx_indication_rel8.timing_advance = timing_advance_update; // estimate UL_CQI for MAC (from antenna port 0 only) int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_interference_power[0]); + + if(dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) > 500) { + SNRtimes10 = 300; + } if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi = 0; diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h index a16b145039..58f50a84ea 100644 --- a/openair2/LAYER2/MAC/defs.h +++ b/openair2/LAYER2/MAC/defs.h @@ -834,9 +834,9 @@ typedef struct { uint8_t pucch2_snr[NFAPI_CC_MAX]; uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; uint8_t pucch3_snr[NFAPI_CC_MAX]; + uint8_t pusch_cqi[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; - uint8_t pusch_snr_amc[NFAPI_CC_MAX]; uint64_t pusch_rx_num[NFAPI_CC_MAX]; uint64_t pusch_rx_num_old[NFAPI_CC_MAX]; uint64_t pusch_rx_error_num[NFAPI_CC_MAX]; diff --git a/openair2/LAYER2/MAC/eNB_scheduler.c b/openair2/LAYER2/MAC/eNB_scheduler.c index b2bd428e89..dd68cb8097 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler.c +++ b/openair2/LAYER2/MAC/eNB_scheduler.c @@ -601,8 +601,8 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync", UE_info->UE_template[CC_id][UE_id].phr_info, UE_scheduling_control->dl_cqi[CC_id], - (5 * UE_scheduling_control->pusch_snr_avg[CC_id] - 640) / 10, - (5 * UE_scheduling_control->pucch1_snr[CC_id] - 640) / 10); + UE_scheduling_control->pusch_snr_avg[CC_id], + UE_scheduling_control->pucch1_snr[CC_id]); } RC.eNB[module_idP][CC_id]->pusch_stats_bsr[UE_id][(frameP * 10) + subframeP] = -63; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c b/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c index 1f99f50ece..455b8142d3 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c @@ -1050,7 +1050,7 @@ schedule_ue_spec(module_id_t module_idP, // this is the snr // unit is not dBm, it's special from nfapi // converting to dBm - int snr = (5 * ue_sched_ctrl->pucch1_snr[CC_id] - 640) / 10; + int snr = ue_sched_ctrl->pucch1_snr[CC_id]; int target_snr = eNB->puCch10xSnr / 10; // this assumes accumulated tpc // make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out @@ -1684,7 +1684,7 @@ schedule_ue_spec_br(module_id_t module_idP, /* Do PUCCH power control */ /* This is the snr */ /* unit is not dBm, it's special from nfapi, convert to dBm */ - snr = (5 * ue_sched_ctl->pucch1_snr[CC_id] - 640) / 10; + snr = ue_sched_ctl->pucch1_snr[CC_id]; target_snr = mac->puCch10xSnr / 10; /* This assumes accumulated tpc */ /* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */ diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index c5e8577873..8dc7c36b8c 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -1998,8 +1998,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP, // this is the snr eNB_UE_stats = &UE_info->eNB_UE_stats[CC_id][UE_id]; /* Unit is not dBm, it's special from nfapi */ - snr = (5 * ue_sched_ctl->pucch1_snr[CC_id] - 640) / 10; - target_snr = eNB->puCch10xSnr / 10; + snr = ue_sched_ctl->pucch1_snr[CC_id]; + target_snr = eNB->puCch10xSnr/10; // this assumes accumulated tpc // make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out int32_t framex10psubframe = UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_frame*10+UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe; @@ -2669,7 +2669,7 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, UE_template = &UE_info->UE_template[CC_id][UE_id]; int32_t framex10psubframe = UE_template->pusch_bler_calc_frame*10+UE_template->pusch_bler_calc_subframe; - int pusch_bler_interval=100; + int pusch_bler_interval=50; double total_bler; if(UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id] == 0 && UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] == 0) { @@ -2711,21 +2711,11 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, } } - if ( UE_info->UE_sched_ctrl[UE_id].phr_received == 1 ) { - snr = (5 * UE_info->UE_sched_ctrl[UE_id].pusch_snr_amc[CC_id] - 640) / 10; - mcs = snr - snr2mcs_offset; - if(mcs > 20) { - mcs = 20; - } - - if(mcs - UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] < 6) { - mcs = 6; - } - else { - mcs = mcs - UE_list->UE_sched_ctrl[UE_id].mcs_offset[CC_id]; - } - } else { - mcs = 10; + snr = UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[CC_id]; + + mcs = 20 - UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]; + if(mcs < 6) { + mcs = 6; } if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_FIRST ) { @@ -2773,9 +2763,9 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs; } - LOG_D(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d snr %d mcs %d mcs_offset %d bler %lf total_bler %lf ( %d %d ) rb_num %d phr_info %d tx_power %d bsr %d\n", - module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id, snr, mcs, UE_list->UE_sched_ctrl[UE_id].mcs_offset[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_bler[CC_id], - total_bler, UE_list->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id], rb_table[rb_table_index-1], UE_template->phr_info, tx_power, bytes_to_schedule); + LOG_D(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d snr %d snr_inst %d mcs %d mcs_offset %d bler %lf total_bler %lf ( %d %d ) rb_num %d phr_info %d tx_power %d bsr %d estimated_ul_buffer %d scheduled_ul_bytes %d\n", + module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id, snr, UE_list->UE_sched_ctrl[UE_id].pusch_snr[CC_id], mcs, UE_list->UE_sched_ctrl[UE_id].mcs_offset[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_bler[CC_id], + total_bler, UE_list->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id], rb_table[rb_table_index-1], UE_template->phr_info, tx_power, bytes_to_schedule, UE_template->estimated_ul_buffer, UE_template->scheduled_ul_bytes); } else { if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) { @@ -3140,7 +3130,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, //power control //compute the expected ULSCH RX power (for the stats) // this is the normalized RX power and this should be constant (regardless of mcs - snr = (5 * UE_sched_ctrl->pusch_snr_avg[CC_id] - 640) / 10; + snr = UE_sched_ctrl->pusch_snr_avg[CC_id]; target_snr = eNB->puSch10xSnr / 10; // this assumes accumulated tpc // make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out @@ -3265,7 +3255,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, nfapi_hi_dci0_req->sfn_sf = frameP<<4|subframeP; // sfnsf_add_subframe(sched_frame, sched_subframeP, 0); // sunday! nfapi_hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST; LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n", - harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,UE_template->mcs_UL[harq_pid],first_rb[CC_id],rb_table[rb_table_index],0,UE_template->mcs_UL[harq_pid],(5 * UE_sched_ctrl->pusch_snr_amc[CC_id] - 640) / 10,UE_sched_ctrl->pusch_bler[CC_id]); + harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,UE_template->mcs_UL[harq_pid],first_rb[CC_id],rb_table[rb_table_index],0,UE_template->mcs_UL[harq_pid],UE_sched_ctrl->pusch_snr_avg[CC_id],UE_sched_ctrl->pusch_bler[CC_id]); ul_req_index = 0; dlsch_flag = 0; @@ -3415,7 +3405,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, hi_dci0_req->number_of_dci++; // Add UL_config PDUs LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n", - harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,mcs_rv,ulsch_ue_select[CC_id].list[ulsch_ue_num].start_rb,ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb,UE_sched_ctrl->round_UL[CC_id][harq_pid],UE_template->mcs_UL[harq_pid],(5 * UE_sched_ctrl->pusch_snr_amc[CC_id] - 640) / 10,UE_sched_ctrl->pusch_bler[CC_id]); + harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,mcs_rv,ulsch_ue_select[CC_id].list[ulsch_ue_num].start_rb,ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb,UE_sched_ctrl->round_UL[CC_id][harq_pid],UE_template->mcs_UL[harq_pid],UE_sched_ctrl->pusch_snr_avg[CC_id],UE_sched_ctrl->pusch_bler[CC_id]); ul_req_index = 0; dlsch_flag = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_phytest.c b/openair2/LAYER2/MAC/eNB_scheduler_phytest.c index 689db8e208..8bd3ebdd9b 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_phytest.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_phytest.c @@ -238,7 +238,8 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s //power control //compute the expected ULSCH RX power (for the stats) // this is the snr and this should be constant (regardless of mcs) - snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10; + snr = UE_sched_ctrl->pusch_snr[CC_id]; + // new transmission ndi = 1-UE_template->oldNDI_UL[harq_pid]; UE_template->oldNDI_UL[harq_pid]=ndi; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index 82b640e7d0..f7bdc634cc 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2217,8 +2217,8 @@ add_new_ue(module_id_t mod_idP, UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0; UE_info->UE_sched_ctrl[UE_id].ta_update = 31; UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; - UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = 0; - UE_info->UE_sched_ctrl[UE_id].pusch_snr_amc[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (eNB->puSch10xSnr+640)/5; + UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = eNB->puSch10xSnr/10; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0; @@ -5173,7 +5173,7 @@ harq_indication(module_id_t mod_idP, /* don't care about cqi reporting if NACK/DTX is there */ if (channel == 0 && !nack_or_dtx_reported(cc, harq_pdu)) { - sched_ctl->pucch1_snr[CC_idP] = ul_cqi; + sched_ctl->pucch1_snr[CC_idP] = (5 * ul_cqi - 640) / 10; sched_ctl->pucch1_cqi_update[CC_idP] = 1; } diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index ee9e002803..403680e1b0 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -168,22 +168,16 @@ rx_sdu(const module_id_t enb_mod_idP, * maybe it's even not correct at all? */ UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; - UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; + UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10; - double snr_filter_tpc=0.75; - if(UE_scheduling_control->pusch_snr_avg[CC_idP] == 0) { - UE_scheduling_control->pusch_snr_avg[CC_idP] = ul_cqi; - } - else { - UE_scheduling_control->pusch_snr_avg[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr_avg[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc)); - } - - double snr_filter_amc=0.5; - if(UE_scheduling_control->pusch_snr_amc[CC_idP] == 0) { - UE_scheduling_control->pusch_snr_amc[CC_idP] = ul_cqi; - } - else { - UE_scheduling_control->pusch_snr_amc[CC_idP] = (int)((double)UE_scheduling_control->pusch_snr_amc[CC_idP] * snr_filter_amc + (double)ul_cqi * (1-snr_filter_amc)); + if(UE_scheduling_control->pusch_snr[CC_idP] > 0 || UE_scheduling_control->pusch_snr[CC_idP] < 63) { + double snr_filter_tpc=0.9; + int snr_thres_tpc=30; + int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP]; + if(abs(diff) < snr_thres_tpc) { + UE_scheduling_control->pusch_cqi[CC_idP] = (int)((double)UE_scheduling_control->pusch_cqi[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc)); + UE_scheduling_control->pusch_snr_avg[CC_idP] = (5 * UE_scheduling_control->pusch_cqi[CC_idP] - 640) / 10; + } } UE_scheduling_control->ul_consecutive_errors = 0; @@ -2013,7 +2007,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP, cqi_req = 0; /* Power control: compute the expected ULSCH RX snr (for the stats) */ /* This is the normalized snr and this should be constant (regardless of mcs) */ - snr = (5 * UE_sched_ctrl->pusch_snr_avg[CC_id] - 640) / 10; + snr = UE_sched_ctrl->pusch_snr_avg[CC_id]; target_snr = eNB->puSch10xSnr / 10; /* TODO: target_rx_power was 178, what to put? */ /* This assumes accumulated tpc */ /* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */ diff --git a/openair2/LAYER2/MAC/mac.h b/openair2/LAYER2/MAC/mac.h index 09edd00a80..3ba4506fe7 100644 --- a/openair2/LAYER2/MAC/mac.h +++ b/openair2/LAYER2/MAC/mac.h @@ -965,9 +965,9 @@ typedef struct { uint8_t pucch2_snr[NFAPI_CC_MAX]; uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; uint8_t pucch3_snr[NFAPI_CC_MAX]; + uint8_t pusch_cqi[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; - uint8_t pusch_snr_amc[NFAPI_CC_MAX]; uint64_t pusch_rx_num[NFAPI_CC_MAX]; uint64_t pusch_rx_num_old[NFAPI_CC_MAX]; uint64_t pusch_rx_error_num[NFAPI_CC_MAX]; From 179775b72cf00c332526e643e35cd8e7c6dd5789 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Wed, 4 Mar 2020 19:30:34 +0900 Subject: [PATCH 12/54] Temporary: change tpc filter. (cherry picked from commit d82fc4805ef9032c9bfd9705fef702a6e130f7b2) # Conflicts: # openair2/LAYER2/MAC/eNB_scheduler_fairRR.c --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 2 +- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 8dc7c36b8c..4d37495a43 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -3135,7 +3135,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, // this assumes accumulated tpc // make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out int32_t framex10psubframe = UE_template->pusch_tpc_tx_frame*10+UE_template->pusch_tpc_tx_subframe; - int pusch_tpc_interval=10; + int pusch_tpc_interval=500; if (((framex10psubframe+pusch_tpc_interval)<=(frameP*10+subframeP)) || //normal case ((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pusch_tpc_interval)))) { //frame wrap-around diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 403680e1b0..b4d7d7bbef 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -171,7 +171,7 @@ rx_sdu(const module_id_t enb_mod_idP, UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10; if(UE_scheduling_control->pusch_snr[CC_idP] > 0 || UE_scheduling_control->pusch_snr[CC_idP] < 63) { - double snr_filter_tpc=0.9; + double snr_filter_tpc=0.7; int snr_thres_tpc=30; int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP]; if(abs(diff) < snr_thres_tpc) { From 4cce76382af810575cc2d22aec2b905974db871f Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Mon, 23 Mar 2020 13:45:57 +0900 Subject: [PATCH 13/54] Fix assertion in ulsch dem (cherry picked from commit dcd188e961422194c9c85636ea7c74ca0cc5101d) --- openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index 62fabc87af..468cb77ec9 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -1064,11 +1064,12 @@ void rx_ulsch(PHY_VARS_eNB *eNB, if (deltaMCS==1) { // Note we're using TBS instead of sumKr, since didn't run segmentation yet! MPR_times_100Ks = 500*ulsch[UE_id]->harq_processes[harq_pid]->TBS/(ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*4*ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch); - AssertFatal(MPR_times_100Ks < 750 && MPR_times_100Ks >= 0,"Impossible value for MPR_times_100Ks %d (TBS %d,Nre %d)\n", - MPR_times_100Ks,ulsch[UE_id]->harq_processes[harq_pid]->TBS, - (ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*4*ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch)); - if (MPR_times_100Ks > 0) correction_factor = ulsch_power_LUT[MPR_times_100Ks]; + if ((MPR_times_100Ks > 0)&&(MPR_times_100Ks < 750)){ + correction_factor = ulsch_power_LUT[MPR_times_100Ks]; + }else{ + correction_factor = 1; + } } for (i=0; inb_antennas_rx; i++) { From 934cc715f8568578b64d39977b58993c344edb95 Mon Sep 17 00:00:00 2001 From: Kuroiwa Kenichi Date: Tue, 17 Mar 2020 21:00:48 +0900 Subject: [PATCH 14/54] Initialize scheduled_ul_bytes (cherry picked from commit b0d6c5150db520bd7840d1604c3f82a0b59bc218) --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 5 ++++- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 10 ++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 4d37495a43..00bcaf6032 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2458,7 +2458,10 @@ void ulsch_scheduler_pre_ue_select_fairRR( UE_sched_ctl = &UE_info->UE_sched_ctrl[UE_id]; int bytes_to_schedule = UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer - UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes; - if (bytes_to_schedule < 0) bytes_to_schedule = 0; + if (bytes_to_schedule < 0) { + bytes_to_schedule = 0; + UE_list->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0; + } rrc_status = mac_eNB_get_rrc_status(module_idP, rnti); if ( (bytes_to_schedule > 0) || (UE_info->UE_template[CC_id][UE_id].ul_SR > 0) || diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index b4d7d7bbef..9116608037 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -553,6 +553,8 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->ul_buffer_info[LCGID1] + UE_template_ptr->ul_buffer_info[LCGID2] + UE_template_ptr->ul_buffer_info[LCGID3]; + UE_template_ptr->scheduled_ul_bytes = 0; + RC.eNB[enb_mod_idP][CC_idP]->pusch_stats_bsr[UE_id][(frameP * 10) + subframeP] = (payload_ptr[0] & 0x3f); if (UE_id == UE_info->list.head) { @@ -598,6 +600,8 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->ul_buffer_info[LCGID1] + UE_template_ptr->ul_buffer_info[LCGID2] + UE_template_ptr->ul_buffer_info[LCGID3]; + UE_template_ptr->scheduled_ul_bytes = 0; + LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d: Received long BSR. Size is LCGID0 = %u LCGID1 = %u LCGID2 = %u LCGID3 = %u\n", enb_mod_idP, CC_idP, @@ -794,6 +798,9 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->ul_buffer_info[1] + UE_template_ptr->ul_buffer_info[2] + UE_template_ptr->ul_buffer_info[3]; + if (UE_template_ptr->estimated_ul_buffer == 0) { + UE_template_ptr->scheduled_ul_bytes = 0; + } //UE_template_ptr->estimated_ul_buffer += UE_template_ptr->estimated_ul_buffer / 4; } @@ -859,6 +866,9 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->ul_buffer_info[1] + UE_template_ptr->ul_buffer_info[2] + UE_template_ptr->ul_buffer_info[3]; + if (UE_template_ptr->estimated_ul_buffer == 0) { + UE_template_ptr->scheduled_ul_bytes = 0; + } } if ((rx_lengths[i] < SCH_PAYLOAD_SIZE_MAX) && (rx_lengths[i] > 0)) { // MAX SIZE OF transport block From 7a89100a9f10f7361dfdb9d74a64a07ebaa21a1b Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Thu, 5 Mar 2020 13:02:26 +0900 Subject: [PATCH 15/54] fix compilation. --- openair2/LAYER2/MAC/eNB_scheduler_primitives.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index f7bdc634cc..c8904ef9a3 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2217,8 +2217,8 @@ add_new_ue(module_id_t mod_idP, UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0; UE_info->UE_sched_ctrl[UE_id].ta_update = 31; UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; - UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (eNB->puSch10xSnr+640)/5; - UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = eNB->puSch10xSnr/10; + UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (RC.mac[mod_idP]->puSch10xSnr+640)/5; + UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = RC.mac[mod_idP]->puSch10xSnr/10; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0; From 80f83843f04b390825d3c298970f956e51924bfc Mon Sep 17 00:00:00 2001 From: Kuroiwa Kenichi Date: Thu, 19 Mar 2020 18:47:35 +0900 Subject: [PATCH 16/54] Initialize scheduled_ul_bytes (cherry picked from commit 4a18e26f8c1dfb80a5af2fac4104b06b648a598c) --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 00bcaf6032..5072f9df06 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2332,7 +2332,10 @@ void ulsch_scheduler_pre_ue_select_fairRR( // int bytes_to_schedule = UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer - UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes; - if (bytes_to_schedule < 0) bytes_to_schedule = 0; + if (bytes_to_schedule < 0) { + bytes_to_schedule = 0; + UE_list->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0; + } if ( UE_id > last_ulsch_ue_id[CC_id] && ((ulsch_ue_select[CC_id].ue_num+ue_first_num[CC_id]) < ulsch_ue_max_num[CC_id]) ) { if ( bytes_to_schedule > 0 ) { @@ -2724,7 +2727,10 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_FIRST ) { int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes; - if (bytes_to_schedule < 0) bytes_to_schedule = 0; + if (bytes_to_schedule < 0) { + bytes_to_schedule = 0; + UE_template->scheduled_ul_bytes = 0; + } if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ul_total_buffer > 0 ) { rb_table_index = 2; @@ -3088,7 +3094,10 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, module_idP,frameP,subframeP,harq_pid,UE_id,rnti,CC_id, aggregation,N_RB_UL); int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes; - if (bytes_to_schedule < 0) bytes_to_schedule = 0; + if (bytes_to_schedule < 0) { + bytes_to_schedule = 0; + UE_template->scheduled_ul_bytes = 0; + } RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = bytes_to_schedule; VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO,RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP]); From 76998f7d755521d30e16a81fd06fabea9ed279a0 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Wed, 18 Mar 2020 13:24:28 +0900 Subject: [PATCH 17/54] Fix: signal_power and interference_power issue from DRS. SHA-1: 9bb7664a234535b01518977440b3c4f3d14a8ee3 SHA-1: c299d006d833e8ffc6c01039feaeda2e7b1598cc --- openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index 468cb77ec9..87651251c8 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -1073,10 +1073,17 @@ void rx_ulsch(PHY_VARS_eNB *eNB, } for (i=0; inb_antennas_rx; i++) { + //symbol 3 + int symbol_offset = frame_parms->N_RB_UL*12*(3 - frame_parms->Ncp); + pusch_vars->ulsch_interference_power[i] = interference_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); + pusch_vars->ulsch_power[i] = signal_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); + //symbol 3+7 + symbol_offset = frame_parms->N_RB_UL*12*((3 - frame_parms->Ncp)+(7-frame_parms->Ncp)); + pusch_vars->ulsch_interference_power[i] += interference_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); + pusch_vars->ulsch_power[i] += signal_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); - - pusch_vars->ulsch_interference_power[i] = interference_power(pusch_vars->drs_ch_estimates[i],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)/correction_factor; - pusch_vars->ulsch_power[i] = signal_power(pusch_vars->drs_ch_estimates[i],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)/correction_factor; + pusch_vars->ulsch_interference_power[i] = pusch_vars->ulsch_interference_power[i]/correction_factor; + pusch_vars->ulsch_power[i] = pusch_vars->ulsch_power[i]/correction_factor; if(pusch_vars->ulsch_power[i]>0x20000000){ pusch_vars->ulsch_power[i] = 0x20000000; From 6103d9ec551a57f34a6e5ba71359d77d5a90c263 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Fri, 27 Mar 2020 21:17:12 +0900 Subject: [PATCH 18/54] Fix: calculate signal_power and interference_power per symbol from DMRS. --- openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index 87651251c8..7a600c536e 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -1081,7 +1081,10 @@ void rx_ulsch(PHY_VARS_eNB *eNB, symbol_offset = frame_parms->N_RB_UL*12*((3 - frame_parms->Ncp)+(7-frame_parms->Ncp)); pusch_vars->ulsch_interference_power[i] += interference_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); pusch_vars->ulsch_power[i] += signal_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); - + //ave + pusch_vars->ulsch_interference_power[i] >>= 1; + pusch_vars->ulsch_power[i] >>= 1; + pusch_vars->ulsch_interference_power[i] = pusch_vars->ulsch_interference_power[i]/correction_factor; pusch_vars->ulsch_power[i] = pusch_vars->ulsch_power[i]/correction_factor; From d00297aeb96f55c82b252b71f3cccd71293b87c6 Mon Sep 17 00:00:00 2001 From: zhenghuangkun Date: Mon, 20 Apr 2020 12:34:24 +0900 Subject: [PATCH 19/54] Modify UL timer and CQI timer to 64 subframe --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 5072f9df06..c891fa83d3 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2355,9 +2355,9 @@ void ulsch_scheduler_pre_ue_select_fairRR( UE_sched_ctl = &UE_info->UE_sched_ctrl[UE_id]; rrc_status = mac_eNB_get_rrc_status(module_idP, rnti); - if ( ((UE_sched_ctl->ul_inactivity_timer>20)&&(UE_sched_ctl->ul_scheduled==0)) || + if ( ((UE_sched_ctl->ul_inactivity_timer>64)&&(UE_sched_ctl->ul_scheduled==0)) || ((UE_sched_ctl->ul_inactivity_timer>10)&&(UE_sched_ctl->ul_scheduled==0)&&(rrc_status < RRC_CONNECTED)) || - ((UE_sched_ctl->cqi_req_timer>300)&&((rrc_status >= RRC_CONNECTED))) ) { + ((UE_sched_ctl->cqi_req_timer>64)&&((rrc_status >= RRC_CONNECTED))) ) { first_ue_id[CC_id][ue_first_num[CC_id]]= UE_id; first_ue_total[CC_id] [ue_first_num[CC_id]] = 0; ue_first_num[CC_id]++; @@ -2468,9 +2468,9 @@ void ulsch_scheduler_pre_ue_select_fairRR( rrc_status = mac_eNB_get_rrc_status(module_idP, rnti); if ( (bytes_to_schedule > 0) || (UE_info->UE_template[CC_id][UE_id].ul_SR > 0) || - ((UE_sched_ctl->ul_inactivity_timer>20)&&(UE_sched_ctl->ul_scheduled==0)) || + ((UE_sched_ctl->ul_inactivity_timer>64)&&(UE_sched_ctl->ul_scheduled==0)) || ((UE_sched_ctl->ul_inactivity_timer>10)&&(UE_sched_ctl->ul_scheduled==0)&&(rrc_status < RRC_CONNECTED)) || - ((UE_sched_ctl->cqi_req_timer>300)&&((rrc_status >= RRC_CONNECTED))) ) { + ((UE_sched_ctl->cqi_req_timer>64)&&((rrc_status >= RRC_CONNECTED))) ) { hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi]; format_flag = 2; aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); From df5e22efeeac9d7721efac562e2ca35ba1b75e4c Mon Sep 17 00:00:00 2001 From: zhenghuangkun Date: Mon, 20 Apr 2020 16:33:54 +0900 Subject: [PATCH 20/54] Modify CQI timer to 64 subframe --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index c891fa83d3..e6ea56d629 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -3111,7 +3111,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, UE_sched_ctrl->cqi_received = 0; UE_sched_ctrl->cqi_req_timer = 0; cqi_req = 0; - }else if (UE_sched_ctrl->cqi_req_timer>30) { + }else if (UE_sched_ctrl->cqi_req_timer>64) { cqi_req = 1; // To be safe , do not ask CQI in special SFs:36.213/7.2.3 CQI definition From 548eaae610a32fb6d5a7c1c91f88339dc5623082 Mon Sep 17 00:00:00 2001 From: Ding Yumei Date: Wed, 13 May 2020 12:34:23 +0900 Subject: [PATCH 21/54] fix Msg3 PHICH issue and C-RNTI DRB active issue --- openair2/LAYER2/MAC/eNB_scheduler_RA.c | 10 +++++----- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 17 +++++++++++++++++ openair2/RRC/LTE/rrc_eNB.c | 6 ++++++ 3 files changed, 28 insertions(+), 5 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_RA.c b/openair2/LAYER2/MAC/eNB_scheduler_RA.c index d1365b9ac3..35082260f8 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_RA.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_RA.c @@ -212,12 +212,12 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t *ra, frame_t frameP, hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl); hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST; - if (NFAPI_MODE != NFAPI_MONOLITHIC) { - oai_nfapi_hi_dci0_req(hi_dci0_req); - hi_dci0_req_body->number_of_hi=0; - } + //if (NFAPI_MODE != NFAPI_MONOLITHIC) { + // oai_nfapi_hi_dci0_req(hi_dci0_req); + // hi_dci0_req_body->number_of_hi=0; + //} - LOG_D(MAC, "MSG3: HI_DCI0 SFN/SF:%d number_of_dci:%d number_of_hi:%d\n", NFAPI_SFNSF2DEC(hi_dci0_req->sfn_sf), hi_dci0_req_body->number_of_dci, hi_dci0_req_body->number_of_hi); + //LOG_D(MAC, "MSG3: HI_DCI0 SFN/SF:%d number_of_dci:%d number_of_hi:%d\n", NFAPI_SFNSF2DEC(hi_dci0_req->sfn_sf), hi_dci0_req_body->number_of_dci, hi_dci0_req_body->number_of_hi); // save UL scheduling information for preprocessor for (j = 0; j < ra->msg3_nb_rb; j++) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 9116608037..da2843161a 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -312,6 +312,23 @@ rx_sdu(const module_id_t enb_mod_idP, if (ra->msg3_round >= mac->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx - 1) { cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti); + nfapi_hi_dci0_request_t *hi_dci0_req = NULL; + uint8_t sf_ahead_dl = ul_subframe2_k_phich(&mac->common_channels[CC_idP], subframeP); + hi_dci0_req = &mac->HI_DCI0_req[CC_idP][(subframeP + sf_ahead_dl) % 10]; + nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body; + nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi]; + memset((void *) hi_dci0_pdu, 0, sizeof(nfapi_hi_dci0_request_pdu_t)); + hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE; + hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_hi_pdu); + hi_dci0_pdu->hi_pdu.hi_pdu_rel8.tl.tag = NFAPI_HI_DCI0_REQUEST_HI_PDU_REL8_TAG; + hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = first_rb; + hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0; + hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0; + hi_dci0_req_body->number_of_hi++; + hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP, subframeP, 0); + hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG; + hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl); + hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST; } else { if (ra->rach_resource_type > 0) { cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti); // TODO: Currently we don't support retransmission of Msg3 ( If in error Cancel RA procedure and reattach) diff --git a/openair2/RRC/LTE/rrc_eNB.c b/openair2/RRC/LTE/rrc_eNB.c index 18b7173a08..937f3c8f46 100644 --- a/openair2/RRC/LTE/rrc_eNB.c +++ b/openair2/RRC/LTE/rrc_eNB.c @@ -6711,6 +6711,7 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete( ); } } else { // remove LCHAN from MAC/PHY +#if 0 if (ue_context_pP->ue_context.DRB_active[drb_id] == 1) { // DRB has just been removed so remove RLC + PDCP for DRB /* rrc_pdcp_config_req (ctxt_pP->module_id, frameP, 1, CONFIG_ACTION_REMOVE, @@ -6727,6 +6728,11 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete( } ue_context_pP->ue_context.DRB_active[drb_id] = 0; +#endif + if (DRB_configList->list.array[i]->logicalChannelIdentity) { + DRB2LCHAN[i] = (uint8_t) * DRB_configList->list.array[i]->logicalChannelIdentity; + } + LOG_D(RRC, PROTOCOL_RRC_CTXT_UE_FMT" RRC_eNB --- MAC_CONFIG_REQ (DRB) ---> MAC_eNB\n", PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP)); From fbd0156a8f743e2ebb8775d6f59c0ccb8d4d9134 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Wed, 20 May 2020 15:36:15 +0900 Subject: [PATCH 22/54] Add pusch signal threshold to config file. (cherry picked from commit 6f3d14e74663e75f2eaf3cd1c1348d5d028e3379) --- openair1/PHY/defs_eNB.h | 1 + openair1/SCHED/phy_procedures_lte_eNb.c | 2 +- openair2/ENB_APP/L1_paramdef.h | 5 ++++- openair2/ENB_APP/enb_config.c | 4 ++++ 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/openair1/PHY/defs_eNB.h b/openair1/PHY/defs_eNB.h index b3f7e1ef70..3505733ecb 100644 --- a/openair1/PHY/defs_eNB.h +++ b/openair1/PHY/defs_eNB.h @@ -667,6 +667,7 @@ typedef struct PHY_VARS_eNB_s { int32_t pusch_stats_bsr[NUMBER_OF_UE_MAX][10240]; int32_t pusch_stats_BO[NUMBER_OF_UE_MAX][10240]; uint8_t *FS6bufferZone; + int32_t pusch_signal_threshold; } PHY_VARS_eNB; diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index ac31326d9c..4cc5ebc143 100644 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -1607,7 +1607,7 @@ void fill_rx_indication(PHY_VARS_eNB *eNB, // estimate UL_CQI for MAC (from antenna port 0 only) int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_interference_power[0]); - if(dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) > 500) { + if(dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) > eNB->pusch_signal_threshold) { SNRtimes10 = 300; } diff --git a/openair2/ENB_APP/L1_paramdef.h b/openair2/ENB_APP/L1_paramdef.h index 72e77c3800..6c303ae29f 100644 --- a/openair2/ENB_APP/L1_paramdef.h +++ b/openair2/ENB_APP/L1_paramdef.h @@ -61,6 +61,7 @@ #define CONFIG_STRING_L1_PRACH_DTX_EMTC3_THRESHOLD "prach_dtx_emtc3_threshold" #define CONFIG_STRING_L1_PUCCH1_DTX_EMTC3_THRESHOLD "pucch1_dtx_emtc3_threshold" #define CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD "pucch1ab_dtx_emtc3_threshold" +#define CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD "pusch_signal_threshold" /*----------------------------------------------------------------------------------------------------------------------------------------------------*/ /* L1 configuration parameters */ /* optname helpstr paramflags XXXptr defXXXval type numelt */ @@ -89,7 +90,8 @@ {CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC2_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \ {CONFIG_STRING_L1_PRACH_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \ {CONFIG_STRING_L1_PUCCH1_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ - {CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0} \ +{CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \ +{CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD, NULL, 0, iptr:NULL, defintval:330, TYPE_INT, 0} \ } #define L1_CC_IDX 0 #define L1_TRANSPORT_N_PREFERENCE_IDX 1 @@ -115,6 +117,7 @@ #define L1_PRACH_DTX_EMTC3_THRESHOLD_IDX 21 #define L1_PUCCH1_DTX_EMTC3_THRESHOLD_IDX 22 #define L1_PUCCH1AB_DTX_EMTC3_THRESHOLD_IDX 23 +#define L1_PUSCH_SIGNAL_THRESHOLD_IDX 28 /*----------------------------------------------------------------------------------------------------------------------------------------------------*/ #endif diff --git a/openair2/ENB_APP/enb_config.c b/openair2/ENB_APP/enb_config.c index de77d783c7..978c2b9f23 100644 --- a/openair2/ENB_APP/enb_config.c +++ b/openair2/ENB_APP/enb_config.c @@ -170,6 +170,10 @@ void RCconfig_L1(void) { RC.eNB[j][0]->pucch1_DTX_threshold_emtc[ce_level] = *(L1_ParamList.paramarray[j][L1_PUCCH1_DTX_EMTC0_THRESHOLD_IDX+ce_level].iptr); RC.eNB[j][0]->pucch1ab_DTX_threshold_emtc[ce_level] = *(L1_ParamList.paramarray[j][L1_PUCCH1AB_DTX_EMTC0_THRESHOLD_IDX+ce_level].iptr); } + + + RC.eNB[j][0]->pusch_signal_threshold = *(L1_ParamList.paramarray[j][L1_PUSCH_SIGNAL_THRESHOLD_IDX].iptr); + LOG_I(ENB_APP,"PUSCH singal threshold = %d \n",RC.eNB[j][0]->pusch_signal_threshold); }// j=0..num_inst LOG_I(ENB_APP,"Initializing northbound interface for L1\n"); From 9ad810bab4292d4c92679a6d607f612b67be51be Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Wed, 20 May 2020 15:42:11 +0900 Subject: [PATCH 23/54] Fix ul_cqi and tpc filtering. (cherry picked from commit 120ea0950e1f52c1c5dd1d0dd4f7080e66d7ee93) --- openair2/LAYER2/MAC/defs.h | 2 ++ openair2/LAYER2/MAC/eNB_scheduler_dlsch.c | 2 ++ openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 1 + openair2/LAYER2/MAC/eNB_scheduler_primitives.c | 6 ++++-- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 6 ++++-- openair2/LAYER2/MAC/mac.h | 2 ++ 6 files changed, 15 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h index 58f50a84ea..654fb4b228 100644 --- a/openair2/LAYER2/MAC/defs.h +++ b/openair2/LAYER2/MAC/defs.h @@ -815,6 +815,7 @@ typedef struct { uint16_t pre_nb_available_rbs[MAX_NUM_CCs]; unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX]; uint16_t ta_timer; + double ta_update_f; int16_t ta_update; uint16_t ul_consecutive_errors; int32_t context_active_timer; @@ -834,6 +835,7 @@ typedef struct { uint8_t pucch2_snr[NFAPI_CC_MAX]; uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; uint8_t pucch3_snr[NFAPI_CC_MAX]; + double pusch_cqi_f[NFAPI_CC_MAX]; uint8_t pusch_cqi[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c b/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c index 455b8142d3..b516b04e03 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c @@ -821,6 +821,7 @@ schedule_ue_spec(module_id_t module_idP, /* reset ta_update */ ue_sched_ctrl->ta_update = 31; + ue_sched_ctrl->ta_update_f = 31.0; } int ta_len = (ta_update != 31) ? 2 : 0; @@ -1366,6 +1367,7 @@ schedule_ue_spec_br(module_id_t module_idP, /* Reset ta_update */ ue_sched_ctl->ta_update = 31; + ue_sched_ctl->ta_update_f = 31.0; } else { ta_update = 31; } diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index e6ea56d629..ba4d27a159 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -1567,6 +1567,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP, /* reset ta_update */ ue_sched_ctl->ta_update = 31; + ue_sched_ctl->ta_update_f = 31.0; } else { ta_update = 31; } diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index c8904ef9a3..0107daf3e0 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2215,10 +2215,12 @@ add_new_ue(module_id_t mod_idP, 0, sizeof(eNB_UE_STATS)); UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0; + UE_info->UE_sched_ctrl[UE_id].ta_update_f = 31.0; UE_info->UE_sched_ctrl[UE_id].ta_update = 31; UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; - UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (RC.mac[mod_idP]->puSch10xSnr+640)/5; - UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = RC.mac[mod_idP]->puSch10xSnr/10; + UE_info->UE_sched_ctrl[UE_id].pusch_cqi_f[cc_idP] = (eNB->puSch10xSnr+640)/5; + UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (eNB->puSch10xSnr+640)/5; + UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = eNB->puSch10xSnr/10; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index da2843161a..eb762bbdab 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -167,7 +167,8 @@ rx_sdu(const module_id_t enb_mod_idP, * lte_est_timing_advance_pusch, maybe it's not necessary? * maybe it's even not correct at all? */ - UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; + UE_scheduling_control->ta_update_f = ((double)UE_scheduling_control->ta_update_f * 3 + (double)timing_advance) / 4; + UE_scheduling_control->ta_update = (int)UE_scheduling_control->ta_update_f; UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10; if(UE_scheduling_control->pusch_snr[CC_idP] > 0 || UE_scheduling_control->pusch_snr[CC_idP] < 63) { @@ -175,7 +176,8 @@ rx_sdu(const module_id_t enb_mod_idP, int snr_thres_tpc=30; int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP]; if(abs(diff) < snr_thres_tpc) { - UE_scheduling_control->pusch_cqi[CC_idP] = (int)((double)UE_scheduling_control->pusch_cqi[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc)); + UE_scheduling_control->pusch_cqi_f[CC_idP] = ((double)UE_scheduling_control->pusch_cqi_f[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc)); + UE_scheduling_control->pusch_cqi[CC_idP] = (int)UE_scheduling_control->pusch_cqi_f[CC_idP]; UE_scheduling_control->pusch_snr_avg[CC_idP] = (5 * UE_scheduling_control->pusch_cqi[CC_idP] - 640) / 10; } } diff --git a/openair2/LAYER2/MAC/mac.h b/openair2/LAYER2/MAC/mac.h index 3ba4506fe7..62346e7ef7 100644 --- a/openair2/LAYER2/MAC/mac.h +++ b/openair2/LAYER2/MAC/mac.h @@ -942,6 +942,7 @@ typedef struct { unsigned char rballoc_sub_UE[NFAPI_CC_MAX][N_RBG_MAX]; int pre_dci_dl_pdu_idx; uint16_t ta_timer; + double ta_update_f; int16_t ta_update; uint16_t ul_consecutive_errors; int32_t context_active_timer; @@ -965,6 +966,7 @@ typedef struct { uint8_t pucch2_snr[NFAPI_CC_MAX]; uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; uint8_t pucch3_snr[NFAPI_CC_MAX]; + double pusch_cqi_f[NFAPI_CC_MAX]; uint8_t pusch_cqi[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX]; From 029c08b9d59fdb45d91d1469789a9471b4a07676 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Wed, 20 May 2020 18:55:14 +0900 Subject: [PATCH 24/54] Replace from dB_fixed_times10 function to dB_fixed_x10. (cherry picked from commit de93d8f0aa9e6d7380bd159901a41aa36f257298) --- openair1/PHY/LTE_TRANSPORT/prach.c | 2 +- .../PHY/LTE_TRANSPORT/ulsch_demodulation.c | 2 +- openair1/PHY/TOOLS/dB_routines.c | 315 ++++++++++++++++++ openair1/PHY/TOOLS/dB_routines.h | 1 + openair1/PHY/TOOLS/tools_defs.h | 1 + openair1/SCHED/phy_procedures_lte_common.c | 2 +- openair1/SCHED/phy_procedures_lte_eNb.c | 16 +- 7 files changed, 328 insertions(+), 11 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/prach.c b/openair1/PHY/LTE_TRANSPORT/prach.c index d3ed2ed439..3a4dbdfa18 100644 --- a/openair1/PHY/LTE_TRANSPORT/prach.c +++ b/openair1/PHY/LTE_TRANSPORT/prach.c @@ -625,7 +625,7 @@ void rx_prach0(PHY_VARS_eNB *eNB, for (i=0; i*max_preamble_energy) { *max_preamble_energy = levdB; diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index 7a600c536e..f1279ddc2c 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -1097,7 +1097,7 @@ void rx_ulsch(PHY_VARS_eNB *eNB, if(pusch_vars->ulsch_interference_power[i]<1)pusch_vars->ulsch_interference_power[i] = 1; } - LOG_D(PHY,"%4.4d.%d power harq_pid %d rb %2.2d TBS %2.2d (MPR_times_Ks %d correction %d) power %d dBtimes10\n", proc->frame_rx, proc->subframe_rx, harq_pid, ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, ulsch[UE_id]->harq_processes[harq_pid]->TBS,MPR_times_100Ks,correction_factor,dB_fixed_times10(pusch_vars->ulsch_power[i])); + LOG_D(PHY,"%4.4d.%d power harq_pid %d rb %2.2d TBS %2.2d (MPR_times_Ks %d correction %d) power %d dBtimes10\n", proc->frame_rx, proc->subframe_rx, harq_pid, ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, ulsch[UE_id]->harq_processes[harq_pid]->TBS,MPR_times_100Ks,correction_factor,dB_fixed_x10(pusch_vars->ulsch_power[i])); } diff --git a/openair1/PHY/TOOLS/dB_routines.c b/openair1/PHY/TOOLS/dB_routines.c index ed5c96a8c3..1b743695f6 100644 --- a/openair1/PHY/TOOLS/dB_routines.c +++ b/openair1/PHY/TOOLS/dB_routines.c @@ -540,6 +540,289 @@ int16_t dB_table_times10[256] = { 240, 240 }; + + +uint32_t bit_seach_mask[32] = { + 0x80000000, 0x40000000, 0x20000000, 0x10000000, + 0x08000000, 0x04000000, 0x02000000, 0x01000000, + 0x00800000, 0x00400000, 0x00200000, 0x00100000, + 0x00080000, 0x00040000, 0x00020000, 0x00010000, + 0x00008000, 0x00004000, 0x00002000, 0x00001000, + 0x00000800, 0x00000400, 0x00000200, 0x00000100, + 0x00000080, 0x00000040, 0x00000020, 0x00000010, + 0x00000008, 0x00000004, 0x00000002, 0x00000001 +}; +uint32_t bit_seach_res[32] = { + 31, 30, 29, 28, + 27, 26, 25, 24, + 23, 22, 21, 20, + 19, 18, 17, 16, + 15, 14, 13, 12, + 11, 10, 9, 8, + 7, 6, 5, 4, + 3, 2, 1, 0 +}; +uint32_t dB_fix_x10_tbl[128] = { +0 , +0 , +1 , +1 , +1 , +2 , +2 , +2 , +3 , +3 , +3 , +4 , +4 , +4 , +5 , +5 , +5 , +5 , +6 , +6 , +6 , +7 , +7 , +7 , +7 , +8 , +8 , +8 , +9 , +9 , +9 , +9 , +10 , +10 , +10 , +10 , +11 , +11 , +11 , +12 , +12 , +12 , +12 , +13 , +13 , +13 , +13 , +14 , +14 , +14 , +14 , +15 , +15 , +15 , +15 , +16 , +16 , +16 , +16 , +16 , +17 , +17 , +17 , +17 , +18 , +18 , +18 , +18 , +19 , +19 , +19 , +19 , +19 , +20 , +20 , +20 , +20 , +20 , +21 , +21 , +21 , +21 , +22 , +22 , +22 , +22 , +22 , +23 , +23 , +23 , +23 , +23 , +24 , +24 , +24 , +24 , +24 , +24 , +25 , +25 , +25 , +25 , +25 , +26 , +26 , +26 , +26 , +26 , +27 , +27 , +27 , +27 , +27 , +27 , +28 , +28 , +28 , +28 , +28 , +29 , +29 , +29 , +29 , +29 , +29 , +30 , +30 , +30 +}; +uint32_t dB_fix_x10_tbl_low[128] = { +0 , +0 , +30 , +48 , +60 , +70 , +78 , +85 , +90 , +95 , +100 , +104 , +108 , +111 , +115 , +118 , +120 , +123 , +126 , +128 , +130 , +132 , +134 , +136 , +138 , +140 , +141 , +143 , +145 , +146 , +148 , +149 , +151 , +152 , +153 , +154 , +156 , +157 , +158 , +159 , +160 , +161 , +162 , +163 , +164 , +165 , +166 , +167 , +168 , +169 , +170 , +171 , +172 , +172 , +173 , +174 , +175 , +176 , +176 , +177 , +178 , +179 , +179 , +180 , +181 , +181 , +182 , +183 , +183 , +184 , +185 , +185 , +186 , +186 , +187 , +188 , +188 , +189 , +189 , +190 , +190 , +191 , +191 , +192 , +192 , +193 , +193 , +194 , +194 , +195 , +195 , +196 , +196 , +197 , +197 , +198 , +198 , +199 , +199 , +200 , +200 , +200 , +201 , +201 , +202 , +202 , +203 , +203 , +203 , +204 , +204 , +205 , +205 , +205 , +206 , +206 , +206 , +207 , +207 , +208 , +208 , +208 , +209 , +209 , +209 , +210 , +210 , +210 +}; + /* int8_t dB_fixed(int x) { @@ -571,6 +854,38 @@ int8_t dB_fixed(int x) { } */ +int16_t dB_fixed_x10(uint32_t x) { + int16_t dB_power = 0; + + //for new algorithm + uint32_t cnt; + uint32_t Exponent; + uint32_t Mantissa; + uint32_t shift_right; + uint32_t tbl_resolution = 7; + uint32_t tbl_addr_mask; + + if (x < 128){ //OAI alogrithm + dB_power = dB_fix_x10_tbl_low[x]; + } + else { //new algorithm + tbl_addr_mask = 0x0000007Fu; // (1 << tbl_resolution) - 1;//i.e. 0x0000007F + Mantissa = 0; + Exponent = 0; + for (cnt = 0; cnt < 32; cnt++) { + if ((bit_seach_mask[cnt] & x) != 0) { + Exponent = bit_seach_res[cnt]; + Mantissa = x & (~bit_seach_mask[cnt]); + break; + } + } + shift_right = Exponent - tbl_resolution; + Mantissa = (Mantissa >> shift_right) & tbl_addr_mask; + dB_power = dB_fix_x10_tbl[Mantissa] + Exponent * 30u; + } + return dB_power; +} + int16_t dB_fixed_times10(uint32_t x) { int16_t dB_power=0; diff --git a/openair1/PHY/TOOLS/dB_routines.h b/openair1/PHY/TOOLS/dB_routines.h index c28184259f..185913cf5b 100644 --- a/openair1/PHY/TOOLS/dB_routines.h +++ b/openair1/PHY/TOOLS/dB_routines.h @@ -30,5 +30,6 @@ #define DB_ROUTINES_H_ int16_t dB_fixed_times10(uint32_t x); +int16_t dB_fixed_x10(uint32_t x); #endif /* DB_ROUTINES_H_ */ diff --git a/openair1/PHY/TOOLS/tools_defs.h b/openair1/PHY/TOOLS/tools_defs.h index 9f0a089903..12467e1fdc 100644 --- a/openair1/PHY/TOOLS/tools_defs.h +++ b/openair1/PHY/TOOLS/tools_defs.h @@ -472,6 +472,7 @@ uint8_t dB_fixed64(uint64_t x); int8_t dB_fixed2(uint32_t x,uint32_t y); int16_t dB_fixed_times10(uint32_t x); +int16_t dB_fixed_x10(uint32_t x); int32_t phy_phase_compensation_top(uint32_t pilot_type, uint32_t initial_pilot, diff --git a/openair1/SCHED/phy_procedures_lte_common.c b/openair1/SCHED/phy_procedures_lte_common.c index d162a413c1..0b592b9c55 100644 --- a/openair1/SCHED/phy_procedures_lte_common.c +++ b/openair1/SCHED/phy_procedures_lte_common.c @@ -1146,7 +1146,7 @@ int16_t estimate_ue_tx_power(uint32_t tbs, uint32_t nb_rb, uint8_t control_only, //(beta_offset_pusch_x8=ue->ulsch[eNB_id]->harq_processes[harq_pid]->control_only == 1) ? ue->ulsch[eNB_id]->beta_offset_cqi_times8:8; // if deltamcs_enabledm - delta_mcs = ((hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_times10((beta_offset_pusch_x8)>>3))/100.0); + delta_mcs = ((hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_x10((beta_offset_pusch_x8)>>3))/100.0); bw_factor = (hundred_times_log10_NPRB[nb_rb-1]/100.0); #ifdef DEBUG_SEGMENTATION printf("estimated ue tx power %d (num_re %d, sumKr %d, mpr_x100 %d, delta_mcs %f, bw_factor %f)\n", diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index 4cc5ebc143..fde784acfb 100644 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -87,9 +87,9 @@ int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint16_t UE_id,uint8_t // This is the formula from Section 5.1.1.1 in 36.213 10*log10(deltaIF_PUSCH = (2^(MPR*Ks)-1)*beta_offset_pusch) if (bw_factor == 1) { uint8_t nb_rb = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb; - return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_times10((beta_offset_pusch)>>3)) + hundred_times_log10_NPRB[nb_rb-1]; + return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_x10((beta_offset_pusch)>>3)) + hundred_times_log10_NPRB[nb_rb-1]; } else - return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_times10((beta_offset_pusch)>>3)); + return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_x10((beta_offset_pusch)>>3)); } else { return(0); } @@ -757,7 +757,7 @@ void fill_sr_indication(int UEid, PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int // pdu->rx_ue_information.handle = handle; pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG; pdu->rx_ue_information.rnti = rnti; - int SNRtimes10 = dB_fixed_times10(stat) - 10 * eNB->measurements.n0_subband_power_dB[0][0]; + int SNRtimes10 = dB_fixed_x10(stat) - 10 * eNB->measurements.n0_subband_power_dB[0][0]; LOG_D(PHY,"stat %d subbandpower %d, SNRtimes10 %d\n", stat, eNB->measurements.n0_subband_power_dB[0][0], SNRtimes10); pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG; @@ -1605,9 +1605,9 @@ void fill_rx_indication(PHY_VARS_eNB *eNB, pdu->rx_indication_rel8.timing_advance = timing_advance_update; // estimate UL_CQI for MAC (from antenna port 0 only) - int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_interference_power[0]); + int SNRtimes10 = dB_fixed_x10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - dB_fixed_x10(eNB->pusch_vars[UE_id]->ulsch_interference_power[0]); - if(dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) > eNB->pusch_signal_threshold) { + if(dB_fixed_x10(eNB->pusch_vars[UE_id]->ulsch_power[0]) > eNB->pusch_signal_threshold) { SNRtimes10 = 300; } @@ -1618,8 +1618,8 @@ void fill_rx_indication(PHY_VARS_eNB *eNB, else pdu->rx_indication_rel8.ul_cqi = (640 + SNRtimes10) / 5; - LOG_D(PHY,"[PUSCH %d] Frame %d Subframe %d Filling RX_indication with SNR %d (%d), timing_advance %d (update %d)\n", - harq_pid,frame,subframe,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance, + LOG_D(PHY,"[PUSCH %d] Frame %d Subframe %d Filling RX_indication with SNR %d (%d) signal %d noise %d, timing_advance %d (update %d)\n", + harq_pid,frame,subframe,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,dB_fixed_x10(eNB->pusch_vars[UE_id]->ulsch_power[0]),dB_fixed_x10(eNB->pusch_vars[UE_id]->ulsch_interference_power[0]),pdu->rx_indication_rel8.timing_advance, timing_advance_update); eNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus++; eNB->UL_INFO.rx_ind.sfn_sf = frame<<4 | subframe; @@ -1923,7 +1923,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in pdu->rx_ue_information.rnti = uci->rnti; // estimate UL_CQI for MAC (from antenna port 0 only) pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG; - int SNRtimes10 = dB_fixed_times10(uci->stat) - 10 * eNB->measurements.n0_subband_power_dB[0][0]; + int SNRtimes10 = dB_fixed_x10(uci->stat) - 10 * eNB->measurements.n0_subband_power_dB[0][0]; if (SNRtimes10 < -100) LOG_I (PHY, "uci->stat %d \n", uci->stat); From 174069e26e8f37cab6f5552694c706d1f771f812 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Thu, 28 May 2020 10:39:28 +0900 Subject: [PATCH 25/54] Fix calculation of pucch interference power. (cherry picked from commit 0622f7d40523e39334708ce4b9b0ee68e8fb2bf1) --- openair1/PHY/LTE_TRANSPORT/pucch.c | 137 ++++++++++++++++++- openair1/PHY/LTE_TRANSPORT/transport_proto.h | 6 +- openair1/PHY/defs_eNB.h | 2 + openair1/SCHED/phy_procedures_lte_eNb.c | 2 + 4 files changed, 145 insertions(+), 2 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index 8637e80137..1a3abb706e 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -721,6 +721,140 @@ int16_t pucchfmt3_Decode( int16_t b[48], } } + +uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, + int frame, + uint8_t subframe, + uint8_t shortened_format +) +//----------------------------------------------------------------------------- +{ + LTE_eNB_COMMON *common_vars = &eNB->common_vars; + LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms; + + uint32_t u,v,n,aa; + uint32_t z[12*14]; + int16_t *zptr; + int16_t rxcomp[NB_ANTENNAS_RX][2*12*14]; + uint8_t ns,N_UL_symb,nsymb; + uint8_t c = (frame_parms->Ncp==0) ? 3 : 2; + uint16_t i,j,re_offset; + uint8_t m,l; + uint8_t n_cs,alpha_ind; + int16_t tmp_re,tmp_im,W_re=0,W_im=0; + int16_t W4_nouse[4]={1,1,-1,-1}; + int32_t interference_power; + int16_t *rxptr; + uint32_t symbol_offset; + + uint8_t deltaPUCCH_Shift = frame_parms->pucch_config_common.deltaPUCCH_Shift; + uint8_t Ncs1_div_deltaPUCCH_Shift = frame_parms->pucch_config_common.nCS_AN; + + uint32_t u0 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1]) % 30; + uint32_t u1 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)]) % 30; + uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1]; + uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)]; + int calc_cnt; + + if ((deltaPUCCH_Shift==0) || (deltaPUCCH_Shift>3)) { + LOG_E(PHY,"[eNB] rx_pucch: Illegal deltaPUCCH_shift %d (should be 1,2,3)\n",deltaPUCCH_Shift); + return(-1); + } + + if (Ncs1_div_deltaPUCCH_Shift > 7) { + LOG_E(PHY,"[eNB] rx_pucch: Illegal Ncs1_div_deltaPUCCH_Shift %d (should be 0...7)\n",Ncs1_div_deltaPUCCH_Shift); + return(-1); + } + + zptr = (int16_t *)z; + N_UL_symb = (frame_parms->Ncp==NORMAL) ? 7 : 6; + + interference_power=0; + calc_cnt=0; + // loop over 2 slots + for (n_cs=0; n_cs<12; n_cs++) { + for (ns=(subframe<<1),u=u0,v=v0; ns<(2+(subframe<<1)); ns++,u=u1,v=v1) { + + //loop over symbols in slot + for (l=0; l1)&&(l=N_UL_symb-2)) { // data + W_re=W4_nouse[l-N_UL_symb+4]; + W_im=0; + } + + alpha_ind=0; + // compute output sequence + + for (n=0; n<12; n++) { + + // this is r_uv^alpha(n) + tmp_re = (int16_t)(((int32_t)alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][n<<1] - (int32_t)alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)])>>15); + tmp_im = (int16_t)(((int32_t)alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)] + (int32_t)alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][n<<1])>>15); + + // this is S(ns)*w_noc(m)*r_uv^alpha(n) + zptr[n<<1] = (tmp_re*W_re - tmp_im*W_im)>>15; + zptr[1+(n<<1)] = -(tmp_re*W_im + tmp_im*W_re)>>15; + + alpha_ind = (alpha_ind + n_cs)%12; + } // n + + zptr+=24; + } // l + } // ns + + m = 0; + + nsymb = N_UL_symb<<1; + + zptr = (int16_t*)z; + + // Do detection + for (aa=0; aanb_antennas_rx; aa++) { + for (j=0,l=0; l1)&&((l%N_UL_symb)=N_UL_symb) && (shortened_format==1)) ){ + continue; + } + if ((l<(nsymb>>1)) && ((m&1) == 0)) + re_offset = (m*6) + frame_parms->first_carrier_offset; + else if ((l<(nsymb>>1)) && ((m&1) == 1)) + re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12; + else if ((m&1) == 0) + re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12; + else + re_offset = ((m-1)*6) + frame_parms->first_carrier_offset; + + if (re_offset > frame_parms->ofdm_symbol_size) + re_offset -= (frame_parms->ofdm_symbol_size); + + symbol_offset = (unsigned int)frame_parms->ofdm_symbol_size*l; + rxptr = (int16_t *)&common_vars->rxdataF[aa][symbol_offset]; + + for (i=0; i<12; i++,j+=2,re_offset++) { + if (re_offset==frame_parms->ofdm_symbol_size) + re_offset = 0; + + rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15); + rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15); + interference_power+= ((int32_t)rxcomp[aa][j]*(int32_t)rxcomp[aa][j]+(int32_t)rxcomp[aa][1+j]*(int32_t)rxcomp[aa][1+j]); + calc_cnt++; + } //re + } // symbol + } // antenna + } + calc_cnt/=12; + //printf("pucch noise %d %d %d\n",interference_power,calc_cnt,eNB->measurements.n0_subband_power_tot_dB[0]); + eNB->measurements.n0_pucch_dB = dB_fixed_x10(interference_power/calc_cnt)/10; + return 0; +} + + /* PUCCH format3 << */ uint32_t rx_pucch(PHY_VARS_eNB *eNB, @@ -740,7 +874,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, static int first_call = 1; LTE_eNB_COMMON *common_vars = &eNB->common_vars; LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms; - int8_t sigma2_dB = max(eNB->measurements.n0_subband_power_tot_dB[0], eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL-1]); + int8_t sigma2_dB = eNB->measurements.n0_pucch_dB; + uint32_t u,v,n,aa; uint32_t z[12*14]; int16_t *zptr; diff --git a/openair1/PHY/LTE_TRANSPORT/transport_proto.h b/openair1/PHY/LTE_TRANSPORT/transport_proto.h index 4ce113f78e..9e37821b05 100644 --- a/openair1/PHY/LTE_TRANSPORT/transport_proto.h +++ b/openair1/PHY/LTE_TRANSPORT/transport_proto.h @@ -621,7 +621,11 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms, uint16_t frame, uint8_t Ns); - +uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, + int frame, + uint8_t subframe, + uint8_t shortened_format +); uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB, PUCCH_FMT_t fmt, diff --git a/openair1/PHY/defs_eNB.h b/openair1/PHY/defs_eNB.h index 3505733ecb..a79c114aa4 100644 --- a/openair1/PHY/defs_eNB.h +++ b/openair1/PHY/defs_eNB.h @@ -419,6 +419,8 @@ typedef struct { int subband_cqi_tot_dB[NUMBER_OF_UE_MAX][100]; /// PRACH background noise level int prach_I0; + /// PUCCH background noise level + int n0_pucch_dB; } PHY_MEASUREMENTS_eNB; diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index fde784acfb..6ea0f84b4a 100644 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -791,6 +791,8 @@ uci_procedures(PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci = NULL; LTE_DL_FRAME_PARMS *fp = &(eNB->frame_parms); + calc_pucch_1x_interference(eNB, frame, subframe, 0); + for (int i = 0; i < NUMBER_OF_UCI_VARS_MAX; i++) { uci = &(eNB->uci_vars[i]); From ad4a22fa0f3b708a639c2fa89965906bb6bd529f Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Mon, 1 Jun 2020 20:04:21 +0900 Subject: [PATCH 26/54] Fix PUCCH noise estimation. (cherry picked from commit 51634853671e07ef3013bc44ec79fc38c0646147) --- openair1/PHY/LTE_TRANSPORT/pucch.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index 1a3abb706e..ef6a25e030 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -743,7 +743,8 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, uint8_t n_cs,alpha_ind; int16_t tmp_re,tmp_im,W_re=0,W_im=0; int16_t W4_nouse[4]={1,1,-1,-1}; - int32_t interference_power; + int32_t n0_IQ[2]; + double interference_power; int16_t *rxptr; uint32_t symbol_offset; @@ -769,7 +770,7 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, zptr = (int16_t *)z; N_UL_symb = (frame_parms->Ncp==NORMAL) ? 7 : 6; - interference_power=0; + interference_power=0.0; calc_cnt=0; // loop over 2 slots for (n_cs=0; n_cs<12; n_cs++) { @@ -778,6 +779,7 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, //loop over symbols in slot for (l=0; l1)&&(lnb_antennas_rx; aa++) { + n0_IQ[0]=0; + n0_IQ[1]=0; for (j=0,l=0; l1)&&((l%N_UL_symb)=N_UL_symb) && (shortened_format==1)) ){ + j+=24; continue; } if ((l<(nsymb>>1)) && ((m&1) == 0)) @@ -842,15 +847,17 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15); rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15); - interference_power+= ((int32_t)rxcomp[aa][j]*(int32_t)rxcomp[aa][j]+(int32_t)rxcomp[aa][1+j]*(int32_t)rxcomp[aa][1+j]); + n0_IQ[0]+=rxcomp[aa][j]; + n0_IQ[1]+=rxcomp[aa][1+j]; calc_cnt++; } //re } // symbol + interference_power+= (int32_t)(n0_IQ[0]*n0_IQ[0]+n0_IQ[1]*n0_IQ[1]); } // antenna } - calc_cnt/=12; - //printf("pucch noise %d %d %d\n",interference_power,calc_cnt,eNB->measurements.n0_subband_power_tot_dB[0]); - eNB->measurements.n0_pucch_dB = dB_fixed_x10(interference_power/calc_cnt)/10; + interference_power /= calc_cnt; + eNB->measurements.n0_pucch_dB = dB_fixed_x10((int)(interference_power/calc_cnt))/10; + LOG_D(PHY,"estimate pucch noise %d %d %d\n",interference_power,calc_cnt,eNB->measurements.n0_pucch_dB); return 0; } From 1f54b131b5fbb428e2474aa39ccc2aa0374c8fcd Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Wed, 3 Jun 2020 14:19:48 +0900 Subject: [PATCH 27/54] Fix pucch functions. (cherry picked from commit 3bed7dc69db8dc43b28b62553f12834efbca349b) --- openair1/PHY/LTE_TRANSPORT/pucch.c | 32 +++++++++---------------- openair1/SCHED/phy_procedures_lte_eNb.c | 4 ++-- 2 files changed, 13 insertions(+), 23 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index ef6a25e030..cb90045da3 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -736,7 +736,7 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, uint32_t z[12*14]; int16_t *zptr; int16_t rxcomp[NB_ANTENNAS_RX][2*12*14]; - uint8_t ns,N_UL_symb,nsymb; + uint8_t ns,N_UL_symb,nsymb,n_cs_base; uint8_t c = (frame_parms->Ncp==0) ? 3 : 2; uint16_t i,j,re_offset; uint8_t m,l; @@ -748,36 +748,25 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, int16_t *rxptr; uint32_t symbol_offset; - uint8_t deltaPUCCH_Shift = frame_parms->pucch_config_common.deltaPUCCH_Shift; - uint8_t Ncs1_div_deltaPUCCH_Shift = frame_parms->pucch_config_common.nCS_AN; - - uint32_t u0 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1]) % 30; - uint32_t u1 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)]) % 30; + uint32_t u0 = (frame_parms->pucch_config_common.grouphop[subframe<<1]) % 30; + uint32_t u1 = (frame_parms->pucch_config_common.grouphop[1+(subframe<<1)]) % 30; uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1]; uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)]; int calc_cnt; - if ((deltaPUCCH_Shift==0) || (deltaPUCCH_Shift>3)) { - LOG_E(PHY,"[eNB] rx_pucch: Illegal deltaPUCCH_shift %d (should be 1,2,3)\n",deltaPUCCH_Shift); - return(-1); - } - - if (Ncs1_div_deltaPUCCH_Shift > 7) { - LOG_E(PHY,"[eNB] rx_pucch: Illegal Ncs1_div_deltaPUCCH_Shift %d (should be 0...7)\n",Ncs1_div_deltaPUCCH_Shift); - return(-1); - } - zptr = (int16_t *)z; N_UL_symb = (frame_parms->Ncp==NORMAL) ? 7 : 6; interference_power=0.0; calc_cnt=0; // loop over 2 slots - for (n_cs=0; n_cs<12; n_cs++) { + for (n_cs_base=0; n_cs_base<12; n_cs_base++) { + zptr = (int16_t *)z; for (ns=(subframe<<1),u=u0,v=v0; ns<(2+(subframe<<1)); ns++,u=u1,v=v1) { //loop over symbols in slot for (l=0; lncs_cell[ns][l]+n_cs_base; if(((l>1)&&(lpucch_config_common.deltaPUCCH_Shift; uint8_t NRB2 = frame_parms->pucch_config_common.nRB_CQI; uint8_t Ncs1_div_deltaPUCCH_Shift = frame_parms->pucch_config_common.nCS_AN; - uint32_t u0 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1]) % 30; - uint32_t u1 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)]) % 30; + + uint32_t u0 = (frame_parms->pucch_config_common.grouphop[subframe<<1]) % 30; + uint32_t u1 = (frame_parms->pucch_config_common.grouphop[1+(subframe<<1)]) % 30; uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1]; uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)]; int chL; diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index 6ea0f84b4a..d2adcb8823 100644 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -757,7 +757,7 @@ void fill_sr_indication(int UEid, PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int // pdu->rx_ue_information.handle = handle; pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG; pdu->rx_ue_information.rnti = rnti; - int SNRtimes10 = dB_fixed_x10(stat) - 10 * eNB->measurements.n0_subband_power_dB[0][0]; + int SNRtimes10 = dB_fixed_x10(stat) - 10 * eNB->measurements.n0_pucch_dB; LOG_D(PHY,"stat %d subbandpower %d, SNRtimes10 %d\n", stat, eNB->measurements.n0_subband_power_dB[0][0], SNRtimes10); pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG; @@ -1925,7 +1925,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in pdu->rx_ue_information.rnti = uci->rnti; // estimate UL_CQI for MAC (from antenna port 0 only) pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG; - int SNRtimes10 = dB_fixed_x10(uci->stat) - 10 * eNB->measurements.n0_subband_power_dB[0][0]; + int SNRtimes10 = dB_fixed_x10(uci->stat) - 10 * eNB->measurements.n0_pucch_dB; if (SNRtimes10 < -100) LOG_I (PHY, "uci->stat %d \n", uci->stat); From 7eea98082798f48d50e3775377f26a5071e3e545 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Thu, 4 Jun 2020 22:31:09 +0900 Subject: [PATCH 28/54] Fix sr detection. (cherry picked from commit 5482843b9a9dfd25abe74afb04a40c117da3bac4) --- openair1/PHY/LTE_TRANSPORT/pucch.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index cb90045da3..edbf6c9c6e 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -838,9 +838,11 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15); n0_IQ[0]+=rxcomp[aa][j]; n0_IQ[1]+=rxcomp[aa][1+j]; - calc_cnt++; } //re + calc_cnt++; } // symbol + n0_IQ[0]/=12; + n0_IQ[1]/=12; interference_power+= (double)(n0_IQ[0]*n0_IQ[0]+n0_IQ[1]*n0_IQ[1]); } // antenna } @@ -1187,7 +1189,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, #endif } - stat += ((stat_re*stat_re) + (stat_im*stat_im)); + stat += (stat_re*stat_re); } //re } // aa From 6c99c9a2557b91d796748e7395ee7b6aedcae717 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Fri, 5 Jun 2020 14:41:10 +0900 Subject: [PATCH 29/54] Fix receive pucch 1a and power adjustment of pucch. (cherry picked from commit 6d5a40bd826de160ddf55599f61d1359cfba3fa4) --- openair1/PHY/LTE_TRANSPORT/pucch.c | 18 ++++++++++++++---- openair1/SCHED/phy_procedures_lte_eNb.c | 4 ++-- 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index edbf6c9c6e..9c5f28bec3 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -1275,8 +1275,13 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, } // this is total energy received, summed over data and reference - stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) + - ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb); + if (fmt==pucch_format1a){ + stat += ((((stat_re*stat_re)) + ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb); + }else{ + stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) + + ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb); + } + // now second slot stat_re=0; stat_im=0; @@ -1304,8 +1309,13 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, #ifdef DEBUG_PUCCH_RX printf("aa%d re %d : phase %d : stat %d\n",aa,re,phase,stat); #endif - stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) + - ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb); + if (fmt==pucch_format1a){ + stat += ((((stat_re*stat_re)) + ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb); + }else{ + stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) + + ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb); + } + } //re } // aa diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index d2adcb8823..e783afafa7 100644 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -757,7 +757,7 @@ void fill_sr_indication(int UEid, PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int // pdu->rx_ue_information.handle = handle; pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG; pdu->rx_ue_information.rnti = rnti; - int SNRtimes10 = dB_fixed_x10(stat) - 10 * eNB->measurements.n0_pucch_dB; + int SNRtimes10 = dB_fixed_x10(stat) - 10 * eNB->measurements.n0_pucch_dB - 10 * eNB->pucch1_DTX_threshold; LOG_D(PHY,"stat %d subbandpower %d, SNRtimes10 %d\n", stat, eNB->measurements.n0_subband_power_dB[0][0], SNRtimes10); pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG; @@ -1925,7 +1925,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in pdu->rx_ue_information.rnti = uci->rnti; // estimate UL_CQI for MAC (from antenna port 0 only) pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG; - int SNRtimes10 = dB_fixed_x10(uci->stat) - 10 * eNB->measurements.n0_pucch_dB; + int SNRtimes10 = dB_fixed_x10(uci->stat) - 10 * eNB->measurements.n0_pucch_dB - 10 * eNB->pucch1ab_DTX_threshold; if (SNRtimes10 < -100) LOG_I (PHY, "uci->stat %d \n", uci->stat); From deeded689de8f64d99e7711c8e8cdfe842340b80 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Tue, 16 Jun 2020 15:39:18 +0900 Subject: [PATCH 30/54] Fix: guard multiple UL scheduling for same UE. (cherry picked from commit 57caca9ba87fda3f73aa30d86f4af01a6062224c) --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index ba4d27a159..3ee27ae04b 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2393,6 +2393,18 @@ void ulsch_scheduler_pre_ue_select_fairRR( break; } + for(i = 0; ihi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi]; format_flag = 2; rnti = UE_RNTI(module_idP,first_ue_id[CC_id][temp]); From 7243b6d67ae19269d7446996383e860d5a072f28 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Wed, 17 Jun 2020 16:24:50 +0900 Subject: [PATCH 31/54] Avoid Segfault with abnormal MAC header. (cherry picked from commit 04c5431468c9102dd625a73d9e5219b40b638fe3) (cherry picked from commit 17880778c848406e562f98c20f7b7a6428502279) (cherry picked from commit a26f44c197e854dd4261267a3695932392f09265) --- common/utils/asn1_conversions.h | 24 ++++++++++-- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 47 ++++++++++++++++++++--- 2 files changed, 62 insertions(+), 9 deletions(-) diff --git a/common/utils/asn1_conversions.h b/common/utils/asn1_conversions.h index 82dca54c08..7fd32af030 100644 --- a/common/utils/asn1_conversions.h +++ b/common/utils/asn1_conversions.h @@ -33,7 +33,11 @@ *\return the extracted value. */ static inline uint8_t BIT_STRING_to_uint8(BIT_STRING_t *asn) { - DevCheck ((asn->size == 1), asn->size, 0, 0); + //DevCheck ((asn->size == 1), asn->size, 0, 0); + if(!(asn->size == 1)) { + printf("BIT_STRING_to_uint8 size %ld\n", asn->size); + return 0; + } return asn->buf[0] >> asn->bits_unused; } @@ -47,7 +51,11 @@ static inline uint16_t BIT_STRING_to_uint16(BIT_STRING_t *asn) { uint16_t result = 0; int index = 0; - DevCheck ((asn->size > 0) && (asn->size <= 2), asn->size, 0, 0); + //DevCheck ((asn->size > 0) && (asn->size <= 2), asn->size, 0, 0); + if(!((asn->size > 0) && (asn->size <= 2))) { + printf("BIT_STRING_to_uint16 size %ld\n", asn->size); + return 0; + } switch (asn->size) { case 2: @@ -74,7 +82,11 @@ static inline uint32_t BIT_STRING_to_uint32(BIT_STRING_t *asn) { int index; int shift; - DevCheck ((asn->size > 0) && (asn->size <= 4), asn->size, 0, 0); + //DevCheck ((asn->size > 0) && (asn->size <= 4), asn->size, 0, 0); + if(!((asn->size > 0) && (asn->size <= 4))) { + printf("BIT_STRING_to_uint32 size %ld\n", asn->size); + return 0; + } shift = ((asn->size - 1) * 8) - asn->bits_unused; for (index = 0; index < (asn->size - 1); index++) { @@ -97,7 +109,11 @@ static inline uint64_t BIT_STRING_to_uint64(BIT_STRING_t *asn) { int index; int shift; - DevCheck ((asn->size > 0) && (asn->size <= 8), asn->size, 0, 0); + //DevCheck ((asn->size > 0) && (asn->size <= 8), asn->size, 0, 0); + if(!((asn->size > 0) && (asn->size <= 8))) { + printf("BIT_STRING_to_uint64 size %ld\n", asn->size); + return 0; + } shift = ((asn->size - 1) * 8) - asn->bits_unused; for (index = 0; index < (asn->size - 1); index++) { diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index eb762bbdab..fb258b1ea3 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -683,7 +683,7 @@ rx_sdu(const module_id_t enb_mod_idP, switch (rx_lcids[i]) { case CCCH: - if (rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) { + if ((rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > sdu_lenP)) { LOG_E(MAC, "[eNB %d/%d] frame %d received CCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n", enb_mod_idP, CC_idP, @@ -804,6 +804,17 @@ rx_sdu(const module_id_t enb_mod_idP, LOG_T(MAC, "\n"); #endif + if ((rx_lengths[i] > DCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > sdu_lenP)) { + LOG_E(MAC, "[eNB %d/%d] frame %d received DCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n", + enb_mod_idP, + CC_idP, + frameP, + rx_lengths[i], + DCH_PAYLOAD_SIZE_MAX, + sdu_lenP); + break; + } + if (UE_id != -1) { if (lcgid_updated[UE_template_ptr->lcgidmap[rx_lcids[i]]] == 0) { /* Adjust buffer occupancy of the correponding logical channel group */ @@ -853,6 +864,17 @@ rx_sdu(const module_id_t enb_mod_idP, #endif if (rx_lcids[i] < NB_RB_MAX) { + if ((rx_lengths[i] > SCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > sdu_lenP)) { + LOG_E(MAC, "[eNB %d/%d] frame %d received DTCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n", + enb_mod_idP, + CC_idP, + frameP, + rx_lengths[i], + DCH_PAYLOAD_SIZE_MAX, + sdu_lenP); + UE_list->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1; + break; + } LOG_D(MAC, "[eNB %d] CC_id %d Frame %d : ULSCH -> UL-DTCH, received %d bytes from UE %d for lcid %d\n", enb_mod_idP, CC_idP, @@ -862,6 +884,25 @@ rx_sdu(const module_id_t enb_mod_idP, rx_lcids[i]); if (UE_id != -1) { + ue_contextP = rrc_eNB_get_ue_context(RC.rrc[enb_mod_idP], current_rnti); + if (ue_contextP != NULL) { + if (ue_contextP->ue_context.DRB_active[rx_lcids[i] - 2] == 0) { + LOG_E(MAC, "[eNB %d/%d] frame %d received non active DTCH of size %d ( sdu_len %d, lcid %d), dropping packet\n", + enb_mod_idP, + CC_idP, + frameP, + rx_lengths[i], + sdu_lenP,rx_lcids[i]); + UE_list->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1; + break; + } + }else{ + LOG_E(MAC, "[eNB %d] CC_id %d Couldn't find the context associated to UE (RNTI %d) and reset RRC inactivity timer\n", + enb_mod_idP, + CC_idP, + current_rnti); + break; + } /* Adjust buffer occupancy of the correponding logical channel group */ LOG_D(MAC, "[eNB %d] CC_id %d Frame %d : ULSCH -> UL-DTCH, received %d bytes from UE %d for lcid %d, removing from LCGID %ld, %d\n", enb_mod_idP, @@ -890,16 +931,12 @@ rx_sdu(const module_id_t enb_mod_idP, } } - if ((rx_lengths[i] < SCH_PAYLOAD_SIZE_MAX) && (rx_lengths[i] > 0)) { // MAX SIZE OF transport block mac_rlc_data_ind(enb_mod_idP, current_rnti, enb_mod_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, rx_lcids[i], (char *) payload_ptr, rx_lengths[i], 1, NULL); UE_info->eNB_UE_stats[CC_idP][UE_id].num_pdu_rx[rx_lcids[i]] += 1; UE_info->eNB_UE_stats[CC_idP][UE_id].num_bytes_rx[rx_lcids[i]] += rx_lengths[i]; /* Clear uplane_inactivity_timer */ UE_scheduling_control->uplane_inactivity_timer = 0; /* Reset RRC inactivity timer after uplane activity */ - ue_contextP = rrc_eNB_get_ue_context(RC.rrc[enb_mod_idP], current_rnti); - - if (ue_contextP != NULL) { ue_contextP->ue_context.ue_rrc_inactivity_timer = 1; } else { LOG_E(MAC, "[eNB %d] CC_id %d Couldn't find the context associated to UE (RNTI %d) and reset RRC inactivity timer\n", From cb927c7f9ae7caf6319cc2f0569a4449163c0795 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Fri, 10 Jul 2020 21:22:53 +0900 Subject: [PATCH 32/54] Add statistics logs. (cherry picked from commit cf8f14edf4a261e1df72579423786d39ba6d97f9) --- nfapi/oai_integration/nfapi_vnf.c | 25 ++++++++++++++- openair2/LAYER2/MAC/defs.h | 18 +++++------ openair2/LAYER2/MAC/eNB_scheduler.c | 32 +++++++++++++++++-- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 12 ++++++- .../LAYER2/MAC/eNB_scheduler_primitives.c | 3 +- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 2 +- openair2/LAYER2/MAC/mac.h | 20 ++++++------ 7 files changed, 88 insertions(+), 24 deletions(-) diff --git a/nfapi/oai_integration/nfapi_vnf.c b/nfapi/oai_integration/nfapi_vnf.c index 6a33fba5c0..b93cb9c342 100644 --- a/nfapi/oai_integration/nfapi_vnf.c +++ b/nfapi/oai_integration/nfapi_vnf.c @@ -358,8 +358,31 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf) { proc->frame_rx, proc->subframe_rx); } + // wake up TX for subframe n+sf_ahead + // lock the TX mutex and make sure the thread is ready + if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) { + LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt ); + //exit_fun( "error locking mutex_rxtx" ); + return(-1); + } + static int busy_log_cnt=0; + if(L1_proc->instance_cnt < 0){ + ++L1_proc->instance_cnt; + if(busy_log_cnt!=0){ + LOG_E(MAC,"RCC singal to rxtx frame %d subframe %d busy end %d (frame %d subframe %d)\n",L1_proc->frame_rx,L1_proc->subframe_rx,busy_log_cnt,proc->frame_rx,proc->subframe_rx); + } + busy_log_cnt=0; + }else{ + if(busy_log_cnt==0){ + LOG_E(MAC,"RCC singal to rxtx frame %d subframe %d busy %d (frame %d subframe %d)\n",L1_proc->frame_rx,L1_proc->subframe_rx,L1_proc->instance_cnt,proc->frame_rx,proc->subframe_rx); + } + pthread_mutex_unlock( &L1_proc->mutex ); + busy_log_cnt++; + return(0); + } + + pthread_mutex_unlock( &L1_proc->mutex ); - ++L1_proc->instance_cnt; //LOG_D( PHY,"[VNF-subframe_ind] sfn/sf:%d:%d proc[frame_rx:%d subframe_rx:%d] L1_proc->instance_cnt_rxtx:%d \n", sfn, sf, proc->frame_rx, proc->subframe_rx, L1_proc->instance_cnt_rxtx); // We have just received and processed the common part of a subframe, say n. // TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h index 654fb4b228..2a807c1af5 100644 --- a/openair2/LAYER2/MAC/defs.h +++ b/openair2/LAYER2/MAC/defs.h @@ -829,16 +829,16 @@ typedef struct { uint8_t periodic_ri_received[NFAPI_CC_MAX]; uint8_t aperiodic_ri_received[NFAPI_CC_MAX]; uint32_t pucch_tpc_accumulated[NFAPI_CC_MAX]; - uint8_t pucch1_cqi_update[NFAPI_CC_MAX]; - uint8_t pucch1_snr[NFAPI_CC_MAX]; - uint8_t pucch2_cqi_update[NFAPI_CC_MAX]; - uint8_t pucch2_snr[NFAPI_CC_MAX]; - uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; - uint8_t pucch3_snr[NFAPI_CC_MAX]; + int16_t pucch1_cqi_update[NFAPI_CC_MAX]; + int16_t pucch1_snr[NFAPI_CC_MAX]; + int16_t pucch2_cqi_update[NFAPI_CC_MAX]; + int16_t pucch2_snr[NFAPI_CC_MAX]; + int16_t pucch3_cqi_update[NFAPI_CC_MAX]; + int16_t pucch3_snr[NFAPI_CC_MAX]; double pusch_cqi_f[NFAPI_CC_MAX]; - uint8_t pusch_cqi[NFAPI_CC_MAX]; - uint8_t pusch_snr[NFAPI_CC_MAX]; - uint8_t pusch_snr_avg[NFAPI_CC_MAX]; + int16_t pusch_cqi[NFAPI_CC_MAX]; + int16_t pusch_snr[NFAPI_CC_MAX]; + int16_t pusch_snr_avg[NFAPI_CC_MAX]; uint64_t pusch_rx_num[NFAPI_CC_MAX]; uint64_t pusch_rx_num_old[NFAPI_CC_MAX]; uint64_t pusch_rx_error_num[NFAPI_CC_MAX]; diff --git a/openair2/LAYER2/MAC/eNB_scheduler.c b/openair2/LAYER2/MAC/eNB_scheduler.c index dd68cb8097..f76ee72c9b 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler.c +++ b/openair2/LAYER2/MAC/eNB_scheduler.c @@ -596,13 +596,41 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, UE_scheduling_control = &(UE_info->UE_sched_ctrl[UE_id]); if (((frameP & 127) == 0) && (subframeP == 0)) { - LOG_I(MAC,"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n", + double total_bler; + if(UE_scheduling_control->pusch_rx_num[CC_id] == 0 && UE_scheduling_control->pusch_rx_error_num[CC_id] == 0) { + total_bler = 0; + } + else { + total_bler = (double)UE_scheduling_control->pusch_rx_error_num[CC_id] / (double)(UE_scheduling_control->pusch_rx_error_num[CC_id] + UE_scheduling_control->pusch_rx_num[CC_id]) * 100; + } + LOG_I(MAC,"UE %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf mcsoff %d bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d\n", rnti, UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync", UE_info->UE_template[CC_id][UE_id].phr_info, UE_scheduling_control->dl_cqi[CC_id], UE_scheduling_control->pusch_snr_avg[CC_id], - UE_scheduling_control->pucch1_snr[CC_id]); + UE_scheduling_control->pucch1_snr[CC_id], + UE_scheduling_control->rlc_out_of_resources_cnt, + UE_scheduling_control->pusch_rx_num[CC_id], + UE_scheduling_control->pusch_rx_error_num[CC_id], + total_bler, + UE_scheduling_control->mcs_offset[CC_id], + UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer, + UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes, + UE_info->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes_rx, + UE_info->eNB_UE_stats[CC_id][UE_id].total_num_pdus_rx, + UE_info->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes, + UE_info->eNB_UE_stats[CC_id][UE_id].total_num_pdus, + UE_info->eNB_UE_stats[CC_id][UE_id].total_rbs_used, +#if defined(PRE_SCD_THREAD) + dl_buffer_total[CC_id][UE_id], +#else + 0, +#endif + UE_scheduling_control->first_cnt[CC_id], + UE_scheduling_control->ret_cnt[CC_id], + UE_scheduling_control->aperiodic_ri_received[CC_id] + ); } RC.eNB[module_idP][CC_id]->pusch_stats_bsr[UE_id][(frameP * 10) + subframeP] = -63; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 3ee27ae04b..5e4810e57a 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -1001,7 +1001,17 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id, rnti = dlsch_ue_select[CC_id].list[i].rnti; ue_sched_ctl = &UE_info->UE_sched_ctrl[UE_id]; harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP,subframeP); - Round = ue_sched_ctl->round[CC_id][harq_pid]; + + unsigned char round1, round2; + round1 = ue_sched_ctl->round[CC_id][harq_pid][TB1]; + round2 = ue_sched_ctl->round[CC_id][harq_pid][TB2]; + if ((round1 != 8) || (round2 != 8)){ + Round = cmin(round1,round2); + ue_sched_ctl->ret_cnt[CC_id]++; + } else{ + Round = 8; + ue_sched_ctl->first_cnt[CC_id]++; + } //if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round > 0) { if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || Round != 8) { // FIXME diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index 0107daf3e0..c8d4862144 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2226,7 +2226,8 @@ add_new_ue(module_id_t mod_idP, UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_bler[cc_idP] = 0; - UE_info->UE_sched_ctrl[UE_id].mcs_offset[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].ret_cnt[cc_idP] = 0; + UE_info->UE_sched_ctrl[UE_id].first_cnt[cc_idP] = 0; for (j = 0; j < 8; j++) { UE_info->UE_template[cc_idP][UE_id].oldNDI[j] = 0; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index fb258b1ea3..2f41e015e9 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -202,7 +202,7 @@ rx_sdu(const module_id_t enb_mod_idP, } } else { // sduP == NULL => error UE_scheduling_control->pusch_rx_error_num[CC_idP]++; - LOG_W(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", + LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", enb_mod_idP, harq_pid, CC_idP, diff --git a/openair2/LAYER2/MAC/mac.h b/openair2/LAYER2/MAC/mac.h index 62346e7ef7..d10f8e5be2 100644 --- a/openair2/LAYER2/MAC/mac.h +++ b/openair2/LAYER2/MAC/mac.h @@ -933,6 +933,8 @@ typedef struct { /// Current DL harq round per harq_pid on each CC uint8_t round[NFAPI_CC_MAX][10]; + uint32_t ret_cnt[NFAPI_CC_MAX]; + uint32_t first_cnt[NFAPI_CC_MAX]; /// Current Active TBs per harq_pid on each CC uint8_t tbcnt[NFAPI_CC_MAX][10]; /// Current UL harq round per harq_pid on each CC @@ -960,16 +962,16 @@ typedef struct { int32_t phr_received; uint8_t periodic_ri_received[NFAPI_CC_MAX]; uint8_t aperiodic_ri_received[NFAPI_CC_MAX]; - uint8_t pucch1_cqi_update[NFAPI_CC_MAX]; - uint8_t pucch1_snr[NFAPI_CC_MAX]; - uint8_t pucch2_cqi_update[NFAPI_CC_MAX]; - uint8_t pucch2_snr[NFAPI_CC_MAX]; - uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; - uint8_t pucch3_snr[NFAPI_CC_MAX]; + int16_t pucch1_cqi_update[NFAPI_CC_MAX]; + int16_t pucch1_snr[NFAPI_CC_MAX]; + int16_t pucch2_cqi_update[NFAPI_CC_MAX]; + int16_t pucch2_snr[NFAPI_CC_MAX]; + int16_t pucch3_cqi_update[NFAPI_CC_MAX]; + int16_t pucch3_snr[NFAPI_CC_MAX]; double pusch_cqi_f[NFAPI_CC_MAX]; - uint8_t pusch_cqi[NFAPI_CC_MAX]; - uint8_t pusch_snr[NFAPI_CC_MAX]; - uint8_t pusch_snr_avg[NFAPI_CC_MAX]; + int16_t pusch_cqi[NFAPI_CC_MAX]; + int16_t pusch_snr[NFAPI_CC_MAX]; + int16_t pusch_snr_avg[NFAPI_CC_MAX]; uint64_t pusch_rx_num[NFAPI_CC_MAX]; uint64_t pusch_rx_num_old[NFAPI_CC_MAX]; uint64_t pusch_rx_error_num[NFAPI_CC_MAX]; From 39b9ffd69bc8b3258f9ebe69816a5b33832b6400 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Mon, 20 Jul 2020 15:10:00 +0900 Subject: [PATCH 33/54] Add DC removing to signal power measurement. --- openair1/PHY/TOOLS/signal_energy.c | 231 ++++++++++++++++++----------- 1 file changed, 146 insertions(+), 85 deletions(-) diff --git a/openair1/PHY/TOOLS/signal_energy.c b/openair1/PHY/TOOLS/signal_energy.c index 687d38bda7..d2c2817b0e 100644 --- a/openair1/PHY/TOOLS/signal_energy.c +++ b/openair1/PHY/TOOLS/signal_energy.c @@ -29,6 +29,7 @@ #define shift 4 //#define shift_DC 0 +#define SHRT_MIN -32768 #if defined(__x86_64__) || defined(__i386__) #ifdef LOCALIZATION @@ -67,52 +68,86 @@ int32_t subcarrier_energy(int32_t *input,uint32_t length, int32_t *subcarrier_en } #endif +//int32_t signal_energy(int32_t *input,uint32_t length) +//{ +// +// int32_t i; +// int32_t temp,temp2; +// register __m64 mm0,mm1,mm2,mm3; +// __m64 *in = (__m64 *)input; +// +// +// mm0 = _mm_setzero_si64();//pxor(mm0,mm0); +// mm3 = _mm_setzero_si64();//pxor(mm3,mm3); +// +// for (i=0; i>1; i++) { +// +// mm1 = in[i]; +// mm2 = mm1; +// mm1 = _m_pmaddwd(mm1,mm1); +// mm1 = _m_psradi(mm1,shift);// shift any 32 bits blocs of the word by the value shift +// mm0 = _m_paddd(mm0,mm1);// add the two 64 bits words 4 bytes by 4 bytes +// // mm2 = _m_psrawi(mm2,shift_DC); +// mm3 = _m_paddw(mm3,mm2);// add the two 64 bits words 2 bytes by 2 bytes +// } +// +// mm1 = mm0; +// mm0 = _m_psrlqi(mm0,32); +// mm0 = _m_paddd(mm0,mm1); +// temp = _m_to_int(mm0); +// temp/=length; +// temp<<=shift; // this is the average of x^2 +// +// // now remove the DC component +// +// +// mm2 = _m_psrlqi(mm3,32); +// mm2 = _m_paddw(mm2,mm3); +// mm2 = _m_pmaddwd(mm2,mm2); +// temp2 = _m_to_int(mm2); +// temp2/=(length*length); +// // temp2<<=(2*shift_DC); +// temp -= temp2; +// +// _mm_empty(); +// _m_empty(); +// +// return((temp>0)?temp:1); + +//----------------------------------------------------------------- +// Average Power calculation with DC removing +//----------------------------------------------------------------- int32_t signal_energy(int32_t *input,uint32_t length) { + uint32_t i; + int32_t temp; + __m128i in, in_clp, i16_min, coe1; + __m128 num0, num1, num2, num3, recp1; - int32_t i; - int32_t temp,temp2; - register __m64 mm0,mm1,mm2,mm3; - __m64 *in = (__m64 *)input; + //init + num0 = _mm_setzero_ps(); + num1 = _mm_setzero_ps(); + i16_min = _mm_set1_epi16(SHRT_MIN); + coe1 = _mm_set1_epi16(1); + recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length))); - - mm0 = _mm_setzero_si64();//pxor(mm0,mm0); - mm3 = _mm_setzero_si64();//pxor(mm3,mm3); - - for (i=0; i>1; i++) { - - mm1 = in[i]; - mm2 = mm1; - mm1 = _m_pmaddwd(mm1,mm1); - mm1 = _m_psradi(mm1,shift);// shift any 32 bits blocs of the word by the value shift - mm0 = _m_paddd(mm0,mm1);// add the two 64 bits words 4 bytes by 4 bytes - // mm2 = _m_psrawi(mm2,shift_DC); - mm3 = _m_paddw(mm3,mm2);// add the two 64 bits words 2 bytes by 2 bytes + //Acc + for (i = 0; i < (length >> 2); i++) { + in = _mm_loadu_si128((__m128i *)input); + in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in + num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp))); + num1 = _mm_add_ps(num1, _mm_cvtepi32_ps(_mm_madd_epi16(in, coe1)));//DC + input += 4; } + //Ave + num2 = _mm_dp_ps(num0, recp1, 0xFF);//AC power + num3 = _mm_dp_ps(num1, recp1, 0xFF);//DC + num3 = _mm_mul_ps(num3, num3); //DC power + //remove DC + temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(_mm_sub_ps(num2, num3))); - mm1 = mm0; - mm0 = _m_psrlqi(mm0,32); - mm0 = _m_paddd(mm0,mm1); - temp = _m_to_int(mm0); - temp/=length; - temp<<=shift; // this is the average of x^2 + return temp; - - // now remove the DC component - - - mm2 = _m_psrlqi(mm3,32); - mm2 = _m_paddw(mm2,mm3); - mm2 = _m_pmaddwd(mm2,mm2); - temp2 = _m_to_int(mm2); - temp2/=(length*length); - // temp2<<=(2*shift_DC); - temp -= temp2; - - _mm_empty(); - _m_empty(); - - return((temp>0)?temp:1); } int32_t signal_energy_amp_shift(int32_t *input,uint32_t length) @@ -164,60 +199,86 @@ int32_t signal_energy_amp_shift(int32_t *input,uint32_t length) int32_t signal_energy_nodc(int32_t *input,uint32_t length) { +// int32_t i; +// int32_t temp; +// register __m64 mm0,mm1;//,mm2,mm3; +// __m64 *in = (__m64 *)input; +// +//#ifdef MAIN +// int16_t *printb; +//#endif +// +// mm0 = _mm_setzero_si64();//_pxor(mm0,mm0); +// // mm3 = _mm_setzero_si64();//pxor(mm3,mm3); +// +// for (i=0; i>1; i++) { +// +// mm1 = in[i]; +// mm1 = _m_pmaddwd(mm1,mm1);// SIMD complex multiplication +// mm1 = _m_psradi(mm1,shift); +// mm0 = _m_paddd(mm0,mm1); +// // temp2 = mm0; +// // printf("%d %d\n",((int *)&in[i])[0],((int *)&in[i])[1]); +// +// +// // printb = (int16_t *)&mm2; +// // printf("mm2 %d : %d %d %d %d\n",i,printb[0],printb[1],printb[2],printb[3]); +// +// +// } +// +// /* +// #ifdef MAIN +// printb = (int16_t *)&mm3; +// printf("%d %d %d %d\n",printb[0],printb[1],printb[2],printb[3]); +// #endif +// */ +// mm1 = mm0; +// +// mm0 = _m_psrlqi(mm0,32); +// +// mm0 = _m_paddd(mm0,mm1); +// +// temp = _m_to_int(mm0); +// +// temp/=length; +// temp<<=shift; // this is the average of x^2 +// +//#ifdef MAIN +// printf("E x^2 = %d\n",temp); +//#endif +// _mm_empty(); +// _m_empty(); +// +// +// +// return((temp>0)?temp:1); + + + int32_t i; int32_t temp; - register __m64 mm0,mm1;//,mm2,mm3; - __m64 *in = (__m64 *)input; - -#ifdef MAIN - int16_t *printb; -#endif - - mm0 = _mm_setzero_si64();//_pxor(mm0,mm0); - // mm3 = _mm_setzero_si64();//pxor(mm3,mm3); - - for (i=0; i>1; i++) { - - mm1 = in[i]; - mm1 = _m_pmaddwd(mm1,mm1);// SIMD complex multiplication - mm1 = _m_psradi(mm1,shift); - mm0 = _m_paddd(mm0,mm1); - // temp2 = mm0; - // printf("%d %d\n",((int *)&in[i])[0],((int *)&in[i])[1]); - - - // printb = (int16_t *)&mm2; - // printf("mm2 %d : %d %d %d %d\n",i,printb[0],printb[1],printb[2],printb[3]); + __m128i in; + __m128 mm0; +//init + mm0 = _mm_setzero_ps(); +//Acc + for (i=0; i<(length>>2); i++) { + in = _mm_loadu_si128((__m128i *)input); + mm0 = _mm_add_ps(mm0,_mm_cvtepi32_ps(_mm_madd_epi16(in,in))); + input += 4; } + //Ave + temp = (int)((((float*)&mm0)[0] + + ((float*)&mm0)[1] + + ((float*)&mm0)[2] + + ((float*)&mm0)[3])/(float)length); - /* - #ifdef MAIN - printb = (int16_t *)&mm3; - printf("%d %d %d %d\n",printb[0],printb[1],printb[2],printb[3]); - #endif - */ - mm1 = mm0; - - mm0 = _m_psrlqi(mm0,32); - - mm0 = _m_paddd(mm0,mm1); - - temp = _m_to_int(mm0); - - temp/=length; - temp<<=shift; // this is the average of x^2 - -#ifdef MAIN - printf("E x^2 = %d\n",temp); -#endif - _mm_empty(); - _m_empty(); + return temp; - - return((temp>0)?temp:1); } #elif defined(__arm__) From b54c32b70d85e8f96a80c178c6311ceffb33812e Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Tue, 21 Jul 2020 18:41:42 +0900 Subject: [PATCH 34/54] Change UL DCI aggregation level by DL cqi. (cherry picked from commit 175c59ae3aedf612777cd1c8c88b6d6f254b9334) --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 39 ++++++++++++++++++++-- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 5e4810e57a..7e68349e47 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2312,6 +2312,18 @@ void ulsch_scheduler_pre_ue_select_fairRR( } } + if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) { + aggregation = 4; + + if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4) + aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); + }else{ + //aggregation = 2; + aggregation = get_aggregation(get_bw_index(module_idP, CC_id), + UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id], + format0); + } + cc = &eNB->common_channels[CC_id]; //harq_pid harq_pid = subframe2harqpid(cc,(frameP+(sched_subframePhi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi]; - format_flag = 2; rnti = UE_RNTI(module_idP,first_ue_id[CC_id][temp]); + format_flag = 2; aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_info->UE_sched_ctrl[first_ue_id[CC_id][temp]].dl_cqi[CC_id],format0); - + if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) { + aggregation = 4; + + if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4) + aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); + }else { + aggregation = get_aggregation(get_bw_index(module_idP, CC_id), + UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id], + format0); + } if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) { cc_id_flag[CC_id] = 1; break; @@ -2498,6 +2519,9 @@ void ulsch_scheduler_pre_ue_select_fairRR( format_flag = 2; aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); + aggregation = get_aggregation(get_bw_index(module_idP, CC_id), + UE_list->UE_sched_ctrl[UE_id].dl_cqi[CC_id], + format0); if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) { cc_id_flag[CC_id] = 1; continue; @@ -3112,7 +3136,16 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP, UE_sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; harq_pid = subframe2harqpid(cc,sched_frame,sched_subframeP); rnti = UE_RNTI(CC_id,UE_id); - aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); + if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) { + aggregation = 4; + if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4) + aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); + }else{ + //aggregation = 2; + aggregation = get_aggregation(get_bw_index(module_idP, CC_id), + UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id], + format0); + } LOG_D(MAC,"[eNB %d] frame %d subframe %d,Checking PUSCH %d for UE %d/%x CC %d : aggregation level %d, N_RB_UL %d\n", module_idP,frameP,subframeP,harq_pid,UE_id,rnti,CC_id, aggregation,N_RB_UL); int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes; From de568b2d8841f32753f0586d78c0e13a4a66184f Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Tue, 8 Sep 2020 16:00:36 +0900 Subject: [PATCH 35/54] Change default value of pusch signal power threshold. --- openair2/ENB_APP/L1_paramdef.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/ENB_APP/L1_paramdef.h b/openair2/ENB_APP/L1_paramdef.h index 6c303ae29f..813cca419c 100644 --- a/openair2/ENB_APP/L1_paramdef.h +++ b/openair2/ENB_APP/L1_paramdef.h @@ -91,7 +91,7 @@ {CONFIG_STRING_L1_PRACH_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \ {CONFIG_STRING_L1_PUCCH1_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \ -{CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD, NULL, 0, iptr:NULL, defintval:330, TYPE_INT, 0} \ +{CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD, NULL, 0, iptr:NULL, defintval:635, TYPE_INT, 0} \ } #define L1_CC_IDX 0 #define L1_TRANSPORT_N_PREFERENCE_IDX 1 From 1a320bc6d4d74df5c695f4d46a5d77cef4005d6f Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Mon, 14 Sep 2020 15:47:52 +0900 Subject: [PATCH 36/54] Fix: SNR feedback to PUSCH TPC and PUCCH TPC of default scheduler. --- openair2/LAYER2/MAC/eNB_scheduler_phytest.c | 1 - openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_phytest.c b/openair2/LAYER2/MAC/eNB_scheduler_phytest.c index 8bd3ebdd9b..1e595f11b5 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_phytest.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_phytest.c @@ -239,7 +239,6 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s //compute the expected ULSCH RX power (for the stats) // this is the snr and this should be constant (regardless of mcs) snr = UE_sched_ctrl->pusch_snr[CC_id]; - // new transmission ndi = 1-UE_template->oldNDI_UL[harq_pid]; UE_template->oldNDI_UL[harq_pid]=ndi; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 2f41e015e9..d3a13591b4 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -1492,7 +1492,7 @@ schedule_ulsch_rnti(module_id_t module_idP, * This is the normalized RX snr and this should be constant (regardless * of mcs) Is not in dBm, unit from nfapi, converting to dBm */ - const int32_t snr = (5 * UE_sched_ctrl_ptr->pusch_snr[CC_id] - 640) / 10; + const int32_t snr = UE_sched_ctrl_ptr->pusch_snr[CC_id]; const int32_t target_snr = mac->puSch10xSnr / 10; /* @@ -2073,7 +2073,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP, cqi_req = 0; /* Power control: compute the expected ULSCH RX snr (for the stats) */ /* This is the normalized snr and this should be constant (regardless of mcs) */ - snr = UE_sched_ctrl->pusch_snr_avg[CC_id]; + snr = UE_sched_ctrl->pusch_snr[CC_id]; target_snr = eNB->puSch10xSnr / 10; /* TODO: target_rx_power was 178, what to put? */ /* This assumes accumulated tpc */ /* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */ From fc595236b33056e91293c66cb4436f984708cf3a Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Tue, 15 Sep 2020 11:38:41 +0900 Subject: [PATCH 37/54] add logs. --- openair2/LAYER2/MAC/eNB_scheduler_primitives.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index c8d4862144..32c01593b1 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -4946,6 +4946,7 @@ cqi_indication(module_id_t mod_idP, { int UE_id = find_UE_id(mod_idP, rntiP); UE_info_t *UE_info = &RC.mac[mod_idP]->UE_info; + uint64_t pdu_val = *(uint64_t *) pdu; if (UE_id == -1) { LOG_W(MAC, "cqi_indication: UE %x not found\n", rntiP); @@ -4985,10 +4986,10 @@ cqi_indication(module_id_t mod_idP, subframeP, pdu, rel9->length); - LOG_D(MAC,"Frame %d Subframe %d update CQI:%d\n", + LOG_D(MAC,"Frame %d Subframe %d update CQI:%d pdu 0x%016"PRIx64"\n", frameP, subframeP, - sched_ctl->dl_cqi[CC_idP]); + sched_ctl->dl_cqi[CC_idP],pdu_val); sched_ctl->cqi_req_flag &= (~(1 << subframeP)); sched_ctl->cqi_received = 1; } From 18becc60fc70073313fc67747b107964bc82a126 Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Fri, 25 Sep 2020 12:46:03 +0900 Subject: [PATCH 38/54] Fix: rfsim abnormal CCCH reception. --- openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c | 3 --- openair1/SCHED/ru_procedures.c | 1 - 2 files changed, 4 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index f1279ddc2c..b4b273aa8e 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -1081,9 +1081,6 @@ void rx_ulsch(PHY_VARS_eNB *eNB, symbol_offset = frame_parms->N_RB_UL*12*((3 - frame_parms->Ncp)+(7-frame_parms->Ncp)); pusch_vars->ulsch_interference_power[i] += interference_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); pusch_vars->ulsch_power[i] += signal_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12); - //ave - pusch_vars->ulsch_interference_power[i] >>= 1; - pusch_vars->ulsch_power[i] >>= 1; pusch_vars->ulsch_interference_power[i] = pusch_vars->ulsch_interference_power[i]/correction_factor; pusch_vars->ulsch_power[i] = pusch_vars->ulsch_power[i]/correction_factor; diff --git a/openair1/SCHED/ru_procedures.c b/openair1/SCHED/ru_procedures.c index e472d64db4..70399f0a23 100644 --- a/openair1/SCHED/ru_procedures.c +++ b/openair1/SCHED/ru_procedures.c @@ -775,7 +775,6 @@ void fep_full(RU_t *ru, if ((fp->frame_type == TDD) && (subframe_select(fp,subframe) != SF_UL)) return; - start_meas(&ru->ofdm_demod_stats); if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+ru->idx, 1 ); From 5db6e75bb101bdfe2deb3af9dbb8187da2882dce Mon Sep 17 00:00:00 2001 From: Haruki NAOI Date: Fri, 25 Sep 2020 15:18:45 +0900 Subject: [PATCH 39/54] fix warning. --- openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c | 1 + 1 file changed, 1 insertion(+) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index b4b273aa8e..978e38afca 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -1031,6 +1031,7 @@ void rx_ulsch(PHY_VARS_eNB *eNB, AssertFatal(ulsch[UE_id]->harq_processes[harq_pid]->nb_rb > 0, "PUSCH (%d/%x) nb_rb=0!\n", harq_pid,ulsch[UE_id]->rnti); + for (l=0; l<(frame_parms->symbols_per_tti-ulsch[UE_id]->harq_processes[harq_pid]->srs_active); l++) { if(LOG_DEBUGFLAG(DEBUG_ULSCH)) { LOG_I(PHY,"rx_ulsch : symbol %d (first_rb %d,nb_rb %d), rxdataF %p, rxdataF_ext %p\n",l, From 6d0ef37c8ecee25bce691be23c2ec4fe5c315ebf Mon Sep 17 00:00:00 2001 From: zhenghuangkun Date: Fri, 25 Sep 2020 16:33:24 +0900 Subject: [PATCH 40/54] Modify DRB_active array size to NB_RB_MAX -2 --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 7 +++++++ openair2/RRC/LTE/rrc_defs.h | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index d3a13591b4..1991c81397 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -961,6 +961,13 @@ rx_sdu(const module_id_t enb_mod_idP, rx_lcids[i], UE_id); } + }else { + LOG_E(MAC, "[eNB %d/%d] frame %d received a invalid LCID of size %d ( sdu_len %d, lcid %d), dropping packet\n", + enb_mod_idP, + CC_idP, + frameP, + rx_lengths[i], + sdu_lenP,rx_lcids[i]); } break; diff --git a/openair2/RRC/LTE/rrc_defs.h b/openair2/RRC/LTE/rrc_defs.h index 7829360939..7602e9ca64 100644 --- a/openair2/RRC/LTE/rrc_defs.h +++ b/openair2/RRC/LTE/rrc_defs.h @@ -554,7 +554,7 @@ typedef struct eNB_RRC_UE_s { LTE_DRB_ToAddModList_t *DRB_configList; LTE_DRB_ToAddModList_t *DRB_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER]; LTE_DRB_ToReleaseList_t *DRB_Release_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER]; - uint8_t DRB_active[8]; + uint8_t DRB_active[NB_RB_MAX -2]; struct LTE_PhysicalConfigDedicated *physicalConfigDedicated; struct LTE_SPS_Config *sps_Config; LTE_MeasObjectToAddMod_t *MeasObj[MAX_MEAS_OBJ]; From e64593246bee967300f3bf61a9088dbdbf2bc798 Mon Sep 17 00:00:00 2001 From: zhenghuangkun Date: Fri, 25 Sep 2020 18:31:52 +0900 Subject: [PATCH 41/54] Fix: rfsim abnormal CCCH reception. --- openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c index 978e38afca..eeab616097 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c @@ -755,6 +755,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext, __m128i *ul_ch128,*ul_ch_mag128,*ul_ch_mag128b,*rxdataF128,*rxdataF_comp128; uint8_t aarx;//,symbol_mod; __m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3; + #elif defined(__arm__) int16x4_t *ul_ch128,*rxdataF128; int16x8_t *ul_ch_mag128,*ul_ch_mag128b,*rxdataF_comp128; @@ -762,6 +763,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext, int32x4_t mmtmpU0,mmtmpU1,mmtmpU0b,mmtmpU1b; int16_t conj[4]__attribute__((aligned(16))) = {1,-1,1,-1}; int32x4_t output_shift128 = vmovq_n_s32(-(int32_t)output_shift); + #endif for (aarx=0; aarxnb_antennas_rx; aarx++) { @@ -872,6 +874,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext, rxdataF_comp128[0] = _mm_add_epi16(rxdataF_comp128[0],(*(__m128i *)&jitter[0])); rxdataF_comp128[1] = _mm_add_epi16(rxdataF_comp128[1],(*(__m128i *)&jitter[0])); rxdataF_comp128[2] = _mm_add_epi16(rxdataF_comp128[2],(*(__m128i *)&jitter[0])); + ul_ch128+=3; ul_ch_mag128+=3; ul_ch_mag128b+=3; @@ -918,9 +921,10 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext, mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128); rxdataF_comp128[2] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1)); // Add a jitter to compensate for the saturation in "packs" resulting in a bias on the DC after IDFT - rxdataF_comp128[0] = vqaddq_s16(rxdataF_comp128[0],(*(int16x8_t *)&jitter[0])); - rxdataF_comp128[1] = vqaddq_s16(rxdataF_comp128[1],(*(int16x8_t *)&jitter[0])); - rxdataF_comp128[2] = vqaddq_s16(rxdataF_comp128[2],(*(int16x8_t *)&jitter[0])); + rxdataF_comp128[0] = vqaddq_s16(rxdataF_comp128[0],(*(int16x8_t*)&jitter[0])); + rxdataF_comp128[1] = vqaddq_s16(rxdataF_comp128[1],(*(int16x8_t*)&jitter[0])); + rxdataF_comp128[2] = vqaddq_s16(rxdataF_comp128[2],(*(int16x8_t*)&jitter[0])); + ul_ch128+=6; ul_ch_mag128+=3; ul_ch_mag128b+=3; From 15680553108dd0be3b15c0eb1efcc21c97680a28 Mon Sep 17 00:00:00 2001 From: Ding Yumei Date: Thu, 15 Oct 2020 14:48:19 +0900 Subject: [PATCH 42/54] fix segmentation fault(ul dtch length error) --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 1991c81397..8f40e8a6a4 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -972,8 +972,13 @@ rx_sdu(const module_id_t enb_mod_idP, break; } - - payload_ptr += rx_lengths[i]; + if((sdu_lenP - (payload_ptr - sduP)) >= rx_lengths[i]){ + payload_ptr += rx_lengths[i]; + }else{ + LOG_E(MAC,"[eNB %d/%d] frame %d subframe %d rnti %x sdu_len %d remain_len %d rx_lengths %d\n", + enb_mod_idP,CC_idP,frameP,subframeP,rntiP,sdu_lenP,(uint16_t)(payload_ptr - sduP), rx_lengths[i]); + return; + } } /* CDRX UL HARQ timers */ From 0dd16fb6f5fac6d0353d105336c4934bebde124c Mon Sep 17 00:00:00 2001 From: Ding Yumei Date: Tue, 20 Oct 2020 12:02:07 +0900 Subject: [PATCH 43/54] fix segmentation fault(ul error) --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 8f40e8a6a4..1ee739eaf6 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -862,9 +862,8 @@ rx_sdu(const module_id_t enb_mod_idP, LOG_T(MAC, "\n"); #endif - if (rx_lcids[i] < NB_RB_MAX) { - if ((rx_lengths[i] > SCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > sdu_lenP)) { + if ((rx_lengths[i] > SCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) { LOG_E(MAC, "[eNB %d/%d] frame %d received DTCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n", enb_mod_idP, CC_idP, @@ -976,7 +975,7 @@ rx_sdu(const module_id_t enb_mod_idP, payload_ptr += rx_lengths[i]; }else{ LOG_E(MAC,"[eNB %d/%d] frame %d subframe %d rnti %x sdu_len %d remain_len %d rx_lengths %d\n", - enb_mod_idP,CC_idP,frameP,subframeP,rntiP,sdu_lenP,(uint16_t)(payload_ptr - sduP), rx_lengths[i]); + enb_mod_idP,CC_idP,frameP,subframeP,rntiP,sdu_lenP,(uint16_t)(sdu_lenP - (payload_ptr - sduP)), rx_lengths[i]); return; } } From 67da5c7cf35d52f94caf80822d1f2553a4f406f8 Mon Sep 17 00:00:00 2001 From: Ding Yumei Date: Tue, 20 Oct 2020 12:12:57 +0900 Subject: [PATCH 44/54] fix segmentation fault(ccch/dcch length eror) --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 1ee739eaf6..4e63863df4 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -683,7 +683,7 @@ rx_sdu(const module_id_t enb_mod_idP, switch (rx_lcids[i]) { case CCCH: - if ((rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > sdu_lenP)) { + if ((rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) { LOG_E(MAC, "[eNB %d/%d] frame %d received CCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n", enb_mod_idP, CC_idP, @@ -804,7 +804,7 @@ rx_sdu(const module_id_t enb_mod_idP, LOG_T(MAC, "\n"); #endif - if ((rx_lengths[i] > DCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > sdu_lenP)) { + if ((rx_lengths[i] > DCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) { LOG_E(MAC, "[eNB %d/%d] frame %d received DCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n", enb_mod_idP, CC_idP, From a332423d97548d26b742f3a145e036910c999207 Mon Sep 17 00:00:00 2001 From: Ding Yumei Date: Tue, 20 Oct 2020 18:54:25 +0900 Subject: [PATCH 45/54] fix segmentation fault(mac head error) --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 4e63863df4..6639e10075 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -1130,6 +1130,10 @@ parse_ulsch_header(unsigned char *mac_header, tb_length, length, mac_header_ptr - mac_header); + if(num_sdus >= NB_RB_MAX){ + LOG_E(MAC,"parse_ulsch_header: num_sdus(%d) reach max\n",num_sdus); + return NULL; + } rx_lcids[num_sdus] = lcid; rx_lengths[num_sdus] = length; num_sdus++; @@ -1137,6 +1141,10 @@ parse_ulsch_header(unsigned char *mac_header, if (lcid == SHORT_PADDING) { mac_header_ptr++; } else { + if(num_ces >= MAX_NUM_CE){ + LOG_E(MAC,"parse_ulsch_header: num_ces(%d) reach max\n",num_ces); + return NULL; + } rx_ces[num_ces] = lcid; num_ces++; mac_header_ptr++; From 20f1d347ac630cbbd2e59d90b185b342a9a1bb4e Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Thu, 5 Nov 2020 23:07:49 +0900 Subject: [PATCH 46/54] Fix DCI0 aggregation and call ulsch scheduling. --- openair1/SCHED/fapi_l1.c | 22 ++++++++++++++++++++++ openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 5 +++++ 2 files changed, 27 insertions(+) diff --git a/openair1/SCHED/fapi_l1.c b/openair1/SCHED/fapi_l1.c index 96a073fbb8..e444dff41f 100644 --- a/openair1/SCHED/fapi_l1.c +++ b/openair1/SCHED/fapi_l1.c @@ -992,11 +992,33 @@ void schedule_response(Sched_Rsp_t *Sched_INFO, L1_rxtx_proc_t *proc) { if (NFAPI_MODE!=NFAPI_MONOLITHIC) { if (number_ul_pdu>0) { + uint8_t ulsch_pdu_num = 0; + for (i=0; iul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) || + (UL_req->ul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE) || + (UL_req->ul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE) || + (UL_req->ul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE)){ + ulsch_pdu_num++; + } + } + if (RC.mac[Mod_id]->scheduler_mode == SCHED_MODE_DEFAULT) { + //LOG_D(PHY, "UL_CONFIG to send to PNF\n"); + UL_req->sfn_sf = frame << 4 | subframe; + oai_nfapi_ul_config_req(UL_req); + UL_req->ul_config_request_body.number_of_pdus=0; + number_ul_pdu=0; + }else if (RC.mac[Mod_id]->scheduler_mode == SCHED_MODE_FAIR_RR) { + if(ulsch_pdu_num <= RC.rrc[Mod_id]->configuration.radioresourceconfig[CC_id].ue_multiple_max){ //LOG_D(PHY, "UL_CONFIG to send to PNF\n"); UL_req->sfn_sf = frame << 4 | subframe; oai_nfapi_ul_config_req(UL_req); UL_req->ul_config_request_body.number_of_pdus=0; number_ul_pdu=0; + }else{ + LOG_E(MAC,"NFAPI: frame %d subframe %d ul_req num %d ul pdu %d\n", + frame,subframe,number_ul_pdu,ulsch_pdu_num); + } + } } } else { for (i=0; icommon_channels; UE_info_t *UE_info = &mac->UE_info; + //uint8_t aggregation = 2; int sched_frame = frameP; @@ -1669,8 +1670,12 @@ schedule_ulsch_rnti(module_id_t module_idP, UE_template_ptr->cshift[harq_pid] = cshift; /* Setting DCI0 NFAPI struct */ hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[dci_ul_pdu_idx]; + //memset((void *) hi_dci0_pdu, 0,sizeof(nfapi_hi_dci0_request_pdu_t)); + hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE; hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_dci_pdu); hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dci_format = NFAPI_UL_DCI_FORMAT_0; + //hi_dci0_pdu->dci_pdu.dci_pdu_rel8.aggregation_level = aggregation; + hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = UE_template_ptr->pre_first_nb_rb_ul; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block = From 88699deb81e312e2c3695bd02d3c3157a65536fb Mon Sep 17 00:00:00 2001 From: zhenghuangkun Date: Mon, 30 Nov 2020 18:56:26 +0900 Subject: [PATCH 47/54] Merge branch fujitsu_lte_contribution into lte_uplink_improvement --- openair1/PHY/LTE_TRANSPORT/pucch.c | 3 +- openair2/ENB_APP/L1_paramdef.h | 2 +- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 65 ++++++------------- .../LAYER2/MAC/eNB_scheduler_primitives.c | 1 + openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 20 +----- openair2/LAYER2/MAC/mac.h | 2 + 6 files changed, 28 insertions(+), 65 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index 9c5f28bec3..fa4d883d64 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -737,7 +737,6 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, int16_t *zptr; int16_t rxcomp[NB_ANTENNAS_RX][2*12*14]; uint8_t ns,N_UL_symb,nsymb,n_cs_base; - uint8_t c = (frame_parms->Ncp==0) ? 3 : 2; uint16_t i,j,re_offset; uint8_t m,l; uint8_t n_cs,alpha_ind; @@ -848,7 +847,7 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, } interference_power /= calc_cnt; eNB->measurements.n0_pucch_dB = dB_fixed_x10((int)(interference_power/calc_cnt))/10; - LOG_D(PHY,"estimate pucch noise %d %d %d\n",interference_power,calc_cnt,eNB->measurements.n0_pucch_dB); + LOG_D(PHY,"estimate pucch noise %lf %d %d\n",interference_power,calc_cnt,eNB->measurements.n0_pucch_dB); return 0; } diff --git a/openair2/ENB_APP/L1_paramdef.h b/openair2/ENB_APP/L1_paramdef.h index 813cca419c..c4e6670ea3 100644 --- a/openair2/ENB_APP/L1_paramdef.h +++ b/openair2/ENB_APP/L1_paramdef.h @@ -117,7 +117,7 @@ #define L1_PRACH_DTX_EMTC3_THRESHOLD_IDX 21 #define L1_PUCCH1_DTX_EMTC3_THRESHOLD_IDX 22 #define L1_PUCCH1AB_DTX_EMTC3_THRESHOLD_IDX 23 -#define L1_PUSCH_SIGNAL_THRESHOLD_IDX 28 +#define L1_PUSCH_SIGNAL_THRESHOLD_IDX 24 /*----------------------------------------------------------------------------------------------------------------------------------------------------*/ #endif diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 7e68349e47..23137b7887 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -61,7 +61,9 @@ extern void add_subframe(uint16_t *frameP, uint16_t *subframeP, int offset); /* internal vars */ DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs]; int last_dlsch_ue_id[MAX_NUM_CCs] = {-1}; +int last_dlsch_ue_id_volte[MAX_NUM_CCs] = {-1}; int last_ulsch_ue_id[MAX_NUM_CCs] = {-1}; +int last_ulsch_ue_id_volte[MAX_NUM_CCs] = {-1}; #if defined(PRE_SCD_THREAD) uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; @@ -1001,17 +1003,7 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id, rnti = dlsch_ue_select[CC_id].list[i].rnti; ue_sched_ctl = &UE_info->UE_sched_ctrl[UE_id]; harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP,subframeP); - - unsigned char round1, round2; - round1 = ue_sched_ctl->round[CC_id][harq_pid][TB1]; - round2 = ue_sched_ctl->round[CC_id][harq_pid][TB2]; - if ((round1 != 8) || (round2 != 8)){ - Round = cmin(round1,round2); - ue_sched_ctl->ret_cnt[CC_id]++; - } else{ - Round = 8; - ue_sched_ctl->first_cnt[CC_id]++; - } + Round = ue_sched_ctl->round[CC_id][harq_pid]; //if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round > 0) { if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || Round != 8) { // FIXME @@ -2357,7 +2349,7 @@ void ulsch_scheduler_pre_ue_select_fairRR( if (bytes_to_schedule < 0) { bytes_to_schedule = 0; - UE_list->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0; + UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0; } if ( UE_id > last_ulsch_ue_id[CC_id] && ((ulsch_ue_select[CC_id].ue_num+ue_first_num[CC_id]) < ulsch_ue_max_num[CC_id]) ) { @@ -2415,32 +2407,11 @@ void ulsch_scheduler_pre_ue_select_fairRR( break; } - for(i = 0; ihi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi]; - rnti = UE_RNTI(module_idP,first_ue_id[CC_id][temp]); format_flag = 2; + rnti = UE_RNTI(module_idP,first_ue_id[CC_id][temp]); aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_info->UE_sched_ctrl[first_ue_id[CC_id][temp]].dl_cqi[CC_id],format0); - if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) { - aggregation = 4; - - if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4) - aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); - }else { - aggregation = get_aggregation(get_bw_index(module_idP, CC_id), - UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id], - format0); - } + if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) { cc_id_flag[CC_id] = 1; break; @@ -2507,7 +2478,7 @@ void ulsch_scheduler_pre_ue_select_fairRR( if (bytes_to_schedule < 0) { bytes_to_schedule = 0; - UE_list->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0; + UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0; } rrc_status = mac_eNB_get_rrc_status(module_idP, rnti); @@ -2517,11 +2488,17 @@ void ulsch_scheduler_pre_ue_select_fairRR( ((UE_sched_ctl->cqi_req_timer>64)&&((rrc_status >= RRC_CONNECTED))) ) { hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi]; format_flag = 2; - aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); - - aggregation = get_aggregation(get_bw_index(module_idP, CC_id), - UE_list->UE_sched_ctrl[UE_id].dl_cqi[CC_id], + if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) { + aggregation = 4; + + if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4) + aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0); + }else { + aggregation = get_aggregation(get_bw_index(module_idP, CC_id), + UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id], format0); + } + if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) { cc_id_flag[CC_id] = 1; continue; @@ -2625,7 +2602,6 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, uint16_t first_rb[MAX_NUM_CCs]; int8_t mcs; uint8_t snr; - uint8_t snr2mcs_offset = 3; double bler_filter=0.9; double bler; uint8_t rb_table_index; @@ -2818,10 +2794,9 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = rb_table_index; UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs; } - - LOG_D(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d snr %d snr_inst %d mcs %d mcs_offset %d bler %lf total_bler %lf ( %d %d ) rb_num %d phr_info %d tx_power %d bsr %d estimated_ul_buffer %d scheduled_ul_bytes %d\n", - module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id, snr, UE_list->UE_sched_ctrl[UE_id].pusch_snr[CC_id], mcs, UE_list->UE_sched_ctrl[UE_id].mcs_offset[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_bler[CC_id], - total_bler, UE_list->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id], UE_list->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id], rb_table[rb_table_index-1], UE_template->phr_info, tx_power, bytes_to_schedule, UE_template->estimated_ul_buffer, UE_template->scheduled_ul_bytes); + LOG_D(MAC,"[eNB %hu] frame %u subframe %u, UE %d/%x CC %d snr %hhu snr_inst %hhu mcs %hhd mcs_offset %hhu bler %lf total_bler %lf ( %lu %lu ) rb_num %hhu phr_info %hhd tx_power %hd bsr %d estimated_ul_buffer %d scheduled_ul_bytes %d\n", + module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id, snr, UE_info->UE_sched_ctrl[UE_id].pusch_snr[CC_id], mcs, UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id], UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id], + total_bler, UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id], UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id], rb_table[rb_table_index-1], UE_template->phr_info, tx_power, bytes_to_schedule, UE_template->estimated_ul_buffer, UE_template->scheduled_ul_bytes); } else { if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) { diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c index 32c01593b1..bd3c428828 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c @@ -2173,6 +2173,7 @@ add_new_ue(module_id_t mod_idP, ) //------------------------------------------------------------------------------ { + eNB_MAC_INST *eNB = RC.mac[mod_idP]; int UE_id; int i, j; UE_info_t *UE_info = &RC.mac[mod_idP]->UE_info; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 3858cb99b7..5b8f6a9d5c 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -871,7 +871,7 @@ rx_sdu(const module_id_t enb_mod_idP, rx_lengths[i], DCH_PAYLOAD_SIZE_MAX, sdu_lenP); - UE_list->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1; + UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1; break; } LOG_D(MAC, "[eNB %d] CC_id %d Frame %d : ULSCH -> UL-DTCH, received %d bytes from UE %d for lcid %d\n", @@ -892,7 +892,7 @@ rx_sdu(const module_id_t enb_mod_idP, frameP, rx_lengths[i], sdu_lenP,rx_lcids[i]); - UE_list->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1; + UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1; break; } }else{ @@ -937,21 +937,7 @@ rx_sdu(const module_id_t enb_mod_idP, UE_scheduling_control->uplane_inactivity_timer = 0; /* Reset RRC inactivity timer after uplane activity */ ue_contextP->ue_context.ue_rrc_inactivity_timer = 1; - } else { - LOG_E(MAC, "[eNB %d] CC_id %d Couldn't find the context associated to UE (RNTI %d) and reset RRC inactivity timer\n", - enb_mod_idP, - CC_idP, - current_rnti); - } - } else { /* rx_length[i] Max size */ - UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1; - LOG_E(MAC, "[eNB %d] CC_id %d Frame %d : Max size of transport block reached LCID %d from UE %d ", - enb_mod_idP, - CC_idP, - frameP, - rx_lcids[i], - UE_id); - } + } else { // end if (UE_id != -1) LOG_E(MAC,"[eNB %d] CC_id %d Frame %d : received unsupported or unknown LCID %d from UE %d ", enb_mod_idP, diff --git a/openair2/LAYER2/MAC/mac.h b/openair2/LAYER2/MAC/mac.h index d10f8e5be2..1bae590a59 100644 --- a/openair2/LAYER2/MAC/mac.h +++ b/openair2/LAYER2/MAC/mac.h @@ -469,6 +469,7 @@ typedef struct { #define BSR_TRIGGER_PADDING (4) /* For Padding BSR Trigger */ + /*! \brief Downlink SCH PDU Structure */ typedef struct { uint8_t payload[8][SCH_PAYLOAD_SIZE_MAX]; @@ -1056,6 +1057,7 @@ typedef struct { /// DRX UL retransmission timer, one per UL HARQ process /* Not implemented yet */ /* End of C-DRX related timers */ + uint32_t rlc_out_of_resources_cnt; } UE_sched_ctrl_t; /*! \brief eNB template for the Random access information */ From b0f5a37fba81ef427c4fca084590918ed3466f58 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Mon, 7 Dec 2020 20:08:03 +0900 Subject: [PATCH 48/54] Fix indentation, merge miss and remove unnecessary comment. --- common/utils/asn1_conversions.h | 24 +- openair1/PHY/TOOLS/dB_routines.c | 598 ++++----- openair1/PHY/TOOLS/signal_energy.c | 253 ++-- openair1/SCHED/fapi_l1.c | 19 +- openair2/LAYER2/MAC/defs.h | 1359 --------------------- openair2/LAYER2/MAC/eNB_scheduler_RA.c | 7 - openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 4 +- openair2/RRC/LTE/rrc_eNB.c | 20 +- 8 files changed, 387 insertions(+), 1897 deletions(-) delete mode 100644 openair2/LAYER2/MAC/defs.h diff --git a/common/utils/asn1_conversions.h b/common/utils/asn1_conversions.h index 7fd32af030..82dca54c08 100644 --- a/common/utils/asn1_conversions.h +++ b/common/utils/asn1_conversions.h @@ -33,11 +33,7 @@ *\return the extracted value. */ static inline uint8_t BIT_STRING_to_uint8(BIT_STRING_t *asn) { - //DevCheck ((asn->size == 1), asn->size, 0, 0); - if(!(asn->size == 1)) { - printf("BIT_STRING_to_uint8 size %ld\n", asn->size); - return 0; - } + DevCheck ((asn->size == 1), asn->size, 0, 0); return asn->buf[0] >> asn->bits_unused; } @@ -51,11 +47,7 @@ static inline uint16_t BIT_STRING_to_uint16(BIT_STRING_t *asn) { uint16_t result = 0; int index = 0; - //DevCheck ((asn->size > 0) && (asn->size <= 2), asn->size, 0, 0); - if(!((asn->size > 0) && (asn->size <= 2))) { - printf("BIT_STRING_to_uint16 size %ld\n", asn->size); - return 0; - } + DevCheck ((asn->size > 0) && (asn->size <= 2), asn->size, 0, 0); switch (asn->size) { case 2: @@ -82,11 +74,7 @@ static inline uint32_t BIT_STRING_to_uint32(BIT_STRING_t *asn) { int index; int shift; - //DevCheck ((asn->size > 0) && (asn->size <= 4), asn->size, 0, 0); - if(!((asn->size > 0) && (asn->size <= 4))) { - printf("BIT_STRING_to_uint32 size %ld\n", asn->size); - return 0; - } + DevCheck ((asn->size > 0) && (asn->size <= 4), asn->size, 0, 0); shift = ((asn->size - 1) * 8) - asn->bits_unused; for (index = 0; index < (asn->size - 1); index++) { @@ -109,11 +97,7 @@ static inline uint64_t BIT_STRING_to_uint64(BIT_STRING_t *asn) { int index; int shift; - //DevCheck ((asn->size > 0) && (asn->size <= 8), asn->size, 0, 0); - if(!((asn->size > 0) && (asn->size <= 8))) { - printf("BIT_STRING_to_uint64 size %ld\n", asn->size); - return 0; - } + DevCheck ((asn->size > 0) && (asn->size <= 8), asn->size, 0, 0); shift = ((asn->size - 1) * 8) - asn->bits_unused; for (index = 0; index < (asn->size - 1); index++) { diff --git a/openair1/PHY/TOOLS/dB_routines.c b/openair1/PHY/TOOLS/dB_routines.c index 1b743695f6..7a71ac0195 100644 --- a/openair1/PHY/TOOLS/dB_routines.c +++ b/openair1/PHY/TOOLS/dB_routines.c @@ -543,284 +543,284 @@ int16_t dB_table_times10[256] = { uint32_t bit_seach_mask[32] = { - 0x80000000, 0x40000000, 0x20000000, 0x10000000, - 0x08000000, 0x04000000, 0x02000000, 0x01000000, - 0x00800000, 0x00400000, 0x00200000, 0x00100000, - 0x00080000, 0x00040000, 0x00020000, 0x00010000, - 0x00008000, 0x00004000, 0x00002000, 0x00001000, - 0x00000800, 0x00000400, 0x00000200, 0x00000100, - 0x00000080, 0x00000040, 0x00000020, 0x00000010, - 0x00000008, 0x00000004, 0x00000002, 0x00000001 + 0x80000000, 0x40000000, 0x20000000, 0x10000000, + 0x08000000, 0x04000000, 0x02000000, 0x01000000, + 0x00800000, 0x00400000, 0x00200000, 0x00100000, + 0x00080000, 0x00040000, 0x00020000, 0x00010000, + 0x00008000, 0x00004000, 0x00002000, 0x00001000, + 0x00000800, 0x00000400, 0x00000200, 0x00000100, + 0x00000080, 0x00000040, 0x00000020, 0x00000010, + 0x00000008, 0x00000004, 0x00000002, 0x00000001 }; uint32_t bit_seach_res[32] = { - 31, 30, 29, 28, - 27, 26, 25, 24, - 23, 22, 21, 20, - 19, 18, 17, 16, - 15, 14, 13, 12, - 11, 10, 9, 8, - 7, 6, 5, 4, - 3, 2, 1, 0 + 31, 30, 29, 28, + 27, 26, 25, 24, + 23, 22, 21, 20, + 19, 18, 17, 16, + 15, 14, 13, 12, + 11, 10, 9, 8, + 7, 6, 5, 4, + 3, 2, 1, 0 }; uint32_t dB_fix_x10_tbl[128] = { -0 , -0 , -1 , -1 , -1 , -2 , -2 , -2 , -3 , -3 , -3 , -4 , -4 , -4 , -5 , -5 , -5 , -5 , -6 , -6 , -6 , -7 , -7 , -7 , -7 , -8 , -8 , -8 , -9 , -9 , -9 , -9 , -10 , -10 , -10 , -10 , -11 , -11 , -11 , -12 , -12 , -12 , -12 , -13 , -13 , -13 , -13 , -14 , -14 , -14 , -14 , -15 , -15 , -15 , -15 , -16 , -16 , -16 , -16 , -16 , -17 , -17 , -17 , -17 , -18 , -18 , -18 , -18 , -19 , -19 , -19 , -19 , -19 , -20 , -20 , -20 , -20 , -20 , -21 , -21 , -21 , -21 , -22 , -22 , -22 , -22 , -22 , -23 , -23 , -23 , -23 , -23 , -24 , -24 , -24 , -24 , -24 , -24 , -25 , -25 , -25 , -25 , -25 , -26 , -26 , -26 , -26 , -26 , -27 , -27 , -27 , -27 , -27 , -27 , -28 , -28 , -28 , -28 , -28 , -29 , -29 , -29 , -29 , -29 , -29 , -30 , -30 , -30 +0 , +0 , +1 , +1 , +1 , +2 , +2 , +2 , +3 , +3 , +3 , +4 , +4 , +4 , +5 , +5 , +5 , +5 , +6 , +6 , +6 , +7 , +7 , +7 , +7 , +8 , +8 , +8 , +9 , +9 , +9 , +9 , +10 , +10 , +10 , +10 , +11 , +11 , +11 , +12 , +12 , +12 , +12 , +13 , +13 , +13 , +13 , +14 , +14 , +14 , +14 , +15 , +15 , +15 , +15 , +16 , +16 , +16 , +16 , +16 , +17 , +17 , +17 , +17 , +18 , +18 , +18 , +18 , +19 , +19 , +19 , +19 , +19 , +20 , +20 , +20 , +20 , +20 , +21 , +21 , +21 , +21 , +22 , +22 , +22 , +22 , +22 , +23 , +23 , +23 , +23 , +23 , +24 , +24 , +24 , +24 , +24 , +24 , +25 , +25 , +25 , +25 , +25 , +26 , +26 , +26 , +26 , +26 , +27 , +27 , +27 , +27 , +27 , +27 , +28 , +28 , +28 , +28 , +28 , +29 , +29 , +29 , +29 , +29 , +29 , +30 , +30 , +30 }; uint32_t dB_fix_x10_tbl_low[128] = { -0 , -0 , -30 , -48 , -60 , -70 , -78 , -85 , -90 , -95 , -100 , -104 , -108 , -111 , -115 , -118 , -120 , -123 , -126 , -128 , -130 , -132 , -134 , -136 , -138 , -140 , -141 , -143 , -145 , -146 , -148 , -149 , -151 , -152 , -153 , -154 , -156 , -157 , -158 , -159 , -160 , -161 , -162 , -163 , -164 , -165 , -166 , -167 , -168 , -169 , -170 , -171 , -172 , -172 , -173 , -174 , -175 , -176 , -176 , -177 , -178 , -179 , -179 , -180 , -181 , -181 , -182 , -183 , -183 , -184 , -185 , -185 , -186 , -186 , -187 , -188 , -188 , -189 , -189 , -190 , -190 , -191 , -191 , -192 , -192 , -193 , -193 , -194 , -194 , -195 , -195 , -196 , -196 , -197 , -197 , -198 , -198 , -199 , -199 , -200 , -200 , -200 , -201 , -201 , -202 , -202 , -203 , -203 , -203 , -204 , -204 , -205 , -205 , -205 , -206 , -206 , -206 , -207 , -207 , -208 , -208 , -208 , -209 , -209 , -209 , -210 , -210 , -210 +0 , +0 , +30 , +48 , +60 , +70 , +78 , +85 , +90 , +95 , +100 , +104 , +108 , +111 , +115 , +118 , +120 , +123 , +126 , +128 , +130 , +132 , +134 , +136 , +138 , +140 , +141 , +143 , +145 , +146 , +148 , +149 , +151 , +152 , +153 , +154 , +156 , +157 , +158 , +159 , +160 , +161 , +162 , +163 , +164 , +165 , +166 , +167 , +168 , +169 , +170 , +171 , +172 , +172 , +173 , +174 , +175 , +176 , +176 , +177 , +178 , +179 , +179 , +180 , +181 , +181 , +182 , +183 , +183 , +184 , +185 , +185 , +186 , +186 , +187 , +188 , +188 , +189 , +189 , +190 , +190 , +191 , +191 , +192 , +192 , +193 , +193 , +194 , +194 , +195 , +195 , +196 , +196 , +197 , +197 , +198 , +198 , +199 , +199 , +200 , +200 , +200 , +201 , +201 , +202 , +202 , +203 , +203 , +203 , +204 , +204 , +205 , +205 , +205 , +206 , +206 , +206 , +207 , +207 , +208 , +208 , +208 , +209 , +209 , +209 , +210 , +210 , +210 }; /* @@ -855,35 +855,35 @@ int8_t dB_fixed(int x) { */ int16_t dB_fixed_x10(uint32_t x) { - int16_t dB_power = 0; + int16_t dB_power = 0; - //for new algorithm - uint32_t cnt; - uint32_t Exponent; - uint32_t Mantissa; - uint32_t shift_right; - uint32_t tbl_resolution = 7; - uint32_t tbl_addr_mask; + //for new algorithm + uint32_t cnt; + uint32_t Exponent; + uint32_t Mantissa; + uint32_t shift_right; + uint32_t tbl_resolution = 7; + uint32_t tbl_addr_mask; - if (x < 128){ //OAI alogrithm - dB_power = dB_fix_x10_tbl_low[x]; - } - else { //new algorithm - tbl_addr_mask = 0x0000007Fu; // (1 << tbl_resolution) - 1;//i.e. 0x0000007F - Mantissa = 0; - Exponent = 0; - for (cnt = 0; cnt < 32; cnt++) { - if ((bit_seach_mask[cnt] & x) != 0) { - Exponent = bit_seach_res[cnt]; - Mantissa = x & (~bit_seach_mask[cnt]); - break; - } - } - shift_right = Exponent - tbl_resolution; - Mantissa = (Mantissa >> shift_right) & tbl_addr_mask; - dB_power = dB_fix_x10_tbl[Mantissa] + Exponent * 30u; - } - return dB_power; + if (x < 128){ //OAI alogrithm + dB_power = dB_fix_x10_tbl_low[x]; + } + else { //new algorithm + tbl_addr_mask = 0x0000007Fu; // (1 << tbl_resolution) - 1;//i.e. 0x0000007F + Mantissa = 0; + Exponent = 0; + for (cnt = 0; cnt < 32; cnt++) { + if ((bit_seach_mask[cnt] & x) != 0) { + Exponent = bit_seach_res[cnt]; + Mantissa = x & (~bit_seach_mask[cnt]); + break; + } + } + shift_right = Exponent - tbl_resolution; + Mantissa = (Mantissa >> shift_right) & tbl_addr_mask; + dB_power = dB_fix_x10_tbl[Mantissa] + Exponent * 30u; + } + return dB_power; } int16_t dB_fixed_times10(uint32_t x) diff --git a/openair1/PHY/TOOLS/signal_energy.c b/openair1/PHY/TOOLS/signal_energy.c index d2c2817b0e..f3dea58374 100644 --- a/openair1/PHY/TOOLS/signal_energy.c +++ b/openair1/PHY/TOOLS/signal_energy.c @@ -68,86 +68,39 @@ int32_t subcarrier_energy(int32_t *input,uint32_t length, int32_t *subcarrier_en } #endif -//int32_t signal_energy(int32_t *input,uint32_t length) -//{ -// -// int32_t i; -// int32_t temp,temp2; -// register __m64 mm0,mm1,mm2,mm3; -// __m64 *in = (__m64 *)input; -// -// -// mm0 = _mm_setzero_si64();//pxor(mm0,mm0); -// mm3 = _mm_setzero_si64();//pxor(mm3,mm3); -// -// for (i=0; i>1; i++) { -// -// mm1 = in[i]; -// mm2 = mm1; -// mm1 = _m_pmaddwd(mm1,mm1); -// mm1 = _m_psradi(mm1,shift);// shift any 32 bits blocs of the word by the value shift -// mm0 = _m_paddd(mm0,mm1);// add the two 64 bits words 4 bytes by 4 bytes -// // mm2 = _m_psrawi(mm2,shift_DC); -// mm3 = _m_paddw(mm3,mm2);// add the two 64 bits words 2 bytes by 2 bytes -// } -// -// mm1 = mm0; -// mm0 = _m_psrlqi(mm0,32); -// mm0 = _m_paddd(mm0,mm1); -// temp = _m_to_int(mm0); -// temp/=length; -// temp<<=shift; // this is the average of x^2 -// -// // now remove the DC component -// -// -// mm2 = _m_psrlqi(mm3,32); -// mm2 = _m_paddw(mm2,mm3); -// mm2 = _m_pmaddwd(mm2,mm2); -// temp2 = _m_to_int(mm2); -// temp2/=(length*length); -// // temp2<<=(2*shift_DC); -// temp -= temp2; -// -// _mm_empty(); -// _m_empty(); -// -// return((temp>0)?temp:1); - //----------------------------------------------------------------- // Average Power calculation with DC removing //----------------------------------------------------------------- int32_t signal_energy(int32_t *input,uint32_t length) { - uint32_t i; - int32_t temp; - __m128i in, in_clp, i16_min, coe1; - __m128 num0, num1, num2, num3, recp1; + uint32_t i; + int32_t temp; + __m128i in, in_clp, i16_min, coe1; + __m128 num0, num1, num2, num3, recp1; - //init - num0 = _mm_setzero_ps(); - num1 = _mm_setzero_ps(); - i16_min = _mm_set1_epi16(SHRT_MIN); - coe1 = _mm_set1_epi16(1); - recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length))); + //init + num0 = _mm_setzero_ps(); + num1 = _mm_setzero_ps(); + i16_min = _mm_set1_epi16(SHRT_MIN); + coe1 = _mm_set1_epi16(1); + recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length))); - //Acc - for (i = 0; i < (length >> 2); i++) { - in = _mm_loadu_si128((__m128i *)input); - in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in - num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp))); - num1 = _mm_add_ps(num1, _mm_cvtepi32_ps(_mm_madd_epi16(in, coe1)));//DC - input += 4; + //Acc + for (i = 0; i < (length >> 2); i++) { + in = _mm_loadu_si128((__m128i *)input); + in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in + num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp))); + num1 = _mm_add_ps(num1, _mm_cvtepi32_ps(_mm_madd_epi16(in, coe1)));//DC + input += 4; } - //Ave - num2 = _mm_dp_ps(num0, recp1, 0xFF);//AC power - num3 = _mm_dp_ps(num1, recp1, 0xFF);//DC - num3 = _mm_mul_ps(num3, num3); //DC power - //remove DC - temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(_mm_sub_ps(num2, num3))); - - return temp; + //Ave + num2 = _mm_dp_ps(num0, recp1, 0xFF);//AC power + num3 = _mm_dp_ps(num1, recp1, 0xFF);//DC + num3 = _mm_mul_ps(num3, num3); //DC power + //remove DC + temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(_mm_sub_ps(num2, num3))); + return temp; } int32_t signal_energy_amp_shift(int32_t *input,uint32_t length) @@ -198,64 +151,6 @@ int32_t signal_energy_amp_shift(int32_t *input,uint32_t length) int32_t signal_energy_nodc(int32_t *input,uint32_t length) { - -// int32_t i; -// int32_t temp; -// register __m64 mm0,mm1;//,mm2,mm3; -// __m64 *in = (__m64 *)input; -// -//#ifdef MAIN -// int16_t *printb; -//#endif -// -// mm0 = _mm_setzero_si64();//_pxor(mm0,mm0); -// // mm3 = _mm_setzero_si64();//pxor(mm3,mm3); -// -// for (i=0; i>1; i++) { -// -// mm1 = in[i]; -// mm1 = _m_pmaddwd(mm1,mm1);// SIMD complex multiplication -// mm1 = _m_psradi(mm1,shift); -// mm0 = _m_paddd(mm0,mm1); -// // temp2 = mm0; -// // printf("%d %d\n",((int *)&in[i])[0],((int *)&in[i])[1]); -// -// -// // printb = (int16_t *)&mm2; -// // printf("mm2 %d : %d %d %d %d\n",i,printb[0],printb[1],printb[2],printb[3]); -// -// -// } -// -// /* -// #ifdef MAIN -// printb = (int16_t *)&mm3; -// printf("%d %d %d %d\n",printb[0],printb[1],printb[2],printb[3]); -// #endif -// */ -// mm1 = mm0; -// -// mm0 = _m_psrlqi(mm0,32); -// -// mm0 = _m_paddd(mm0,mm1); -// -// temp = _m_to_int(mm0); -// -// temp/=length; -// temp<<=shift; // this is the average of x^2 -// -//#ifdef MAIN -// printf("E x^2 = %d\n",temp); -//#endif -// _mm_empty(); -// _m_empty(); -// -// -// -// return((temp>0)?temp:1); - - - int32_t i; int32_t temp; @@ -266,9 +161,9 @@ int32_t signal_energy_nodc(int32_t *input,uint32_t length) mm0 = _mm_setzero_ps(); //Acc for (i=0; i<(length>>2); i++) { - in = _mm_loadu_si128((__m128i *)input); - mm0 = _mm_add_ps(mm0,_mm_cvtepi32_ps(_mm_madd_epi16(in,in))); - input += 4; + in = _mm_loadu_si128((__m128i *)input); + mm0 = _mm_add_ps(mm0,_mm_cvtepi32_ps(_mm_madd_epi16(in,in))); + input += 4; } //Ave temp = (int)((((float*)&mm0)[0] + @@ -277,8 +172,6 @@ int32_t signal_energy_nodc(int32_t *input,uint32_t length) ((float*)&mm0)[3])/(float)length); return temp; - - } #elif defined(__arm__) @@ -429,62 +322,62 @@ main(int argc,char **argv) int32_t signal_power(int32_t *input, uint32_t length) { - uint32_t i; - int32_t temp; + uint32_t i; + int32_t temp; - __m128i in, in_clp, i16_min; - __m128 num0, num1; - __m128 recp1; + __m128i in, in_clp, i16_min; + __m128 num0, num1; + __m128 recp1; - //init - num0 = _mm_setzero_ps(); - i16_min = _mm_set1_epi16(SHRT_MIN); - recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length))); - //Acc - for (i = 0; i < (length >> 2); i++) { - in = _mm_loadu_si128((__m128i *)input); - in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in - num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp))); - input += 4; - } - //Ave - num1 = _mm_dp_ps(num0, recp1, 0xFF); - temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num1)); + //init + num0 = _mm_setzero_ps(); + i16_min = _mm_set1_epi16(SHRT_MIN); + recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length))); + //Acc + for (i = 0; i < (length >> 2); i++) { + in = _mm_loadu_si128((__m128i *)input); + in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in + num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp))); + input += 4; + } + //Ave + num1 = _mm_dp_ps(num0, recp1, 0xFF); + temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num1)); - return temp; + return temp; } int32_t interference_power(int32_t *input, uint32_t length) { - uint32_t i; - int32_t temp; + uint32_t i; + int32_t temp; - __m128i in, in_clp, i16_min; - __m128i num0, num1, num2, num3; - __m128 num4, num5, num6; - __m128 recp1; + __m128i in, in_clp, i16_min; + __m128i num0, num1, num2, num3; + __m128 num4, num5, num6; + __m128 recp1; - //init - i16_min = _mm_set1_epi16(SHRT_MIN); - num5 = _mm_setzero_ps(); - recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length>>2)));// 1/n, n= length/4 - //Acc - for (i = 0; i < (length >> 2); i++) { - in = _mm_loadu_si128((__m128i *)input); - in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min)); //if in=SHRT_MIN, in+1, else in - num0 = _mm_cvtepi16_epi32(in_clp); //lower 2 complex [0], [1] - num1 = _mm_cvtepi16_epi32(_mm_shuffle_epi32(in_clp, 0x4E)); //upper 2 complex [2], [3] - num2 = _mm_srai_epi32(_mm_add_epi32(num0, num1), 0x01); //average A=complex( [0] + [2] ) / 2, B=complex( [1] + [3] ) / 2 - num3 = _mm_sub_epi32(num2, _mm_shuffle_epi32(num2, 0x4E)); //complexA-complexB, B-A - num4 = _mm_dp_ps(_mm_cvtepi32_ps(num3), _mm_cvtepi32_ps(num3), 0x3F);//C = num3 lower complex power, C, C, C - num5 = _mm_add_ps(num5, num4); //Acc Cn, Cn, Cn, Cn, - input += 4; - } - //Interference ve - num6 = _mm_mul_ps(num5, recp1); //Cn / n - temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num6)); + //init + i16_min = _mm_set1_epi16(SHRT_MIN); + num5 = _mm_setzero_ps(); + recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length>>2)));// 1/n, n= length/4 + //Acc + for (i = 0; i < (length >> 2); i++) { + in = _mm_loadu_si128((__m128i *)input); + in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min)); //if in=SHRT_MIN, in+1, else in + num0 = _mm_cvtepi16_epi32(in_clp); //lower 2 complex [0], [1] + num1 = _mm_cvtepi16_epi32(_mm_shuffle_epi32(in_clp, 0x4E)); //upper 2 complex [2], [3] + num2 = _mm_srai_epi32(_mm_add_epi32(num0, num1), 0x01); //average A=complex( [0] + [2] ) / 2, B=complex( [1] + [3] ) / 2 + num3 = _mm_sub_epi32(num2, _mm_shuffle_epi32(num2, 0x4E)); //complexA-complexB, B-A + num4 = _mm_dp_ps(_mm_cvtepi32_ps(num3), _mm_cvtepi32_ps(num3), 0x3F);//C = num3 lower complex power, C, C, C + num5 = _mm_add_ps(num5, num4); //Acc Cn, Cn, Cn, Cn, + input += 4; + } + //Interference ve + num6 = _mm_mul_ps(num5, recp1); //Cn / n + temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num6)); - return temp; + return temp; } diff --git a/openair1/SCHED/fapi_l1.c b/openair1/SCHED/fapi_l1.c index e444dff41f..3f342802b4 100644 --- a/openair1/SCHED/fapi_l1.c +++ b/openair1/SCHED/fapi_l1.c @@ -1008,16 +1008,15 @@ void schedule_response(Sched_Rsp_t *Sched_INFO, L1_rxtx_proc_t *proc) { UL_req->ul_config_request_body.number_of_pdus=0; number_ul_pdu=0; }else if (RC.mac[Mod_id]->scheduler_mode == SCHED_MODE_FAIR_RR) { - if(ulsch_pdu_num <= RC.rrc[Mod_id]->configuration.radioresourceconfig[CC_id].ue_multiple_max){ - //LOG_D(PHY, "UL_CONFIG to send to PNF\n"); - UL_req->sfn_sf = frame << 4 | subframe; - oai_nfapi_ul_config_req(UL_req); - UL_req->ul_config_request_body.number_of_pdus=0; - number_ul_pdu=0; - }else{ - LOG_E(MAC,"NFAPI: frame %d subframe %d ul_req num %d ul pdu %d\n", - frame,subframe,number_ul_pdu,ulsch_pdu_num); - } + if(ulsch_pdu_num <= RC.rrc[Mod_id]->configuration.radioresourceconfig[CC_id].ue_multiple_max){ + UL_req->sfn_sf = frame << 4 | subframe; + oai_nfapi_ul_config_req(UL_req); + UL_req->ul_config_request_body.number_of_pdus=0; + number_ul_pdu=0; + }else{ + LOG_E(MAC,"NFAPI: frame %d subframe %d ul_req num %d ul pdu %d\n", + frame,subframe,number_ul_pdu,ulsch_pdu_num); + } } } } else { diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h deleted file mode 100644 index 2a807c1af5..0000000000 --- a/openair2/LAYER2/MAC/defs.h +++ /dev/null @@ -1,1359 +0,0 @@ -/* - * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. - * The OpenAirInterface Software Alliance licenses this file to You under - * the OAI Public License, Version 1.1 (the "License"); you may not use this file - * except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.openairinterface.org/?page_id=698 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - *------------------------------------------------------------------------------- - * For more information about the OpenAirInterface (OAI) Software Alliance: - * contact@openairinterface.org - */ - -/*! \file LAYER2/MAC/defs.h -* \brief MAC data structures, constant, and function prototype -* \author Navid Nikaein and Raymond Knopp -* \date 2011 -* \version 0.5 -* \email navid.nikaein@eurecom.fr - -*/ -/** @defgroup _oai2 openair2 Reference Implementation - * @ingroup _ref_implementation_ - * @{ - */ - -/*@}*/ - -#ifndef __LAYER2_MAC_DEFS_H__ -#define __LAYER2_MAC_DEFS_H__ - - - -#ifdef USER_MODE -#include -#include -#include -#endif - -//#include "COMMON/openair_defs.h" - - - -#include "PHY/defs.h" -#include "PHY/LTE_TRANSPORT/defs.h" -#include "COMMON/platform_constants.h" -#include "BCCH-BCH-Message.h" -#include "RadioResourceConfigCommon.h" -#include "RadioResourceConfigDedicated.h" -#include "MeasGapConfig.h" -#include "SchedulingInfoList.h" -#include "TDD-Config.h" -#include "RACH-ConfigCommon.h" -#include "MeasObjectToAddModList.h" -#include "MobilityControlInfo.h" -#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) -#include "MBSFN-AreaInfoList-r9.h" -#include "MBSFN-SubframeConfigList.h" -#include "PMCH-InfoList-r9.h" -#include "SCellToAddMod-r10.h" -#endif -#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) -#include "SystemInformationBlockType1-v1310-IEs.h" -#endif - -#include "nfapi_interface.h" -#include "PHY_INTERFACE/IF_Module.h" - -/** @defgroup _mac MAC - * @ingroup _oai2 - * @{ - */ - -#define BCCH_PAYLOAD_SIZE_MAX 128 -#define CCCH_PAYLOAD_SIZE_MAX 128 -#define PCCH_PAYLOAD_SIZE_MAX 128 -#define RAR_PAYLOAD_SIZE_MAX 128 - -#define SCH_PAYLOAD_SIZE_MAX 4096 -/// Logical channel ids from 36-311 (Note BCCH is not specified in 36-311, uses the same as first DRB) - -#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) - -// Mask for identifying subframe for MBMS -#define MBSFN_TDD_SF3 0x80// for TDD -#define MBSFN_TDD_SF4 0x40 -#define MBSFN_TDD_SF7 0x20 -#define MBSFN_TDD_SF8 0x10 -#define MBSFN_TDD_SF9 0x08 -#define MBSFN_FDD_SF1 0x80// for FDD -#define MBSFN_FDD_SF2 0x40 -#define MBSFN_FDD_SF3 0x20 -#define MBSFN_FDD_SF6 0x10 -#define MBSFN_FDD_SF7 0x08 -#define MBSFN_FDD_SF8 0x04 - -#define MAX_MBSFN_AREA 8 -#define MAX_PMCH_perMBSFN 15 -/*!\brief MAX MCCH payload size */ -#define MCCH_PAYLOAD_SIZE_MAX 128 -//#define MCH_PAYLOAD_SIZE_MAX 16384// this value is using in case mcs and TBS index are high -#endif - -#ifdef USER_MODE -#define printk printf -#endif //USER_MODE - -/*!\brief Maximum number of logical channl group IDs */ -#define MAX_NUM_LCGID 4 -/*!\brief logical channl group ID 0 */ -#define LCGID0 0 -/*!\brief logical channl group ID 1 */ -#define LCGID1 1 -/*!\brief logical channl group ID 2 */ -#define LCGID2 2 -/*!\brief logical channl group ID 3 */ -#define LCGID3 3 -/*!\brief Maximum number of logical chanels */ -#define MAX_NUM_LCID 11 -/*!\brief Maximum number od control elemenets */ -#define MAX_NUM_CE 5 -/*!\brief Maximum number of random access process */ -#define NB_RA_PROC_MAX 4 -/*!\brief size of buffer status report table */ -#define BSR_TABLE_SIZE 64 -/*!\brief The power headroom reporting range is from -23 ...+40 dB and beyond, with step 1 */ -#define PHR_MAPPING_OFFSET 23 // if ( x>= -23 ) val = floor (x + 23) -/*!\brief maximum number of resource block groups */ -#define N_RBG_MAX 25 // for 20MHz channel BW -/*!\brief minimum value for channel quality indicator */ -#define MIN_CQI_VALUE 0 -/*!\brief maximum value for channel quality indicator */ -#define MAX_CQI_VALUE 15 -/*!\briefmaximum number of supported bandwidth (1.4, 5, 10, 20 MHz) */ -#define MAX_SUPPORTED_BW 4 -/*!\brief CQI values range from 1 to 15 (4 bits) */ -#define CQI_VALUE_RANGE 16 - -/*!\brief value for indicating BSR Timer is not running */ -#define MAC_UE_BSR_TIMER_NOT_RUNNING (0xFFFF) - -#define LCID_EMPTY 0 -#define LCID_NOT_EMPTY 1 - -/*!\brief minimum RLC PDU size to be transmitted = min RLC Status PDU or RLC UM PDU SN 5 bits */ -#define MIN_RLC_PDU_SIZE (2) - -/*!\brief minimum MAC data needed for transmitting 1 min RLC PDU size + 1 byte MAC subHeader */ -#define MIN_MAC_HDR_RLC_SIZE (1 + MIN_RLC_PDU_SIZE) - -/*!\brief maximum number of slices / groups */ -#define MAX_NUM_SLICES 4 - -/* - * eNB part - */ - - -/* - * UE/ENB common part - */ -/*!\brief MAC header of Random Access Response for Random access preamble identifier (RAPID) */ -typedef struct { - uint8_t RAPID:6; - uint8_t T:1; - uint8_t E:1; -} __attribute__((__packed__))RA_HEADER_RAPID; - -/*!\brief MAC header of Random Access Response for backoff indicator (BI)*/ -typedef struct { - uint8_t BI:4; - uint8_t R:2; - uint8_t T:1; - uint8_t E:1; -} __attribute__((__packed__))RA_HEADER_BI; -/* -typedef struct { - uint64_t padding:16; - uint64_t t_crnti:16; - uint64_t hopping_flag:1; - uint64_t rb_alloc:10; - uint64_t mcs:4; - uint64_t TPC:3; - uint64_t UL_delay:1; - uint64_t cqi_req:1; - uint64_t Timing_Advance_Command:11; // first/2nd octet LSB - uint64_t R:1; // octet MSB - } __attribute__((__packed__))RAR_PDU; - -typedef struct { - uint64_t padding:16; - uint64_t R:1; // octet MSB - uint64_t Timing_Advance_Command:11; // first/2nd octet LSB - uint64_t cqi_req:1; - uint64_t UL_delay:1; - uint64_t TPC:3; - uint64_t mcs:4; - uint64_t rb_alloc:10; - uint64_t hopping_flag:1; - uint64_t t_crnti:16; - } __attribute__((__packed__))RAR_PDU; - -#define sizeof_RAR_PDU 6 -*/ -/*!\brief MAC subheader short with 7bit Length field */ -typedef struct { - uint8_t LCID:5; // octet 1 LSB - uint8_t E:1; - uint8_t R:2; // octet 1 MSB - uint8_t L:7; // octet 2 LSB - uint8_t F:1; // octet 2 MSB -} __attribute__((__packed__))SCH_SUBHEADER_SHORT; -/*!\brief MAC subheader long with 15bit Length field */ -typedef struct { - uint8_t LCID:5; // octet 1 LSB - uint8_t E:1; - uint8_t R:2; // octet 1 MSB - uint8_t L_MSB:7; - uint8_t F:1; // octet 2 MSB - uint8_t L_LSB:8; - uint8_t padding; -} __attribute__((__packed__))SCH_SUBHEADER_LONG; -/*!\brief MAC subheader short without length field */ -typedef struct { - uint8_t LCID:5; - uint8_t E:1; - uint8_t R:2; -} __attribute__((__packed__))SCH_SUBHEADER_FIXED; - -/*!\brief mac control element: short buffer status report for a specific logical channel group ID*/ -typedef struct { - uint8_t Buffer_size:6; // octet 1 LSB - uint8_t LCGID:2; // octet 1 MSB -} __attribute__((__packed__))BSR_SHORT; - -typedef BSR_SHORT BSR_TRUNCATED; -/*!\brief mac control element: long buffer status report for all logical channel group ID*/ -typedef struct { - uint8_t Buffer_size3:6; - uint8_t Buffer_size2:6; - uint8_t Buffer_size1:6; - uint8_t Buffer_size0:6; -} __attribute__((__packed__))BSR_LONG; - -#define BSR_LONG_SIZE (sizeof(BSR_LONG)) -/*!\brief mac control element: timing advance */ -typedef struct { - uint8_t TA:6; - uint8_t R:2; -} __attribute__((__packed__))TIMING_ADVANCE_CMD; -/*!\brief mac control element: power headroom report */ -typedef struct { - uint8_t PH:6; - uint8_t R:2; -} __attribute__((__packed__))POWER_HEADROOM_CMD; - -/*! \brief MIB payload */ -typedef struct { - uint8_t payload[3] ; -} __attribute__((__packed__))MIB_PDU; -/*! \brief CCCH payload */ -typedef struct { - uint8_t payload[CCCH_PAYLOAD_SIZE_MAX] ; -} __attribute__((__packed__))CCCH_PDU; -/*! \brief BCCH payload */ -typedef struct { - uint8_t payload[BCCH_PAYLOAD_SIZE_MAX] ; -} __attribute__((__packed__))BCCH_PDU; -/*! \brief RAR payload */ -typedef struct { - uint8_t payload[RAR_PAYLOAD_SIZE_MAX]; -} __attribute__ ((__packed__)) RAR_PDU; -/*! \brief BCCH payload */ -typedef struct { - uint8_t payload[PCCH_PAYLOAD_SIZE_MAX] ; -} __attribute__((__packed__))PCCH_PDU; - -#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) -/*! \brief MCCH payload */ -typedef struct { - uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ; -} __attribute__((__packed__))MCCH_PDU; -/*!< \brief MAC control element for activation and deactivation of component carriers */ -typedef struct { - uint8_t C7:1;/*!< \brief Component carrier 7 */ - uint8_t C6:1;/*!< \brief Component carrier 6 */ - uint8_t C5:1;/*!< \brief Component carrier 5 */ - uint8_t C4:1;/*!< \brief Component carrier 4 */ - uint8_t C3:1;/*!< \brief Component carrier 3 */ - uint8_t C2:1;/*!< \brief Component carrier 2 */ - uint8_t C1:1;/*!< \brief Component carrier 1 */ - uint8_t R:1;/*!< \brief Reserved */ -} __attribute__((__packed__))CC_ELEMENT; -/*! \brief MAC control element: MCH Scheduling Information */ -typedef struct { - uint8_t stop_sf_MSB:3; // octet 1 LSB - uint8_t lcid:5; // octet 2 MSB - uint8_t stop_sf_LSB:8; -} __attribute__((__packed__))MSI_ELEMENT; -#endif -/*! \brief Values of CCCH LCID for DLSCH */ -#define CCCH_LCHANID 0 -/*!\brief Values of BCCH logical channel (fake)*/ -#define BCCH 3 // SI -/*!\brief Values of PCCH logical channel (fake)*/ -#define PCCH 4 // Paging -/*!\brief Values of PCCH logical channel (fake) */ -#define MIBCH 5 // MIB -/*!\brief Values of BCCH SIB1_BR logical channel (fake) */ -#define BCCH_SIB1_BR 6 // SIB1_BR -/*!\brief Values of BCCH SIB_BR logical channel (fake) */ -#define BCCH_SI_BR 7 // SI-BR -/*!\brief Value of CCCH / SRB0 logical channel */ -#define CCCH 0 // srb0 -/*!\brief DCCH / SRB1 logical channel */ -#define DCCH 1 // srb1 -/*!\brief DCCH1 / SRB2 logical channel */ -#define DCCH1 2 // srb2 -/*!\brief DTCH DRB1 logical channel */ -#define DTCH 3 // LCID -/*!\brief MCCH logical channel */ -#define MCCH 4 -/*!\brief MTCH logical channel */ -#define MTCH 1 -// DLSCH LCHAN ID -/*!\brief LCID of UE contention resolution identity for DLSCH*/ -#define UE_CONT_RES 28 -/*!\brief LCID of timing advance for DLSCH */ -#define TIMING_ADV_CMD 29 -/*!\brief LCID of discontinous reception mode for DLSCH */ -#define DRX_CMD 30 -/*!\brief LCID of padding LCID for DLSCH */ -#define SHORT_PADDING 31 - -#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) -// MCH LCHAN IDs (table6.2.1-4 TS36.321) -/*!\brief LCID of MCCH for DL */ -#define MCCH_LCHANID 0 -/*!\brief LCID of MCH scheduling info for DL */ -#define MCH_SCHDL_INFO 3 -/*!\brief LCID of Carrier component activation/deactivation */ -#define CC_ACT_DEACT 27 -#endif - -// ULSCH LCHAN IDs -/*!\brief LCID of extended power headroom for ULSCH */ -#define EXTENDED_POWER_HEADROOM 25 -/*!\brief LCID of power headroom for ULSCH */ -#define POWER_HEADROOM 26 -/*!\brief LCID of CRNTI for ULSCH */ -#define CRNTI 27 -/*!\brief LCID of truncated BSR for ULSCH */ -#define TRUNCATED_BSR 28 -/*!\brief LCID of short BSR for ULSCH */ -#define SHORT_BSR 29 -/*!\brief LCID of long BSR for ULSCH */ -#define LONG_BSR 30 -/*!\bitmaps for BSR Triggers */ -#define BSR_TRIGGER_NONE (0) /* No BSR Trigger */ -#define BSR_TRIGGER_REGULAR (1) /* For Regular and ReTxBSR Expiry Triggers */ -#define BSR_TRIGGER_PERIODIC (2) /* For BSR Periodic Timer Expiry Trigger */ -#define BSR_TRIGGER_PADDING (4) /* For Padding BSR Trigger */ - - -/*! \brief Downlink SCH PDU Structure */ -typedef struct { - uint8_t payload[8][SCH_PAYLOAD_SIZE_MAX]; - uint16_t Pdu_size[8]; -} __attribute__ ((__packed__)) DLSCH_PDU; - - -/*! \brief MCH PDU Structure */ -typedef struct { - int8_t payload[SCH_PAYLOAD_SIZE_MAX]; - uint16_t Pdu_size; - uint8_t mcs; - uint8_t sync_area; - uint8_t msi_active; - uint8_t mcch_active; - uint8_t mtch_active; -} __attribute__ ((__packed__)) MCH_PDU; - -/*! \brief Uplink SCH PDU Structure */ -typedef struct { - int8_t payload[SCH_PAYLOAD_SIZE_MAX]; /*!< \brief SACH payload */ - uint16_t Pdu_size; -} __attribute__ ((__packed__)) ULSCH_PDU; - -#include "PHY/impl_defs_top.h" - -/*!\brief UE ULSCH scheduling states*/ -typedef enum { - S_UL_NONE =0, - S_UL_WAITING, - S_UL_SCHEDULED, - S_UL_BUFFERED, - S_UL_NUM_STATUS -} UE_ULSCH_STATUS; - -/*!\brief UE DLSCH scheduling states*/ -typedef enum { - S_DL_NONE =0, - S_DL_WAITING, - S_DL_SCHEDULED, - S_DL_BUFFERED, - S_DL_NUM_STATUS -} UE_DLSCH_STATUS; - -/*!\brief scheduling policy for the contention-based access */ -typedef enum { - CBA_ES=0, /// equal share of RB among groups w - CBA_ES_S, /// equal share of RB among groups with small allocation - CBA_PF, /// proportional fair (kind of) - CBA_PF_S, /// proportional fair (kind of) with small RB allocation - CBA_RS /// random allocation -} CBA_POLICY; - - -/*! \brief temporary struct for ULSCH sched */ -typedef struct { - rnti_t rnti; - uint16_t subframe; - uint16_t serving_num; - UE_ULSCH_STATUS status; -} eNB_ULSCH_INFO; -/*! \brief temp struct for DLSCH sched */ -typedef struct { - rnti_t rnti; - uint16_t weight; - uint16_t subframe; - uint16_t serving_num; - UE_DLSCH_STATUS status; -} eNB_DLSCH_INFO; -/*! \brief eNB overall statistics */ -typedef struct { - /// num BCCH PDU per CC - uint32_t total_num_bcch_pdu; - /// BCCH buffer size - uint32_t bcch_buffer; - /// total BCCH buffer size - uint32_t total_bcch_buffer; - /// BCCH MCS - uint32_t bcch_mcs; - - /// num CCCH PDU per CC - uint32_t total_num_ccch_pdu; - /// BCCH buffer size - uint32_t ccch_buffer; - /// total BCCH buffer size - uint32_t total_ccch_buffer; - /// BCCH MCS - uint32_t ccch_mcs; - -/// num active users - uint16_t num_dlactive_UEs; - /// available number of PRBs for a give SF - uint16_t available_prbs; - /// total number of PRB available for the user plane - uint32_t total_available_prbs; - /// aggregation - /// total avilable nccc : num control channel element - uint16_t available_ncces; - // only for a new transmission, should be extended for retransmission - // current dlsch bit rate for all transport channels - uint32_t dlsch_bitrate; - // - uint32_t dlsch_bytes_tx; - // - uint32_t dlsch_pdus_tx; - // - uint32_t total_dlsch_bitrate; - // - uint32_t total_dlsch_bytes_tx; - // - uint32_t total_dlsch_pdus_tx; - - // here for RX - // - uint32_t ulsch_bitrate; - // - uint32_t ulsch_bytes_rx; - // - uint64_t ulsch_pdus_rx; - - uint32_t total_ulsch_bitrate; - // - uint32_t total_ulsch_bytes_rx; - // - uint32_t total_ulsch_pdus_rx; - - - /// MAC agent-related stats - /// total number of scheduling decisions - int sched_decisions; - /// missed deadlines - int missed_deadlines; - -} eNB_STATS; -/*! \brief eNB statistics for the connected UEs*/ -typedef struct { - - /// CRNTI of UE - rnti_t crnti; ///user id (rnti) of connected UEs - // rrc status - uint8_t rrc_status; - /// harq pid - uint8_t harq_pid; - /// harq rounf - uint8_t harq_round; - /// total available number of PRBs for a new transmission - uint16_t rbs_used; - /// total available number of PRBs for a retransmission - uint16_t rbs_used_retx; - /// total nccc used for a new transmission: num control channel element - uint16_t ncce_used; - /// total avilable nccc for a retransmission: num control channel element - uint16_t ncce_used_retx; - - // mcs1 before the rate adaptaion - uint8_t dlsch_mcs1; - /// Target mcs2 after rate-adaptation - uint8_t dlsch_mcs2; - // current TBS with mcs2 - uint32_t TBS; - // total TBS with mcs2 - // uint32_t total_TBS; - // total rb used for a new transmission - uint32_t total_rbs_used; - // total rb used for retransmission - uint32_t total_rbs_used_retx; - - /// TX - /// Num pkt - uint32_t num_pdu_tx[NB_RB_MAX]; - /// num bytes - uint32_t num_bytes_tx[NB_RB_MAX]; - /// num retransmission / harq - uint32_t num_retransmission; - /// instantaneous tx throughput for each TTI - // uint32_t tti_throughput[NB_RB_MAX]; - - /// overall - // - uint32_t dlsch_bitrate; - //total - uint32_t total_dlsch_bitrate; - /// headers+ CE + padding bytes for a MAC PDU - uint64_t overhead_bytes; - /// headers+ CE + padding bytes for a MAC PDU - uint64_t total_overhead_bytes; - /// headers+ CE + padding bytes for a MAC PDU - uint64_t avg_overhead_bytes; - // MAC multiplexed payload - uint64_t total_sdu_bytes; - // total MAC pdu bytes - uint64_t total_pdu_bytes; - - // total num pdu - uint32_t total_num_pdus; - // - // uint32_t avg_pdu_size; - - /// RX - - /// PUCCH1a/b power (dBm) - int32_t Po_PUCCH_dBm; - /// Indicator that Po_PUCCH has been updated by PHY - int32_t Po_PUCCH_update; - /// Uplink measured RSSI - int32_t UL_rssi; - /// preassigned mcs after rate adaptation - uint8_t ulsch_mcs1; - /// adjusted mcs - uint8_t ulsch_mcs2; - - /// estimated average pdu inter-departure time - uint32_t avg_pdu_idt; - /// estimated average pdu size - uint32_t avg_pdu_ps; - /// - uint32_t aggregated_pdu_size; - uint32_t aggregated_pdu_arrival; - - /// uplink transport block size - uint32_t ulsch_TBS; - - /// total rb used for a new uplink transmission - uint32_t num_retransmission_rx; - /// total rb used for a new uplink transmission - uint32_t rbs_used_rx; - /// total rb used for a new uplink retransmission - uint32_t rbs_used_retx_rx; - /// total rb used for a new uplink transmission - uint32_t total_rbs_used_rx; - /// snr - int32_t snr; - /// target snr - int32_t target_snr; - - /// num rx pdu - uint32_t num_pdu_rx[NB_RB_MAX]; - /// num bytes rx - uint32_t num_bytes_rx[NB_RB_MAX]; - /// instantaneous rx throughput for each TTI - // uint32_t tti_goodput[NB_RB_MAX]; - /// errors - uint32_t num_errors_rx; - - uint64_t overhead_bytes_rx; - /// headers+ CE + padding bytes for a MAC PDU - uint64_t total_overhead_bytes_rx; - /// headers+ CE + padding bytes for a MAC PDU - uint64_t avg_overhead_bytes_rx; - // - uint32_t ulsch_bitrate; - //total - uint32_t total_ulsch_bitrate; - /// overall - /// MAC pdu bytes - uint64_t pdu_bytes_rx; - /// total MAC pdu bytes - uint64_t total_pdu_bytes_rx; - /// total num pdu - uint32_t total_num_pdus_rx; - /// num of error pdus - uint32_t total_num_errors_rx; - -} eNB_UE_STATS; -/*! \brief eNB template for UE context information */ -typedef struct { - /// C-RNTI of UE - rnti_t rnti; - /// NDI from last scheduling - uint8_t oldNDI[8]; - /// mcs1 from last scheduling - uint8_t oldmcs1[8]; - /// mcs2 from last scheduling - uint8_t oldmcs2[8]; - /// NDI from last UL scheduling - uint8_t oldNDI_UL[8]; - /// mcs from last UL scheduling - uint8_t mcs_UL[8]; - /// TBS from last UL scheduling - uint8_t TBS_UL[8]; - /// CQI_req from last scheduling - uint8_t oldCQI_UL[8]; - /// TPC from last scheduling - uint8_t oldTPC_UL[8]; - /// Flag to indicate UL has been scheduled at least once - boolean_t ul_active; - /// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received) - boolean_t configured; - - /// MCS from last scheduling - uint8_t mcs[8]; - - /// TPC from last scheduling - uint8_t oldTPC[8]; - - // PHY interface info - - /// Number of Allocated RBs for DL after scheduling (prior to frequency allocation) - uint16_t nb_rb[8]; // num_max_harq - - /// Number of Allocated RBs for UL after scheduling - uint16_t nb_rb_ul[8]; // num_max_harq - - /// Number of Allocated RBs for UL after scheduling - uint16_t first_rb_ul[8]; // num_max_harq - - /// Is CQI requested for UL after scheduling 1st transmission - uint8_t cqi_req[8]; // num_max_harq - - /// Cyclic shift for DMRS after scheduling - uint16_t cshift[8]; // num_max_harq - - /// Number of Allocated RBs by the ulsch preprocessor - uint8_t pre_allocated_nb_rb_ul; - - /// index of Allocated RBs by the ulsch preprocessor - int8_t pre_allocated_rb_table_index_ul; - - /// total allocated RBs - int8_t total_allocated_rbs; - - /// pre-assigned MCS by the ulsch preprocessor - uint8_t pre_assigned_mcs_ul; - - /// assigned MCS by the ulsch scheduler - uint8_t assigned_mcs_ul; - - /// DL DAI - uint8_t DAI; - - /// UL DAI - uint8_t DAI_ul[10]; - - /// UL Scheduling Request Received - uint8_t ul_SR; - - ///Resource Block indication for each sub-band in MU-MIMO - uint8_t rballoc_subband[8][50]; - - // Logical channel info for link with RLC - - /// Last received UE BSR info for each logical channel group id - uint8_t bsr_info[MAX_NUM_LCGID]; - - /// LCGID mapping - long lcgidmap[11]; - - /// phr information - int8_t phr_info; - - /// phr information - int8_t phr_info_configured; - - ///dl buffer info - uint32_t dl_buffer_info[MAX_NUM_LCID]; - /// total downlink buffer info - uint32_t dl_buffer_total; - /// total downlink pdus - uint32_t dl_pdus_total; - /// downlink pdus for each LCID - uint32_t dl_pdus_in_buffer[MAX_NUM_LCID]; - /// creation time of the downlink buffer head for each LCID - uint32_t dl_buffer_head_sdu_creation_time[MAX_NUM_LCID]; - /// maximum creation time of the downlink buffer head across all LCID - uint32_t dl_buffer_head_sdu_creation_time_max; - /// a flag indicating that the downlink head SDU is segmented - uint8_t dl_buffer_head_sdu_is_segmented[MAX_NUM_LCID]; - /// size of remaining size to send for the downlink head SDU - uint32_t dl_buffer_head_sdu_remaining_size_to_send[MAX_NUM_LCID]; - - /// total uplink buffer size - uint32_t ul_total_buffer; - /// uplink buffer creation time for each LCID - uint32_t ul_buffer_creation_time[MAX_NUM_LCGID]; - /// maximum uplink buffer creation time across all the LCIDs - uint32_t ul_buffer_creation_time_max; - /// uplink buffer size per LCID - uint32_t ul_buffer_info[MAX_NUM_LCGID]; - - /// UE tx power - int32_t ue_tx_power; - - /// stores the frame where the last TPC was transmitted - uint32_t pusch_tpc_tx_frame; - uint32_t pusch_tpc_tx_subframe; - uint32_t pucch_tpc_tx_frame; - uint32_t pucch_tpc_tx_subframe; - - /// stores the frame where the last bler was calculated - uint32_t pusch_bler_calc_frame; - uint32_t pusch_bler_calc_subframe; - -#ifdef LOCALIZATION - eNB_UE_estimated_distances distance; -#endif - -#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) - uint8_t rach_resource_type; - - uint16_t mpdcch_repetition_cnt; - struct PhysicalConfigDedicated *physicalConfigDedicated; - frame_t Msg2_frame; - sub_frame_t Msg2_subframe; -#endif -} UE_TEMPLATE; - -/*! \brief scheduling control information set through an API (not used)*/ -typedef struct { - ///UL transmission bandwidth in RBs - uint8_t ul_bandwidth[MAX_NUM_LCID]; - ///DL transmission bandwidth in RBs - uint8_t dl_bandwidth[MAX_NUM_LCID]; - - //To do GBR bearer - uint8_t min_ul_bandwidth[MAX_NUM_LCID]; - - uint8_t min_dl_bandwidth[MAX_NUM_LCID]; - - ///aggregated bit rate of non-gbr bearer per UE - uint64_t ue_AggregatedMaximumBitrateDL; - ///aggregated bit rate of non-gbr bearer per UE - uint64_t ue_AggregatedMaximumBitrateUL; - ///CQI scheduling interval in subframes. - uint16_t cqiSchedInterval; - ///Contention resolution timer used during random access - uint8_t mac_ContentionResolutionTimer; - - uint16_t max_allowed_rbs[MAX_NUM_LCID]; - - uint8_t max_mcs[MAX_NUM_LCID]; - - uint16_t priority[MAX_NUM_LCID]; - - // resource scheduling information - - /// Current DL harq round per harq_pid on each CC - uint8_t round[MAX_NUM_CCs][10]; - /// Current Active TBs per harq_pid on each CC - uint8_t tbcnt[MAX_NUM_CCs][10]; - /// Current UL harq round per harq_pid on each CC - uint8_t round_UL[MAX_NUM_CCs][8]; - uint8_t dl_pow_off[MAX_NUM_CCs]; - uint16_t pre_nb_available_rbs[MAX_NUM_CCs]; - unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX]; - uint16_t ta_timer; - double ta_update_f; - int16_t ta_update; - uint16_t ul_consecutive_errors; - int32_t context_active_timer; - int32_t cqi_req_timer; - int32_t ul_inactivity_timer; - int32_t ul_failure_timer; - int32_t ul_scheduled; - int32_t ra_pdcch_order_sent; - int32_t ul_out_of_sync; - int32_t phr_received; - uint8_t periodic_ri_received[NFAPI_CC_MAX]; - uint8_t aperiodic_ri_received[NFAPI_CC_MAX]; - uint32_t pucch_tpc_accumulated[NFAPI_CC_MAX]; - int16_t pucch1_cqi_update[NFAPI_CC_MAX]; - int16_t pucch1_snr[NFAPI_CC_MAX]; - int16_t pucch2_cqi_update[NFAPI_CC_MAX]; - int16_t pucch2_snr[NFAPI_CC_MAX]; - int16_t pucch3_cqi_update[NFAPI_CC_MAX]; - int16_t pucch3_snr[NFAPI_CC_MAX]; - double pusch_cqi_f[NFAPI_CC_MAX]; - int16_t pusch_cqi[NFAPI_CC_MAX]; - int16_t pusch_snr[NFAPI_CC_MAX]; - int16_t pusch_snr_avg[NFAPI_CC_MAX]; - uint64_t pusch_rx_num[NFAPI_CC_MAX]; - uint64_t pusch_rx_num_old[NFAPI_CC_MAX]; - uint64_t pusch_rx_error_num[NFAPI_CC_MAX]; - uint64_t pusch_rx_error_num_old[NFAPI_CC_MAX]; - double pusch_bler[NFAPI_CC_MAX]; - uint8_t mcs_offset[NFAPI_CC_MAX]; - uint16_t feedback_cnt[NFAPI_CC_MAX]; - uint16_t timing_advance; - uint16_t timing_advance_r9; - uint8_t periodic_wideband_cqi[NFAPI_CC_MAX]; - uint8_t periodic_wideband_spatial_diffcqi[NFAPI_CC_MAX]; - uint8_t periodic_wideband_pmi[NFAPI_CC_MAX]; - uint8_t periodic_subband_cqi[NFAPI_CC_MAX][16]; - uint8_t periodic_subband_spatial_diffcqi[NFAPI_CC_MAX][16]; - uint8_t aperiodic_subband_cqi0[NFAPI_CC_MAX][25]; - uint8_t aperiodic_subband_pmi[NFAPI_CC_MAX][25]; - uint8_t aperiodic_subband_diffcqi0[NFAPI_CC_MAX][25]; - uint8_t aperiodic_subband_cqi1[NFAPI_CC_MAX][25]; - uint8_t aperiodic_subband_diffcqi1[NFAPI_CC_MAX][25]; - uint8_t aperiodic_wideband_cqi0[NFAPI_CC_MAX]; - uint8_t aperiodic_wideband_pmi[NFAPI_CC_MAX]; - uint8_t aperiodic_wideband_cqi1[NFAPI_CC_MAX]; - uint8_t aperiodic_wideband_pmi1[NFAPI_CC_MAX]; - uint8_t dl_cqi[NFAPI_CC_MAX]; -} UE_sched_ctrl; -/*! \brief eNB template for the Random access information */ -typedef struct { - /// Flag to indicate this process is active - boolean_t RA_active; - /// Size of DCI for RA-Response (bytes) - uint8_t RA_dci_size_bytes1; - /// Size of DCI for RA-Response (bits) - uint8_t RA_dci_size_bits1; - /// Actual DCI to transmit for RA-Response - uint8_t RA_alloc_pdu1[(MAX_DCI_SIZE_BITS>>3)+1]; - /// DCI format for RA-Response (should be 1A) - uint8_t RA_dci_fmt1; - /// Size of DCI for Msg4/ContRes (bytes) - uint8_t RA_dci_size_bytes2; - /// Size of DCI for Msg4/ContRes (bits) - uint8_t RA_dci_size_bits2; - /// Actual DCI to transmit for Msg4/ContRes - uint8_t RA_alloc_pdu2[(MAX_DCI_SIZE_BITS>>3)+1]; - /// DCI format for Msg4/ContRes (should be 1A) - uint8_t RA_dci_fmt2; - /// Flag to indicate the eNB should generate RAR. This is triggered by detection of PRACH - uint8_t generate_rar; - /// Subframe where preamble was received - uint8_t preamble_subframe; - /// Subframe where Msg2 is to be sent - uint8_t Msg2_subframe; - /// Frame where Msg2 is to be sent - frame_t Msg2_frame; - /// Subframe where Msg3 is to be sent - sub_frame_t Msg3_subframe; - /// Frame where Msg3 is to be sent - frame_t Msg3_frame; - /// Subframe where Msg4 is to be sent - sub_frame_t Msg4_subframe; - /// Frame where Msg4 is to be sent - frame_t Msg4_frame; - /// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user. - uint8_t generate_Msg4; - /// Flag to indicate that eNB is waiting for ACK that UE has received Msg3. - uint8_t wait_ack_Msg4; - /// harq_pid used for Msg4 transmission - uint8_t harq_pid; - /// UE RNTI allocated during RAR - rnti_t rnti; - /// RA RNTI allocated from received PRACH - uint16_t RA_rnti; - /// Received preamble_index - uint8_t preamble_index; - /// Received UE Contention Resolution Identifier - uint8_t cont_res_id[6]; - /// Timing offset indicated by PHY - int16_t timing_offset; - /// Timeout for RRC connection - int16_t RRC_timer; - /// Msg3 first RB - uint8_t msg3_first_rb; - /// Msg3 number of RB - uint8_t msg3_nb_rb; - /// Msg3 MCS - uint8_t msg3_mcs; - /// Msg3 TPC command - uint8_t msg3_TPC; - /// Msg3 ULdelay command - uint8_t msg3_ULdelay; - /// Msg3 cqireq command - uint8_t msg3_cqireq; - /// Round of Msg3 HARQ - uint8_t msg3_round; - /// TBS used for Msg4 - int msg4_TBsize; - /// MCS used for Msg4 - int msg4_mcs; - /// size off piggybacked RRC SDU - uint8_t msg4_rrc_sdu_length; - uint32_t msg4_delay; - -#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) - uint8_t rach_resource_type; - uint8_t msg2_mpdcch_repetition_cnt; - uint8_t msg2_mpdcch_done; - uint8_t msg4_mpdcch_repetition_cnt; - uint8_t msg4_mpdcch_done; - uint8_t msg2_narrowband; - uint32_t msg34_narrowband; -#endif -} RA_TEMPLATE; - - -/*! \brief subband bitmap confguration (for ALU icic algo purpose), in test phase */ -typedef struct { - uint8_t sbmap[NUMBER_OF_SUBBANDS_MAX]; //13 = number of SB MAX for 100 PRB - uint8_t periodicity; - uint8_t first_subframe; - uint8_t sb_size; - uint8_t nb_active_sb; -} SBMAP_CONF; -/*! \brief UE list used by eNB to order UEs/CC for scheduling*/ -typedef struct { - /// Dedicated information for UEs - struct PhysicalConfigDedicated *physicalConfigDedicated[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; - /// DLSCH pdu - DLSCH_PDU DLSCH_pdu[MAX_NUM_CCs][2][NUMBER_OF_UE_MAX]; - /// DCI template and MAC connection parameters for UEs - UE_TEMPLATE UE_template[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; - /// DCI template and MAC connection for RA processes - int pCC_id[NUMBER_OF_UE_MAX]; - /// sorted downlink component carrier for the scheduler - int ordered_CCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; - /// number of downlink active component carrier - int numactiveCCs[NUMBER_OF_UE_MAX]; - /// sorted uplink component carrier for the scheduler - int ordered_ULCCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; - /// number of uplink active component carrier - int numactiveULCCs[NUMBER_OF_UE_MAX]; - /// number of downlink active component carrier - uint8_t dl_CC_bitmap[NUMBER_OF_UE_MAX]; - /// eNB to UE statistics - eNB_UE_STATS eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; - /// scheduling control info - UE_sched_ctrl UE_sched_ctrl[NUMBER_OF_UE_MAX]; - int next[NUMBER_OF_UE_MAX]; - int head; - int next_ul[NUMBER_OF_UE_MAX]; - int head_ul; - int avail; - int num_UEs; - boolean_t active[NUMBER_OF_UE_MAX]; -} UE_list_t; - -/*! \brief eNB common channels */ -typedef struct { - int physCellId; - int p_eNB; - int Ncp; - int eutra_band; - uint32_t dl_CarrierFreq; - BCCH_BCH_Message_t *mib; - RadioResourceConfigCommonSIB_t *radioResourceConfigCommon; -#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) - RadioResourceConfigCommonSIB_t *radioResourceConfigCommon_BR; -#endif - TDD_Config_t *tdd_Config; - SchedulingInfoList_t *schedulingInfoList; - ARFCN_ValueEUTRA_t ul_CarrierFreq; - long ul_Bandwidth; - /// Outgoing MIB PDU for PHY - MIB_PDU MIB_pdu; - /// Outgoing BCCH pdu for PHY - BCCH_PDU BCCH_pdu; - /// Outgoing BCCH DCI allocation - uint32_t BCCH_alloc_pdu; - /// Outgoing CCCH pdu for PHY - CCCH_PDU CCCH_pdu; - /// Outgoing RAR pdu for PHY - RAR_PDU RAR_pdu; - /// Template for RA computations - RA_TEMPLATE RA_template[NB_RA_PROC_MAX]; - /// VRB map for common channels - uint8_t vrb_map[100]; - /// VRB map for common channels and retransmissions by PHICH - uint8_t vrb_map_UL[100]; - /// MBSFN SubframeConfig - struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8]; - /// number of subframe allocation pattern available for MBSFN sync area - uint8_t num_sf_allocation_pattern; -#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) - /// MBMS Flag - uint8_t MBMS_flag; - /// Outgoing MCCH pdu for PHY - MCCH_PDU MCCH_pdu; - /// MCCH active flag - uint8_t msi_active; - /// MCCH active flag - uint8_t mcch_active; - /// MTCH active flag - uint8_t mtch_active; - /// number of active MBSFN area - uint8_t num_active_mbsfn_area; - /// MBSFN Area Info - struct MBSFN_AreaInfo_r9 *mbsfn_AreaInfo[MAX_MBSFN_AREA]; - /// PMCH Config - struct PMCH_Config_r9 *pmch_Config[MAX_PMCH_perMBSFN]; - /// MBMS session info list - struct MBMS_SessionInfoList_r9 *mbms_SessionList[MAX_PMCH_perMBSFN]; - /// Outgoing MCH pdu for PHY - MCH_PDU MCH_pdu; -#endif -#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) - /// Rel13 parameters from SIB1 - SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext; - /// Counter for SIB1-BR scheduling - int SIB1_BR_cnt; - /// Outgoing BCCH-BR pdu for PHY - BCCH_PDU BCCH_BR_pdu[20]; -#endif -} COMMON_channels_t; -/*! \brief top level eNB MAC structure */ -typedef struct eNB_MAC_INST_s { - /// Ethernet parameters for northbound midhaul interface - eth_params_t eth_params_n; - /// Ethernet parameters for fronthaul interface - eth_params_t eth_params_s; - /// - module_id_t Mod_id; - /// frame counter - frame_t frame; - /// subframe counter - sub_frame_t subframe; - /// Pointer to IF module instance for PHY - IF_Module_t *if_inst; - /// Common cell resources - COMMON_channels_t common_channels[MAX_NUM_CCs]; - /// current PDU index (BCH,MCH,DLSCH) - uint16_t pdu_index[MAX_NUM_CCs]; - - /// NFAPI Config Request Structure - nfapi_config_request_t config[MAX_NUM_CCs]; - /// Preallocated DL pdu list - nfapi_dl_config_request_pdu_t dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU]; - /// NFAPI DL Config Request Structure - nfapi_dl_config_request_t DL_req[MAX_NUM_CCs]; - /// Preallocated UL pdu list - nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU]; - /// Preallocated UL pdu list for ULSCH (n+k delay) - nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU]; - /// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place - nfapi_ul_config_request_t UL_req[MAX_NUM_CCs]; - /// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests - nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10]; - /// Preallocated HI_DCI0 pdu list - nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU]; - /// NFAPI HI/DCI0 Config Request Structure - nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs]; - /// Prealocated TX pdu list - nfapi_tx_request_pdu_t tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU]; - /// NFAPI DL PDU structure - nfapi_tx_request_t TX_req[MAX_NUM_CCs]; - /// UL handle - uint32_t ul_handle; - UE_list_t UE_list; - - ///subband bitmap configuration - SBMAP_CONF sbmap_conf; - /// CCE table used to build DCI scheduling information - int CCE_table[MAX_NUM_CCs][800]; - /// active flag for Other lcid - uint8_t lcid_active[NB_RB_MAX]; - /// eNB stats - eNB_STATS eNB_stats[MAX_NUM_CCs]; - // MAC function execution peformance profiler - /// processing time of eNB scheduler - time_stats_t eNB_scheduler; - /// processing time of eNB scheduler for SI - time_stats_t schedule_si; - /// processing time of eNB scheduler for Random access - time_stats_t schedule_ra; - /// processing time of eNB ULSCH scheduler - time_stats_t schedule_ulsch; - /// processing time of eNB DCI generation - time_stats_t fill_DLSCH_dci; - /// processing time of eNB MAC preprocessor - time_stats_t schedule_dlsch_preprocessor; - /// processing time of eNB DLSCH scheduler - time_stats_t schedule_dlsch; // include rlc_data_req + MAC header + preprocessor - /// processing time of eNB MCH scheduler - time_stats_t schedule_mch; - /// processing time of eNB ULSCH reception - time_stats_t rx_ulsch_sdu; // include rlc_data_ind -} eNB_MAC_INST; - -/* - * UE part - */ - -typedef enum { - TYPE0, - TYPE1, - TYPE1A, - TYPE2, - TYPE2A, - TYPEUESPEC -} MPDCCH_TYPES_t; - -/*!\brief UE layer 2 status */ -typedef enum { - CONNECTION_OK=0, - CONNECTION_LOST, - PHY_RESYNCH, - PHY_HO_PRACH -} UE_L2_STATE_t; - -/*!\brief UE scheduling info */ -typedef struct { - /// buffer status for each lcgid - uint8_t BSR[MAX_NUM_LCGID]; // should be more for mesh topology - /// keep the number of bytes in rlc buffer for each lcgid - int32_t BSR_bytes[MAX_NUM_LCGID]; - /// after multiplexing buffer remain for each lcid - int32_t LCID_buffer_remain[MAX_NUM_LCID]; - /// sum of all lcid buffer size - uint16_t All_lcid_buffer_size_lastTTI; - /// buffer status for each lcid - uint8_t LCID_status[MAX_NUM_LCID]; - /// SR pending as defined in 36.321 - uint8_t SR_pending; - /// SR_COUNTER as defined in 36.321 - uint16_t SR_COUNTER; - /// logical channel group ide for each LCID - uint8_t LCGID[MAX_NUM_LCID]; - /// retxBSR-Timer, default value is sf2560 - uint16_t retxBSR_Timer; - /// retxBSR_SF, number of subframe before triggering a regular BSR - uint16_t retxBSR_SF; - /// periodicBSR-Timer, default to infinity - uint16_t periodicBSR_Timer; - /// periodicBSR_SF, number of subframe before triggering a periodic BSR - uint16_t periodicBSR_SF; - /// default value is 0: not configured - uint16_t sr_ProhibitTimer; - /// sr ProhibitTime running - uint8_t sr_ProhibitTimer_Running; - /// default value to n5 - uint16_t maxHARQ_Tx; - /// default value is false - uint16_t ttiBundling; - /// default value is release - struct DRX_Config *drx_config; - /// default value is release - struct MAC_MainConfig__phr_Config *phr_config; - ///timer before triggering a periodic PHR - uint16_t periodicPHR_Timer; - ///timer before triggering a prohibit PHR - uint16_t prohibitPHR_Timer; - ///DL Pathloss change value - uint16_t PathlossChange; - ///number of subframe before triggering a periodic PHR - int16_t periodicPHR_SF; - ///number of subframe before triggering a prohibit PHR - int16_t prohibitPHR_SF; - ///DL Pathloss Change in db - uint16_t PathlossChange_db; - - /// default value is false - uint16_t extendedBSR_Sizes_r10; - /// default value is false - uint16_t extendedPHR_r10; - - //Bj bucket usage per lcid - int16_t Bj[MAX_NUM_LCID]; - // Bucket size per lcid - int16_t bucket_size[MAX_NUM_LCID]; -} UE_SCHEDULING_INFO; -/*!\brief Top level UE MAC structure */ -typedef struct { - uint16_t Node_id; - /// RX frame counter - frame_t rxFrame; - /// RX subframe counter - sub_frame_t rxSubframe; - /// TX frame counter - frame_t txFrame; - /// TX subframe counter - sub_frame_t txSubframe; - /// C-RNTI of UE - uint16_t crnti; - /// C-RNTI of UE before HO - rnti_t crnti_before_ho; ///user id (rnti) of connected UEs - /// uplink active flag - uint8_t ul_active; - /// pointer to RRC PHY configuration - RadioResourceConfigCommonSIB_t *radioResourceConfigCommon; - /// pointer to RACH_ConfigDedicated (NULL when not active, i.e. upon HO completion or T304 expiry) - struct RACH_ConfigDedicated *rach_ConfigDedicated; - /// pointer to RRC PHY configuration - struct PhysicalConfigDedicated *physicalConfigDedicated; -#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) - /// pointer to RRC PHY configuration SCEll - struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10; -#endif - /// pointer to TDD Configuration (NULL for FDD) - TDD_Config_t *tdd_Config; - /// Number of adjacent cells to measure - uint8_t n_adj_cells; - /// Array of adjacent physical cell ids - uint32_t adj_cell_id[6]; - /// Pointer to RRC MAC configuration - MAC_MainConfig_t *macConfig; - /// Pointer to RRC Measurement gap configuration - MeasGapConfig_t *measGapConfig; - /// Pointers to LogicalChannelConfig indexed by LogicalChannelIdentity. Note NULL means LCHAN is inactive. - LogicalChannelConfig_t *logicalChannelConfig[MAX_NUM_LCID]; - /// Scheduling Information - UE_SCHEDULING_INFO scheduling_info; - /// Outgoing CCCH pdu for PHY - CCCH_PDU CCCH_pdu; - /// Outgoing RAR pdu for PHY - RAR_PDU RAR_pdu; - /// Incoming DLSCH pdu for PHY - DLSCH_PDU DLSCH_pdu[NUMBER_OF_UE_MAX][2]; - /// number of attempt for rach - uint8_t RA_attempt_number; - /// Random-access procedure flag - uint8_t RA_active; - /// Random-access window counter - int8_t RA_window_cnt; - /// Random-access Msg3 size in bytes - uint8_t RA_Msg3_size; - /// Random-access prachMaskIndex - uint8_t RA_prachMaskIndex; - /// Flag indicating Preamble set (A,B) used for first Msg3 transmission - uint8_t RA_usedGroupA; - /// Random-access Resources - PRACH_RESOURCES_t RA_prach_resources; - /// Random-access PREAMBLE_TRANSMISSION_COUNTER - uint8_t RA_PREAMBLE_TRANSMISSION_COUNTER; - /// Random-access backoff counter - int16_t RA_backoff_cnt; - /// Random-access variable for window calculation (frame of last change in window counter) - uint32_t RA_tx_frame; - /// Random-access variable for window calculation (subframe of last change in window counter) - uint8_t RA_tx_subframe; - /// Random-access Group B maximum path-loss - /// Random-access variable for backoff (frame of last change in backoff counter) - uint32_t RA_backoff_frame; - /// Random-access variable for backoff (subframe of last change in backoff counter) - uint8_t RA_backoff_subframe; - /// Random-access Group B maximum path-loss - uint16_t RA_maxPL; - /// Random-access Contention Resolution Timer active flag - uint8_t RA_contention_resolution_timer_active; - /// Random-access Contention Resolution Timer count value - uint8_t RA_contention_resolution_cnt; - /// power headroom reporitng reconfigured - uint8_t PHR_reconfigured; - /// power headroom state as configured by the higher layers - uint8_t PHR_state; - /// power backoff due to power management (as allowed by P-MPRc) for this cell - uint8_t PHR_reporting_active; - /// power backoff due to power management (as allowed by P-MPRc) for this cell - uint8_t power_backoff_db[NUMBER_OF_eNB_MAX]; - /// BSR report falg management - uint8_t BSR_reporting_active; - /// retxBSR-Timer expires flag - uint8_t retxBSRTimer_expires_flag; - /// periodBSR-Timer expires flag - uint8_t periodBSRTimer_expires_flag; - - /// MBSFN_Subframe Configuration - struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8]; // FIXME replace 8 by MAX_MBSFN_AREA? - /// number of subframe allocation pattern available for MBSFN sync area - uint8_t num_sf_allocation_pattern; -#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) - /// number of active MBSFN area - uint8_t num_active_mbsfn_area; - /// MBSFN Area Info - struct MBSFN_AreaInfo_r9 *mbsfn_AreaInfo[MAX_MBSFN_AREA]; - /// PMCH Config - struct PMCH_Config_r9 *pmch_Config[MAX_PMCH_perMBSFN]; - /// MCCH status - uint8_t mcch_status; - /// MSI status - uint8_t msi_status;// could be an array if there are >1 MCH in one MBSFN area -#endif - //#ifdef CBA - /// CBA RNTI for each group - uint16_t cba_rnti[NUM_MAX_CBA_GROUP]; - /// last SFN for CBA channel access - uint8_t cba_last_access[NUM_MAX_CBA_GROUP]; - //#endif - /// total UE scheduler processing time - time_stats_t ue_scheduler; // total - /// UE ULSCH tx processing time inlcuding RLC interface (rlc_data_req) and mac header generation - time_stats_t tx_ulsch_sdu; - /// UE DLSCH rx processing time inlcuding RLC interface (mac_rrc_data_ind or mac_rlc_status_ind+mac_rlc_data_ind) and mac header parser - time_stats_t rx_dlsch_sdu ; - /// UE query for MCH subframe processing time - time_stats_t ue_query_mch; - /// UE MCH rx processing time - time_stats_t rx_mch_sdu; - /// UE BCCH rx processing time including RLC interface (mac_rrc_data_ind) - time_stats_t rx_si; - /// UE PCCH rx processing time including RLC interface (mac_rrc_data_ind) - time_stats_t rx_p; -} UE_MAC_INST; -/*! \brief ID of the neighboring cells used for HO*/ -typedef struct { - uint16_t cell_ids[6]; - uint8_t n_adj_cells; -} neigh_cell_id_t; - -#include "proto.h" -/*@}*/ -#endif /*__LAYER2_MAC_DEFS_H__ */ diff --git a/openair2/LAYER2/MAC/eNB_scheduler_RA.c b/openair2/LAYER2/MAC/eNB_scheduler_RA.c index 35082260f8..3dea211dbc 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_RA.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_RA.c @@ -212,13 +212,6 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t *ra, frame_t frameP, hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl); hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST; - //if (NFAPI_MODE != NFAPI_MONOLITHIC) { - // oai_nfapi_hi_dci0_req(hi_dci0_req); - // hi_dci0_req_body->number_of_hi=0; - //} - - //LOG_D(MAC, "MSG3: HI_DCI0 SFN/SF:%d number_of_dci:%d number_of_hi:%d\n", NFAPI_SFNSF2DEC(hi_dci0_req->sfn_sf), hi_dci0_req_body->number_of_dci, hi_dci0_req_body->number_of_hi); - // save UL scheduling information for preprocessor for (j = 0; j < ra->msg3_nb_rb; j++) cc->vrb_map_UL[ra->msg3_first_rb + j] = 1; diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 5b8f6a9d5c..475b819d6c 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -202,7 +202,7 @@ rx_sdu(const module_id_t enb_mod_idP, } } else { // sduP == NULL => error UE_scheduling_control->pusch_rx_error_num[CC_idP]++; - LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", + LOG_W(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", enb_mod_idP, harq_pid, CC_idP, @@ -1656,11 +1656,9 @@ schedule_ulsch_rnti(module_id_t module_idP, UE_template_ptr->cshift[harq_pid] = cshift; /* Setting DCI0 NFAPI struct */ hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[dci_ul_pdu_idx]; - //memset((void *) hi_dci0_pdu, 0,sizeof(nfapi_hi_dci0_request_pdu_t)); hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE; hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_dci_pdu); hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dci_format = NFAPI_UL_DCI_FORMAT_0; - //hi_dci0_pdu->dci_pdu.dci_pdu_rel8.aggregation_level = aggregation; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = UE_template_ptr->pre_first_nb_rb_ul; diff --git a/openair2/RRC/LTE/rrc_eNB.c b/openair2/RRC/LTE/rrc_eNB.c index 937f3c8f46..ac5025fd8c 100644 --- a/openair2/RRC/LTE/rrc_eNB.c +++ b/openair2/RRC/LTE/rrc_eNB.c @@ -6711,25 +6711,7 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete( ); } } else { // remove LCHAN from MAC/PHY -#if 0 - if (ue_context_pP->ue_context.DRB_active[drb_id] == 1) { - // DRB has just been removed so remove RLC + PDCP for DRB - /* rrc_pdcp_config_req (ctxt_pP->module_id, frameP, 1, CONFIG_ACTION_REMOVE, - (ue_mod_idP * NB_RB_MAX) + DRB2LCHAN[i],UNDEF_SECURITY_MODE); - */ - if (!NODE_IS_CU(RC.rrc[ctxt_pP->module_id]->node_type)) { - rrc_rlc_config_req(ctxt_pP, - SRB_FLAG_NO, - MBMS_FLAG_NO, - CONFIG_ACTION_REMOVE, - DRB2LCHAN[i], - Rlc_info_um); - } - } - - ue_context_pP->ue_context.DRB_active[drb_id] = 0; -#endif - if (DRB_configList->list.array[i]->logicalChannelIdentity) { + if (DRB_configList->list.array[i]->logicalChannelIdentity) { DRB2LCHAN[i] = (uint8_t) * DRB_configList->list.array[i]->logicalChannelIdentity; } From 1de8776c4395e231976f9ca1d94655a8e2a53a25 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Wed, 9 Dec 2020 13:59:49 +0900 Subject: [PATCH 49/54] Fix compile error --- openair2/LAYER2/MAC/eNB_scheduler.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler.c b/openair2/LAYER2/MAC/eNB_scheduler.c index 81ca1c67a6..dbfae06e13 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler.c +++ b/openair2/LAYER2/MAC/eNB_scheduler.c @@ -623,7 +623,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, UE_info->eNB_UE_stats[CC_id][UE_id].total_num_pdus, UE_info->eNB_UE_stats[CC_id][UE_id].total_rbs_used, #if defined(PRE_SCD_THREAD) - dl_buffer_total[CC_id][UE_id], + UE_info->UE_template[CC_id][UE_id].dl_buffer_total, #else 0, #endif From 519ab68b211c3920a612d15d19d79ff25f55bd4a Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Thu, 10 Dec 2020 20:27:55 +0900 Subject: [PATCH 50/54] Fix some merge miss. --- openair1/PHY/LTE_TRANSPORT/dci_tools.c | 2 ++ openair1/PHY/LTE_TRANSPORT/phich.c | 11 ++++++--- openair1/PHY/LTE_TRANSPORT/phich_common.c | 28 +++++++++++++++++++++++ openair1/PHY/LTE_TRANSPORT/pucch.c | 6 ++--- 4 files changed, 41 insertions(+), 6 deletions(-) diff --git a/openair1/PHY/LTE_TRANSPORT/dci_tools.c b/openair1/PHY/LTE_TRANSPORT/dci_tools.c index 8de011acef..4b06f67bbe 100644 --- a/openair1/PHY/LTE_TRANSPORT/dci_tools.c +++ b/openair1/PHY/LTE_TRANSPORT/dci_tools.c @@ -2071,6 +2071,8 @@ void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu ulsch->harq_processes[harq_pid]->round++; ulsch->harq_processes[harq_pid]->TBS = ulsch_pdu->ulsch_pdu_rel8.size<<3; ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks; + ulsch->harq_processes[harq_pid]->Or1 = 0; + ulsch->harq_processes[harq_pid]->Or2 = 0; } ulsch->rnti = ulsch_pdu->ulsch_pdu_rel8.rnti; diff --git a/openair1/PHY/LTE_TRANSPORT/phich.c b/openair1/PHY/LTE_TRANSPORT/phich.c index 6d8b58818b..1725588f4c 100644 --- a/openair1/PHY/LTE_TRANSPORT/phich.c +++ b/openair1/PHY/LTE_TRANSPORT/phich.c @@ -716,6 +716,7 @@ void generate_phich_top(PHY_VARS_eNB *eNB, uint8_t NSF_PHICH = 4; uint8_t pusch_subframe=-1; uint8_t i; + uint8_t harq_pid = 0; int subframe = proc->subframe_tx; phich_config_t *phich; @@ -748,16 +749,20 @@ void generate_phich_top(PHY_VARS_eNB *eNB, nseq_PHICH = ((phich->first_rb/Ngroup_PHICH) + phich->n_DMRS)%(2*NSF_PHICH); + harq_pid = subframe2harq_pid(frame_parms,phich_frame2_pusch_frame(frame_parms,proc->frame_tx,subframe),pusch_subframe); + if (harq_pid == 255) { + LOG_E(PHY,"FATAL ERROR: illegal harq_pid, returning\n"); + return; + } LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, AMP %d ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d)\n", - eNB->Mod_id,subframe2harq_pid(frame_parms, - phich_frame2_pusch_frame(frame_parms,proc->frame_tx,subframe),pusch_subframe),proc->frame_tx, + eNB->Mod_id,harq_pid,proc->frame_tx, subframe,amp,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH, phich->hi, phich->first_rb); T(T_ENB_PHY_PHICH, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(subframe), T_INT(-1 /* TODO: rnti */), - T_INT(subframe2harq_pid(frame_parms,phich_frame2_pusch_frame(frame_parms,proc->frame_tx,subframe),pusch_subframe)), + T_INT(harq_pid), T_INT(Ngroup_PHICH), T_INT(NSF_PHICH), T_INT(ngroup_PHICH), T_INT(nseq_PHICH), T_INT(phich->hi), diff --git a/openair1/PHY/LTE_TRANSPORT/phich_common.c b/openair1/PHY/LTE_TRANSPORT/phich_common.c index 89c826be66..302229b88d 100644 --- a/openair1/PHY/LTE_TRANSPORT/phich_common.c +++ b/openair1/PHY/LTE_TRANSPORT/phich_common.c @@ -102,6 +102,34 @@ unsigned char subframe2_ul_harq(LTE_DL_FRAME_PARMS *frame_parms,unsigned char su return(subframe&7); switch (frame_parms->tdd_config) { + case 1: + if (subframe == 6) { + return(0); + } else if (subframe==9){ + return(1); + } else if (subframe==1){ + return(2); + } else if (subframe==4){ + return(3); + } else { + LOG_E(PHY,"phich.c: subframe2_ul_harq, illegal subframe %d for tdd_config %d\n", + subframe,frame_parms->tdd_config); + return(0); + } + + break; + case 2: + if (subframe == 3) { + return(1); + } else if (subframe==8){ + return(0); + } else { + LOG_E(PHY,"phich.c: subframe2_ul_harq, illegal subframe %d for tdd_config %d\n", + subframe,frame_parms->tdd_config); + return(0); + } + + break; case 3: if ( (subframe == 8) || (subframe == 9) ) { return(subframe-8); diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index fa4d883d64..c72fa1b480 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -741,7 +741,7 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, uint8_t m,l; uint8_t n_cs,alpha_ind; int16_t tmp_re,tmp_im,W_re=0,W_im=0; - int16_t W4_nouse[4]={1,1,-1,-1}; + int16_t W4_nouse[4]={32767,32767,-32768,-32768}; int32_t n0_IQ[2]; double interference_power; int16_t *rxptr; @@ -846,7 +846,7 @@ uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB, } // antenna } interference_power /= calc_cnt; - eNB->measurements.n0_pucch_dB = dB_fixed_x10((int)(interference_power/calc_cnt))/10; + eNB->measurements.n0_pucch_dB = dB_fixed_x10((int)interference_power)/10; LOG_D(PHY,"estimate pucch noise %lf %d %d\n",interference_power,calc_cnt,eNB->measurements.n0_pucch_dB); return 0; } @@ -1188,7 +1188,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, #endif } - stat += (stat_re*stat_re); + stat += ((stat_re*stat_re) + (stat_im*stat_im)); } //re } // aa From 8c9753ca3c0f419dbef5e1cba43df2cfdf19e81e Mon Sep 17 00:00:00 2001 From: He Shanyun Date: Fri, 11 Dec 2020 16:28:03 +0900 Subject: [PATCH 51/54] fix issue about error locking mutex_rxtx of L2 sim --- nfapi/oai_integration/nfapi_vnf.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/nfapi/oai_integration/nfapi_vnf.c b/nfapi/oai_integration/nfapi_vnf.c index b93cb9c342..f76cad87f7 100644 --- a/nfapi/oai_integration/nfapi_vnf.c +++ b/nfapi/oai_integration/nfapi_vnf.c @@ -333,11 +333,11 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf) { // wake up TX for subframe n+sf_ahead // lock the TX mutex and make sure the thread is ready - if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) { - LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt ); - exit_fun( "error locking mutex_rxtx" ); - return(-1); - } + //if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) { + // LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt ); + // exit_fun( "error locking mutex_rxtx" ); + // return(-1); + //} { static uint16_t old_sf = 0; @@ -405,9 +405,6 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf) { return(-1); } - //LOG_D(PHY,"%s() About to attempt pthread_mutex_unlock\n", __FUNCTION__); - pthread_mutex_unlock( &L1_proc->mutex ); - //LOG_D(PHY,"%s() UNLOCKED pthread_mutex_unlock\n", __FUNCTION__); return(0); } From 65bad0f5a87b632f16f215a8c8e27fa67860e947 Mon Sep 17 00:00:00 2001 From: He Shanyun Date: Fri, 11 Dec 2020 16:42:58 +0900 Subject: [PATCH 52/54] fix cppcheck warning --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 475b819d6c..77eab37f57 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -169,9 +169,10 @@ rx_sdu(const module_id_t enb_mod_idP, */ UE_scheduling_control->ta_update_f = ((double)UE_scheduling_control->ta_update_f * 3 + (double)timing_advance) / 4; UE_scheduling_control->ta_update = (int)UE_scheduling_control->ta_update_f; - UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10; - - if(UE_scheduling_control->pusch_snr[CC_idP] > 0 || UE_scheduling_control->pusch_snr[CC_idP] < 63) { + int tmp_snr = (5 * ul_cqi - 640) / 10; + UE_scheduling_control->pusch_snr[CC_idP] = tmp_snr; + + if(tmp_snr > 0 && tmp_snr < 63) { double snr_filter_tpc=0.7; int snr_thres_tpc=30; int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP]; From b125b93e9e0f7543e348a2a555b806b8759242dd Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Tue, 15 Dec 2020 18:19:22 +0900 Subject: [PATCH 53/54] Fix log and minor bugs. --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 77eab37f57..edb8c18c78 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -203,7 +203,7 @@ rx_sdu(const module_id_t enb_mod_idP, } } else { // sduP == NULL => error UE_scheduling_control->pusch_rx_error_num[CC_idP]++; - LOG_W(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", + LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", enb_mod_idP, harq_pid, CC_idP, @@ -213,10 +213,10 @@ rx_sdu(const module_id_t enb_mod_idP, ul_cqi, UE_id, current_rnti, - sdu_lenP); + sdu_lenP); if (ul_cqi > 200) { // too high energy pattern - UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; + UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10; LOG_W(MAC, "[MAC] Too high energy pattern\n"); } From bbaef50932561d3882bc8bd90d4e2e1b154c8ae6 Mon Sep 17 00:00:00 2001 From: "masayuki.harada" Date: Sun, 27 Dec 2020 20:19:33 +0900 Subject: [PATCH 54/54] Fix est buffer. --- openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c index 6e86832a60..47c27798bf 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c @@ -197,10 +197,6 @@ rx_sdu(const module_id_t enb_mod_idP, if (UE_template_ptr->scheduled_ul_bytes < 0) { UE_template_ptr->scheduled_ul_bytes = 0; } - UE_template_ptr->estimated_ul_buffer -= UE_template_ptr->TBS_UL[harq_pid]; - if (UE_template_ptr->estimated_ul_buffer < 0) { - UE_template_ptr->estimated_ul_buffer = 0; - } } else { // sduP == NULL => error UE_scheduling_control->pusch_rx_error_num[CC_idP]++; LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n", @@ -234,10 +230,6 @@ rx_sdu(const module_id_t enb_mod_idP, if (UE_template_ptr->scheduled_ul_bytes < 0) { UE_template_ptr->scheduled_ul_bytes = 0; } - UE_template_ptr->estimated_ul_buffer -= UE_template_ptr->TBS_UL[harq_pid]; - if (UE_template_ptr->estimated_ul_buffer < 0) { - UE_template_ptr->estimated_ul_buffer = 0; - } if (find_RA_id(enb_mod_idP, CC_idP, current_rnti) != -1) { cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti); @@ -573,8 +565,6 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->ul_buffer_info[LCGID1] + UE_template_ptr->ul_buffer_info[LCGID2] + UE_template_ptr->ul_buffer_info[LCGID3]; - UE_template_ptr->scheduled_ul_bytes = 0; - RC.eNB[enb_mod_idP][CC_idP]->pusch_stats_bsr[UE_id][(frameP * 10) + subframeP] = (payload_ptr[0] & 0x3f); if (UE_id == UE_info->list.head) { @@ -620,8 +610,6 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->ul_buffer_info[LCGID1] + UE_template_ptr->ul_buffer_info[LCGID2] + UE_template_ptr->ul_buffer_info[LCGID3]; - UE_template_ptr->scheduled_ul_bytes = 0; - LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d: Received long BSR. Size is LCGID0 = %u LCGID1 = %u LCGID2 = %u LCGID3 = %u\n", enb_mod_idP, CC_idP, @@ -829,9 +817,6 @@ rx_sdu(const module_id_t enb_mod_idP, UE_template_ptr->ul_buffer_info[1] + UE_template_ptr->ul_buffer_info[2] + UE_template_ptr->ul_buffer_info[3]; - if (UE_template_ptr->estimated_ul_buffer == 0) { - UE_template_ptr->scheduled_ul_bytes = 0; - } //UE_template_ptr->estimated_ul_buffer += UE_template_ptr->estimated_ul_buffer / 4; }