reworking handling pdcch at mac, including support for multiple pdcch pdu

openair1/SIMULATION/NR_PHY/dlsim.c

@@ -1038,8 +1038,6 @@ int main(int argc, char **argv)
         
       while ((round<num_rounds) && (UE_harq_process->ack==0)) {
 
-        memset(RC.nrmac[0]->cce_list[0],0,MAX_NUM_CCE*sizeof(int));
-        memset(RC.nrmac[0]->cce_list[1],0,MAX_NUM_CCE*sizeof(int));
         clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
 
         UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1);
@@ -1047,7 +1045,7 @@ int main(int argc, char **argv)
 
         UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round;
         for (int i=0; i<MAX_NUM_CORESET; i++)
-          gNB_mac->UE_info.num_pdcch_cand[0][i] = 0;
+          gNB_mac->UE_info.pdcch_cand[i] = 0;
       
         if (css_flag == 0) {
           nr_schedule_ue_spec(0, frame, slot);

openair2/LAYER2/NR_MAC_gNB/config.c

@@ -535,7 +535,6 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
   if (CellGroup) {
 
     const NR_ServingCellConfig_t *servingCellConfig = CellGroup->spCellConfig->spCellConfigDedicated;
-
     const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = servingCellConfig->downlinkBWP_ToAddModList;
     if(bwpList) {
       AssertFatal(bwpList->list.count > 0, "downlinkBWP_ToAddModList has no BWPs!\n");
@@ -605,6 +604,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
       }
       LOG_I(NR_MAC,"Added new RA process for UE RNTI %04x with initial CellGroup\n", rnti);
     } else { // CellGroup has been updated
+      NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon;
       const int UE_id = find_nr_UE_id(Mod_idP,rnti);
       int target_ss;
       UE_info->CellGroup[UE_id] = CellGroup;
@@ -612,19 +612,28 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
       process_CellGroup(CellGroup,&UE_info->UE_sched_ctrl[UE_id]);
       // update coreset/searchspace
       void *bwpd = NULL;
+      NR_BWP_t *genericParameters = NULL;
       target_ss = NR_SearchSpace__searchSpaceType_PR_common;
       if ((UE_info->UE_sched_ctrl[UE_id].active_bwp)) {
         target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
         bwpd = (void*)UE_info->UE_sched_ctrl[UE_id].active_bwp->bwp_Dedicated;
+        genericParameters = &UE_info->UE_sched_ctrl[UE_id].active_bwp->bwp_Common->genericParameters;
       }
       else if (CellGroup->spCellConfig &&
                  CellGroup->spCellConfig->spCellConfigDedicated &&
                  (CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP)) {
         target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
         bwpd = (void*)CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP;
+        genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
       }
       UE_info->UE_sched_ctrl[UE_id].search_space = get_searchspace(scc, bwpd, target_ss);
       UE_info->UE_sched_ctrl[UE_id].coreset = get_coreset(Mod_idP, scc, bwpd, UE_info->UE_sched_ctrl[UE_id].search_space, target_ss);
+      UE_info->UE_sched_ctrl[UE_id].sched_pdcch = set_pdcch_structure(RC.nrmac[Mod_idP],
+                                                                      UE_info->UE_sched_ctrl[UE_id].search_space,
+                                                                      UE_info->UE_sched_ctrl[UE_id].coreset,
+                                                                      scc,
+                                                                      genericParameters,
+                                                                      NULL);
       UE_info->UE_sched_ctrl[UE_id].maxL = 2;
     }
   }

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -306,12 +306,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
     nr_rrc_trigger(&ctxt, 0 /*CC_id*/, frame, slot >> *scc->ssbSubcarrierSpacing);
   }
 
-  memset(RC.nrmac[module_idP]->cce_list[0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
+  for (int i=0; i<MAX_NUM_CORESET; i++)
-  memset(RC.nrmac[module_idP]->cce_list[1],0,MAX_NUM_CCE*sizeof(int)); // coreset1
+    RC.nrmac[module_idP]->pdcch_cand[i] = 0;
-  NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info;
-  for (int UE_id = UE_info->list.head; UE_id >= 0; UE_id = UE_info->list.next[UE_id])
-    for (int i=0; i<MAX_NUM_CORESET; i++)
-      UE_info->num_pdcch_cand[UE_id][i] = 0;
   for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
     //mbsfn_status[CC_id] = 0;
 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c

@@ -581,12 +581,15 @@ void nr_initiate_ra_proc(module_id_t module_idP,
 
       NR_SearchSpaceId_t	ra_SearchSpace = 0;
       struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = NULL;
+      NR_BWP_t *genericParameters = NULL;
       if(bwp) {
         commonSearchSpaceList = bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
         ra_SearchSpace = *bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
+        genericParameters = &bwp->bwp_Common->genericParameters;
       } else {
         commonSearchSpaceList = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
         ra_SearchSpace = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
+        genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
       }
       AssertFatal(commonSearchSpaceList->list.count > 0, "common SearchSpace list has 0 elements\n");
 
@@ -599,6 +602,14 @@ void nr_initiate_ra_proc(module_id_t module_idP,
 
       AssertFatal(ra->ra_ss!=NULL,"SearchSpace cannot be null for RA\n");
 
+      ra->coreset = get_coreset(module_idP, scc, bwp, ra->ra_ss, NR_SearchSpace__searchSpaceType_PR_common);
+      ra->sched_pdcch = set_pdcch_structure(nr_mac,
+                                            ra->ra_ss,
+                                            ra->coreset,
+                                            scc,
+                                            genericParameters,
+                                            NULL);
+
       // retrieving ra pdcch monitoring period and offset
       find_monitoring_periodicity_offset_common(ra->ra_ss, &monitoring_slot_period, &monitoring_offset);
 
@@ -774,7 +785,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
 
     // generation of DCI 0_0 to schedule msg3 retransmission
     NR_SearchSpace_t *ss = ra->ra_ss;
-    NR_ControlResourceSet_t *coreset = get_coreset(module_idP, scc, NULL, ss, NR_SearchSpace__searchSpaceType_PR_common);
+    NR_ControlResourceSet_t *coreset = ra->coreset;
     AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg3 retransmission\n");
 
     nfapi_nr_ul_dci_request_t *ul_dci_req = &nr_mac->UL_dci_req[CC_id];
@@ -788,7 +799,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
       ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
       pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
       ul_dci_req->numPdus += 1;
-      nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL);
+      nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch);
       nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
     }
 
@@ -800,7 +811,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
       if(nr_of_candidates>0) break;
     }
     AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n");
-    int CCEIndex = allocate_nr_CCEs(nr_mac, NULL, coreset, aggregation_level, 0, 0, nr_of_candidates);
+    int CCEIndex = find_pdcch_candidate(nr_mac,
+                                        CC_id,
+                                        aggregation_level,
+                                        nr_of_candidates,
+                                        ra->sched_pdcch,
+                                        coreset,
+                                        0);
     if (CCEIndex < 0) {
       LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti);
       return;
@@ -841,6 +858,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
                        ra->bwp_id);
 
     // Mark the corresponding RBs as used
+
+    fill_pdcch_vrb_map(nr_mac,
+                       CC_id,
+                       ra->sched_pdcch,
+                       CCEIndex,
+                       aggregation_level);
+
     for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
       vrb_map_UL[rbStart + BWPStart + rb] = 1;
     }
@@ -1150,7 +1174,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
     SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
     AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
 
-    coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common);
+    coreset = ra->coreset;
 
     AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n");
 
@@ -1182,7 +1206,15 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
       if(nr_of_candidates>0) break;
     }
     AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n");
-    int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level,0,0,nr_of_candidates);
+
+    int CCEIndex = find_pdcch_candidate(nr_mac,
+                                        CC_id,
+                                        aggregation_level,
+                                        nr_of_candidates,
+                                        ra->sched_pdcch,
+                                        coreset,
+                                        0);
+
     if (CCEIndex < 0) {
       LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti);
       return;
@@ -1204,7 +1236,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
       dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
       dl_req->nPDUs += 1;
       pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
-      nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL);
+      nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch);
       nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
     }
 
@@ -1363,6 +1395,11 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
     nr_mac->TX_req[CC_id].Slot = slotP;
 
     // Mark the corresponding symbols RBs as used
+    fill_pdcch_vrb_map(nr_mac,
+                       CC_id,
+                       ra->sched_pdcch,
+                       CCEIndex,
+                       aggregation_level);
     for (int rb = 0; rb < rbSize; rb++) {
       vrb_map[BWPStart + rb + rbStart] = ((1<<nrOfSymbols)-1)<<startSymbolIndex;
     }
@@ -1401,7 +1438,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
       pdsch_TimeDomainAllocationList = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
     }
 
-    coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common);
+    coreset = ra->coreset;
 
     AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg4\n");
 
@@ -1447,7 +1484,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
       if(nr_of_candidates>0) break;
     }
     AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n");
-    int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level,0,0,nr_of_candidates);
+
+    int CCEIndex = find_pdcch_candidate(nr_mac,
+                                        CC_id,
+                                        aggregation_level,
+                                        nr_of_candidates,
+                                        ra->sched_pdcch,
+                                        coreset,
+                                        0);
+
     if (CCEIndex < 0) {
       LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti);
       return;
@@ -1580,7 +1625,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
       dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
       dl_req->nPDUs += 1;
       pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
-      nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL);
+      nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch);
       nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
     }
 
@@ -1722,6 +1767,11 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
     nr_mac->TX_req[CC_id].Slot = slotP;
 
     // Mark the corresponding symbols and RBs as used
+    fill_pdcch_vrb_map(nr_mac,
+                       CC_id,
+                       ra->sched_pdcch,
+                       CCEIndex,
+                       aggregation_level);
     for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) {
       vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = ((1<<nrOfSymbols)-1)<<startSymbolIndex;
     }

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c

@@ -329,7 +329,9 @@ uint32_t schedule_control_sib1(module_id_t module_id,
                                int num_total_bytes) {
 
   gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
-  uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
+  NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
+  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
+  uint16_t *vrb_map = cc->vrb_map;
 
   if (gNB_mac->sched_ctrlCommon == NULL){
     LOG_D(NR_MAC,"schedule_control_common: Filling nr_mac->sched_ctrlCommon\n");
@@ -340,6 +342,12 @@ uint32_t schedule_control_sib1(module_id_t module_id,
     fill_coresetZero(gNB_mac->sched_ctrlCommon->coreset,type0_PDCCH_CSS_config);
     gNB_mac->cset0_bwp_start = type0_PDCCH_CSS_config->cset_start_rb;
     gNB_mac->cset0_bwp_size = type0_PDCCH_CSS_config->num_rbs;
+    gNB_mac->sched_ctrlCommon->sched_pdcch = set_pdcch_structure(NULL,
+                                                                 gNB_mac->sched_ctrlCommon->search_space,
+                                                                 gNB_mac->sched_ctrlCommon->coreset,
+                                                                 scc,
+                                                                 NULL,
+                                                                 type0_PDCCH_CSS_config);
   }
 
   gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation;
@@ -354,13 +362,13 @@ uint32_t schedule_control_sib1(module_id_t module_id,
     if (nr_of_candidates>0) break; // choosing the lower value of aggregation level available
   }
   AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n");
-  gNB_mac->sched_ctrlCommon->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
+  gNB_mac->sched_ctrlCommon->cce_index = find_pdcch_candidate(gNB_mac,
-                                                          NULL,
+                                                              CC_id,
-                                                          gNB_mac->sched_ctrlCommon->coreset,
+                                                              gNB_mac->sched_ctrlCommon->aggregation_level,
-                                                          gNB_mac->sched_ctrlCommon->aggregation_level,
+                                                              nr_of_candidates,
-                                                          0,
+                                                              gNB_mac->sched_ctrlCommon->sched_pdcch,
-                                                          candidate_idx,
+                                                              gNB_mac->sched_ctrlCommon->coreset,
-                                                          nr_of_candidates);
+                                                              0);
 
   AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n");
 
@@ -412,6 +420,11 @@ uint32_t schedule_control_sib1(module_id_t module_id,
   LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
   LOG_D(MAC,"mappingtype = %d\n", mappingtype);
   // Mark the corresponding RBs as used
+  fill_pdcch_vrb_map(gNB_mac,
+                     CC_id,
+                     gNB_mac->sched_ctrlCommon->sched_pdcch,
+                     gNB_mac->sched_ctrlCommon->cce_index,
+                     gNB_mac->sched_ctrlCommon->aggregation_level);
   for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
     vrb_map[rb + rbStart] = ((1<<nrOfSymbols)-1)<<startSymbolIndex;
   }
@@ -436,13 +449,10 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
   dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
   dl_req->nPDUs += 1;
   nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
-  nr_configure_pdcch(NULL,
+  nr_configure_pdcch(pdcch_pdu_rel15,
-                     pdcch_pdu_rel15,
-                     gNB_mac->sched_ctrlCommon->search_space,
                      gNB_mac->sched_ctrlCommon->coreset,
-                     scc,
                      NULL,
-                     type0_PDCCH_CSS_config);
+                     gNB_mac->sched_ctrlCommon->sched_pdcch);
 
   nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
   memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c

@@ -612,8 +612,27 @@ bool allocate_dl_retransmission(module_id_t module_id,
   }
 
   /* Find a free CCE */
-  bool freeCCE = find_free_CCE(module_id, slot, UE_id);
+  const int cid = sched_ctrl->coreset->controlResourceSetId;
-  if (!freeCCE) {
+  const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot];
+  uint8_t nr_of_candidates;
+  for (int i=0; i<5; i++) {
+    // for now taking the lowest value among the available aggregation levels
+    find_aggregation_candidates(&sched_ctrl->aggregation_level,
+                                &nr_of_candidates,
+                                sched_ctrl->search_space,
+                                1<<i);
+    if(nr_of_candidates>0) break;
+  }
+
+  int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id],
+                                      /* CC_id = */ 0,
+                                      sched_ctrl->aggregation_level,
+                                      nr_of_candidates,
+                                      sched_ctrl->sched_pdcch,
+                                      sched_ctrl->coreset,
+                                      Y);
+
+  if (CCEIndex<0) {
     LOG_D(MAC, "%4d.%2d could not find CCE for DL DCI retransmission UE %d/RNTI %04x\n",
           frame, slot, UE_id, UE_info->rnti[UE_id]);
     return false;
@@ -630,14 +649,18 @@ bool allocate_dl_retransmission(module_id_t module_id,
           UE_info->rnti[UE_id],
           frame,
           slot);
-    int cid = sched_ctrl->coreset->controlResourceSetId;
+    RC.nrmac[module_id]->pdcch_cand[cid]--;
-    UE_info->num_pdcch_cand[UE_id][cid]--;
-    int *cce_list = RC.nrmac[module_id]->cce_list[cid];
-    for (int i = 0; i < sched_ctrl->aggregation_level; i++)
-      cce_list[sched_ctrl->cce_index + i] = 0;
     return false;
   }
 
+  sched_ctrl->cce_index = CCEIndex;
+
+  fill_pdcch_vrb_map(RC.nrmac[module_id],
+                     /* CC_id = */ 0,
+                     sched_ctrl->sched_pdcch,
+                     CCEIndex,
+                     sched_ctrl->aggregation_level);
+
   /* just reuse from previous scheduling opportunity, set new start RB */
   sched_ctrl->sched_pdsch = *retInfo;
   sched_ctrl->sched_pdsch.rbStart = rbStart;
@@ -746,8 +769,27 @@ void pf_dl(module_id_t module_id,
     int rbStart = 0; // start wrt BWPstart
 
     /* Find a free CCE */
-    bool freeCCE = find_free_CCE(module_id, slot, UE_id);
+    const int cid = sched_ctrl->coreset->controlResourceSetId;
-    if (!freeCCE) {
+    const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot];
+    uint8_t nr_of_candidates;
+    for (int i=0; i<5; i++) {
+      // for now taking the lowest value among the available aggregation levels
+      find_aggregation_candidates(&sched_ctrl->aggregation_level,
+                                  &nr_of_candidates,
+                                  sched_ctrl->search_space,
+                                  1<<i);
+      if(nr_of_candidates>0) break;
+    }
+
+    int CCEIndex = find_pdcch_candidate(mac,
+                                        /* CC_id = */ 0,
+                                        sched_ctrl->aggregation_level,
+                                        nr_of_candidates,
+                                        sched_ctrl->sched_pdcch,
+                                        sched_ctrl->coreset,
+                                        Y);
+
+    if (CCEIndex<0) {
       LOG_D(NR_MAC, "%4d.%2d could not find CCE for DL DCI UE %d/RNTI %04x\n", frame, slot, UE_id, rnti);
       continue;
     }
@@ -766,14 +808,18 @@ void pf_dl(module_id_t module_id,
             rnti,
             frame,
             slot);
-      int cid = sched_ctrl->coreset->controlResourceSetId;
+      mac->pdcch_cand[cid]--;
-      UE_info->num_pdcch_cand[UE_id][cid]--;
-      int *cce_list = mac->cce_list[cid];
-      for (int i = 0; i < sched_ctrl->aggregation_level; i++)
-        cce_list[sched_ctrl->cce_index + i] = 0;
       return;
     }
 
+    sched_ctrl->cce_index = CCEIndex;
+
+    fill_pdcch_vrb_map(mac,
+                       /* CC_id = */ 0,
+                       sched_ctrl->sched_pdcch,
+                       CCEIndex,
+                       sched_ctrl->aggregation_level);
+
     /* MCS has been set above */
 
     const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
@@ -1024,9 +1070,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
       dl_req->nPDUs += 1;
       pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
       LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid);
-      NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space:gNB_mac->sched_ctrlCommon->search_space;
       NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
-      nr_configure_pdcch(gNB_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL);
+      nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch);
       gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu;
     }
 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -346,15 +346,16 @@ void nr_preprocessor_phytest(module_id_t module_id,
 
   const int cid = sched_ctrl->coreset->controlResourceSetId;
   const uint16_t Y = UE_info->Y[UE_id][cid%3][slot];
-  const int m = UE_info->num_pdcch_cand[UE_id][cid];
+
-  sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
+  int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id],
-                                  sched_ctrl->active_bwp,
+                                      CC_id,
-                                  sched_ctrl->coreset,
+                                      sched_ctrl->aggregation_level,
-                                  sched_ctrl->aggregation_level,
+                                      nr_of_candidates,
-                                  Y,
+                                      sched_ctrl->sched_pdcch,
-                                  m,
+                                      sched_ctrl->coreset,
-                                  nr_of_candidates);
+                                      Y);
-  AssertFatal(sched_ctrl->cce_index >= 0,
+
+  AssertFatal(CCEIndex >= 0,
               "%s(): could not find CCE for UE %d\n",
               __func__,
               UE_id);
@@ -368,13 +369,18 @@ void nr_preprocessor_phytest(module_id_t module_id,
           rnti,
           frame,
           slot);
-    UE_info->num_pdcch_cand[UE_id][cid]--;
+    RC.nrmac[module_id]->pdcch_cand[cid]--;
-    int *cce_list = RC.nrmac[module_id]->cce_list[cid];
-    for (int i = 0; i < sched_ctrl->aggregation_level; i++)
-      cce_list[sched_ctrl->cce_index + i] = 0;
     return;
   }
 
+  sched_ctrl->cce_index = CCEIndex;
+
+  fill_pdcch_vrb_map(RC.nrmac[module_id],
+                     CC_id,
+                     sched_ctrl->sched_pdcch,
+                     CCEIndex,
+                     sched_ctrl->aggregation_level);
+
   //AssertFatal(alloc,
   //            "could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n",
   //            rnti, frame, slot);
@@ -506,19 +512,20 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
 
   const int cid = sched_ctrl->coreset->controlResourceSetId;
   const uint16_t Y = UE_info->Y[UE_id][cid%3][slot];
-  const int m = UE_info->num_pdcch_cand[UE_id][cid];
+
-  sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
+  int CCEIndex = find_pdcch_candidate(nr_mac,
-                                           sched_ctrl->active_bwp,
+                                      CC_id,
-                                           sched_ctrl->coreset,
+                                      sched_ctrl->aggregation_level,
-                                           sched_ctrl->aggregation_level,
+                                      nr_of_candidates,
-                                           Y,
+                                      sched_ctrl->sched_pdcch,
-                                           m,
+                                      sched_ctrl->coreset,
-                                           nr_of_candidates);
+                                      Y);
+
   if (sched_ctrl->cce_index < 0) {
     LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__);
+    nr_mac->pdcch_cand[cid]--;
     return false;
   }
-  UE_info->num_pdcch_cand[UE_id][cid]++;
 
   const int mcs = target_ul_mcs;
   NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
@@ -547,6 +554,12 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
                          >> 3;
 
   /* mark the corresponding RBs as used */
+  fill_pdcch_vrb_map(nr_mac,
+                     CC_id,
+                     sched_ctrl->sched_pdcch,
+                     CCEIndex,
+                     sched_ctrl->aggregation_level);
+
   for (int rb = rbStart; rb < rbStart + rbSize; rb++)
     vrb_map_UL[rb+BWPStart] = 1;
   return true;

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -159,6 +159,7 @@ NR_ControlResourceSet_t *get_coreset(module_id_t module_idP,
                                      NR_SearchSpace_t *ss,
                                      NR_SearchSpace__searchSpaceType_PR ss_type) {
   NR_ControlResourceSetId_t coreset_id = *ss->controlResourceSetId;
+
   if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) { // common search space
     NR_ControlResourceSet_t *coreset;
     if(coreset_id == 0) {
@@ -208,48 +209,183 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc,
   AssertFatal(0, "Couldn't find an adequate searchspace bwp_Dedicated %p\n",bwp_Dedicated);
 }
 
-int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
+NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac,
-                     NR_BWP_Downlink_t *bwp,
+                                      NR_SearchSpace_t *ss,
-                     NR_ControlResourceSet_t *coreset,
+                                      NR_ControlResourceSet_t *coreset,
-                     int aggregation,
+                                      NR_ServingCellConfigCommon_t *scc,
-                     uint16_t Y,
+                                      NR_BWP_t *bwp,
-                     int m,
+                                      NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) {
-                     int nr_of_candidates) {
 
-  int coreset_id = coreset->controlResourceSetId;
+  NR_sched_pdcch_t *pdcch = calloc(1,sizeof(NR_sched_pdcch_t));
 
-  int *cce_list = nr_mac->cce_list[coreset_id];
+  int sps;
+  AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId,
+              "coreset id in SS %ld does not correspond to the one in coreset %ld",
+              *ss->controlResourceSetId, coreset->controlResourceSetId);
 
-  int n_rb=0;
+  if (bwp) { // This is not for SIB1
-  for (int i=0;i<6;i++)
+    if(coreset->controlResourceSetId == 0){
-    for (int j=0;j<8;j++) {
+      pdcch->BWPSize  = gNB_mac->cset0_bwp_size;
-      n_rb+=((coreset->frequencyDomainResources.buf[i]>>j)&1);
+      pdcch->BWPStart = gNB_mac->cset0_bwp_start;
     }
-  n_rb*=6;
+    else {
+      pdcch->BWPSize  = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE);
+      pdcch->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE);
+    }
+    pdcch->SubcarrierSpacing = bwp->subcarrierSpacing;
+    pdcch->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix;
 
-  uint16_t N_reg = n_rb * coreset->duration;
+    //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
-  uint16_t n_CI = 0;
+    sps = bwp->cyclicPrefix == NULL ? 14 : 12;
+  }
+  else {
+    AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp);
+    pdcch->BWPSize = type0_PDCCH_CSS_config->num_rbs;
+    pdcch->BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
+    pdcch->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch;
+    pdcch->CyclicPrefix = 0;
+    sps = 14;
+  }
 
-  const uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE;
+  AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n");
-  const uint16_t M_s_max = nr_of_candidates;
+  AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n");
 
-  LOG_D(PHY,"allocate_NR_CCes : bwp_id %d, coreset_id %d : N_cce %d, m %d, nr_of_candidates %d, Y %d\n",
+  // for SPS=14 8 MSBs in positions 13 downto 6
-        (int)(bwp ? bwp->bwp_Id : 0),coreset_id,N_cce,m,nr_of_candidates, Y);
+  uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) |
-  //PDCCH candidate index m in CORESET exceeds the maximum number of PDCCH candidates
+                                         (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
-  if(m >= nr_of_candidates)
-    return -1;
 
-  int first_cce = aggregation * (( Y + CEILIDIV((m*N_cce),(aggregation*M_s_max)) + n_CI ) % CEILIDIV(N_cce,aggregation));
+  for (int i=0; i<sps; i++) {
+    if ((monitoringSymbolsWithinSlot>>(sps-1-i))&1) {
+      pdcch->StartSymbolIndex=i;
+      break;
+    }
+  }
 
-  for (int i=0;i<aggregation;i++)
+  pdcch->DurationSymbols = coreset->duration;
-    if (cce_list[first_cce+i] != 0) return(-1);
-  
-  for (int i=0;i<aggregation;i++) cce_list[first_cce+i] = 1;
 
-  return(first_cce);
+  //cce-REG-MappingType
+  pdcch->CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved?
+    NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
 
+  if (pdcch->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
+    pdcch->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize ==
+                                NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize);
+    pdcch->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize ==
+                                  NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize);
+    AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n");
+    pdcch->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId;
+  }
+  else {
+    pdcch->RegBundleSize = 6;
+    pdcch->InterleaverSize = 0;
+    pdcch->ShiftIndex = 0;
+  }
+
+  int N_rb = 0; // nb of rbs of coreset per symbol
+  for (int i=0;i<6;i++) {
+    for (int t=0;t<8;t++) {
+      N_rb+=((coreset->frequencyDomainResources.buf[i]>>t)&1);
+    }
+  }
+  pdcch->n_rb = N_rb*=6; // each bit of frequencyDomainResources represents 6 PRBs
+
+  return pdcch;
 }
 
+
+uint8_t find_pdcch_candidate(gNB_MAC_INST *mac,
+                             int cc_id,
+                             int aggregation,
+                             int nr_of_candidates,
+                             NR_sched_pdcch_t *pdcch,
+                             NR_ControlResourceSet_t *coreset,
+                             uint16_t Y){
+
+  uint16_t *vrb_map = mac->common_channels[cc_id].vrb_map;
+  const int next_cand = mac->pdcch_cand[coreset->controlResourceSetId];
+  const int N_ci = 0;
+
+  if(next_cand>=nr_of_candidates) {
+    LOG_D(NR_MAC,"No more available candidates for this coreset\n");
+    return -1;
+  }
+
+  int N_rb = pdcch->n_rb;  // nb of rbs of coreset per symbol
+  int N_symb = coreset->duration; // nb of coreset symbols
+  int N_regs = N_rb*N_symb; // nb of REGs per coreset
+  int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset
+
+  int L = pdcch->RegBundleSize;
+  int R = pdcch->InterleaverSize;
+  int n_shift = pdcch->ShiftIndex;
+  int C = R>0 ? N_regs/(L*R) : 0;
+  int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle
+
+  int first_cce;
+  bool taken = false; // flag if the resource for a given candidate are taken
+  // loop over all the available candidates
+  for(int m=next_cand; m<nr_of_candidates; m++) { // loop over candidates
+    first_cce = aggregation * (( Y + CEILIDIV((m*N_cces),(aggregation*nr_of_candidates)) + N_ci ) % CEILIDIV(N_cces,aggregation));
+    for (int j=first_cce; (j<first_cce+aggregation) && !taken; j++) { // loop over CCEs
+      for (int k=6*j/L; (k<(6*j/L+6/L)) && !taken; k++) { // loop over REG bundles
+        int f;  // interleaving function
+        if(R==0)
+          f = k;
+        else {
+          int c = k/R;
+          int r = k%R;
+          f = (r*C + c + n_shift)%(N_regs/L);
+        }
+        for(int rb=0; rb<B_rb; rb++) { // loop over the RBs of the bundle
+          if(vrb_map[pdcch->BWPStart + f*B_rb + rb]&(((1<<N_symb)-1)<<pdcch->StartSymbolIndex)) {
+            taken = true;
+            break;
+          }
+        }
+      }
+    }
+    if(!taken){
+      mac->pdcch_cand[coreset->controlResourceSetId] = m++; // using candidate m, next available is m+1
+      return first_cce;
+    }
+  }
+  return -1;
+}
+
+void fill_pdcch_vrb_map(gNB_MAC_INST *mac,
+                        int CC_id,
+                        NR_sched_pdcch_t *pdcch,
+                        int first_cce,
+                        int aggregation){
+
+  uint16_t *vrb_map = mac->common_channels[CC_id].vrb_map;
+
+  int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol
+  int L = pdcch->RegBundleSize;
+  int R = pdcch->InterleaverSize;
+  int n_shift = pdcch->ShiftIndex;
+  int N_symb = pdcch->DurationSymbols;
+  int N_regs = N_rb*N_symb; // nb of REGs per coreset
+  int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle
+  int C = R>0 ? N_regs/(L*R) : 0;
+
+  for (int j=first_cce; j<first_cce+aggregation; j++) { // loop over CCEs
+    for (int k=6*j/L; k<(6*j/L+6/L); k++) { // loop over REG bundles
+      int f;  // interleaving function
+      if(R==0)
+        f = k;
+      else {
+        int c = k/R;
+        int r = k%R;
+        f = (r*C + c + n_shift)%(N_regs/L);
+      }
+      for(int rb=0; rb<B_rb; rb++) // loop over the RBs of the bundle
+        vrb_map[pdcch->BWPStart + f*B_rb + rb] = ((1<<N_symb)-1)<<pdcch->StartSymbolIndex;
+    }
+  }
+}
+
+
 bool nr_find_nb_rb(uint16_t Qm,
                    uint16_t R,
                    uint16_t nb_symb_sch,
@@ -346,7 +482,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
 
 void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
                               const NR_BWP_Uplink_t *ubwp,
-			                        const NR_BWP_UplinkDedicated_t *ubwpd,
+                              const NR_BWP_UplinkDedicated_t *ubwpd,
                               long dci_format,
                               int tda,
                               uint8_t num_dmrs_cdm_grps_no_data,
@@ -718,81 +854,32 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) {
   return(default_pucch_csset[pucch_ResourceCommon]);
 }
 
-void nr_configure_pdcch(gNB_MAC_INST *gNB_mac,
+
-                        nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
+
-                        NR_SearchSpace_t *ss,
+void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
                         NR_ControlResourceSet_t *coreset,
-                        NR_ServingCellConfigCommon_t *scc,
                         NR_BWP_t *bwp,
-                        NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) {
+                        NR_sched_pdcch_t *pdcch) {
 
-  int sps;
-  AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId,
-              "coreset id in SS %ld does not correspond to the one in coreset %ld",
-              *ss->controlResourceSetId, coreset->controlResourceSetId);
 
-  if (bwp) { // This is not for SIB1
+  pdcch_pdu->BWPSize = pdcch->BWPSize;
-    if(coreset->controlResourceSetId == 0){
+  pdcch_pdu->BWPStart = pdcch->BWPStart;
-      pdcch_pdu->BWPSize  = gNB_mac->cset0_bwp_size;
+  pdcch_pdu->SubcarrierSpacing = pdcch->SubcarrierSpacing;
-      pdcch_pdu->BWPStart = gNB_mac->cset0_bwp_start;
+  pdcch_pdu->CyclicPrefix = pdcch->CyclicPrefix;
-    }
+  pdcch_pdu->StartSymbolIndex = pdcch->StartSymbolIndex;
-    else {
-      pdcch_pdu->BWPSize  = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE);
-      pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE);
-    }
-    pdcch_pdu->SubcarrierSpacing = bwp->subcarrierSpacing;
-    pdcch_pdu->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix;
-
-    //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
-    sps = bwp->cyclicPrefix == NULL ? 14 : 12;
-  }
-  else {
-    AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp);
-    pdcch_pdu->BWPSize = type0_PDCCH_CSS_config->num_rbs;
-    pdcch_pdu->BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
-    pdcch_pdu->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch;
-    pdcch_pdu->CyclicPrefix = 0;
-    sps = 14;
-  }
-
-  AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n");
-  AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n");
-    
-  // for SPS=14 8 MSBs in positions 13 downto 6
-  uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) |
-                                         (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
-
-  for (int i=0; i<sps; i++) {
-    if ((monitoringSymbolsWithinSlot>>(sps-1-i))&1) {
-      pdcch_pdu->StartSymbolIndex=i;
-      break;
-    }
-  }
 
   pdcch_pdu->DurationSymbols  = coreset->duration;
 
   for (int i=0;i<6;i++)
     pdcch_pdu->FreqDomainResource[i] = coreset->frequencyDomainResources.buf[i];
 
-  LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d,  \n",pdcch_pdu->BWPStart,pdcch_pdu->BWPSize,(int)pdcch_pdu->SubcarrierSpacing,(int)coreset->frequencyDomainResources.buf[0],(int)coreset->duration);
+  LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d,  \n",
+        pdcch_pdu->BWPStart,pdcch_pdu->BWPSize,(int)pdcch_pdu->SubcarrierSpacing,(int)coreset->frequencyDomainResources.buf[0],(int)coreset->duration);
 
-  //cce-REG-MappingType
+  pdcch_pdu->CceRegMappingType = pdcch->CceRegMappingType;
-  pdcch_pdu->CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved?
+  pdcch_pdu->RegBundleSize = pdcch->RegBundleSize;
-    NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
+  pdcch_pdu->InterleaverSize = pdcch->InterleaverSize;
-
+  pdcch_pdu->ShiftIndex = pdcch->ShiftIndex;
-  if (pdcch_pdu->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
-    pdcch_pdu->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize ==
-                                NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize);
-    pdcch_pdu->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize ==
-                                  NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize);
-    AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n");
-    pdcch_pdu->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId;
-  }
-  else {
-    pdcch_pdu->RegBundleSize = 0;
-    pdcch_pdu->InterleaverSize = 0;
-    pdcch_pdu->ShiftIndex = 0;
-  }
 
   if(coreset->controlResourceSetId == 0) {
     if(bwp == NULL)
@@ -1968,6 +2055,9 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
 			     bwpList->list.count);
     const int bwp_id = 1;
     sched_ctrl->active_bwp = bwpList ? bwpList->list.array[bwp_id - 1] : NULL;
+    NR_BWP_t *genericParameters = sched_ctrl->active_bwp ?
+      &sched_ctrl->active_bwp->bwp_Common->genericParameters:
+      &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
     const int target_ss = sched_ctrl->active_bwp ? NR_SearchSpace__searchSpaceType_PR_ue_Specific : NR_SearchSpace__searchSpaceType_PR_common;
     sched_ctrl->search_space = get_searchspace(scc,
                                                sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Dedicated : NULL,
@@ -1975,6 +2065,12 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
     sched_ctrl->coreset = get_coreset(mod_idP, scc,
                                       sched_ctrl->active_bwp ? (void*)sched_ctrl->active_bwp->bwp_Dedicated : NULL,
                                       sched_ctrl->search_space, target_ss);
+    sched_ctrl->sched_pdcch = set_pdcch_structure(RC.nrmac[mod_idP],
+                                                  sched_ctrl->search_space,
+                                                  sched_ctrl->coreset,
+                                                  scc,
+                                                  genericParameters,
+                                                  NULL);
     const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL;
     if (ubwpList) AssertFatal(ubwpList->list.count == 1,
 			      "uplinkBWP_ToAddModList has %d BWP!\n",
@@ -2388,38 +2484,6 @@ void nr_csirs_scheduling(int Mod_idP,
   }
 }
 
-bool find_free_CCE(module_id_t module_id,
-                   sub_frame_t slot,
-                   int UE_id){
-  NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[module_id]->UE_info.UE_sched_ctrl[UE_id];
-  uint8_t nr_of_candidates;
-  for (int i=0; i<5; i++) {
-    // for now taking the lowest value among the available aggregation levels
-    find_aggregation_candidates(&sched_ctrl->aggregation_level,
-                                &nr_of_candidates,
-                                sched_ctrl->search_space,
-                                1<<i);
-    if(nr_of_candidates>0) break;
-  }
-  AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n");
-  const int cid = sched_ctrl->coreset->controlResourceSetId;
-  const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot];
-  const int m = RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid];
-  if (UE_id >= 0) LOG_D(NR_MAC,"slot %d calling allocate_nr_CCEs with L %d, nr_of_candidates %d, Y %x\n",slot, sched_ctrl->aggregation_level,nr_of_candidates,Y);
-  sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
-                                           sched_ctrl->active_bwp,
-                                           sched_ctrl->coreset,
-                                           sched_ctrl->aggregation_level,
-                                           Y,
-                                           m,
-                                           nr_of_candidates);
-  if (sched_ctrl->cce_index < 0)
-    return false;
-
-  RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid]++;
-  return true;
-}
-
 
 /*void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg,
 					  nfapi_nr_coreset_t *coreset,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c

@@ -963,13 +963,38 @@ bool allocate_ul_retransmission(module_id_t module_id,
     sched_ctrl->pusch_semi_static = temp_ps;
   }
 
-  /* Find free CCE */
+  /* Find a free CCE */
-  bool freeCCE = find_free_CCE(module_id, slot, UE_id);
+  const int cid = sched_ctrl->coreset->controlResourceSetId;
-  if (!freeCCE) {
+  const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot];
+  uint8_t nr_of_candidates;
+  for (int i=0; i<5; i++) {
+    // for now taking the lowest value among the available aggregation levels
+    find_aggregation_candidates(&sched_ctrl->aggregation_level,
+                                &nr_of_candidates,
+                                sched_ctrl->search_space,
+                                1<<i);
+    if(nr_of_candidates>0) break;
+  }
+  int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id],
+                                      CC_id,
+                                      sched_ctrl->aggregation_level,
+                                      nr_of_candidates,
+                                      sched_ctrl->sched_pdcch,
+                                      sched_ctrl->coreset,
+                                      Y);
+
+  if (CCEIndex<0) {
     LOG_D(NR_MAC, "%4d.%2d no free CCE for retransmission UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]);
     return false;
   }
 
+  sched_ctrl->cce_index = CCEIndex;
+  fill_pdcch_vrb_map(RC.nrmac[module_id],
+                     CC_id,
+                     sched_ctrl->sched_pdcch,
+                     CCEIndex,
+                     sched_ctrl->aggregation_level);
+
   /* frame/slot in sched_pusch has been set previously. In the following, we
    * overwrite the information in the retransmission information before storing
    * as the new scheduling instruction */
@@ -1084,8 +1109,27 @@ void pf_ul(module_id_t module_id,
      * based on data to transmit) */
     if (B == 0 && do_sched) {
       /* if no data, pre-allocate 5RB */
-      bool freeCCE = find_free_CCE(module_id, slot, UE_id);
+      /* Find a free CCE */
-      if (!freeCCE) {
+      const int cid = sched_ctrl->coreset->controlResourceSetId;
+      const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot];
+      uint8_t nr_of_candidates;
+      for (int i=0; i<5; i++) {
+        // for now taking the lowest value among the available aggregation levels
+        find_aggregation_candidates(&sched_ctrl->aggregation_level,
+                                    &nr_of_candidates,
+                                    sched_ctrl->search_space,
+                                    1<<i);
+        if(nr_of_candidates>0) break;
+      }
+      int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id],
+                                          CC_id,
+                                          sched_ctrl->aggregation_level,
+                                          nr_of_candidates,
+                                          sched_ctrl->sched_pdcch,
+                                          sched_ctrl->coreset,
+                                          Y);
+
+      if (CCEIndex<0) {
         LOG_D(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x (BSR 0)\n", frame, slot, UE_info->rnti[UE_id]);
         continue;
       }
@@ -1102,6 +1146,13 @@ void pf_ul(module_id_t module_id,
         return;
       }
 
+      sched_ctrl->cce_index = CCEIndex;
+      fill_pdcch_vrb_map(RC.nrmac[module_id],
+                         CC_id,
+                         sched_ctrl->sched_pdcch,
+                         CCEIndex,
+                         sched_ctrl->aggregation_level);
+
       /* Save PUSCH field */
       /* we want to avoid a lengthy deduction of DMRS and other parameters in
        * every TTI if we can save it, so check whether dci_format, TDA, or
@@ -1167,8 +1218,27 @@ void pf_ul(module_id_t module_id,
     *max = UE_sched.next[*max];
     *p = -1;
 
-    bool freeCCE = find_free_CCE(module_id, slot, UE_id);
+    NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
-    if (!freeCCE) {
+
+    const int cid = sched_ctrl->coreset->controlResourceSetId;
+    const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot];
+    uint8_t nr_of_candidates;
+    for (int i=0; i<5; i++) {
+      // for now taking the lowest value among the available aggregation levels
+      find_aggregation_candidates(&sched_ctrl->aggregation_level,
+                                  &nr_of_candidates,
+                                  sched_ctrl->search_space,
+                                  1<<i);
+      if(nr_of_candidates>0) break;
+    }
+    int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id],
+                                        CC_id,
+                                        sched_ctrl->aggregation_level,
+                                        nr_of_candidates,
+                                        sched_ctrl->sched_pdcch,
+                                        sched_ctrl->coreset,
+                                        Y);
+    if (CCEIndex<0) {
       LOG_D(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]);
       continue;
     }
@@ -1179,7 +1249,6 @@ void pf_ul(module_id_t module_id,
     if (max_num_ue < 0)
       return;
 
-    NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
     NR_CellGroupConfig_t *cg = UE_info->CellGroup[UE_id];
     NR_BWP_UplinkDedicated_t *ubwpd= cg ? cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP:NULL;
     NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ? &sched_ctrl->active_ubwp->bwp_Common->genericParameters : &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
@@ -1232,6 +1301,14 @@ void pf_ul(module_id_t module_id,
           rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS);
 
     /* Mark the corresponding RBs as used */
+
+    sched_ctrl->cce_index = CCEIndex;
+    fill_pdcch_vrb_map(RC.nrmac[module_id],
+                       CC_id,
+                       sched_ctrl->sched_pdcch,
+                       CCEIndex,
+                       sched_ctrl->aggregation_level);
+
     n_rb_sched -= sched_pusch->rbSize;
     for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
       rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0;
@@ -1632,7 +1709,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
       ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
       pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
       ul_dci_req->numPdus += 1;
-      nr_configure_pdcch(nr_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL);
+      nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch);
       nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu;
     }
 

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -248,13 +248,31 @@ void find_search_space(int ss_type,
                        NR_BWP_Downlink_t *bwp,
                        NR_SearchSpace_t *ss);
 
-void nr_configure_pdcch(gNB_MAC_INST *gNB_mac,
+void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
-                        nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
-                        NR_SearchSpace_t *ss,
                         NR_ControlResourceSet_t *coreset,
-                        NR_ServingCellConfigCommon_t *scc,
                         NR_BWP_t *bwp,
-                        NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
+                        NR_sched_pdcch_t *pdcch);
+
+NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac,
+                                      NR_SearchSpace_t *ss,
+                                      NR_ControlResourceSet_t *coreset,
+                                      NR_ServingCellConfigCommon_t *scc,
+                                      NR_BWP_t *bwp,
+                                      NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
+
+uint8_t find_pdcch_candidate(gNB_MAC_INST *mac,
+                             int cc_id,
+                             int aggregation,
+                             int nr_of_candidates,
+                             NR_sched_pdcch_t *pdcch,
+                             NR_ControlResourceSet_t *coreset,
+                             uint16_t Y);
+
+void fill_pdcch_vrb_map(gNB_MAC_INST *mac,
+                        int CC_id,
+                        NR_sched_pdcch_t *pdcch,
+                        int first_cce,
+                        int aggregation);
 
 void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
                         const NR_CellGroupConfig_t *CellGroup,

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -103,6 +103,20 @@ typedef struct NR_preamble_ue {
   uint8_t *preamble_list;
 } NR_preamble_ue_t;
 
+typedef struct NR_sched_pdcch {
+  uint16_t BWPSize;
+  uint16_t BWPStart;
+  uint8_t CyclicPrefix;
+  uint8_t SubcarrierSpacing;
+  uint8_t StartSymbolIndex;
+  uint8_t CceRegMappingType;
+  uint8_t RegBundleSize;
+  uint8_t InterleaverSize;
+  uint16_t ShiftIndex;
+  uint8_t DurationSymbols;
+  int n_rb;
+} NR_sched_pdcch_t;
+
 /*! \brief gNB template for the Random access information */
 typedef struct {
   /// Flag to indicate this process is active
@@ -163,6 +177,9 @@ typedef struct {
   int mac_pdu_length;
   /// RA search space
   NR_SearchSpace_t *ra_ss;
+  /// RA Coreset
+  NR_ControlResourceSet_t *coreset;
+  NR_sched_pdcch_t *sched_pdcch;
   // Beam index
   uint8_t beam_id;
   /// CellGroup for UE that is to come (NSA is non-null, null for SA)
@@ -298,7 +315,6 @@ typedef struct UE_info {
   pdschTciStatesActDeact_t pdsch_TCI_States_ActDeact;
 } NR_UE_mac_ce_ctrl_t;
 
-
 typedef struct NR_sched_pucch {
   int frame;
   int ul_slot;
@@ -533,6 +549,7 @@ typedef struct {
   /// CCE index and aggregation, should be coherent with cce_list
   NR_SearchSpace_t *search_space;
   NR_ControlResourceSet_t *coreset;
+  NR_sched_pdcch_t *sched_pdcch;
 
   /// CCE index and Aggr. Level are shared for PUSCH/PDSCH allocation decisions
   /// corresponding to the sched_pusch/sched_pdsch structures below
@@ -652,10 +669,10 @@ typedef struct {
   /// CCE indexing
   int Y[MAX_MOBILES_PER_GNB][3][160];
   int m[MAX_MOBILES_PER_GNB];
-  int num_pdcch_cand[MAX_MOBILES_PER_GNB][MAX_NUM_CORESET];
   // UE selected beam index
   uint8_t UE_beam_index[MAX_MOBILES_PER_GNB];
   bool Msg4_ACKed[MAX_MOBILES_PER_GNB];
+
 } NR_UE_info_t;
 
 typedef void (*nr_pp_impl_dl)(module_id_t mod_id,
@@ -714,7 +731,7 @@ typedef struct gNB_MAC_INST_s {
   nfapi_nr_ul_dci_request_t         UL_dci_req[NFAPI_CC_MAX];
   /// NFAPI DL PDU structure
   nfapi_nr_tx_data_request_t        TX_req[NFAPI_CC_MAX];
-
+  int pdcch_cand[MAX_NUM_CORESET];
   NR_UE_info_t UE_info;
 
   /// UL handle
@@ -742,8 +759,6 @@ typedef struct gNB_MAC_INST_s {
   time_stats_t rx_ulsch_sdu;  // include rlc_data_ind
   /// processing time of eNB PCH scheduler
   time_stats_t schedule_pch;
-  /// CCE lists
-  int cce_list[MAX_NUM_CORESET][MAX_NUM_CCE];
   /// list of allocated beams per period
   int16_t *tdd_beam_association;