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mjoang
2021-09-23 10:44:43 -04:00
parent b5536c3a9c de553cd1b6
commit 626e3a7015
198 changed files with 31431 additions and 13295 deletions
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openair2/COMMON/rrc_messages_types.h
+1
View File
@@ -409,6 +409,7 @@ typedef struct NRRrcConfigurationReq_s {
NR_ServingCellConfigCommon_t *scc;
NR_ServingCellConfig_t *scd;
int ssb_SubcarrierOffset;
int sib1_tda;
int pdsch_AntennaPorts;
int pusch_AntennaPorts;
int do_CSIRS;
openair2/ENB_APP/enb_app.c
-1
View File
@@ -53,7 +53,6 @@
#include "openair1/PHY/INIT/phy_init.h"
extern unsigned char NB_eNB_INST;
#include <nr-softmodem.h>
extern RAN_CONTEXT_t RC;
# define ENB_REGISTER_RETRY_DELAY 10
openair2/GNB_APP/L1_nr_paramdef.h
+7 -4
View File
@@ -47,6 +47,7 @@
#define CONFIG_STRING_L1_REMOTE_N_PORTD "remote_n_portd"
#define CONFIG_STRING_L1_TRANSPORT_N_PREFERENCE "tr_n_preference"
#define CONFIG_STRING_L1_PUSCH_PROC_THREADS "pusch_proc_threads"
#define CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR "ofdm_offset_divisor"
#define CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD "pucch0_dtx_threshold"
#define CONFIG_STRING_L1_PRACH_DTX_THRESHOLD "prach_dtx_threshold"
#define CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD "pusch_dtx_threshold"
@@ -64,7 +65,8 @@
{CONFIG_STRING_L1_REMOTE_N_PORTC, NULL, 0, uptr:NULL, defintval:50030, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_LOCAL_N_PORTD, NULL, 0, uptr:NULL, defintval:50031, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_REMOTE_N_PORTD, NULL, 0, uptr:NULL, defintval:50031, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PUSCH_PROC_THREADS, NULL, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PUSCH_PROC_THREADS, NULL, 0, uptr:NULL, defintval:3, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR, NULL, 0, uptr:NULL, defuintval:8, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:100, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PRACH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:150, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:50, TYPE_UINT, 0} \
@@ -79,9 +81,10 @@
#define L1_LOCAL_N_PORTD_IDX 7
#define L1_REMOTE_N_PORTD_IDX 8
#define L1_PUSCH_PROC_THREADS 9
#define L1_PUCCH0_DTX_THRESHOLD 10
#define L1_PRACH_DTX_THRESHOLD 11
#define L1_PUSCH_DTX_THRESHOLD 12
#define L1_OFDM_OFFSET_DIVISOR 10
#define L1_PUCCH0_DTX_THRESHOLD 11
#define L1_PRACH_DTX_THRESHOLD 12
#define L1_PUSCH_DTX_THRESHOLD 13
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
#endif
openair2/GNB_APP/gnb_app.c
+21 -20
View File
@@ -219,29 +219,30 @@ void *gNB_app_task(void *args_p)
//registered_gnb = 0;
__attribute__((unused)) uint32_t register_gnb_pending = gNB_app_register (gnb_id_start, gnb_id_end);
}
if (RC.nb_nr_inst > 0) {
if (NODE_IS_CU(RC.nrrrc[0]->node_type)) {
if (NODE_IS_CU(RC.nrrrc[0]->node_type)) {
if (itti_create_task(TASK_CU_F1, F1AP_CU_task, NULL) < 0) {
LOG_E(F1AP, "Create task for F1AP CU failed\n");
AssertFatal(1==0,"exiting");
}
}
if (NODE_IS_DU(RC.nrrrc[0]->node_type)) {
if (itti_create_task(TASK_DU_F1, F1AP_DU_task, NULL) < 0) {
LOG_E(F1AP, "Create task for F1AP DU failed\n");
AssertFatal(1==0,"exiting");
if (itti_create_task(TASK_CU_F1, F1AP_CU_task, NULL) < 0) {
LOG_E(F1AP, "Create task for F1AP CU failed\n");
AssertFatal(1==0,"exiting");
}
}
// configure F1AP here for F1C
LOG_I(GNB_APP,"ngran_gNB_DU: Allocating ITTI message for F1AP_SETUP_REQ\n");
msg_p = itti_alloc_new_message (TASK_GNB_APP, 0, F1AP_SETUP_REQ);
RCconfig_NR_DU_F1(msg_p, 0);
itti_send_msg_to_task (TASK_DU_F1, GNB_MODULE_ID_TO_INSTANCE(0), msg_p);
}
if (NODE_IS_DU(RC.nrrrc[0]->node_type)) {
if (itti_create_task(TASK_DU_F1, F1AP_DU_task, NULL) < 0) {
LOG_E(F1AP, "Create task for F1AP DU failed\n");
AssertFatal(1==0,"exiting");
}
// configure F1AP here for F1C
LOG_I(GNB_APP,"ngran_gNB_DU: Allocating ITTI message for F1AP_SETUP_REQ\n");
msg_p = itti_alloc_new_message (TASK_GNB_APP, 0, F1AP_SETUP_REQ);
RCconfig_NR_DU_F1(msg_p, 0);
itti_send_msg_to_task (TASK_DU_F1, GNB_MODULE_ID_TO_INSTANCE(0), msg_p);
}
}
do {
// Wait for a message
itti_receive_msg (TASK_GNB_APP, &msg_p);
openair2/GNB_APP/gnb_config.c
+3 -1
View File
@@ -573,6 +573,7 @@ void RCconfig_NR_L1(void) {
}
RC.gNB[j]->pusch_proc_threads = *(L1_ParamList.paramarray[j][L1_PUSCH_PROC_THREADS].uptr);
RC.gNB[j]->ofdm_offset_divisor = *(L1_ParamList.paramarray[j][L1_OFDM_OFFSET_DIVISOR].uptr);
RC.gNB[j]->pucch0_thres = *(L1_ParamList.paramarray[j][L1_PUCCH0_DTX_THRESHOLD].uptr);
RC.gNB[j]->prach_thres = *(L1_ParamList.paramarray[j][L1_PRACH_DTX_THRESHOLD].uptr);
RC.gNB[j]->pusch_thres = *(L1_ParamList.paramarray[j][L1_PUSCH_DTX_THRESHOLD].uptr);
@@ -1016,6 +1017,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr;
printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr;
NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr;
printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr;
NRRRC_CONFIGURATION_REQ (msg_p).scc = scc;
@@ -1383,7 +1385,6 @@ void NRRCConfig(void) {
config_get( GNBSParams,sizeof(GNBSParams)/sizeof(paramdef_t),NULL);
RC.nb_nr_inst = GNBSParams[GNB_ACTIVE_GNBS_IDX].numelt;
// Get num MACRLC instances
config_getlist( &MACRLCParamList,NULL,0, NULL);
@@ -1896,6 +1897,7 @@ void configure_gnb_du_mac(int inst) {
rrc->configuration.ssb_SubcarrierOffset,
rrc->configuration.pdsch_AntennaPorts,
rrc->configuration.pusch_AntennaPorts,
rrc->configuration.sib1_tda,
rrc->configuration.scc,
0,
0, // rnti
openair2/GNB_APP/gnb_paramdef.h
+6 -3
View File
@@ -116,6 +116,7 @@ typedef enum {
#define GNB_CONFIG_STRING_SSBSUBCARRIEROFFSET "ssb_SubcarrierOffset"
#define GNB_CONFIG_STRING_PDSCHANTENNAPORTS "pdsch_AntennaPorts"
#define GNB_CONFIG_STRING_PUSCHANTENNAPORTS "pusch_AntennaPorts"
#define GNB_CONFIG_STRING_SIB1TDA "sib1_tda"
#define GNB_CONFIG_STRING_DOCSIRS "do_CSIRS"
#define GNB_CONFIG_STRING_NRCELLID "nr_cellid"
@@ -141,8 +142,9 @@ typedef enum {
{GNB_CONFIG_STRING_SSBSUBCARRIEROFFSET, NULL, 0, iptr:NULL, defintval:31, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_PDSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NRCELLID , NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \
}
#define GNB_GNB_ID_IDX 0
@@ -162,8 +164,9 @@ typedef enum {
#define GNB_SSB_SUBCARRIEROFFSET_IDX 14
#define GNB_PDSCH_ANTENNAPORTS_IDX 15
#define GNB_PUSCH_ANTENNAPORTS_IDX 16
#define GNB_DO_CSIRS_IDX 17
#define GNB_NRCELLID_IDX 18
#define GNB_SIB1_TDA_IDX 17
#define GNB_DO_CSIRS_IDX 18
#define GNB_NRCELLID_IDX 19
#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
#define GNBPARAMS_CHECK { \
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
+4
View File
@@ -38,6 +38,8 @@
#include <string.h>
#include <stdbool.h>
#include "NR_SubcarrierSpacing.h"
#define NR_SHORT_BSR_TABLE_SIZE 32
#define NR_LONG_BSR_TABLE_SIZE 256
@@ -460,9 +462,11 @@ typedef struct Type0_PDCCH_CSS_config_s {
uint32_t number_of_search_space_per_slot;
uint32_t first_symbol_index;
uint32_t search_space_duration;
uint32_t search_space_frame_period; // in slots
uint32_t ssb_length;
uint32_t ssb_index;
uint32_t cset_start_rb;
NR_SubcarrierSpacing_t scs_pdcch;
bool active;
} NR_Type0_PDCCH_CSS_config_t;
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+422 -138
View File
@@ -166,151 +166,225 @@ const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
// for PDSCH from TS 38.214 subclause 5.1.2.1.1
const uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[16][3]={
{0,2,12}, // row index 1
{0,2,10}, // row index 2
{0,2,9}, // row index 3
{0,2,7}, // row index 4
{0,2,5}, // row index 5
{0,9,4}, // row index 6
{0,4,4}, // row index 7
{0,5,7}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,12,2}, // row index 11
{0,1,13}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,7}, // row index 15
{0,8,4} // row index 16
const uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[16][4]={
{1,0,2,12}, // row index 1
{1,0,2,10}, // row index 2
{1,0,2,9}, // row index 3
{1,0,2,7}, // row index 4
{1,0,2,5}, // row index 5
{0,0,9,4}, // row index 6
{0,0,4,4}, // row index 7
{0,0,5,7}, // row index 8
{0,0,5,2}, // row index 9
{0,0,9,2}, // row index 10
{0,0,12,2}, // row index 11
{1,0,1,13}, // row index 12
{1,0,1,6}, // row index 13
{1,0,2,4}, // row index 14
{0,0,4,7}, // row index 15
{0,0,8,4} // row index 16
};
const uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[16][3]={
{0,3,11}, // row index 1
{0,3,9}, // row index 2
{0,3,8}, // row index 3
{0,3,6}, // row index 4
{0,3,4}, // row index 5
{0,10,4}, // row index 6
{0,6,4}, // row index 7
{0,5,7}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,12,2}, // row index 11
{0,1,13}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,7}, // row index 15
{0,8,4} // row index 16
const uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[16][4]={
{1,0,3,11}, // row index 1
{1,0,3,9}, // row index 2
{1,0,3,8}, // row index 3
{1,0,3,6}, // row index 4
{1,0,3,4}, // row index 5
{0,0,10,4}, // row index 6
{0,0,6,4}, // row index 7
{0,0,5,7}, // row index 8
{0,0,5,2}, // row index 9
{0,0,9,2}, // row index 10
{0,0,12,2}, // row index 11
{1,0,1,13}, // row index 12
{1,0,1,6}, // row index 13
{1,0,2,4}, // row index 14
{0,0,4,7}, // row index 15
{0,0,8,4} // row index 16
};
const uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[16][3]={
{0,2,6}, // row index 1
{0,2,10}, // row index 2
{0,2,9}, // row index 3
{0,2,7}, // row index 4
{0,2,5}, // row index 5
{0,6,4}, // row index 6
{0,4,4}, // row index 7
{0,5,6}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,10,2}, // row index 11
{0,1,11}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,6}, // row index 15
{0,8,4} // row index 16
const uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[16][4]={
{1,0,2,6}, // row index 1
{1,0,2,10}, // row index 2
{1,0,2,9}, // row index 3
{1,0,2,7}, // row index 4
{1,0,2,5}, // row index 5
{0,0,6,4}, // row index 6
{0,0,4,4}, // row index 7
{0,0,5,6}, // row index 8
{0,0,5,2}, // row index 9
{0,0,9,2}, // row index 10
{0,0,10,2}, // row index 11
{1,0,1,11}, // row index 12
{1,0,1,6}, // row index 13
{1,0,2,4}, // row index 14
{0,0,4,6}, // row index 15
{0,0,8,4} // row index 16
};
const uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[16][3]={
{0,3,5}, // row index 1
{0,3,9}, // row index 2
{0,3,8}, // row index 3
{0,3,6}, // row index 4
{0,3,4}, // row index 5
{0,8,2}, // row index 6
{0,6,4}, // row index 7
{0,5,6}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,10,2}, // row index 11
{0,1,11}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,6}, // row index 15
{0,8,4} // row index 16
const uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[16][4]={
{1,0,3,5}, // row index 1
{1,0,3,9}, // row index 2
{1,0,3,8}, // row index 3
{1,0,3,6}, // row index 4
{1,0,3,4}, // row index 5
{0,0,8,2}, // row index 6
{0,0,6,4}, // row index 7
{0,0,5,6}, // row index 8
{0,0,5,2}, // row index 9
{0,0,9,2}, // row index 10
{0,0,10,2}, // row index 11
{1,0,1,11}, // row index 12
{1,0,1,6}, // row index 13
{1,0,2,4}, // row index 14
{0,0,4,6}, // row index 15
{0,0,8,4} // row index 16
};
const uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[16][3]={
{0,2,2}, // row index 1
{0,4,2}, // row index 2
{0,6,2}, // row index 3
{0,8,2}, // row index 4
{0,10,2}, // row index 5
{1,2,2}, // row index 6
{1,4,2}, // row index 7
{0,2,4}, // row index 8
{0,4,4}, // row index 9
{0,6,4}, // row index 10
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,2,12}, // row index 14
{1,2,4}, // row index 15
{0,0,0} // row index 16
const uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[16][4]={
{0,0,2,2}, // row index 1
{0,0,4,2}, // row index 2
{0,0,6,2}, // row index 3
{0,0,8,2}, // row index 4
{0,0,10,2}, // row index 5
{0,1,2,2}, // row index 6
{0,1,4,2}, // row index 7
{0,0,2,4}, // row index 8
{0,0,4,4}, // row index 9
{0,0,6,4}, // row index 10
{0,0,8,4}, // row index 11
{0,0,10,4}, // row index 12
{0,0,2,7}, // row index 13
{1,0,2,12}, // row index 14
{0,1,2,4}, // row index 15
{0,0,0,0} // row index 16
};
const uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[16][3]={
{0,2,2}, // row index 1
{0,4,2}, // row index 2
{0,6,2}, // row index 3
{0,8,2}, // row index 4
{0,10,2}, // row index 5
{1,2,2}, // row index 6
{1,4,2}, // row index 7
{0,2,4}, // row index 8
{0,4,4}, // row index 9
{0,6,4}, // row index 10
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,3,11}, // row index 14
{1,2,4}, // row index 15
{0,0,0} // row index 16
const uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[16][4]={
{0,0,2,2}, // row index 1
{0,0,4,2}, // row index 2
{0,0,6,2}, // row index 3
{0,0,8,2}, // row index 4
{0,0,10,2}, // row index 5
{0,1,2,2}, // row index 6
{0,1,4,2}, // row index 7
{0,0,2,4}, // row index 8
{0,0,4,4}, // row index 9
{0,0,6,4}, // row index 10
{0,0,8,4}, // row index 11
{0,0,10,4}, // row index 12
{0,0,2,7}, // row index 13
{1,0,3,11}, // row index 14
{0,1,2,4}, // row index 15
{0,0,0,0} // row index 16
};
const uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[16][3]={
{0,2,2}, // row index 1
{0,4,2}, // row index 2
{0,6,2}, // row index 3
{0,8,2}, // row index 4
{0,10,2}, // row index 5
{0,0,0}, // row index 6
{0,0,0}, // row index 7
{0,2,4}, // row index 8
{0,4,4}, // row index 9
{0,6,4}, // row index 10
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,2,12}, // row index 14
{0,0,6}, // row index 15
{0,2,6} // row index 16
const uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[16][4]={
{0,0,2,2}, // row index 1
{0,0,4,2}, // row index 2
{0,0,6,2}, // row index 3
{0,0,8,2}, // row index 4
{0,0,10,2}, // row index 5
{0,0,0,0}, // row index 6
{0,0,0,0}, // row index 7
{0,0,2,4}, // row index 8
{0,0,4,4}, // row index 9
{0,0,6,4}, // row index 10
{0,0,8,4}, // row index 11
{0,0,10,4}, // row index 12
{0,0,2,7}, // row index 13
{1,0,2,12}, // row index 14
{1,0,0,6}, // row index 15
{1,0,2,6} // row index 16
};
const uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[16][3]={
{0,2,2}, // row index 1
{0,4,2}, // row index 2
{0,6,2}, // row index 3
{0,8,2}, // row index 4
{0,10,2}, // row index 5
{0,0,0}, // row index 6
{0,0,0}, // row index 7
{0,2,4}, // row index 8
{0,4,4}, // row index 9
{0,6,4}, // row index 10
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,3,11}, // row index 14
{0,0,6}, // row index 15
{0,2,6} // row index 16
const uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[16][4]={
{0,0,2,2}, // row index 1
{0,0,4,2}, // row index 2
{0,0,6,2}, // row index 3
{0,0,8,2}, // row index 4
{0,0,10,2}, // row index 5
{0,0,0,0}, // row index 6
{0,0,0,0}, // row index 7
{0,0,2,4}, // row index 8
{0,0,4,4}, // row index 9
{0,0,6,4}, // row index 10
{0,0,8,4}, // row index 11
{0,0,10,4}, // row index 12
{0,0,2,7}, // row index 13
{1,0,3,11}, // row index 14
{1,0,0,6}, // row index 15
{1,0,2,6} // row index 16
};
void get_info_from_tda_tables(int default_abc,
int tda,
int dmrs_TypeA_Position,
int normal_CP,
int *startSymbolIndex,
int *nrOfSymbols) {
int k0 = 0;
int is_mapping_typeA = 1;
switch(default_abc){
case 1:
if (normal_CP){
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][3];
}
}
else{
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][3];
}
}
break;
case 2:
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][3];
}
break;
case 3:
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][3];
}
break;
default:
AssertFatal(1==0,"Invalid default time domaing allocation type\n");
}
AssertFatal(k0==0,"Only k0 = 0 is supported\n");
AssertFatal(is_mapping_typeA==1,"Only mapping type A is currently supported\n");
}
const char *prachfmt[]={"0","1","2","3", "A1","A2","A3","B1","B4","C0","C2","A1/B1","A2/B2","A3/B3"};
const char *duplex_mode[]={"FDD","TDD"};
@@ -1261,6 +1335,79 @@ void find_aggregation_candidates(uint8_t *aggregation_level,
*aggregation_level = 16;
*nr_of_candidates = ss->nrofCandidates->aggregationLevel16;
}
// n8 does not correspont to a value of 8 but 7, the following corrects this
if(*nr_of_candidates == 7)
*nr_of_candidates = 8;
}
void set_monitoring_periodicity_offset(NR_SearchSpace_t *ss,
uint16_t period,
uint16_t offset) {
switch(period) {
case 1:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
break;
case 2:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl2;
ss->monitoringSlotPeriodicityAndOffset->choice.sl2 = offset;
break;
case 4:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl4;
ss->monitoringSlotPeriodicityAndOffset->choice.sl4 = offset;
break;
case 5:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl5;
ss->monitoringSlotPeriodicityAndOffset->choice.sl5 = offset;
break;
case 8:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl8;
ss->monitoringSlotPeriodicityAndOffset->choice.sl8 = offset;
break;
case 10:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl10;
ss->monitoringSlotPeriodicityAndOffset->choice.sl10 = offset;
break;
case 16:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl16;
ss->monitoringSlotPeriodicityAndOffset->choice.sl16 = offset;
break;
case 20:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl20;
ss->monitoringSlotPeriodicityAndOffset->choice.sl20 = offset;
break;
case 40:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl40;
ss->monitoringSlotPeriodicityAndOffset->choice.sl40 = offset;
break;
case 80:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl80;
ss->monitoringSlotPeriodicityAndOffset->choice.sl80 = offset;
break;
case 160:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl160;
ss->monitoringSlotPeriodicityAndOffset->choice.sl160 = offset;
break;
case 320:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl320;
ss->monitoringSlotPeriodicityAndOffset->choice.sl320 = offset;
break;
case 640:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl640;
ss->monitoringSlotPeriodicityAndOffset->choice.sl640 = offset;
break;
case 1280:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1280;
ss->monitoringSlotPeriodicityAndOffset->choice.sl1280 = offset;
break;
case 2560:
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl2560;
ss->monitoringSlotPeriodicityAndOffset->choice.sl2560 = offset; break;
default:
AssertFatal(1==0,"Invalid monitoring slot periodicity value\n");
break;
}
}
@@ -3409,6 +3556,7 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
NR_SubcarrierSpacing_t scs_ssb,
frequency_range_t frequency_range,
uint32_t ssb_index,
uint32_t ssb_period,
uint32_t ssb_offset_point_a) {
NR_SubcarrierSpacing_t scs_pdcch;
@@ -3428,7 +3576,7 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
else
scs_pdcch = NR_SubcarrierSpacing_kHz30;
}
type0_PDCCH_CSS_config->scs_pdcch = scs_pdcch;
type0_PDCCH_CSS_config->ssb_index = ssb_index;
type0_PDCCH_CSS_config->frame = frameP;
@@ -3621,6 +3769,8 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
}
// 38.213 chapter 13: over two consecutive slots
type0_PDCCH_CSS_config->search_space_duration = 2;
// two frames
type0_PDCCH_CSS_config->search_space_frame_period = nr_slots_per_frame[scs_ssb]<<1;
}
if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){
@@ -3637,6 +3787,8 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
}
// 38.213 chapter 13: over two consecutive slots
type0_PDCCH_CSS_config->search_space_duration = 2;
// two frames
type0_PDCCH_CSS_config->search_space_frame_period = nr_slots_per_frame[scs_ssb]<<1;
}
/// MUX PATTERN 2
@@ -3702,6 +3854,8 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
}else{ ; }
// 38.213 chapter 13: over one slot
type0_PDCCH_CSS_config->search_space_duration = 1;
// SSB periodicity in slots
type0_PDCCH_CSS_config->search_space_frame_period = ssb_period*nr_slots_per_frame[scs_ssb];
}
/// MUX PATTERN 3
@@ -3730,6 +3884,8 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
}else{ ; }
// 38.213 chapter 13: over one slot
type0_PDCCH_CSS_config->search_space_duration = 1;
// SSB periodicity in slots
type0_PDCCH_CSS_config->search_space_frame_period = ssb_period*nr_slots_per_frame[scs_ssb];
}
AssertFatal(type0_PDCCH_CSS_config->number_of_search_space_per_slot!=UINT_MAX,"");
@@ -3753,6 +3909,135 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
}
void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) {
int32_t duration;
if (coreset0 == NULL)
coreset0 = calloc(1,sizeof(*coreset0));
coreset0->controlResourceSetId = 0;
AssertFatal(type0_PDCCH_CSS_config!=NULL,"No type0 CSS configuration\n");
duration = type0_PDCCH_CSS_config->num_symbols;
if(coreset0->frequencyDomainResources.buf == NULL) coreset0->frequencyDomainResources.buf = calloc(1,6);
switch(type0_PDCCH_CSS_config->num_rbs){
case 24:
coreset0->frequencyDomainResources.buf[0] = 0xf0;
coreset0->frequencyDomainResources.buf[1] = 0;
break;
case 48:
coreset0->frequencyDomainResources.buf[0] = 0xff;
coreset0->frequencyDomainResources.buf[1] = 0;
break;
case 96:
coreset0->frequencyDomainResources.buf[0] = 0xff;
coreset0->frequencyDomainResources.buf[1] = 0xff;
break;
default:
AssertFatal(1==0,"Invalid number of PRBs %d for Coreset0\n",type0_PDCCH_CSS_config->num_rbs);
}
coreset0->frequencyDomainResources.buf[2] = 0;
coreset0->frequencyDomainResources.buf[3] = 0;
coreset0->frequencyDomainResources.buf[4] = 0;
coreset0->frequencyDomainResources.buf[5] = 0;
coreset0->frequencyDomainResources.size = 6;
coreset0->frequencyDomainResources.bits_unused = 3;
coreset0->duration = duration;
coreset0->cce_REG_MappingType.present=NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved;
coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved));
coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6;
coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = NULL; // -> use cell_id
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
coreset0->tci_StatesPDCCH_ToAddList = NULL;
coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
coreset0->tci_PresentInDCI = NULL;
coreset0->pdcch_DMRS_ScramblingID = NULL;
}
uint8_t fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, int L) {
if(ss0 == NULL) ss0=calloc(1,sizeof(*ss0));
if(ss0->controlResourceSetId == NULL) ss0->controlResourceSetId=calloc(1,sizeof(*ss0->controlResourceSetId));
if(ss0->monitoringSymbolsWithinSlot == NULL) ss0->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss0->monitoringSymbolsWithinSlot));
if(ss0->monitoringSymbolsWithinSlot->buf == NULL) ss0->monitoringSymbolsWithinSlot->buf = calloc(1,2);
if(ss0->nrofCandidates == NULL) ss0->nrofCandidates = calloc(1,sizeof(*ss0->nrofCandidates));
if(ss0->searchSpaceType == NULL) ss0->searchSpaceType = calloc(1,sizeof(*ss0->searchSpaceType));
if(ss0->searchSpaceType->choice.common == NULL) ss0->searchSpaceType->choice.common=calloc(1,sizeof(*ss0->searchSpaceType->choice.common));
if(ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL)
ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
uint32_t duration,periodicity,offset;
uint16_t symbols,max_agg;
AssertFatal(type0_PDCCH_CSS_config!=NULL,"No type0 CSS configuration\n");
max_agg = (type0_PDCCH_CSS_config->num_symbols*type0_PDCCH_CSS_config->num_rbs)/6;
if (L>max_agg) return 0;
symbols = (1-(1<<type0_PDCCH_CSS_config->num_symbols))<<type0_PDCCH_CSS_config->first_symbol_index;
duration = type0_PDCCH_CSS_config->search_space_duration;
periodicity = type0_PDCCH_CSS_config->search_space_frame_period;
if (type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1)
offset = type0_PDCCH_CSS_config->n_0;
else
offset = type0_PDCCH_CSS_config->n_c;
ss0->searchSpaceId = 0;
*ss0->controlResourceSetId = 0;
ss0->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss0->monitoringSlotPeriodicityAndOffset));
set_monitoring_periodicity_offset(ss0,periodicity,offset);
if (duration==1)
ss0->duration = NULL;
else{
ss0->duration = calloc(1,sizeof(*ss0->duration));
*ss0->duration = duration;
}
ss0->monitoringSymbolsWithinSlot->size = 2;
ss0->monitoringSymbolsWithinSlot->bits_unused = 2;
ss0->monitoringSymbolsWithinSlot->buf[1] = 0;
ss0->monitoringSymbolsWithinSlot->buf[0] = 0;
for (int i=0; i<8; i++) {
ss0->monitoringSymbolsWithinSlot->buf[1] |= ((symbols>>(i+8))&0x01)<<(7-i);
ss0->monitoringSymbolsWithinSlot->buf[0] |= ((symbols>>i)&0x01)<<(7-i);
}
// max values are set according to TS38.213 Section 10.1 Table 10.1-1
ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
switch(L){
case 4:
ss0->nrofCandidates->aggregationLevel4 = (((max_agg>>2) > 4)? 4 : max_agg>>2);
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
break;
case 8:
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
ss0->nrofCandidates->aggregationLevel8 = (((max_agg>>3) > 2)? 2 : max_agg>>3);
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
break;
case 16:
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss0->nrofCandidates->aggregationLevel16 = (((max_agg>>4) > 1)? 1 : max_agg>>4);
break;
default:
AssertFatal(1==0,"Invalid aggregation level %d for SS0\n",L);
}
ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
return 1;
}
void find_period_offest_SR (NR_SchedulingRequestResourceConfig_t *SchedulingReqRec, int *period, int *offset) {
NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR P_O = SchedulingReqRec->periodicityAndOffset->present;
switch (P_O){
@@ -3889,7 +4174,6 @@ uint16_t compute_pucch_prb_size(uint8_t format,
}
}
/* extract UL PTRS values from RRC and validate it based upon 38.214 6.2.3 */
bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
uint16_t rbSize,uint8_t mcsIndex, uint8_t mcsTable,
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+11
View File
@@ -135,10 +135,21 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
NR_SubcarrierSpacing_t scs_ssb,
frequency_range_t frequency_range,
uint32_t ssb_index,
uint32_t ssb_period,
uint32_t ssb_offset_point_a);
uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb);
void get_info_from_tda_tables(int default_abc,
int tda,
int dmrs_TypeA_Position,
int normal_CP,
int *startSymbolIndex,
int *nrOfSymbols);
void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
uint8_t fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, int L);
uint16_t compute_pucch_prb_size(uint8_t format,
uint8_t nr_prbs,
uint16_t O_tot,
openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h
-9
View File
@@ -141,13 +141,4 @@ extern const float table_38213_13_12_c3[16];
extern const int32_t table_38213_10_1_1_c2[5];
extern const uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[16][3];
extern const uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[16][3];
extern const uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[16][3];
extern const uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[16][3];
extern const uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[16][3];
extern const uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[16][3];
extern const uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[16][3];
extern const uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[16][3];
#endif //DEF_H
openair2/LAYER2/NR_MAC_UE/config_ue.c
+172 -252
View File
@@ -35,9 +35,8 @@
#include "NR_MAC_UE/mac_proto.h"
#include "NR_MAC-CellGroupConfig.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include <executables/softmodem-common.h>
extern uint32_t N_RB_DL;
#include "common/utils/nr/nr_common.h"
#include "executables/softmodem-common.h"
int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
int mu,
@@ -145,13 +144,170 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
}
void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
module_id_t module_id,
int cc_idP) {
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
NR_ServingCellConfigCommonSIB_t *scc = mac->scc_SIB;
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_idP;
LOG_D(MAC, "Entering SA UE Config Common\n");
// carrier config
cfg->carrier_config.dl_bandwidth = config_bandwidth(scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR);
uint64_t dl_bw_khz = (12*scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth)*
(15<<scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing);
cfg->carrier_config.dl_frequency = (downlink_frequency[cc_idP][0]/1000) - (dl_bw_khz>>1);
for (int i=0; i<5; i++) {
if (i==scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i] = scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i] = scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.dl_grid_size[i] = 0;
cfg->carrier_config.dl_k0[i] = 0;
}
}
cfg->carrier_config.uplink_bandwidth = config_bandwidth(scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
scc->uplinkConfigCommon->frequencyInfoUL.frequencyBandList==NULL ?
*scc->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR :
*scc->uplinkConfigCommon->frequencyInfoUL.frequencyBandList->list.array[0]->freqBandIndicatorNR);
if (scc->uplinkConfigCommon->frequencyInfoUL.absoluteFrequencyPointA == NULL)
cfg->carrier_config.uplink_frequency = cfg->carrier_config.dl_frequency;
else
// TODO check if corresponds to what reported in SIB1
cfg->carrier_config.uplink_frequency = (downlink_frequency[cc_idP][0]/1000) + uplink_frequency_offset[cc_idP][0];
for (int i=0; i<5; i++) {
if (i==scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i] = scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i] = scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.ul_grid_size[i] = 0;
cfg->carrier_config.ul_k0[i] = 0;
}
}
mac->nr_band = *scc->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR;
mac->frame_type = get_frame_type(mac->nr_band, get_softmodem_params()->numerology);
// cell config
cfg->cell_config.phy_cell_id = mac->physCellId;
cfg->cell_config.frame_duplex_type = mac->frame_type;
// SSB config
cfg->ssb_config.ss_pbch_power = scc->ss_PBCH_BlockPower;
cfg->ssb_config.scs_common = get_softmodem_params()->numerology;
// SSB Table config
cfg->ssb_table.ssb_offset_point_a = scc->downlinkConfigCommon.frequencyInfoDL.offsetToPointA;
cfg->ssb_table.ssb_period = scc->ssb_PeriodicityServingCell;
cfg->ssb_table.ssb_subcarrier_offset = mac->ssb_subcarrier_offset;
if (mac->frequency_range == FR1){
cfg->ssb_table.ssb_mask_list[0].ssb_mask = scc->ssb_PositionsInBurst.inOneGroup.buf[0]<<24;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
}
else{
for (int i=0; i<8; i++){
if ((scc->ssb_PositionsInBurst.groupPresence->buf[0]>>(7-i))&0x01)
cfg->ssb_table.ssb_mask_list[i>>2].ssb_mask |= scc->ssb_PositionsInBurst.inOneGroup.buf[0]<<(24-8*(i%4));
}
}
// TDD Table Configuration
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL)
cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
else {
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL,
"scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
if(cfg->cell_config.frame_duplex_type == TDD){
LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period);
int return_tdd = set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols
);
if (return_tdd !=0)
LOG_E(PHY,"TDD configuration can not be done\n");
else
LOG_I(PHY,"TDD has been properly configurated\n");
}
// PRACH configuration
uint8_t nb_preambles = 64;
if(scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles != NULL)
nb_preambles = *scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles;
cfg->prach_config.prach_sequence_length = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present-1;
if (scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing = *scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing = scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.restricted_set_config = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->restrictedSetConfig;
switch (scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM) {
case 0 :
cfg->prach_config.num_prach_fd_occasions = 1;
break;
case 1 :
cfg->prach_config.num_prach_fd_occasions = 2;
break;
case 2 :
cfg->prach_config.num_prach_fd_occasions = 4;
break;
case 3 :
cfg->prach_config.num_prach_fd_occasions = 8;
break;
default:
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM);
}
cfg->prach_config.num_prach_fd_occasions_list = (fapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions*sizeof(fapi_nr_num_prach_fd_occasions_t));
for (int i=0; i<cfg->prach_config.num_prach_fd_occasions; i++) {
cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length)
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
else
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
cfg->prach_config.num_prach_fd_occasions_list[i].k1 = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE) +
scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart +
(get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing, scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup,
nb_preambles, mac->frame_type, mac->frequency_range);
//cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences = ???
}
cfg->prach_config.ssb_per_rach = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
}
void config_common_ue(NR_UE_MAC_INST_t *mac,
module_id_t module_id,
int cc_idP) {
module_id_t module_id,
int cc_idP) {
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB;
int i;
mac->phy_config.Mod_id = module_id;
@@ -160,7 +316,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
// carrier config
LOG_D(MAC, "Entering UE Config Common\n");
AssertFatal(scc==NULL || scc_SIB==NULL,"Both scc and scc_SIB cannot be null\n");
AssertFatal(scc!=NULL,"scc cannot be null\n");
if (scc) {
cfg->carrier_config.dl_bandwidth = config_bandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
@@ -212,7 +368,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
mac->frequency_range = band<100?FR1:FR2;
lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
// cell config
cfg->cell_config.phy_cell_id = *scc->physCellId;
@@ -231,8 +387,8 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
uint32_t absolute_diff = (*scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
cfg->ssb_table.ssb_offset_point_a = absolute_diff/(12*scs_scaling) - 10;
cfg->ssb_table.ssb_period = *scc->ssb_periodicityServingCell;
cfg->ssb_table.ssb_subcarrier_offset = 0; // TODO currently not in RRC?
cfg->ssb_table.ssb_subcarrier_offset = mac->ssb_subcarrier_offset;
switch (scc->ssb_PositionsInBurst->present) {
case 1 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask = scc->ssb_PositionsInBurst->choice.shortBitmap.buf[0]<<24;
@@ -328,156 +484,6 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
cfg->prach_config.ssb_per_rach = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
} // scc
else { // scc_SIB
cfg->carrier_config.dl_bandwidth = config_bandwidth(scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc_SIB->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR);
cfg->carrier_config.dl_frequency = downlink_frequency[0][0] - (10+scc_SIB->downlinkConfigCommon.frequencyInfoDL.offsetToPointA)*(15<<scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing);
for (i=0; i<5; i++) {
if (i==scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i] = scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i] = scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.dl_grid_size[i] = 0;
cfg->carrier_config.dl_k0[i] = 0;
}
}
cfg->carrier_config.uplink_bandwidth = config_bandwidth(scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
scc_SIB->uplinkConfigCommon->frequencyInfoUL.frequencyBandList==NULL ? *scc_SIB->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR : *scc_SIB->uplinkConfigCommon->frequencyInfoUL.frequencyBandList->list.array[0]->freqBandIndicatorNR);
if (scc_SIB->uplinkConfigCommon->frequencyInfoUL.absoluteFrequencyPointA == NULL)
cfg->carrier_config.uplink_frequency = cfg->carrier_config.dl_frequency;
else
cfg->carrier_config.uplink_frequency = from_nrarfcn(*scc_SIB->uplinkConfigCommon->frequencyInfoUL.frequencyBandList->list.array[0]->freqBandIndicatorNR,
scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
*scc_SIB->uplinkConfigCommon->frequencyInfoUL.absoluteFrequencyPointA)/1000; // freq in kHz
for (i=0; i<5; i++) {
if (i==scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i] = scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i] = scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.ul_grid_size[i] = 0;
cfg->carrier_config.ul_k0[i] = 0;
}
}
uint32_t band = *scc_SIB->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR;
frequency_range_t frequency_range = band<100?FR1:FR2;
lte_frame_type_t frame_type = get_frame_type(band, get_softmodem_params()->numerology);
// cell config
cfg->cell_config.phy_cell_id = mac->physCellId;
cfg->cell_config.frame_duplex_type = frame_type;
// SSB config
cfg->ssb_config.ss_pbch_power = scc_SIB->ss_PBCH_BlockPower;
cfg->ssb_config.scs_common = get_softmodem_params()->numerology;
// SSB Table config
cfg->ssb_table.ssb_offset_point_a = scc_SIB->downlinkConfigCommon.frequencyInfoDL.offsetToPointA;
cfg->ssb_table.ssb_period = scc_SIB->ssb_PeriodicityServingCell;
cfg->ssb_table.ssb_subcarrier_offset = 0; // TODO currently not in RRC?
AssertFatal(scc_SIB->ssb_PositionsInBurst.groupPresence==NULL, "Cannot handle more than 8 SSBs for now (%x.%x.%x.%x.%x.%x.%x.%x)\n",
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[0],
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[1],
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[2],
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[3],
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[4],
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[5],
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[6],
scc_SIB->ssb_PositionsInBurst.groupPresence->buf[7]);
cfg->ssb_table.ssb_mask_list[0].ssb_mask = scc_SIB->ssb_PositionsInBurst.inOneGroup.buf[0]<<24;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
// TDD Table Configuration
if (scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL)
cfg->tdd_table.tdd_period = scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
else {
AssertFatal(scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL,
"scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period = *scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
if(cfg->cell_config.frame_duplex_type == TDD){
LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period);
int return_tdd = set_tdd_config_nr_ue(cfg,
scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols
);
if (return_tdd !=0)
LOG_E(PHY,"TDD configuration can not be done\n");
else
LOG_I(PHY,"TDD has been properly configurated\n");
}
// PRACH configuration
uint8_t nb_preambles = 64;
if(scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles != NULL)
nb_preambles = *scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles;
cfg->prach_config.prach_sequence_length = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present-1;
if (scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing = *scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing = scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.restricted_set_config = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->restrictedSetConfig;
switch (scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM) {
case 0 :
cfg->prach_config.num_prach_fd_occasions = 1;
break;
case 1 :
cfg->prach_config.num_prach_fd_occasions = 2;
break;
case 2 :
cfg->prach_config.num_prach_fd_occasions = 4;
break;
case 3 :
cfg->prach_config.num_prach_fd_occasions = 8;
break;
default:
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM);
}
cfg->prach_config.num_prach_fd_occasions_list = (fapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions*sizeof(fapi_nr_num_prach_fd_occasions_t));
for (i=0; i<cfg->prach_config.num_prach_fd_occasions; i++) {
cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length)
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
else
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
cfg->prach_config.num_prach_fd_occasions_list[i].k1 = NRRIV2PRBOFFSET(scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE) + scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart + (get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing, scc_SIB->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences = compute_nr_root_seq(scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup, nb_preambles, mac->frame_type, frequency_range);
//cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences = ???
}
cfg->prach_config.ssb_per_rach = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
}
}
@@ -523,70 +529,6 @@ void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format
}
void fill_default_coreset_zero(NR_UE_MAC_INST_t *mac) {
// Search space zero
if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero));
if(mac->search_space_zero->controlResourceSetId == NULL) mac->search_space_zero->controlResourceSetId=calloc(1,sizeof(*mac->search_space_zero->controlResourceSetId));
if(mac->search_space_zero->monitoringSymbolsWithinSlot == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot = calloc(1,sizeof(*mac->search_space_zero->monitoringSymbolsWithinSlot));
if(mac->search_space_zero->monitoringSymbolsWithinSlot->buf == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot->buf = calloc(1,2);
if(mac->search_space_zero->nrofCandidates == NULL) mac->search_space_zero->nrofCandidates = calloc(1,sizeof(*mac->search_space_zero->nrofCandidates));
if(mac->search_space_zero->searchSpaceType == NULL) mac->search_space_zero->searchSpaceType = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType));
if(mac->search_space_zero->searchSpaceType->choice.common == NULL) mac->search_space_zero->searchSpaceType->choice.common=calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common));
if(mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
mac->search_space_zero->searchSpaceId = 0;
*mac->search_space_zero->controlResourceSetId = 0;
mac->search_space_zero->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*mac->search_space_zero->monitoringSlotPeriodicityAndOffset));
mac->search_space_zero->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
mac->search_space_zero->duration=NULL;
// should be '1100 0000 0000 00'B (LSB first!), first two symbols in slot, adjust if needed
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[1] = 0;
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7);
mac->search_space_zero->monitoringSymbolsWithinSlot->size = 2;
mac->search_space_zero->monitoringSymbolsWithinSlot->bits_unused = 2;
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
mac->search_space_zero->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n2;
mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
mac->search_space_zero->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
// Coreset0
if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0));
mac->coreset0->controlResourceSetId = 0;
// frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B,
if(mac->coreset0->frequencyDomainResources.buf == NULL) mac->coreset0->frequencyDomainResources.buf = calloc(1,6);
mac->coreset0->frequencyDomainResources.buf[0] = 0xff;
mac->coreset0->frequencyDomainResources.buf[1] = 0;
mac->coreset0->frequencyDomainResources.buf[2] = 0;
mac->coreset0->frequencyDomainResources.buf[3] = 0;
mac->coreset0->frequencyDomainResources.buf[4] = 0;
mac->coreset0->frequencyDomainResources.buf[5] = 0;
mac->coreset0->frequencyDomainResources.size = 6;
mac->coreset0->frequencyDomainResources.bits_unused = 3;
mac->coreset0->duration = 1;
mac->coreset0->cce_REG_MappingType.present=NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved;
mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved));
mac->coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6;
mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = NULL;
mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8];
for (int i=0;i<8;i++) {
tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i;
ASN_SEQUENCE_ADD(&mac->coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]);
}
mac->coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
mac->coreset0->tci_PresentInDCI = NULL;
mac->coreset0->pdcch_DMRS_ScramblingID = NULL;
}
/** \brief This function is relavant for the UE procedures for control. It loads the search spaces, the BWPs and the CORESETs into the MAC instance and
\brief performs assert checks on the relevant RRC configuration.
@param NR_UE_MAC_INST_t mac: pointer to local MAC instance
@@ -667,9 +609,6 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
mac->SSpace[0][0][ss_id] = css;
ss_id++;
}
fill_default_coreset_zero(mac);
}
// todo handle mac_LogicalChannelConfig
@@ -701,16 +640,9 @@ int nr_rrc_mac_config_req_ue(
// TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc.
if(mibP != NULL){
// if this is the first MIB intialize coreset0 for SA
if (mac->mib == NULL) fill_default_coreset_zero(mac);
mac->mib = mibP; // update by every reception
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_idP;
mac->phy_config.config_req.ssb_table.ssb_subcarrier_offset = 0; // TODO currently not in RRC?
mac->phy_config.config_req.tdd_table.tdd_period_in_slots=5<<get_softmodem_params()->numerology;
mac->phy_config.config_req.ssb_table.ssb_offset_point_a = (N_RB_DL-20)>>1;
}
AssertFatal(scell_group_config == NULL || cell_group_config == NULL,
"both scell_group_config and cell_group_config cannot be non-NULL\n");
@@ -718,8 +650,8 @@ int nr_rrc_mac_config_req_ue(
if (sccP != NULL) {
mac->scc_SIB=sccP;
LOG_I(MAC,"Keeping ServingCellConfigCommonSIB\n");
config_common_ue(mac,module_id,cc_idP);
LOG_D(MAC,"Keeping ServingCellConfigCommonSIB\n");
config_common_ue_sa(mac,module_id,cc_idP);
int num_slots_ul = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0) num_slots_ul++;
LOG_I(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
@@ -738,7 +670,7 @@ int nr_rrc_mac_config_req_ue(
ra->rach_ConfigDedicated = scell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink;
}
mac->scc = scell_group_config->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
mac->physCellId = *mac->scc->physCellId;
mac->physCellId = *mac->scc->physCellId;
config_common_ue(mac,module_id,cc_idP);
mac->crnti = scell_group_config->spCellConfig->reconfigurationWithSync->newUE_Identity;
LOG_I(MAC,"Configuring CRNTI %x\n",mac->crnti);
@@ -747,25 +679,13 @@ int nr_rrc_mac_config_req_ue(
// Setup the SSB to Rach Occasions mapping according to the config
build_ssb_to_ro_map(mac);
}
else if (cell_group_config != NULL){
else if (cell_group_config != NULL ){
LOG_I(MAC,"Applying CellGroupConfig from gNodeB\n");
mac->cg = cell_group_config;
mac->servCellIndex = cell_group_config->spCellConfig->servCellIndex ? *cell_group_config->spCellConfig->servCellIndex : 0;
if(get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra==1) {
config_control_ue(mac);
if (cell_group_config->spCellConfig->reconfigurationWithSync) {
if (cell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated) {
ra->rach_ConfigDedicated = cell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink;
}
mac->scc = cell_group_config->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
config_common_ue(mac,module_id,cc_idP);
mac->crnti = cell_group_config->spCellConfig->reconfigurationWithSync->newUE_Identity;
LOG_I(MAC,"Configuring CRNTI %x\n",mac->crnti);
}
// config_control_ue(mac);
// config_common_ue(mac,module_id,cc_idP);
// Setup the SSB to Rach Occasions mapping according to the config
build_ssb_to_ro_map(mac);
}
mac->scheduling_info.periodicBSR_SF =
MAC_UE_BSR_TIMER_NOT_RUNNING;
mac->scheduling_info.retxBSR_SF =
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+6 -2
View File
@@ -292,14 +292,16 @@ typedef struct {
/// Random-access Contention Resolution Timer active flag
uint8_t RA_contention_resolution_timer_active;
/// Random-access Contention Resolution Timer count value
uint8_t RA_contention_resolution_cnt;
int RA_contention_resolution_target_frame;
int RA_contention_resolution_target_slot;
/// Transmitted UE Contention Resolution Identifier
uint8_t cont_res_id[6];
/// BeamfailurerecoveryConfig
NR_BeamFailureRecoveryConfig_t RA_BeamFailureRecoveryConfig;
/// RA SearchSpace
NR_SearchSpace_t *ss;
} RA_config_t;
typedef struct {
@@ -421,6 +423,8 @@ typedef struct {
NR_SearchSpace_t *search_space_zero;
NR_ControlResourceSet_t *coreset0;
frequency_range_t frequency_range;
uint16_t nr_band;
uint8_t ssb_subcarrier_offset;
dci_pdu_rel15_t def_dci_pdu_rel15[8];
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+15 -1
View File
@@ -259,8 +259,10 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
uint8_t time_domain_ind,
int default_abc,
bool use_default);
uint8_t nr_ue_get_sdu(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframe,
@@ -366,6 +368,15 @@ void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
sub_frame_t current_slot,
uint8_t Msg3_tda_id);
void nr_ue_sib1_scheduler(module_id_t module_idP,
int cc_id,
uint16_t ssb_start_symbol,
uint16_t frame,
uint8_t ssb_subcarrier_offset,
uint32_t ssb_index,
uint16_t ssb_start_subcarrier,
frequency_range_t frequency_range);
/* \brief Function called by PHY to process the received RAR and check that the preamble matches what was sent by the gNB. It provides the timing advance and t-CRNTI.
@param Mod_id Index of UE instance
@param CC_id Index to a component carrier
@@ -422,7 +433,7 @@ void nr_get_prach_resources(module_id_t mod_id,
void nr_Msg1_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, uint8_t gNB_id);
void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, uint8_t gNB_id);
void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, slot_t slotP, uint8_t gNB_id);
void nr_ue_msg2_scheduler(module_id_t mod_id, uint16_t rach_frame, uint16_t rach_slot, uint16_t *msg2_frame, uint16_t *msg2_slot);
@@ -432,6 +443,9 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
uint16_t n_RB_DLBWP,
uint16_t riv);
void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id);
void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
void get_num_re_dmrs(nfapi_nr_ue_pusch_pdu_t *pusch_pdu,
uint8_t *nb_dmrs_re_per_rb,
uint16_t *number_dmrs_symbols);
openair2/LAYER2/NR_MAC_UE/main_ue_nr.c
+15 -23
View File
@@ -43,37 +43,29 @@
static NR_UE_MAC_INST_t *nr_ue_mac_inst;
NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst)
{
NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst) {
//LOG_I(MAC, "[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
//LOG_I(MAC, "[MAIN] init UE MAC functions \n");
//init mac here
nr_ue_mac_inst = (NR_UE_MAC_INST_t *)calloc(sizeof(NR_UE_MAC_INST_t),NB_NR_UE_MAC_INST);
for (int j=0;j<NB_NR_UE_MAC_INST;j++) {
nr_ue_init_mac(j);
for (int i=0;i<NR_MAX_HARQ_PROCESSES;i++)
nr_ue_mac_inst[j].first_ul_tx[i]=1;
nr_ue_init_mac(j);
for (int i=0;i<NR_MAX_HARQ_PROCESSES;i++) nr_ue_mac_inst[j].first_ul_tx[i]=1;
}
if (rrc_inst && (rrc_inst->scell_group_config || rrc_inst->cell_group_config)) {
if(rrc_inst->scell_group_config) {
nr_rrc_mac_config_req_ue(0,0,0,NULL,NULL,NULL,rrc_inst->scell_group_config);
//if (IS_SOFTMODEM_NOS1){
// AssertFatal(rlc_module_init(0) == 0, "%s: Could not initialize RLC layer\n", __FUNCTION__);
// nr_pdcp_layer_init();
// nr_DRB_preconfiguration(nr_ue_mac_inst->crnti);
//}
} else if (rrc_inst->cell_group_config) {
nr_rrc_mac_config_req_ue(0,0,0,NULL,NULL,rrc_inst->cell_group_config,NULL);
AssertFatal(rlc_module_init(0) == 0, "%s: Could not initialize RLC layer\n", __FUNCTION__);
if (IS_SOFTMODEM_NOS1){
pdcp_layer_init();
nr_DRB_preconfiguration(nr_ue_mac_inst->crnti);
}
if (rrc_inst && rrc_inst->scell_group_config) {
nr_rrc_mac_config_req_ue(0,0,0,NULL,NULL,NULL,rrc_inst->scell_group_config);
AssertFatal(rlc_module_init(0) == 0, "%s: Could not initialize RLC layer\n", __FUNCTION__);
if (IS_SOFTMODEM_NOS1){
pdcp_layer_init();
nr_DRB_preconfiguration(nr_ue_mac_inst->crnti);
}
// Allocate memory for ul_config_request in the mac instance. This is now a pointer and will
// point to a list of structures (one for each UL slot) to store PUSCH scheduling parameters
// received from UL DCI.
@@ -84,8 +76,8 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst)
LOG_D(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
nr_ue_mac_inst->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t));
}
} else {
}
else {
LOG_I(MAC,"Running without CellGroupConfig\n");
nr_rrc_mac_config_req_ue(0,0,0,NULL,NULL,NULL,NULL);
if(get_softmodem_params()->sa == 1) {
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
+60 -22
View File
@@ -81,6 +81,41 @@ void init_RA(module_id_t mod_id,
prach_resources->POWER_OFFSET_2STEP_RA = 0;
prach_resources->RA_SCALING_FACTOR_BI = 1;
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList;
NR_SearchSpaceId_t *ra_ss;
NR_SearchSpaceId_t ss_id = -1;
NR_SearchSpace_t *ss = NULL;
if(mac->scc_SIB) {
commonSearchSpaceList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
ss_id = *mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
}
else{
if (mac->scc) {
NR_SearchSpaceId_t *ra_ss = mac->scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
if (ra_ss) {
commonSearchSpaceList = mac->scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
ss_id = *mac->scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
}
}
if (ss_id < 0) {
ra_ss = mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
if (ra_ss) {
commonSearchSpaceList = mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
ss_id = *mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
}
}
}
AssertFatal(ss_id>-1,"Didn't find ra-SearchSpace\n");
AssertFatal(commonSearchSpaceList->list.count > 0, "common SearchSpace list has 0 elements\n");
// Common searchspace list
for (int i = 0; i < commonSearchSpaceList->list.count; i++) {
ss = commonSearchSpaceList->list.array[i];
if (ss->searchSpaceId == ss_id)
ra->ss = ss;
}
if (rach_ConfigDedicated) {
if (rach_ConfigDedicated->cfra){
LOG_I(MAC, "Initialization of 2-step contention-free random access procedure\n");
@@ -157,7 +192,7 @@ void init_RA(module_id_t mod_id,
}
if (nr_rach_ConfigCommon->ext1) {
if (nr_rach_ConfigCommon->ext1->ra_PrioritizationForAccessIdentity){
if (nr_rach_ConfigCommon->ext1->ra_PrioritizationForAccessIdentity_r16){
LOG_D(MAC, "In %s:%d: Missing implementation for Access Identity initialization procedures\n", __FUNCTION__, __LINE__);
}
}
@@ -457,18 +492,27 @@ void nr_Msg1_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, uint
ra->RA_attempt_number++;
}
void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, uint8_t gNB_id){
void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, slot_t slotP, uint8_t gNB_id){
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc) ?
RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc) ?
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup:
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
RA_config_t *ra = &mac->ra;
long mu = (mac->scc) ?
mac->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing :
mac->scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
int subframes_per_slot = nr_slots_per_frame[mu]/10;
LOG_D(MAC,"In %s: [UE %d] Frame %d, CB-RA: starting contention resolution timer\n", __FUNCTION__, mod_id, frameP);
// start contention resolution timer (cnt in slots)
int RA_contention_resolution_timer_subframes = (nr_rach_ConfigCommon->ra_ContentionResolutionTimer + 1)<<3;
ra->RA_contention_resolution_target_frame = frameP + (RA_contention_resolution_timer_subframes/10);
ra->RA_contention_resolution_target_slot = (slotP + (RA_contention_resolution_timer_subframes * subframes_per_slot)) % nr_slots_per_frame[mu];
LOG_D(MAC,"In %s: [UE %d] CB-RA: contention resolution timer set in frame.slot %d.%d and expiring in %d.%d\n",
__FUNCTION__, mod_id, frameP, slotP, ra->RA_contention_resolution_target_frame, ra->RA_contention_resolution_target_slot);
// start contention resolution timer
ra->RA_contention_resolution_cnt = (nr_rach_ConfigCommon->ra_ContentionResolutionTimer + 1) * 8;
ra->RA_contention_resolution_timer_active = 1;
ra->ra_state = WAIT_CONTENTION_RESOLUTION;
@@ -739,20 +783,15 @@ void nr_ue_contention_resolution(module_id_t module_id, int cc_id, frame_t frame
RA_config_t *ra = &mac->ra;
if (ra->RA_contention_resolution_timer_active == 1) {
ra->RA_contention_resolution_cnt--;
LOG_D(MAC, "In %s: [%d.%d] RA contention resolution timer %d\n", __FUNCTION__, frame, slot, ra->RA_contention_resolution_cnt);
if (ra->RA_contention_resolution_cnt == 0) {
ra->t_crnti = 0;
ra->RA_active = 0;
ra->RA_contention_resolution_timer_active = 0;
// Signal PHY to quit RA procedure
LOG_E(MAC, "[UE %d] CB-RA: Contention resolution timer has expired, RA procedure has failed...\n", module_id);
nr_ra_failed(module_id, cc_id, prach_resources, frame, slot);
}
if (frame >= ra->RA_contention_resolution_target_frame &&
slot >= ra->RA_contention_resolution_target_slot) {
ra->t_crnti = 0;
ra->RA_active = 0;
ra->RA_contention_resolution_timer_active = 0;
// Signal PHY to quit RA procedure
LOG_E(MAC, "[UE %d] CB-RA: Contention resolution timer has expired, RA procedure has failed...\n", module_id);
nr_ra_failed(module_id, cc_id, prach_resources, frame, slot);
}
}
}
@@ -775,7 +814,6 @@ void nr_ra_succeeded(module_id_t mod_id, frame_t frame, int slot){
LOG_I(MAC, "[UE %d][%d.%d][RAPROC] RA procedure succeeded. CB-RA: Contention Resolution is successful.\n", mod_id, frame, slot);
ra->RA_contention_resolution_cnt = -1;
ra->RA_contention_resolution_timer_active = 0;
mac->crnti = ra->t_crnti;
ra->t_crnti = 0;
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+22 -16
View File
@@ -66,7 +66,6 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id){
RA_config_t *ra = &mac->ra;
uint16_t monitoringSymbolsWithinSlot = 0;
uint8_t coreset_id = 1;
int sps = 0;
@@ -90,6 +89,9 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
NR_SearchSpace_t *ss;
NR_ControlResourceSet_t *coreset;
if(ss_id>=0) {
AssertFatal(mac->scc != NULL, "scc is null\n");
initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
bwp_Common = mac->DLbwp[bwp_id - 1]->bwp_Common;
ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];
coreset = mac->coreset[bwp_id - 1][coreset_id - 1];
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
@@ -107,7 +109,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
for (int i = 0; i < 6; i++)
rel15->coreset.frequency_domain_resource[i] = coreset->frequencyDomainResources.buf[i];
rel15->coreset.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved ? FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED : FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
rel15->coreset.CceRegMappingType = coreset->cce_REG_MappingType.present ==
NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved ? FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED : FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
if (rel15->coreset.CceRegMappingType == FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED) {
struct NR_ControlResourceSet__cce_REG_MappingType__interleaved *interleaved = coreset->cce_REG_MappingType.choice.interleaved;
rel15->coreset.RegBundleSize = (interleaved->reg_BundleSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2 + interleaved->reg_BundleSize);
@@ -130,10 +133,6 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->coreset.scrambling_rnti = 0;
}
#ifdef DEBUG_DCI
LOG_D(MAC, "[DCI_CONFIG] Configure DCI PDU: ss_id %d bwp %p bwp_Id %d controlResourceSetId %d\n", ss_id, mac->DLbwp[bwp_id - 1], mac->DLbwp[bwp_id - 1]->bwp_Id, coreset->controlResourceSetId);
#endif
// loop over RNTI type and configure resource allocation for DCI
switch(rnti_type) {
case NR_RNTI_C:
@@ -161,7 +160,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
// we use the initial DL BWP
sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = ra->ra_rnti;
rel15->rnti = mac->ra.ra_rnti;
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (get_softmodem_params()->sa) {
rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -179,11 +178,12 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
// we use the initial DL BWP
sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = ra->t_crnti;
rel15->rnti = mac->ra.t_crnti;
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
rel15->dci_length_options[0] = nr_dci_size(initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_TC, rel15->BWPSize, bwp_id);
for (int i = 0; i < rel15->num_dci_options; i++)
rel15->dci_length_options[i] = nr_dci_size(initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, bwp_id);
break;
case NR_RNTI_SP_CSI:
break;
@@ -198,7 +198,11 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->rnti = SI_RNTI; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
if(mac->frequency_range == FR1)
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
else
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
@@ -427,11 +431,13 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
}
else { // use coreset0/ss0
NR_SearchSpace_t *ss0 = mac->search_space_zero;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_C , -1);
fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1;
if(ss0) {
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_C , -1);
fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1;
}
}
}
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+383 -353
View File
@@ -236,7 +236,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
uint16_t ssb_start_subcarrier,
uint16_t cell_id)
{
LOG_D(MAC,"[L2][MAC] decode mib\n");
LOG_I(MAC,"[L2][MAC] decode mib\n");
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
mac->physCellId = cell_id;
@@ -284,34 +284,37 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
//storing ssb index in the mac structure
mac->mib_ssb = ssb_index;
mac->ssb_subcarrier_offset = ssb_subcarrier_offset;
uint8_t scs_ssb;
uint32_t band;
uint16_t ssb_start_symbol;
if (get_softmodem_params()->sa == 1) {
// TODO these values shouldn't be taken from SCC in SA
uint8_t scs_ssb = get_softmodem_params()->numerology;
uint32_t band = get_softmodem_params()->band;
uint16_t ssb_start_symbol = get_ssb_start_symbol(band,scs_ssb,ssb_index);
uint16_t ssb_offset_point_a = (ssb_start_subcarrier - ssb_subcarrier_offset)/12;
scs_ssb = get_softmodem_params()->numerology;
band = mac->nr_band;
ssb_start_symbol = get_ssb_start_symbol(band,scs_ssb,ssb_index);
get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config,
frame,
mac->mib,
nr_slots_per_frame[scs_ssb],
ssb_subcarrier_offset,
ssb_start_symbol,
scs_ssb,
mac->frequency_range,
ssb_index,
ssb_offset_point_a);
mac->type0_pdcch_ss_mux_pattern = mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern;
mac->type0_pdcch_ss_sfn_c = mac->type0_PDCCH_CSS_config.sfn_c;
mac->type0_pdcch_ss_n_c = mac->type0_PDCCH_CSS_config.n_c;
if (mac->common_configuration_complete == 0)
nr_ue_sib1_scheduler(module_id,
cc_id,
ssb_start_symbol,
frame,
ssb_subcarrier_offset,
ssb_index,
ssb_start_subcarrier,
mac->frequency_range);
}
else {
NR_ServingCellConfigCommon_t *scc = mac->scc;
scs_ssb = *scc->ssbSubcarrierSpacing;
band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
ssb_start_symbol = get_ssb_start_symbol(band,scs_ssb,ssb_index);
}
mac->dl_config_request.sfn = mac->type0_PDCCH_CSS_config.frame;
mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
mac->dl_config_request.sfn = frame;
mac->dl_config_request.slot = ssb_start_symbol/14;
return 0;
}
@@ -407,13 +410,14 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
uint8_t time_domain_ind,
bool use_default
){
int default_abc,
bool use_default){
int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position;
// uint8_t k_offset=0;
uint8_t sliv_S=0;
uint8_t sliv_L=0;
int sliv_S=0;
int sliv_L=0;
uint8_t mu_pusch = 1;
// definition table j Table 6.1.2.1.1-4
@@ -492,25 +496,14 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
}
else {// Default configuration from tables
// k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
if(dmrs_typeA_pos == 0) {
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[time_domain_ind][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[time_domain_ind][2];
} else {
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[time_domain_ind][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[time_domain_ind][2];
}
get_info_from_tda_tables(default_abc,
time_domain_ind,
dmrs_typeA_pos,
1, // normal CP
&sliv_S,
&sliv_L);
// k_offset = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
// k_offset = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][2];
// k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2];
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
}
@@ -577,8 +570,13 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits);
int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15);
if ((ret&1) == 1) return -1;
else if (ret == 2) dci->dci_format = NR_UL_DCI_FORMAT_0_0;
return (nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci));
else if (ret == 2) {
dci->dci_format = NR_UL_DCI_FORMAT_0_0;
def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci->dci_format];
}
int8_t ret_proc = nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci);
memset(def_dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t));
return ret_proc;
}
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, fapi_nr_dci_indication_pdu_t *dci_ind) {
@@ -594,6 +592,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
RA_config_t *ra = &mac->ra;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
uint8_t is_Msg3 = 0;
int default_abc = 1;
uint16_t n_RB_DLBWP;
if (mac->DLbwp[0]) n_RB_DLBWP = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -762,10 +761,13 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
NR_PDSCH_Config_t *pdsch_config= (mac->DLbwp[0]) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
uint16_t BWPSize = n_RB_DLBWP;
if(rnti == SI_RNTI) {
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config;
default_abc = type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH;
dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
@@ -812,7 +814,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1;
}
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val,rnti==SI_RNTI) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val,default_abc,rnti==SI_RNTI) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
@@ -836,7 +838,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->number_symbols,
dlsch_config_pdu_1_0->start_symbol,
mappingtype);
dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ? (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ?
(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
if (dlsch_config_pdu_1_0->number_symbols == 2)
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
@@ -1006,7 +1009,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1;
}
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val,false) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val,0,false) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
@@ -1028,9 +1031,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
mac->scc->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol,
mappingtype);
dlsch_config_pdu_1_1->start_symbol,
mappingtype);
dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = 1;
@@ -2692,9 +2697,10 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
//switch to DCI_0_0
if (dci_pdu_rel15->format_indicator == 0)
if (dci_pdu_rel15->format_indicator == 0) {
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15);
}
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
#endif
@@ -2886,10 +2892,16 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
// indicating a DL DCI format - 1 bit
// indicating a DL DCI format 1bit
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
//switch to DCI_0_0
if (dci_pdu_rel15->format_indicator == 0) {
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15);
}
if (dci_pdu_rel15->format_indicator == 0)
return 1; // discard dci, format indicator not corresponding to dci_format
@@ -3028,40 +3040,62 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
break;
case NR_RNTI_TC:
/*
// indicating a DL DCI format 1bit
dci_pdu->= (*dci_pdu>>(dci_size-pos)format_indicator&1)<<(dci_size-pos++);
// Freq domain assignment max 16 bit
//Identifier for DCI formats
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu);
#endif
if (dci_pdu_rel15->format_indicator == 1)
return 1; // discard dci, format indicator not corresponding to dci_format
fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
for (int i=0; i<fsize; i++)
dci_pdu->= ((*dci_pdu>>(dci_size-pos)frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++);
pos+=fsize;
dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu);
#endif
// Time domain assignment 4bit
for (int i=0; i<4; i++)
dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
pos+=4;
dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu);
#endif
// Frequency hopping flag  E1 bit
dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)frequency_hopping_flag&1)<<(dci_size-pos++);
pos++;
dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu);
#endif
// MCS 5 bit
for (int i=0; i<5; i++)
dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)mcs>>(4-i))&1)<<(dci_size-pos++);
pos+=5;
dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
#endif
// New data indicator 1bit
dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ndi&1)<<(dci_size-pos++);
pos++;
dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
#endif
// Redundancy version 2bit
for (int i=0; i<2; i++)
dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)rv>>(1-i))&1)<<(dci_size-pos++);
pos+=2;
dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
#endif
// HARQ process number 4bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)*dci_pdu>>(dci_size-pos)harq_pid>>(3-i))&1)<<(dci_size-pos++);
pos+=4;
dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
#endif
// TPC command for scheduled PUSCH  E2 bits
for (int i=0; i<2; i++)
dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)tpc>>(1-i))&1)<<(dci_size-pos++);
*/
// UL/SUL indicator  E1 bit
/*
commented for now (RK): need to get this information from BWP descriptor
if (cfg->pucch_config.pucch_GroupHopping.value)
dci_pdu->= ((uint64_t)dci_pdu_rel15->ul_sul_indicator&1)<<(dci_size-pos++);
*/
pos+=2;
dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3;
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
#endif
break;
}
@@ -3329,248 +3363,238 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info,
LOG_D(MAC, "In %s [%d.%d]: processing PDU %d (with length %d) of %d total number of PDUs...\n", __FUNCTION__, frameP, slot, pdu_id, pdu_len, dl_info->rx_ind->number_pdus);
while (!done && pdu_len > 0){
mac_ce_len = 0x0000;
mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct
mac_sdu_len = 0x0000;
rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pduP)->LCID;
while (!done && pdu_len > 0){
mac_ce_len = 0x0000;
mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct
mac_sdu_len = 0x0000;
rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pduP)->LCID;
LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", rx_lcid, pdu_len);
switch(rx_lcid){
// MAC CE
case DL_SCH_LCID_CCCH:
// MSG4 RRC Setup 38.331
// variable length
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8)
| ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff);
mac_subheader_len = 3;
} else {
mac_sdu_len = ((NR_MAC_SUBHEADER_SHORT *) pduP)->L;
mac_subheader_len = 2;
}
// Check if it is a valid CCCH message, we get all 00's messages very often
int i = 0;
for(i=0; i<(mac_subheader_len+mac_sdu_len); i++) {
if(pduP[i] != 0) {
break;
}
}
if (i == (mac_subheader_len+mac_sdu_len)) {
LOG_D(NR_MAC, "%s() Invalid CCCH message!, pdu_len: %d\n", __func__, pdu_len);
done = 1;
break;
}
if ( mac_sdu_len > 0 ) {
LOG_D(NR_MAC,"DL_SCH_LCID_CCCH (e.g. RRCSetup) with payload len %d\n", mac_sdu_len);
for (int i = 0; i < mac_subheader_len; i++) {
LOG_D(NR_MAC, "MAC header %d: 0x%x\n", i, pduP[i]);
}
for (int i = 0; i < mac_sdu_len; i++) {
LOG_D(NR_MAC, "%d: 0x%x\n", i, pduP[mac_subheader_len + i]);
}
nr_mac_rrc_data_ind_ue(module_idP, CC_id, gNB_index, frameP, 0, mac->crnti, CCCH, pduP+mac_subheader_len, mac_sdu_len);
}
break;
case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH:
// 38.321 Ch6.1.3.14
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL:
// 38.321 Ch6.1.3.13
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT:
// 38.321 Ch6.1.3.12
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_SRS_ACTIVATION:
// 38.321 Ch6.1.3.17
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_RECOMMENDED_BITRATE:
// 38.321 Ch6.1.3.20
mac_ce_len = 2;
break;
case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT:
// 38.321 Ch6.1.3.19
mac_ce_len = 2;
break;
case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT:
// 38.321 Ch6.1.3.18
mac_ce_len = 3;
break;
case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT:
// 38.321 Ch6.1.3.16
mac_ce_len = 2;
break;
case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH:
// 38.321 Ch6.1.3.15
mac_ce_len = 2;
break;
case DL_SCH_LCID_DUPLICATION_ACT:
// 38.321 Ch6.1.3.11
mac_ce_len = 1;
break;
case DL_SCH_LCID_SCell_ACT_4_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 4;
break;
case DL_SCH_LCID_SCell_ACT_1_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 1;
break;
case DL_SCH_LCID_L_DRX:
// 38.321 Ch6.1.3.6
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_DRX:
// 38.321 Ch6.1.3.5
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_TA_COMMAND:
// 38.321 Ch6.1.3.4
mac_ce_len = 1;
/*uint8_t ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND;
uint8_t tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID;*/
ul_time_alignment->apply_ta = 1;
ul_time_alignment->ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND;
ul_time_alignment->tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID;
/*
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] CE %d : UE Timing Advance : %d\n", i, pduP[1]);
#endif
*/
LOG_I(MAC, "[%d.%d] Received TA_COMMAND %u TAGID %u CC_id %d\n", frameP, slot, ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
break;
case DL_SCH_LCID_CON_RES_ID:
// Clause 5.1.5 and 6.1.3.3 of 3GPP TS 38.321 version 16.2.1 Release 16
// MAC Header: 1 byte (R/R/LCID)
// MAC SDU: 6 bytes (UE Contention Resolution Identity)
mac_ce_len = 6;
if(ra->ra_state == WAIT_CONTENTION_RESOLUTION) {
LOG_I(MAC, "[UE %d][RAPROC] Frame %d : received contention resolution identity: 0x%02x%02x%02x%02x%02x%02x Terminating RA procedure\n",
module_idP, frameP, pduP[1], pduP[2], pduP[3], pduP[4], pduP[5], pduP[6]);
bool ra_success = true;
for(int i = 0; i<mac_ce_len; i++) {
if(ra->cont_res_id[i] != pduP[i+1]) {
ra_success = false;
break;
}
}
if ( (ra->RA_active == 1) && ra_success) {
nr_ra_succeeded(module_idP, frameP, slot);
} else if (!ra_success){
// TODO: Handle failure of RA procedure @ MAC layer
// nr_ra_failed(module_idP, CC_id, prach_resources, frameP, slot); // prach_resources is a PHY structure
ra->ra_state = RA_UE_IDLE;
ra->RA_active = 0;
}
}
break;
case DL_SCH_LCID_PADDING:
done = 1;
// end of MAC PDU, can ignore the rest.
break;
// MAC SDU
case DL_SCH_LCID_DCCH:
// check if LCID is valid at current time.
case DL_SCH_LCID_DCCH1:
// check if LCID is valid at current time.
default:
// check if LCID is valid at current time.
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
//mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8)
| ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff);
} else {
mac_sdu_len = (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
}
LOG_D(MAC, "[UE %d] Frame %d : DLSCH -> DL-DTCH %d (gNB %d, %d bytes)\n", module_idP, frameP, rx_lcid, gNB_index, mac_sdu_len);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP);
for (i = 0; i < 32; i++)
LOG_T(MAC, "%x.", (pduP + mac_subheader_len)[i]);
LOG_T(MAC, "\n");
#endif
// if (IS_SOFTMODEM_NOS1){
if (rx_lcid < NB_RB_MAX && rx_lcid >= DL_SCH_LCID_DCCH) {
mac_rlc_data_ind(module_idP,
mac->crnti,
gNB_index,
frameP,
ENB_FLAG_NO,
MBMS_FLAG_NO,
rx_lcid,
(char *) (pduP + mac_subheader_len),
mac_sdu_len,
1,
NULL);
} else {
LOG_E(MAC, "[UE %d] Frame %d : unknown LCID %d (gNB %d)\n", module_idP, frameP, rx_lcid, gNB_index);
}
// }
break;
LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", rx_lcid, pdu_len);
switch(rx_lcid){
// MAC CE
case DL_SCH_LCID_CCCH:
// MSG4 RRC Setup 38.331
// variable length
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8)
| ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff);
mac_subheader_len = 3;
} else {
mac_sdu_len = ((NR_MAC_SUBHEADER_SHORT *) pduP)->L;
mac_subheader_len = 2;
}
pduP += ( mac_subheader_len + mac_ce_len + mac_sdu_len );
pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len );
if (pdu_len < 0)
LOG_E(MAC, "[UE %d][%d.%d] nr_ue_process_mac_pdu, residual mac pdu length %d < 0!\n", module_idP, frameP, slot, pdu_len);
// Check if it is a valid CCCH message, we get all 00's messages very often
int i = 0;
for(i=0; i<(mac_subheader_len+mac_sdu_len); i++) {
if(pduP[i] != 0) {
break;
}
}
if (i == (mac_subheader_len+mac_sdu_len)) {
LOG_D(NR_MAC, "%s() Invalid CCCH message!, pdu_len: %d\n", __func__, pdu_len);
done = 1;
break;
}
if ( mac_sdu_len > 0 ) {
LOG_D(NR_MAC,"DL_SCH_LCID_CCCH (e.g. RRCSetup) with payload len %d\n", mac_sdu_len);
for (int i = 0; i < mac_subheader_len; i++) {
LOG_D(NR_MAC, "MAC header %d: 0x%x\n", i, pduP[i]);
}
for (int i = 0; i < mac_sdu_len; i++) {
LOG_D(NR_MAC, "%d: 0x%x\n", i, pduP[mac_subheader_len + i]);
}
nr_mac_rrc_data_ind_ue(module_idP, CC_id, gNB_index, frameP, 0, mac->crnti, CCCH, pduP+mac_subheader_len, mac_sdu_len);
}
break;
case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH:
// 38.321 Ch6.1.3.14
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL:
// 38.321 Ch6.1.3.13
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT:
// 38.321 Ch6.1.3.12
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_SRS_ACTIVATION:
// 38.321 Ch6.1.3.17
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_RECOMMENDED_BITRATE:
// 38.321 Ch6.1.3.20
mac_ce_len = 2;
break;
case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT:
// 38.321 Ch6.1.3.19
mac_ce_len = 2;
break;
case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT:
// 38.321 Ch6.1.3.18
mac_ce_len = 3;
break;
case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT:
// 38.321 Ch6.1.3.16
mac_ce_len = 2;
break;
case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH:
// 38.321 Ch6.1.3.15
mac_ce_len = 2;
break;
case DL_SCH_LCID_DUPLICATION_ACT:
// 38.321 Ch6.1.3.11
mac_ce_len = 1;
break;
case DL_SCH_LCID_SCell_ACT_4_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 4;
break;
case DL_SCH_LCID_SCell_ACT_1_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 1;
break;
case DL_SCH_LCID_L_DRX:
// 38.321 Ch6.1.3.6
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_DRX:
// 38.321 Ch6.1.3.5
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_TA_COMMAND:
// 38.321 Ch6.1.3.4
mac_ce_len = 1;
/*uint8_t ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND;
uint8_t tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID;*/
ul_time_alignment->apply_ta = 1;
ul_time_alignment->ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND;
ul_time_alignment->tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID;
/*
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] CE %d : UE Timing Advance : %d\n", i, pduP[1]);
#endif
*/
LOG_D(MAC, "[%d.%d] Received TA_COMMAND %u TAGID %u CC_id %d\n", frameP, slot, ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
break;
case DL_SCH_LCID_CON_RES_ID:
// Clause 5.1.5 and 6.1.3.3 of 3GPP TS 38.321 version 16.2.1 Release 16
// MAC Header: 1 byte (R/R/LCID)
// MAC SDU: 6 bytes (UE Contention Resolution Identity)
mac_ce_len = 6;
if(ra->ra_state == WAIT_CONTENTION_RESOLUTION) {
LOG_I(MAC, "[UE %d][RAPROC] Frame %d : received contention resolution identity: 0x%02x%02x%02x%02x%02x%02x Terminating RA procedure\n",
module_idP, frameP, pduP[1], pduP[2], pduP[3], pduP[4], pduP[5], pduP[6]);
bool ra_success = true;
for(int i = 0; i<mac_ce_len; i++) {
if(ra->cont_res_id[i] != pduP[i+1]) {
ra_success = false;
break;
}
}
if ( (ra->RA_active == 1) && ra_success) {
nr_ra_succeeded(module_idP, frameP, slot);
} else if (!ra_success){
// TODO: Handle failure of RA procedure @ MAC layer
// nr_ra_failed(module_idP, CC_id, prach_resources, frameP, slot); // prach_resources is a PHY structure
ra->ra_state = RA_UE_IDLE;
ra->RA_active = 0;
}
}
break;
case DL_SCH_LCID_PADDING:
done = 1;
// end of MAC PDU, can ignore the rest.
break;
// MAC SDU
case DL_SCH_LCID_DCCH:
// check if LCID is valid at current time.
case DL_SCH_LCID_DCCH1:
// check if LCID is valid at current time.
default:
// check if LCID is valid at current time.
if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){
//mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8;
mac_subheader_len = 3;
mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8)
| ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff);
} else {
mac_sdu_len = (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L;
mac_subheader_len = 2;
}
LOG_D(MAC, "[UE %d] Frame %d : DLSCH -> DL-DTCH %d (gNB %d, %d bytes)\n", module_idP, frameP, rx_lcid, gNB_index, mac_sdu_len);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP);
for (i = 0; i < 32; i++)
LOG_T(MAC, "%x.", (pduP + mac_subheader_len)[i]);
LOG_T(MAC, "\n");
#endif
if (rx_lcid < NB_RB_MAX && rx_lcid >= DL_SCH_LCID_DCCH) {
mac_rlc_data_ind(module_idP,
mac->crnti,
gNB_index,
frameP,
ENB_FLAG_NO,
MBMS_FLAG_NO,
rx_lcid,
(char *) (pduP + mac_subheader_len),
mac_sdu_len,
1,
NULL);
} else {
LOG_E(MAC, "[UE %d] Frame %d : unknown LCID %d (gNB %d)\n", module_idP, frameP, rx_lcid, gNB_index);
}
break;
}
pduP += ( mac_subheader_len + mac_ce_len + mac_sdu_len );
pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len );
if (pdu_len < 0)
LOG_E(MAC, "[UE %d][%d.%d] nr_ue_process_mac_pdu, residual mac pdu length %d < 0!\n", module_idP, frameP, slot, pdu_len);
}
}
@@ -3790,6 +3814,12 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
module_id_t mod_id = dl_info->module_id;
frame_t frame = dl_info->frame;
int slot = dl_info->slot;
if(dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.ack_nack == 0) {
LOG_W(NR_MAC,"[UE %d][RAPROC][%d.%d] CRC check failed on RAR (NAK)\n", mod_id, frame, slot);
return 0;
}
int cc_id = dl_info->cc_id;
uint8_t gNB_id = dl_info->gNB_index;
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
@@ -3851,43 +3881,43 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
unsigned char csi_req;
#endif
// TA command
ul_time_alignment->apply_ta = 1;
ul_time_alignment->ta_command = 31 + rar->TA2 + (rar->TA1 << 5);
// TA command
ul_time_alignment->apply_ta = 1;
ul_time_alignment->ta_command = 31 + rar->TA2 + (rar->TA1 << 5);
#ifdef DEBUG_RAR
// CSI
csi_req = (unsigned char) (rar->UL_GRANT_4 & 0x01);
// CSI
csi_req = (unsigned char) (rar->UL_GRANT_4 & 0x01);
#endif
// TPC
tpc_command = (unsigned char) ((rar->UL_GRANT_4 >> 1) & 0x07);
switch (tpc_command){
case 0:
ra->Msg3_TPC = -6;
break;
case 1:
ra->Msg3_TPC = -4;
break;
case 2:
ra->Msg3_TPC = -2;
break;
case 3:
ra->Msg3_TPC = 0;
break;
case 4:
ra->Msg3_TPC = 2;
break;
case 5:
ra->Msg3_TPC = 4;
break;
case 6:
ra->Msg3_TPC = 6;
break;
case 7:
ra->Msg3_TPC = 8;
break;
}
// TPC
tpc_command = (unsigned char) ((rar->UL_GRANT_4 >> 1) & 0x07);
switch (tpc_command){
case 0:
ra->Msg3_TPC = -6;
break;
case 1:
ra->Msg3_TPC = -4;
break;
case 2:
ra->Msg3_TPC = -2;
break;
case 3:
ra->Msg3_TPC = 0;
break;
case 4:
ra->Msg3_TPC = 2;
break;
case 5:
ra->Msg3_TPC = 4;
break;
case 6:
ra->Msg3_TPC = 6;
break;
case 7:
ra->Msg3_TPC = 8;
break;
}
// MCS
rar_grant.mcs = (unsigned char) (rar->UL_GRANT_4 >> 4);
// time alloc
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+167 -157
View File
@@ -737,7 +737,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
return -1;
}
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_config_pdu, NULL, dci->time_domain_assignment.val,false) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_config_pdu, NULL, dci->time_domain_assignment.val,0,false) < 0) {
return -1;
}
@@ -866,8 +866,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
// 3. TODO: Perform PHR procedures
NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_indication_t *ul_info){
uint32_t search_space_mask = 0;
if (dl_info){
module_id_t mod_id = dl_info->module_id;
@@ -878,87 +876,11 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
nr_scheduled_response_t scheduled_response;
nr_dcireq_t dcireq;
// check type0 from 38.213 13 if we have no CellGroupConfig
// TODO: implementation to be completed
LOG_D(NR_MAC,"nr_ue_scheduler(): mac->cg %p\n",mac->cg);
if (mac->cg == NULL) {
if(dl_info->ssb_index != -1){
if(mac->type0_pdcch_ss_mux_pattern == 1){
// 38.213 chapter 13
if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration;
}
if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration;
}
}
if(mac->type0_pdcch_ss_mux_pattern == 2){
// 38.213 Table 13-13, 13-14
if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration;
}
}
if(mac->type0_pdcch_ss_mux_pattern == 3){
// 38.213 Table 13-15
if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.coreset.duration;
}
}
} // ssb_index != -1
// Type0 PDCCH search space
if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1;
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
/*
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set
LOG_I(NR_MAC,"nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n",
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti,
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP);
*/
NR_SearchSpace_t *ss0 = mac->search_space_zero;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
if( mac->scc == NULL && mac->scc_SIB == NULL && (rx_frame%2 == mac->type0_PDCCH_CSS_config.sfn_c) && (rx_slot == mac->type0_PDCCH_CSS_config.n_0) ){
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1;
LOG_D(NR_MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
// this is for Msg2/Msg4
if (mac->ra.ra_state >= WAIT_RAR) {
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC , -1);
fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1;
LOG_D(NR_MAC,"mac->cg %p: Calling fill_scheduled_response rnti %x, type0_pdcch, num_pdus %d\n",mac->cg,rel15->rnti,dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
}
} else { // we have a Master or Secondary CellGroupConfig
if(mac->cg != NULL){ // we have a cg
dcireq.module_id = mod_id;
dcireq.gNB_index = gNB_index;
dcireq.cc_id = cc_id;
@@ -968,23 +890,25 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
else {
// this is for Msg2/Msg4
if (mac->ra.ra_state >= WAIT_RAR) {
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = mac->ra.ra_state == WAIT_RAR ? 1 : 2;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
if (mac->ra.ra_state == WAIT_CONTENTION_RESOLUTION)
rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_0; // msg3 retransmission
config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC , -1);
fill_dci_search_candidates(mac->ra.ss, rel15);
dl_config->number_pdus = 1;
LOG_D(MAC,"mac->cg %p: Calling fill_scheduled_response rnti %x, type0_pdcch, num_pdus %d\n",mac->cg,rel15->rnti,dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
/*
if(search_space_mask & type0a_pdcch){
}
if(search_space_mask & type1_pdcch){
}
if(search_space_mask & type2_pdcch){
}
if(search_space_mask & type3_pdcch){
}
*/
}
} else if (ul_info) {
@@ -1018,12 +942,11 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
if (ulcfg_pdu->pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) {
uint16_t TBS_bytes = ulcfg_pdu->pusch_config_pdu.pusch_data.tb_size;
LOG_D(NR_MAC,"harq_id %d, NDI %d NDI_DCI %d, TBS_bytes %d (ra_state %d\n",
LOG_D(NR_MAC,"harq_id %d, NDI %d NDI_DCI %d, TBS_bytes %d\n",
ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id,
mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id],
ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator,
TBS_bytes,
ra->ra_state);
TBS_bytes);
if (ra->ra_state == WAIT_RAR && !ra->cfra){
memcpy(ulsch_input_buffer, mac->ulsch_pdu.payload, TBS_bytes);
LOG_D(NR_MAC,"[RAPROC] Msg3 to be transmitted:\n");
@@ -1032,11 +955,14 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
}
LOG_D(NR_MAC,"Flipping NDI for harq_id %d (Msg3)\n",ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator);
mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator;
mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = 0;
mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = 0;
} else {
if ( (mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] != ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator ||
mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id]==1)){
if ((mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] != ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator ||
mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id]==1) &&
((get_softmodem_params()->phy_test == 1) ||
(ra->ra_state == RA_SUCCEEDED) ||
(ra->ra_state == WAIT_RAR && ra->cfra))){
// Getting IP traffic to be transmitted
nr_ue_get_sdu(mod_id, frame_tx, slot_tx, gNB_index, ulsch_input_buffer, TBS_bytes);
@@ -1056,11 +982,15 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
tx_req.tx_request_body[0].pdu_index = j;
tx_req.tx_request_body[0].pdu = ulsch_input_buffer;
if (ra->ra_state == WAIT_CONTENTION_RESOLUTION && !ra->cfra){
LOG_I(NR_MAC,"[RAPROC] RA-Msg3 retransmitted\n");
// 38.321 restart the ra-ContentionResolutionTimer at each HARQ retransmission in the first symbol after the end of the Msg3 transmission
nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->gNB_index);
}
if (ra->ra_state == WAIT_RAR && !ra->cfra){
LOG_I(NR_MAC,"[RAPROC] RA-Msg3 transmitted\n");
nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->gNB_index);
nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->gNB_index);
}
}
}
@@ -1499,7 +1429,6 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
int delta = 0;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
// Get the numerology to calculate the Tx frame and slot
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
@@ -1620,11 +1549,12 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
// WIP: For now assume no rejected PRACH occasions because of conflict with SSB or TDD_UL_DL_ConfigurationCommon schedule
int unpaired = mac->phy_config.config_req.cell_config.frame_duplex_type;
// Identify the proper PRACH Configuration Index table according to the operating frequency
LOG_D(NR_MAC,"mu = %u, PRACH config index = %u, unpaired = %u\n", mu, config_index, unpaired);
prach_config_info_p = get_prach_config_info(mac->frequency_range, config_index, unpaired);
// Identify the proper PRACH Configuration Index table according to the operating frequency
LOG_D(NR_MAC,"mu = %u, PRACH config index = %u, unpaired = %u\n", mu, config_index, unpaired);
if (mac->frequency_range == FR2) { //FR2
x = prach_config_info_p[2];
@@ -1755,57 +1685,57 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) {
if (mac->scc) {
NR_ServingCellConfigCommon_t *scc = mac->scc;
switch (scc->ssb_PositionsInBurst->present) {
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap:
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap;
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap:
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap;
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=3; bit_nb<=3; bit_nb--) {
// If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
for (uint8_t bit_nb=3; bit_nb<=3; bit_nb--) {
// If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
}
ssb_idx++;
}
ssb_idx++;
}
break;
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap:
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap;
break;
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap:
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap;
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) {
// If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) {
// If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
}
ssb_idx++;
}
ssb_idx++;
}
break;
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap:
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.longBitmap;
break;
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap:
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.longBitmap;
ssb_positionsInBurst = BIT_STRING_to_uint64(ssb_bitmap);
LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
ssb_positionsInBurst = BIT_STRING_to_uint64(ssb_bitmap);
LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=63; bit_nb<=63; bit_nb--) {
// If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
for (uint8_t bit_nb=63; bit_nb<=63; bit_nb--) {
// If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
}
ssb_idx++;
}
ssb_idx++;
}
break;
default:
AssertFatal(false,"ssb_PositionsInBurst not present\n");
break;
break;
default:
AssertFatal(false,"ssb_PositionsInBurst not present\n");
break;
}
} else { // This is configuration from SIB1
@@ -1813,6 +1743,7 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) {
ssb_bitmap = &mac->scc_SIB->ssb_PositionsInBurst.inOneGroup;
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) {
@@ -1897,8 +1828,11 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
required_nb_of_prach_occasion = ssb_list.nb_tx_ssb * ssb_rach_ratio;
}
AssertFatal(prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion>0,"prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion shouldn't be 0 (ssb_list.nb_tx_ssb %d, ssb_rach_ratio %d\n",ssb_list.nb_tx_ssb,ssb_rach_ratio);
required_nb_of_prach_conf_period = ((required_nb_of_prach_occasion-1) + prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion) / prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion;
AssertFatal(prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion>0,
"prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion shouldn't be 0 (ssb_list.nb_tx_ssb %d, ssb_rach_ratio %d\n",
ssb_list.nb_tx_ssb,ssb_rach_ratio);
required_nb_of_prach_conf_period = ((required_nb_of_prach_occasion-1) + prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion) /
prach_assoc_pattern.prach_conf_period_list[0].nb_of_prach_occasion;
if (required_nb_of_prach_conf_period == 1) {
prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 1;
@@ -1983,7 +1917,9 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
ssb_list.tx_ssb[ssb_idx].nb_mapped_ro++;
AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro);
LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq);
LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n",
ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq,
prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq);
LOG_D(NR_MAC,"Nb mapped ROs for this ssb idx: in the association period only %u\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro);
// If all the required SSBs are mapped to this RO, exit the loop of SSBs
@@ -2055,11 +1991,15 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
ro_p->nb_mapped_ssb = 1;
ssb_list.tx_ssb[ssb_idx].mapped_ro[ssb_list.tx_ssb[ssb_idx].nb_mapped_ro] = ro_p;
ssb_list.tx_ssb[ssb_idx].nb_mapped_ro++;
AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro);
AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n",
ssb_list.tx_ssb[ssb_idx].nb_mapped_ro);
nb_mapped_ro_in_association_period++;
LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq);
LOG_D(NR_MAC,"Nb mapped ROs for this ssb idx: in the association period only %u / total %u\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro, nb_mapped_ro_in_association_period);
LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n",
ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq,
prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq);
LOG_D(NR_MAC,"Nb mapped ROs for this ssb idx: in the association period only %u / total %u\n",
ssb_list.tx_ssb[ssb_idx].nb_mapped_ro, nb_mapped_ro_in_association_period);
// Exit the loop if this SSB has been mapped to all the required ROs
// WIP: Assuming that ssb_rach_ratio equals the maximum nb of times a given ssb_idx is mapped within an association period:
@@ -2124,7 +2064,8 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx,
ssb_info_p = &ssb_list.tx_ssb[ssb_idx];
LOG_D(NR_MAC,"checking for prach : ssb_info_p->nb_mapped_ro %d\n",ssb_info_p->nb_mapped_ro);
for (uint8_t n_mapped_ro=0; n_mapped_ro<ssb_info_p->nb_mapped_ro; n_mapped_ro++) {
LOG_D(NR_MAC,"%d.%d: mapped_ro[%d]->frame.slot %d.%d, prach_assoc_pattern.nb_of_frame %d\n",frame,slot,n_mapped_ro,ssb_info_p->mapped_ro[n_mapped_ro]->frame,ssb_info_p->mapped_ro[n_mapped_ro]->slot,prach_assoc_pattern.nb_of_frame);
LOG_D(NR_MAC,"%d.%d: mapped_ro[%d]->frame.slot %d.%d, prach_assoc_pattern.nb_of_frame %d\n",
frame,slot,n_mapped_ro,ssb_info_p->mapped_ro[n_mapped_ro]->frame,ssb_info_p->mapped_ro[n_mapped_ro]->slot,prach_assoc_pattern.nb_of_frame);
if ((slot == ssb_info_p->mapped_ro[n_mapped_ro]->slot) &&
(ssb_info_p->mapped_ro[n_mapped_ro]->frame == (frame % prach_assoc_pattern.nb_of_frame))) {
@@ -2293,7 +2234,6 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in
}
// This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x
// PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3.
// - todo:
@@ -2435,6 +2375,76 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
} // if is_nr_UL_slot
}
// This function schedules the reception of SIB1 after initial sync and before going to real time state
void nr_ue_sib1_scheduler(module_id_t module_idP,
int cc_id,
uint16_t ssb_start_symbol,
uint16_t frame,
uint8_t ssb_subcarrier_offset,
uint32_t ssb_index,
uint16_t ssb_start_subcarrier,
frequency_range_t frequency_range) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
nr_scheduled_response_t scheduled_response;
int frame_s,slot_s,ret;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
uint8_t scs_ssb = get_softmodem_params()->numerology;
uint16_t ssb_offset_point_a = (ssb_start_subcarrier - ssb_subcarrier_offset)/12;
get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config,
frame,
mac->mib,
nr_slots_per_frame[scs_ssb],
ssb_subcarrier_offset,
ssb_start_symbol,
scs_ssb,
frequency_range,
ssb_index,
1, // If the UE is not configured with a periodicity, the UE assumes a periodicity of a half frame
ssb_offset_point_a);
if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero));
if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0));
for (int i=0; i<3; i++) { // loop over possible aggregation levels
fill_coresetZero(mac->coreset0, &mac->type0_PDCCH_CSS_config);
ret = fill_searchSpaceZero(mac->search_space_zero, &mac->type0_PDCCH_CSS_config,4<<i);
if (ret) {
rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(mac->search_space_zero, rel15);
if(mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern == 1){
// same frame as ssb
if ((mac->type0_PDCCH_CSS_config.frame & 0x1) == mac->type0_PDCCH_CSS_config.sfn_c)
frame_s = 0;
else
frame_s = 1;
slot_s = mac->type0_PDCCH_CSS_config.n_0;
}
else{
frame_s = 0; // same frame as ssb
slot_s = mac->type0_PDCCH_CSS_config.n_c;
}
LOG_D(MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, module_idP, cc_id, frame_s, slot_s, 0); // TODO fix thread_id, for now assumed 0
}
}
if (dl_config->number_pdus) {
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
else
AssertFatal(1==0,"Unable to find aggregation level for type0 CSS\n");
}
#define MAX_LCID 8 // NR_MAX_NUM_LCID shall be used but the mac_rlc_data_req function can fetch data for max 8 LCID
/**
openair2/LAYER2/NR_MAC_gNB/config.c
+2
View File
@@ -419,6 +419,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int ssb_SubcarrierOffset,
int pdsch_AntennaPorts,
int pusch_AntennaPorts,
int sib1_tda,
NR_ServingCellConfigCommon_t *scc,
int add_ue,
uint32_t rnti,
@@ -507,6 +508,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
if (get_softmodem_params()->sa > 0) {
NR_COMMON_channels_t *cc = &RC.nrmac[Mod_idP]->common_channels[0];
RC.nrmac[Mod_idP]->sib1_tda = sib1_tda;
for (int n=0;n<NR_NB_RA_PROC_MAX;n++ ) {
cc->ra[n].cfra = false;
cc->ra[n].rnti = 0;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+40 -24
View File
@@ -60,6 +60,8 @@
uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
uint8_t vnf_first_sched_entry = 1;
void clear_mac_stats(gNB_MAC_INST *gNB) {
memset((void*)gNB->UE_info.mac_stats,0,MAX_MOBILES_PER_GNB*sizeof(NR_mac_stats_t));
}
@@ -150,34 +152,32 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
gNB->pdu_index[CC_idP] = 0;
if (NFAPI_MODE == NFAPI_MONOLITHIC || NFAPI_MODE == NFAPI_MODE_PNF) { // monolithic or PNF
DL_req[CC_idP].SFN = frameP;
DL_req[CC_idP].Slot = slotP;
DL_req[CC_idP].dl_tti_request_body.nPDUs = 0;
DL_req[CC_idP].dl_tti_request_body.nGroup = 0;
//DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000;
memset(pdcch, 0, sizeof(**pdcch) * MAX_NUM_BWP * MAX_NUM_CORESET);
DL_req[CC_idP].SFN = frameP;
DL_req[CC_idP].Slot = slotP;
DL_req[CC_idP].dl_tti_request_body.nPDUs = 0;
DL_req[CC_idP].dl_tti_request_body.nGroup = 0;
//DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000;
memset(pdcch, 0, sizeof(**pdcch) * MAX_NUM_BWP * MAX_NUM_CORESET);
UL_dci_req[CC_idP].SFN = frameP;
UL_dci_req[CC_idP].Slot = slotP;
UL_dci_req[CC_idP].numPdus = 0;
UL_dci_req[CC_idP].SFN = frameP;
UL_dci_req[CC_idP].Slot = slotP;
UL_dci_req[CC_idP].numPdus = 0;
/* advance last round's future UL_tti_req to be ahead of current frame/slot */
future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024;
LOG_D(MAC,"Future_ul_tti SFN = %d for slot %d \n", future_ul_tti_req->SFN, (slotP + num_slots - 1) % num_slots);
/* future_ul_tti_req->Slot is fixed! */
future_ul_tti_req->n_pdus = 0;
future_ul_tti_req->n_ulsch = 0;
future_ul_tti_req->n_ulcch = 0;
future_ul_tti_req->n_group = 0;
/* advance last round's future UL_tti_req to be ahead of current frame/slot */
future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024;
/* future_ul_tti_req->Slot is fixed! */
future_ul_tti_req->n_pdus = 0;
future_ul_tti_req->n_ulsch = 0;
future_ul_tti_req->n_ulcch = 0;
future_ul_tti_req->n_group = 0;
/* UL_tti_req is a simple pointer into the current UL_tti_req_ahead, i.e.,
* it walks over UL_tti_req_ahead in a circular fashion */
gNB->UL_tti_req[CC_idP] = &gNB->UL_tti_req_ahead[CC_idP][slotP];
/* UL_tti_req is a simple pointer into the current UL_tti_req_ahead, i.e.,
* it walks over UL_tti_req_ahead in a circular fashion */
gNB->UL_tti_req[CC_idP] = &gNB->UL_tti_req_ahead[CC_idP][slotP];
TX_req[CC_idP].Number_of_PDUs = 0;
TX_req[CC_idP].Number_of_PDUs = 0;
}
}
/*
void check_nr_ul_failure(module_id_t module_idP,
@@ -401,6 +401,22 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
memset(&vrb_map_UL[last_slot * MAX_BWP_SIZE], 0, sizeof(uint16_t) * MAX_BWP_SIZE);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot);
/*VNF first entry into scheduler. Since frame numbers for future_ul_tti_req of some future slots
will not be set before we encounter them, set them here */
if (NFAPI_MODE == NFAPI_MODE_VNF){
if(vnf_first_sched_entry == 1)
{
for (int i = 0; i<num_slots; i++){
if(i < slot)
gNB->UL_tti_req_ahead[CC_id][i].SFN = (frame + 1) % 1024;
else
gNB->UL_tti_req_ahead[CC_id][i].SFN = frame;
}
vnf_first_sched_entry = 0;
}
}
}
@@ -429,7 +445,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
schedule_nr_prach(module_idP, f, s);
}
// This schedule SR
// This schedule SR
nr_sr_reporting(module_idP, frame, slot);
// Schedule CSI-RS transmission
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+386 -150
View File
@@ -545,7 +545,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
if (ra->CellGroup && ra->CellGroup->spCellConfig && ra->CellGroup->spCellConfig->spCellConfigDedicated &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
ra->bwp_id = 1;
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id - 1];
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id - 1];
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1);
@@ -653,33 +653,228 @@ void nr_initiate_ra_proc(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0);
}
void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{
gNB_MAC_INST *mac = RC.nrmac[module_idP];
void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) {
start_meas(&mac->schedule_ra);
for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
NR_COMMON_channels_t *cc = &mac->common_channels[CC_id];
for (int i = 0; i < NR_NB_RA_PROC_MAX; i++) {
NR_RA_t *ra = &cc->ra[i];
LOG_D(NR_MAC, "RA[state:%d]\n", ra->state);
switch (ra->state) {
case Msg2:
nr_generate_Msg2(module_idP, CC_id, frameP, slotP, ra);
break;
case Msg4:
nr_generate_Msg4(module_idP, CC_id, frameP, slotP, ra);
break;
case WAIT_Msg4_ACK:
nr_check_Msg4_Ack(module_idP, CC_id, frameP, slotP, ra);
break;
default:
break;
}
gNB_MAC_INST *mac = RC.nrmac[module_idP];
start_meas(&mac->schedule_ra);
for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
NR_COMMON_channels_t *cc = &mac->common_channels[CC_id];
for (int i = 0; i < NR_NB_RA_PROC_MAX; i++) {
NR_RA_t *ra = &cc->ra[i];
LOG_D(NR_MAC, "RA[state:%d]\n", ra->state);
switch (ra->state) {
case Msg2:
nr_generate_Msg2(module_idP, CC_id, frameP, slotP, ra);
break;
case Msg3_retransmission:
nr_generate_Msg3_retransmission(module_idP, CC_id, frameP, slotP, ra);
break;
case Msg4:
nr_generate_Msg4(module_idP, CC_id, frameP, slotP, ra);
break;
case WAIT_Msg4_ACK:
nr_check_Msg4_Ack(module_idP, CC_id, frameP, slotP, ra);
break;
default:
break;
}
}
stop_meas(&mac->schedule_ra);
}
stop_meas(&mac->schedule_ra);
}
void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra) {
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_BWP_Uplink_t *ubwp = ra->CellGroup ?
ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id-1] :
NULL;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList= ubwp ?
ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList:
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
uint8_t K2 = *pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2;
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_idP]->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) {
// beam association for FR2
int16_t *tdd_beam_association = nr_mac->tdd_beam_association;
if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))
tdd_period_slot++;
int num_tdd_period = sched_slot/tdd_period_slot;
if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id))
return; // can't schedule retransmission in this slot
else
tdd_beam_association[num_tdd_period] = ra->beam_id;
}
int bwpSize = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int bwpStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int scs = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int fh = 0;
int startSymbolAndLength = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
int mappingtype = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
if (ra->CellGroup) {
AssertFatal(ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1,
"downlinkBWP_ToAddModList has %d BWP!\n", ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count);
int act_bwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int act_bwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing;
fh = ubwp->bwp_Dedicated->pusch_Config->choice.setup->frequencyHopping ? 1 : 0;
if ((bwpStart < act_bwp_start) || (bwpSize > act_bwp_size))
bwpStart = act_bwp_start;
}
uint16_t *vrb_map_UL =
&RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
int rbStart = 0;
for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (bwpSize - ra->msg3_nb_rb)); i++) {
if (vrb_map_UL[rbStart + bwpStart + i]) {
rbStart += i;
i = 0;
}
}
if (rbStart > (bwpSize - ra->msg3_nb_rb)) {
// cannot find free vrb_map for msg3 retransmission in this slot
return;
}
LOG_I(NR_MAC, "[gNB %d][RAPROC] Frame %d, Slot %d : CC_id %d Scheduling retransmission of Msg3 in (%d,%d)\n",
module_idP, frame, slot, CC_id, sched_frame, sched_slot);
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[CC_id][sched_slot];
AssertFatal(future_ul_tti_req->SFN == sched_frame
&& future_ul_tti_req->Slot == sched_slot,
"future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
future_ul_tti_req->SFN,
future_ul_tti_req->Slot,
sched_frame,
sched_slot);
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
fill_msg3_pusch_pdu(pusch_pdu, scc,
ra->msg3_round,
startSymbolAndLength,
ra->rnti, scs,
bwpSize, bwpStart,
mappingtype, fh,
rbStart, ra->msg3_nb_rb);
future_ul_tti_req->n_pdus += 1;
// generation of DCI 0_0 to schedule msg3 retransmission
NR_SearchSpace_t *ss = ra->ra_ss;
NR_BWP_Downlink_t *bwp = NULL;
NR_ControlResourceSet_t *coreset = NULL;
NR_BWP_t *genericParameters = NULL;
if (ra->CellGroup &&
ra->CellGroup->spCellConfig &&
ra->CellGroup->spCellConfig->spCellConfigDedicated &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id-1]) {
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id-1];
genericParameters = &bwp->bwp_Common->genericParameters;
}
else {
genericParameters= &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
}
if (*ss->controlResourceSetId == 0)
coreset = nr_mac->sched_ctrlCommon->coreset; // this is coreset 0
else
coreset = get_coreset(scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common);
AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg3 retransmission\n");
nfapi_nr_ul_dci_request_t *ul_dci_req = &nr_mac->UL_dci_req[CC_id];
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][ra->bwp_id][coresetid];
if (!pdcch_pdu_rel15) {
nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus];
memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t));
ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
ul_dci_req->numPdus += 1;
nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL);
nr_mac->pdcch_pdu_idx[CC_id][ra->bwp_id][coresetid] = pdcch_pdu_rel15;
}
uint8_t aggregation_level;
uint8_t nr_of_candidates;
find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss);
int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level, 0, 0, nr_of_candidates);
if (CCEIndex < 0) {
LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti);
return;
}
// Fill PDCCH DL DCI PDU
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
pdcch_pdu_rel15->numDlDci++;
dci_pdu->RNTI = ra->rnti;
dci_pdu->ScramblingId = *scc->physCellId;
dci_pdu->ScramblingRNTI = 0;
dci_pdu->AggregationLevel = aggregation_level;
dci_pdu->CceIndex = CCEIndex;
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu_rel15_t uldci_payload;
memset(&uldci_payload, 0, sizeof(uldci_payload));
config_uldci(ubwp,
scc,
pusch_pdu,
&uldci_payload,
NR_UL_DCI_FORMAT_0_0,
ra->Msg3_tda_id,
ra->msg3_TPC,
0, // not used in format 0_0
ra->bwp_id);
fill_dci_pdu_rel15(scc,
ra->CellGroup,
dci_pdu,
&uldci_payload,
NR_UL_DCI_FORMAT_0_0,
NR_RNTI_TC,
pusch_pdu->bwp_size,
ra->bwp_id);
// Mark the corresponding RBs as used
for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
vrb_map_UL[rbStart + bwpStart + rb] = 1;
}
// reset state to wait msg3
ra->state = WAIT_Msg3;
ra->Msg3_frame = sched_frame;
ra->Msg3_slot = sched_slot;
}
}
void nr_get_Msg3alloc(module_id_t module_id,
int CC_id,
@@ -690,45 +885,45 @@ void nr_get_Msg3alloc(module_id_t module_id,
NR_RA_t *ra,
int16_t *tdd_beam_association) {
// msg3 is schedulend in mixed slot in the following TDD period
// msg3 is scheduled in mixed slot in the following TDD period
uint16_t msg3_nb_rb = 8 + sizeof(NR_MAC_SUBHEADER_SHORT) + sizeof(NR_MAC_SUBHEADER_SHORT); // sdu has 6 or 8 bytes
uint16_t msg3_nb_rb = 8 + sizeof(NR_MAC_SUBHEADER_SHORT) + sizeof(NR_MAC_SUBHEADER_SHORT); // sdu has 6 or 8 bytes
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int StartSymbolIndex = 0;
int NrOfSymbols = 0;
int startSymbolAndLength = 0;
int temp_slot = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int StartSymbolIndex = 0;
int NrOfSymbols = 0;
int startSymbolAndLength = 0;
int temp_slot = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList= ubwp ?
ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList:
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList= ubwp ?
ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList:
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
uint8_t k2 = 0;
for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
// we want to transmit in the uplink symbols of mixed slot
if (NrOfSymbols == scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols) {
k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2;
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) {
ra->Msg3_tda_id = i;
break;
}
uint8_t k2 = 0;
for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
// we want to transmit in the uplink symbols of mixed slot
if (NrOfSymbols == scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols) {
k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2;
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) {
ra->Msg3_tda_id = i;
break;
}
}
}
AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n");
AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n");
if (nr_slots_per_frame[mu]>temp_slot)
ra->Msg3_frame = current_frame;
else
ra->Msg3_frame = (current_frame + (temp_slot/nr_slots_per_frame[mu]))%1024;
if (nr_slots_per_frame[mu]>temp_slot)
ra->Msg3_frame = current_frame;
else
ra->Msg3_frame = (current_frame + (temp_slot/nr_slots_per_frame[mu]))%1024;
// beam association for FR2
if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
@@ -750,7 +945,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,
MAX_BWP_SIZE);
/* search msg3_nb_rb free RBs */
/* search msg3_nb_rb free RBs */
int rbSize = 0;
int rbStart = 0;
while (rbSize < msg3_nb_rb) {
@@ -768,6 +963,75 @@ void nr_get_Msg3alloc(module_id_t module_id,
ra->msg3_first_rb = rbStart;
}
void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_ServingCellConfigCommon_t *scc,
int round,
int startSymbolAndLength,
rnti_t rnti, int scs,
int bwp_size, int bwp_start,
int mappingtype, int fh,
int msg3_first_rb, int msg3_nb_rb) {
int start_symbol_index,nr_of_symbols;
SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_pdu->rnti = rnti;
pusch_pdu->handle = 0;
pusch_pdu->bwp_start = bwp_start;
pusch_pdu->bwp_size = bwp_size;
pusch_pdu->subcarrier_spacing = scs;
pusch_pdu->cyclic_prefix = 0;
pusch_pdu->mcs_index = 0;
pusch_pdu->mcs_table = 0;
pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
pusch_pdu->transform_precoding = 1;
else
pusch_pdu->transform_precoding = 0;
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->ul_dmrs_symb_pos = get_l_prime(nr_of_symbols,mappingtype,pusch_dmrs_pos2,pusch_len1,start_symbol_index, scc->dmrs_TypeA_Position);
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos);
pusch_pdu->dmrs_config_type = 0;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
pusch_pdu->dmrs_ports = 1; // 6.2.2 in 38.214 only port 0 to be used
pusch_pdu->num_dmrs_cdm_grps_no_data = 2; // no data in dmrs symbols as in 6.2.2 in 38.214
pusch_pdu->resource_alloc = 1; //type 1
pusch_pdu->rb_start = msg3_first_rb;
if (msg3_nb_rb > pusch_pdu->bwp_size)
AssertFatal(1==0,"MSG3 allocated number of RBs exceed the BWP size\n");
else
pusch_pdu->rb_size = msg3_nb_rb;
pusch_pdu->vrb_to_prb_mapping = 0;
pusch_pdu->frequency_hopping = fh;
//pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
pusch_pdu->uplink_frequency_shift_7p5khz = 0;
//Resource Allocation in time domain
pusch_pdu->start_symbol_index = start_symbol_index;
pusch_pdu->nr_of_symbols = nr_of_symbols;
//Optional Data only included if indicated in pduBitmap
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[round];
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = 1;
pusch_pdu->pusch_data.num_cb = 0;
pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order,
pusch_pdu->target_code_rate,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
12, // nb dmrs set for no data in dmrs symbol
0, //nb_rb_oh
0, // to verify tb scaling
pusch_pdu->nrOfLayers)>>3;
}
void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra, uint8_t *RAR_pdu)
{
gNB_MAC_INST *mac = RC.nrmac[module_idP];
@@ -790,7 +1054,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
vrb_map_UL[i + ra->msg3_first_rb] = 1;
}
LOG_D(NR_MAC, "[gNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot);
LOG_D(NR_MAC, "[gNB %d][RAPROC] Frame %d, Slot %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot);
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[CC_id][ra->Msg3_slot];
AssertFatal(future_ul_tti_req->SFN == ra->Msg3_frame
@@ -804,7 +1068,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
future_ul_tti_req->n_pdus += 1;
int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int ibwp_start = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int abwp_size = ibwp_size;
@@ -837,67 +1101,20 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
ra->msg3_round,
ra->rnti);
int start_symbol_index,nr_of_symbols;
SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_pdu->rnti = ra->rnti;
pusch_pdu->handle = 0;
int bwp_start;
if ((ibwp_start < abwp_start) || (ibwp_size > abwp_size))
pusch_pdu->bwp_start = abwp_start;
bwp_start = abwp_start;
else
pusch_pdu->bwp_start = ibwp_start;
pusch_pdu->bwp_size = ibwp_size;
pusch_pdu->subcarrier_spacing = scs;
pusch_pdu->cyclic_prefix = 0;
pusch_pdu->mcs_index = 0;
pusch_pdu->mcs_table = 0;
pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
pusch_pdu->transform_precoding = 1;
else
pusch_pdu->transform_precoding = 0;
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
bwp_start = ibwp_start;
pusch_pdu->ul_dmrs_symb_pos = get_l_prime(nr_of_symbols,mappingtype,pusch_dmrs_pos2,pusch_len1,start_symbol_index, scc->dmrs_TypeA_Position);
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos);
pusch_pdu->dmrs_config_type = 0;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
pusch_pdu->dmrs_ports = 1; // 6.2.2 in 38.214 only port 0 to be used
pusch_pdu->num_dmrs_cdm_grps_no_data = 2; // no data in dmrs symbols as in 6.2.2 in 38.214
pusch_pdu->resource_alloc = 1; //type 1
//pusch_pdu->rb_start = ra->msg3_first_rb + ibwp_start - abwp_start; // as for 6.3.1.7 in 38.211
pusch_pdu->rb_start = ra->msg3_first_rb;
if (ra->msg3_nb_rb > pusch_pdu->bwp_size)
AssertFatal(1==0,"MSG3 allocated number of RBs exceed the BWP size\n");
else
pusch_pdu->rb_size = ra->msg3_nb_rb;
pusch_pdu->vrb_to_prb_mapping = 0;
pusch_pdu->frequency_hopping = fh;
//pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
pusch_pdu->uplink_frequency_shift_7p5khz = 0;
//Resource Allocation in time domain
pusch_pdu->start_symbol_index = start_symbol_index;
pusch_pdu->nr_of_symbols = nr_of_symbols;
//Optional Data only included if indicated in pduBitmap
pusch_pdu->pusch_data.rv_index = 0; // 8.3 in 38.213
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = 1; // new data
pusch_pdu->pusch_data.num_cb = 0;
pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order,
pusch_pdu->target_code_rate,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
12, // nb dmrs set for no data in dmrs symbol
0, //nb_rb_oh
0, // to verify tb scaling
pusch_pdu->nrOfLayers = 1)>>3;
fill_msg3_pusch_pdu(pusch_pdu,scc,
ra->msg3_round,
startSymbolAndLength,
ra->rnti, scs,
ibwp_size, bwp_start,
mappingtype, fh,
ra->msg3_first_rb, ra->msg3_nb_rb);
future_ul_tti_req->n_pdus += 1;
// calling function to fill rar message
nr_fill_rar(module_idP, ra, RAR_pdu, pusch_pdu);
@@ -1000,7 +1217,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
dl_req->nPDUs += 1;
pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, bwp);
nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL);
nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15;
}
@@ -1210,11 +1427,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
long BWPSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
long BWPStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
/* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
int current_harq_pid = sched_ctrl->retrans_dl_harq.head;
// HARQ management
AssertFatal(sched_ctrl->available_dl_harq.head >= 0,
"UE context not initialized: no HARQ processes found\n");
int current_harq_pid = sched_ctrl->available_dl_harq.head;
remove_front_nr_list(&sched_ctrl->available_dl_harq);
if (current_harq_pid < 0) {
AssertFatal(sched_ctrl->available_dl_harq.head >= 0,
"UE context not initialized: no HARQ processes found\n");
current_harq_pid = sched_ctrl->available_dl_harq.head;
remove_front_nr_list(&sched_ctrl->available_dl_harq);
}
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
DevAssert(!harq->is_waiting);
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
@@ -1247,18 +1468,19 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
harq->feedback_slot = pucch->ul_slot;
harq->feedback_frame = pucch->frame;
// Bytes to be transmitted
uint8_t *buf = (uint8_t *) harq->tb;
uint16_t mac_pdu_length = nr_write_ce_dlsch_pdu(module_idP, nr_mac->sched_ctrlCommon, buf, 255, ra->cont_res_id);
LOG_D(NR_MAC,"Encoded contention resolution mac_pdu_length %d\n",mac_pdu_length);
uint16_t mac_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, CCCH, ra->rnti, 1, &buf[mac_pdu_length+2]);
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->R = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->F = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->LCID = DL_SCH_LCID_CCCH;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->L = mac_sdu_length;
mac_pdu_length = mac_pdu_length + mac_sdu_length + sizeof(NR_MAC_SUBHEADER_SHORT);
LOG_D(NR_MAC,"Encoded RRCSetup Piggyback (%d + %d bytes), mac_pdu_length %d\n", mac_sdu_length, (int)sizeof(NR_MAC_SUBHEADER_SHORT), mac_pdu_length);
// Bytes to be transmitted
if (harq->round == 0) {
uint16_t mac_pdu_length = nr_write_ce_dlsch_pdu(module_idP, nr_mac->sched_ctrlCommon, buf, 255, ra->cont_res_id);
LOG_D(NR_MAC,"Encoded contention resolution mac_pdu_length %d\n",mac_pdu_length);
uint16_t mac_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, CCCH, ra->rnti, 1, &buf[mac_pdu_length+2]);
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->R = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->F = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->LCID = DL_SCH_LCID_CCCH;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->L = mac_sdu_length;
ra->mac_pdu_length = mac_pdu_length + mac_sdu_length + sizeof(NR_MAC_SUBHEADER_SHORT);
LOG_D(NR_MAC,"Encoded RRCSetup Piggyback (%d + %d bytes), mac_pdu_length %d\n", mac_sdu_length, (int)sizeof(NR_MAC_SUBHEADER_SHORT), ra->mac_pdu_length);
}
// Calculate number of symbols
int startSymbolIndex, nrOfSymbols;
@@ -1319,12 +1541,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
harq->tb_size = nr_compute_tbs(nr_get_Qm_dl(mcsIndex, mcsTableIdx),
nr_get_code_rate_dl(mcsIndex, mcsTableIdx),
rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
} while (rbStart + rbSize < BWPSize && !vrb_map[rbStart + rbSize] && harq->tb_size < mac_pdu_length);
} while (rbSize < BWPSize && harq->tb_size < ra->mac_pdu_length);
for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
int i = 0;
while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
if (vrb_map[rbStart + i]) {
rbStart += i;
rbStart += i+1;
i = 0;
} else {
i++;
}
}
@@ -1353,7 +1578,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
dl_req->nPDUs += 1;
pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, bwp);
nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL);
nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15;
}
@@ -1470,15 +1695,18 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
bwpid);
// Add padding header and zero rest out if there is space left
if (mac_pdu_length < harq->tb_size) {
NR_MAC_SUBHEADER_FIXED *padding = (NR_MAC_SUBHEADER_FIXED *) &buf[mac_pdu_length];
if (ra->mac_pdu_length < harq->tb_size) {
NR_MAC_SUBHEADER_FIXED *padding = (NR_MAC_SUBHEADER_FIXED *) &buf[ra->mac_pdu_length];
padding->R = 0;
padding->LCID = DL_SCH_LCID_PADDING;
for(int k = mac_pdu_length+1; k<harq->tb_size; k++) {
for(int k = ra->mac_pdu_length+1; k<harq->tb_size; k++) {
buf[k] = 0;
}
}
T(T_GNB_MAC_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(ra->rnti),
T_INT(frameP), T_INT(slotP), T_INT(current_harq_pid), T_BUFFER(harq->tb, harq->tb_size));
// DL TX request
nfapi_nr_pdu_t *tx_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs];
memcpy(tx_req->TLVs[0].value.direct, harq->tb, sizeof(uint8_t) * harq->tb_size);
@@ -1522,24 +1750,32 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
NR_UE_harq_t *harq = &UE_info->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid];
NR_mac_stats_t *stats = &UE_info->mac_stats[UE_id];
LOG_D(NR_MAC, "ue %d, rnti %d, harq is waiting %d, round %d, frame %d %d, harq id %d\n", UE_id, ra->rnti, harq->is_waiting, harq->round, frame, slot, current_harq_pid);
if (harq->is_waiting == 0)
{
if (harq->round == 0)
{
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) Received Ack of RA-Msg4. CBRA procedure succeeded!\n", UE_id, ra->rnti);
nr_clear_ra_proc(module_id, CC_id, frame, ra);
UE_info->active[UE_id] = true;
UE_info->Msg4_ACKed[UE_id] = true;
if (harq->is_waiting == 0) {
if (harq->round == 0) {
if (stats->dlsch_errors == 0) {
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) Received Ack of RA-Msg4. CBRA procedure succeeded!\n", UE_id, ra->rnti);
nr_clear_ra_proc(module_id, CC_id, frame, ra);
UE_info->active[UE_id] = true;
UE_info->Msg4_ACKed[UE_id] = true;
}
else {
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) RA Procedure failed at Msg4!\n", UE_id, ra->rnti);
nr_mac_remove_ra_rnti(module_id, ra->rnti);
nr_clear_ra_proc(module_id, CC_id, frame, ra);
mac_remove_nr_ue(module_id, ra->rnti);
}
}
else
{
else {
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) Received Nack of RA-Msg4. Preparing retransmission!\n", UE_id, ra->rnti);
ra->Msg4_frame = (frame + 1) % 1024;
ra->Msg4_slot = 1;
ra->state = Msg4;
}
}
}
void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, NR_RA_t *ra){
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+58 -64
View File
@@ -220,6 +220,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
scs,
FR1,
i_ssb,
ssb_frame_periodicity,
offset_pointa);
gNB->type0_PDCCH_CSS_config[i_ssb].active = true;
}
@@ -246,6 +247,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
scs,
FR1,
i_ssb,
ssb_frame_periodicity,
offset_pointa);
gNB->type0_PDCCH_CSS_config[i_ssb].active = true;
}
@@ -280,6 +282,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
scs,
FR2,
i_ssb,
ssb_frame_periodicity,
offset_pointa);
gNB->type0_PDCCH_CSS_config[i_ssb].active = true;
}
@@ -313,40 +316,43 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, uint16_t symStart
}
void schedule_control_sib1(module_id_t module_id,
int CC_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
uint8_t mcsTableIdx,
uint8_t mcs,
uint8_t candidate_idx,
int num_total_bytes) {
uint32_t schedule_control_sib1(module_id_t module_id,
int CC_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
int startSymbolIndex,
int nrOfSymbols,
uint16_t dlDmrsSymbPos,
uint8_t candidate_idx,
int num_total_bytes) {
gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
NR_ServingCellConfigCommon_t *servingcellconfigcommon = gNB_mac->common_channels[CC_id].ServingCellConfigCommon;
uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
int ret;
if (gNB_mac->sched_ctrlCommon == NULL){
LOG_D(NR_MAC,"schedule_control_common: Filling nr_mac->sched_ctrlCommon\n");
gNB_mac->sched_ctrlCommon = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon));
gNB_mac->sched_ctrlCommon->search_space = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->search_space));
gNB_mac->sched_ctrlCommon->coreset = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->coreset));
gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp));
fill_default_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space);
fill_default_coresetZero(gNB_mac->sched_ctrlCommon->coreset,servingcellconfigcommon);
fill_default_initialDownlinkBWP(gNB_mac->sched_ctrlCommon->active_bwp,servingcellconfigcommon);
for (int i=0; i<3; i++){ // loop over possible aggregation levels
ret = fill_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space,type0_PDCCH_CSS_config,4<<i);
if (ret == 1) break;
}
AssertFatal(ret==1,"No aggregation level for type0_PDCCH_CSS found\n");
fill_coresetZero(gNB_mac->sched_ctrlCommon->coreset,type0_PDCCH_CSS_config);
}
gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation;
gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx = mcsTableIdx;
gNB_mac->sched_ctrlCommon->sched_pdsch.mcs = mcs;
gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx = 0;
gNB_mac->sched_ctrlCommon->sched_pdsch.mcs = 0; // starting from mcs 0
gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes;
uint8_t nr_of_candidates;
find_aggregation_candidates(&gNB_mac->sched_ctrlCommon->aggregation_level, &nr_of_candidates, gNB_mac->sched_ctrlCommon->search_space);
gNB_mac->sched_ctrlCommon->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
gNB_mac->sched_ctrlCommon->active_bwp,
NULL,
gNB_mac->sched_ctrlCommon->coreset,
gNB_mac->sched_ctrlCommon->aggregation_level,
0,
@@ -358,17 +364,6 @@ void schedule_control_sib1(module_id_t module_id,
const uint16_t bwpSize = type0_PDCCH_CSS_config->num_rbs;
int rbStart = type0_PDCCH_CSS_config->cset_start_rb;
int startSymbolIndex = 0;
int nrOfSymbols = 0;
if(gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position == 0) {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][2];
} else {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][2];
}
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
@@ -380,22 +375,32 @@ void schedule_control_sib1(module_id_t module_id,
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos);
int rbSize = 0;
uint32_t TBS = 0;
do {
rbSize++;
if(rbSize < bwpSize && !vrb_map[rbStart + rbSize])
rbSize++;
else{
if (gNB_mac->sched_ctrlCommon->sched_pdsch.mcs<10)
gNB_mac->sched_ctrlCommon->sched_pdsch.mcs++;
else
break;
}
TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx),
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx),
rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0, 0,1) >> 3;
} while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && TBS < gNB_mac->sched_ctrlCommon->num_total_bytes);
} while (TBS < gNB_mac->sched_ctrlCommon->num_total_bytes);
AssertFatal(TBS>=gNB_mac->sched_ctrlCommon->num_total_bytes,"Couldn't allocate enough resources for %d bytes in SIB1 PDSCH\n",
gNB_mac->sched_ctrlCommon->num_total_bytes);
gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize = rbSize;
gNB_mac->sched_ctrlCommon->sched_pdsch.rbStart = 0;
LOG_D(MAC,"mcs = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.mcs);
LOG_D(MAC,"startSymbolIndex = %i\n", startSymbolIndex);
LOG_D(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
LOG_D(MAC, "rbSize = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize);
@@ -408,6 +413,7 @@ void schedule_control_sib1(module_id_t module_id,
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
vrb_map[rb + rbStart] = 1;
}
return TBS;
}
void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
@@ -421,7 +427,6 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = gNB_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_BWP_Downlink_t *bwp = gNB_mac->sched_ctrlCommon->active_bwp;
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
@@ -433,11 +438,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
gNB_mac->sched_ctrlCommon->search_space,
gNB_mac->sched_ctrlCommon->coreset,
scc,
bwp);
// TODO: This assignment should be done in function nr_configure_pdcch()
pdcch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs;
pdcch_pdu_rel15->BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
NULL,
type0_PDCCH_CSS_config);
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
@@ -455,12 +457,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs;
pdsch_pdu_rel15->BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
if (bwp->bwp_Common->genericParameters.cyclicPrefix) {
pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
} else {
pdsch_pdu_rel15->CyclicPrefix = 0;
}
pdsch_pdu_rel15->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch;
pdsch_pdu_rel15->CyclicPrefix = 0;
pdsch_pdu_rel15->NrOfCodewords = 1;
pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, 0);
@@ -505,7 +503,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
dci_pdu_rel15_t dci_payload;
memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
dci_payload.bwp_indicator.val = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id;
dci_payload.bwp_indicator.val = 0;
// frequency domain assignment
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(
@@ -533,7 +531,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
dci_format,
rnti_type,
pdsch_pdu_rel15->BWPSize,
gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id);
0);
LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
LOG_D(MAC,"BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
@@ -556,14 +554,13 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// TODO: Get these values from RRC
const int CC_id = 0;
int time_domain_allocation = 0;
uint8_t mcsTableIdx = 0;
uint8_t mcs = 6;
uint8_t candidate_idx = 0;
gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[CC_id].ServingCellConfigCommon;
int time_domain_allocation = gNB_mac->sib1_tda;
int L_max;
switch (scc->ssb_PositionsInBurst->present) {
case 1:
@@ -599,30 +596,27 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
for (int k=0;k<sib1_sdu_length;k++)
LOG_D(NR_MAC,"byte %d : %x\n",k,((uint8_t*)sib1_payload)[k]);
// Configure sched_ctrlCommon for SIB1
schedule_control_sib1(module_idP, CC_id, type0_PDCCH_CSS_config, time_domain_allocation, mcsTableIdx, mcs, candidate_idx, sib1_sdu_length);
int startSymbolIndex = 0;
int nrOfSymbols = 0;
if(gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position == 0) {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][2];
} else {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][2];
}
get_info_from_tda_tables(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern,
time_domain_allocation,
gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
1, &startSymbolIndex, &nrOfSymbols);
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3) ? typeA : typeB;
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
const uint32_t TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx),
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx),
gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0 ,0 ,1 ) >> 3;
// Configure sched_ctrlCommon for SIB1
uint32_t TBS = schedule_control_sib1(module_idP, CC_id,
type0_PDCCH_CSS_config,
time_domain_allocation,
startSymbolIndex,
nrOfSymbols,
dlDmrsSymbPos,
candidate_idx, sib1_sdu_length);
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+24 -26
View File
@@ -47,6 +47,7 @@
/*Softmodem params*/
#include "executables/softmodem-common.h"
#include "../../../nfapi/oai_integration/vendor_ext.h"
////////////////////////////////////////////////////////
/////* DLSCH MAC PDU generation (6.1.2 TS 38.321) */////
@@ -454,9 +455,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
int rbStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
const uint8_t num_dmrs_cdm_grps_no_data = sched_ctrl->active_bwp ? (f ? 1 : (ps->nrOfSymbols == 2 ? 1 : 2)) : (ps->nrOfSymbols == 2 ? 1 : 2);
const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
int rbSize = 0;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
if (tda == retInfo->time_domain_allocation) {
@@ -475,9 +474,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
}
/* check whether we need to switch the TDA allocation since the last
* (re-)transmission */
if (ps->time_domain_allocation != tda || ps->numDmrsCdmGrpsNoData != num_dmrs_cdm_grps_no_data)
nr_set_pdsch_semi_static(
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, num_dmrs_cdm_grps_no_data, ps);
if (ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, f, ps);
} else {
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
@@ -486,8 +484,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize])
rbSize++;
NR_pdsch_semi_static_t temp_ps;
nr_set_pdsch_semi_static(
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, num_dmrs_cdm_grps_no_data, &temp_ps);
temp_ps.nrOfLayers = 1;
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, f, &temp_ps);
uint32_t new_tbs;
uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm,
@@ -603,7 +601,7 @@ void pf_dl(module_id_t module_id,
/* Calculate coeff */
sched_pdsch->mcs = 9;
sched_pdsch->nrOfLayers = 1;
ps->nrOfLayers = 1;
uint32_t tbs = pf_tbs[ps->mcsTableIdx][sched_pdsch->mcs];
coeff_ue[UE_id] = (float) tbs / thr_ue[UE_id];
LOG_D(NR_MAC,"b %d, thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n",
@@ -674,6 +672,7 @@ void pf_dl(module_id_t module_id,
// Freq-demain allocation
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
uint16_t max_rbSize = 1;
while (rbStart + max_rbSize < bwpSize && rballoc_mask[rbStart + max_rbSize])
max_rbSize++;
@@ -682,11 +681,9 @@ void pf_dl(module_id_t module_id,
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
const uint8_t num_dmrs_cdm_grps_no_data = sched_ctrl->active_bwp ? (f ? 1 : (ps->nrOfSymbols == 2 ? 1 : 2)) : (ps->nrOfSymbols == 2 ? 1 : 2);
if (ps->time_domain_allocation != tda || ps->numDmrsCdmGrpsNoData != num_dmrs_cdm_grps_no_data)
nr_set_pdsch_semi_static(
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, num_dmrs_cdm_grps_no_data, ps);
const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
if (ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, f, ps);
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
sched_pdsch->pucch_allocation = alloc;
@@ -820,17 +817,17 @@ void nr_schedule_ue_spec(module_id_t module_id,
const rnti_t rnti = UE_info->rnti[UE_id];
/* POST processing */
const uint8_t nrOfLayers = sched_pdsch->nrOfLayers;
const uint16_t R = sched_pdsch->R;
const uint8_t Qm = sched_pdsch->Qm;
const uint32_t TBS = sched_pdsch->tb_size;
/* pre-computed PDSCH values that only change if time domain
* allocation/DMRS parameters change. Updated in the preprocessor through
* nr_set_pdsch_semi_static() */
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
/* POST processing */
const uint8_t nrOfLayers = ps->nrOfLayers;
const uint16_t R = sched_pdsch->R;
const uint8_t Qm = sched_pdsch->Qm;
const uint32_t TBS = sched_pdsch->tb_size;
int8_t current_harq_pid = sched_pdsch->dl_harq_pid;
if (current_harq_pid < 0) {
/* PP has not selected a specific HARQ Process, get a new one */
@@ -877,6 +874,10 @@ void nr_schedule_ue_spec(module_id_t module_id,
/* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not
* exist, create it */
// BWP
NR_BWP_t *genericParameters = bwp ? &bwp->bwp_Common->genericParameters : &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
const int bwpid = bwp ? bwp->bwp_Id : 0;
const int coresetid = bwp ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid];
@@ -890,7 +891,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
LOG_D(NR_MAC,"Trying to configure DL pdcch for bwp %d, cs %d\n",bwpid,coresetid);
NR_SearchSpace_t *ss = bwp ? sched_ctrl->search_space:gNB_mac->sched_ctrlCommon->search_space;
NR_ControlResourceSet_t *coreset = bwp? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, bwp);
nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, genericParameters, NULL);
gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu;
}
@@ -909,9 +910,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
const int pduindex = gNB_mac->pdu_index[CC_id]++;
pdsch_pdu->pduIndex = pduindex;
// BWP
NR_BWP_t *genericParameters = bwp ? &bwp->bwp_Common->genericParameters : &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
pdsch_pdu->BWPSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
pdsch_pdu->BWPStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
pdsch_pdu->SubcarrierSpacing = genericParameters->subcarrierSpacing;
@@ -940,7 +938,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu->SCID = 0;
pdsch_pdu->numDmrsCdmGrpsNoData = ps->numDmrsCdmGrpsNoData;
pdsch_pdu->dmrsPorts = 1;
pdsch_pdu->dmrsPorts = (1<<nrOfLayers)-1; // FIXME with a better implementation
// Pdsch Allocation in frequency domain
pdsch_pdu->resourceAlloc = 1;
@@ -1022,7 +1020,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213
dci_payload.pucch_resource_indicator = pucch->resource_indicator;
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch->timing_indicator; // PDSCH to HARQ TI
dci_payload.antenna_ports.val = 0; // nb of cdm groups w/o data 1 and dmrs port 0
dci_payload.antenna_ports.val = ps->dmrs_ports_id;
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
LOG_D(NR_MAC,
"%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+7 -6
View File
@@ -166,10 +166,10 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
scc->dmrs_TypeA_Position,
NrOfSymbols,
StartSymbolIndex,
mappingtype);
scc->dmrs_TypeA_Position,
NrOfSymbols,
StartSymbolIndex,
mappingtype);
/*
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
@@ -369,11 +369,12 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch->rbSize = rbSize;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
const uint8_t num_dmrs_cdm_grps_no_data = 1;
ps->nrOfLayers = target_dl_Nl;
if (ps->time_domain_allocation != tda || ps->numDmrsCdmGrpsNoData != num_dmrs_cdm_grps_no_data)
nr_set_pdsch_semi_static(
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, num_dmrs_cdm_grps_no_data, ps);
sched_pdsch->nrOfLayers = target_dl_Nl;
sched_pdsch->mcs = target_dl_mcs;
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
@@ -384,7 +385,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
sched_pdsch->nrOfLayers)
ps->nrOfLayers)
>> 3;
/* get the PID of a HARQ process awaiting retransmission, or -1 otherwise */
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+98 -44
View File
@@ -122,6 +122,36 @@ static inline uint8_t get_max_cces(uint8_t scs) {
return (nr_max_number_of_cces_per_slot[scs]);
}
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) {
//TODO first basic implementation of dmrs port selection
// only vaild for a single codeword
// for now it assumes a selection of Nl consecutive dmrs ports
// and a single front loaded symbol
// dmrs_ports_id is the index of Tables 7.3.1.2.2-1/2/3/4
switch (ps->nrOfLayers) {
case 1:
ps->dmrs_ports_id = 0;
ps->numDmrsCdmGrpsNoData = 1;
break;
case 2:
ps->dmrs_ports_id = 2;
ps->numDmrsCdmGrpsNoData = 1;
break;
case 3:
ps->dmrs_ports_id = 9;
ps->numDmrsCdmGrpsNoData = 2;
break;
case 4:
ps->dmrs_ports_id = 10;
ps->numDmrsCdmGrpsNoData = 2;
break;
default:
AssertFatal(1==0,"Number of layers %d\n not supported or not valid\n",ps->nrOfLayers);
}
}
NR_ControlResourceSet_t *get_coreset(NR_ServingCellConfigCommon_t *scc,
NR_BWP_Downlink_t *bwp,
NR_SearchSpace_t *ss,
@@ -178,9 +208,6 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
uint16_t Y,
int m,
int nr_of_candidates) {
// uncomment these when we allocate for common search space
// NR_COMMON_channels_t *cc = nr_mac->common_channels;
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int coreset_id = coreset->controlResourceSetId;
@@ -269,7 +296,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *secondaryCellGroup,
const NR_BWP_Downlink_t *bwp,
int tda,
uint8_t num_dmrs_cdm_grps_no_data,
const long dci_format,
NR_pdsch_semi_static_t *ps)
{
ps->time_domain_allocation = tda;
@@ -295,12 +322,13 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
}
else ps->mcsTableIdx = 0;
ps->numDmrsCdmGrpsNoData = num_dmrs_cdm_grps_no_data;
if(dci_format == 0) // format 1_0
ps->numDmrsCdmGrpsNoData = (ps->nrOfSymbols == 2 ? 1 : 2);
else
set_dl_dmrs_ports(ps);
ps->dmrsConfigType = bwp!=NULL ? (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
ps->N_PRB_DMRS = num_dmrs_cdm_grps_no_data * (ps->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
ps->N_PRB_DMRS = ps->numDmrsCdmGrpsNoData * (ps->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
ps->dl_dmrs_symb_pos = fill_dmrs_mask(bwp ? bwp->bwp_Dedicated->pdsch_Config->choice.setup : NULL, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex, mapping_type);
ps->N_DMRS_SLOT = get_num_dmrs(ps->dl_dmrs_symb_pos);
}
@@ -607,6 +635,7 @@ void config_uldci(const NR_BWP_Uplink_t *ubwp,
uint8_t tpc,
int n_ubwp,
int bwp_id) {
const int bw = NRRIV2BW(ubwp ?
ubwp->bwp_Common->genericParameters.locationAndBandwidth :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -678,25 +707,33 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
NR_SearchSpace_t *ss,
NR_ControlResourceSet_t *coreset,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_Downlink_t *bwp)
{
NR_BWP_t *genericParameters = bwp ? &bwp->bwp_Common->genericParameters : &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
NR_BWP_t *bwp,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) {
pdcch_pdu->BWPSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
pdcch_pdu->SubcarrierSpacing = genericParameters->subcarrierSpacing;
pdcch_pdu->CyclicPrefix = genericParameters->cyclicPrefix ? *genericParameters->cyclicPrefix:0;
int sps;
if (bwp) { // This is not for SIB1
pdcch_pdu->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE);
pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE);
pdcch_pdu->SubcarrierSpacing = bwp->subcarrierSpacing;
pdcch_pdu->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix;
// first symbol
//AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
int sps = genericParameters->cyclicPrefix == NULL ? 14 : 12;
//AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
sps = bwp->cyclicPrefix == NULL ? 14 : 12;
}
else {
pdcch_pdu->BWPSize = type0_PDCCH_CSS_config->num_rbs;
pdcch_pdu->BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
pdcch_pdu->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch;
pdcch_pdu->CyclicPrefix = 0;
sps = 14;
}
AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n");
AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n");
// for SPS=14 8 MSBs in positions 13 downto 6
uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) |
(ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
(ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
for (int i=0; i<sps; i++) {
if ((monitoringSymbolsWithinSlot>>(sps-1-i))&1) {
@@ -716,8 +753,10 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
if (pdcch_pdu->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
pdcch_pdu->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize);
pdcch_pdu->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize==NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize);
pdcch_pdu->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize ==
NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize);
pdcch_pdu->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize ==
NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize);
AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n");
pdcch_pdu->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId;
}
@@ -728,7 +767,10 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
}
if(coreset->controlResourceSetId == 0) {
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
if(bwp == NULL)
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
else
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0;
} else{
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
}
@@ -1385,41 +1427,53 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
break;
case NFAPI_NR_RNTI_TC:
// indicating a DL DCI format 1bit
*dci_pdu |= (dci_pdu_rel15->format_indicator & 1) << (dci_size - pos++);
// indicating a UL DCI format 1bit
pos=1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos);
// Freq domain assignment max 16 bit
fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1));
for (int i = 0; i < fsize; i++)
*dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++);
pos+=fsize;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos);
// Time domain assignment 4bit
for (int i = 0; i < 4; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++);
pos += 4;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val & ((1 << 4) - 1)) << (dci_size - pos);
// Frequency hopping flag – 1 bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & 1) << (dci_size - pos++);
pos++;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & 1) << (dci_size - pos);
// MCS 5 bit
for (int i = 0; i < 5; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++);
pos+=5;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos);
// New data indicator 1bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos++);
pos++;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos);
// Redundancy version 2bit
for (int i = 0; i < 2; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->rv >> (1 - i)) & 1) << (dci_size - pos++);
pos+=2;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos);
// HARQ process number 4bit
for (int i = 0; i < 4; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid >> (3 - i)) & 1) << (dci_size - pos++);
// TPC command for scheduled PUSCH – 2 bits
for (int i = 0; i < 2; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc >> (1 - i)) & 1) << (dci_size - pos++);
pos+=4;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos);
// Padding bits
for (int a = pos; a < 32; a++)
*dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++);
// UL/SUL indicator – 1 bit
/*
commented for now (RK): need to get this information from BWP descriptor
if (cfg->pucch_config.pucch_GroupHopping.value)
/* commented for now (RK): need to get this from BWP descriptor
if (cfg->pucch_config.pucch_GroupHopping.value)
*dci_pdu |=
((uint64_t)dci_pdu_rel15->ul_sul_indicator.val&1)<<(dci_size-pos++);
((uint64_t)dci_pdu_rel15->ul_sul_indicator.val&1)<<(dci_size-pos++);
*/
LOG_D(NR_MAC,"N_RB = %i\n", N_RB);
LOG_D(NR_MAC,"dci_size = %i\n", dci_size);
LOG_D(NR_MAC,"fsize = %i\n", fsize);
LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val);
LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val);
LOG_D(NR_MAC,"dci_pdu_rel15->frequency_hopping_flag.val = %i\n", dci_pdu_rel15->frequency_hopping_flag.val);
LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs);
LOG_D(NR_MAC,"dci_pdu_rel15->ndi = %i\n", dci_pdu_rel15->ndi);
LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv);
LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid);
LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc);
LOG_D(NR_MAC,"dci_pdu_rel15->padding = %i\n", dci_pdu_rel15->padding);
break;
}
break;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+3 -2
View File
@@ -487,7 +487,7 @@ void nr_csi_meas_reporting(int Mod_idP,
// preparation is done in first slot of tdd period
if (frame % (period / n_slots_frame) != offset / n_slots_frame)
continue;
LOG_I(MAC, "CSI reporting in frame %d slot %d\n", frame, sched_slot);
LOG_D(MAC, "CSI reporting in frame %d slot %d\n", frame, sched_slot);
const NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0];
const NR_PUCCH_ResourceSet_t *pucchresset = pucch_Config->resourceSetToAddModList->list.array[1]; // set with formats >1
@@ -507,6 +507,7 @@ void nr_csi_meas_reporting(int Mod_idP,
&& curr_pucch->dai_c == 0,
"PUCCH not free at index 1 for UE %04x\n",
UE_info->rnti[UE_id]);
curr_pucch->r_pucch = -1;
curr_pucch->frame = frame;
curr_pucch->ul_slot = sched_slot;
curr_pucch->resource_indicator = res_index;
@@ -985,7 +986,7 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
// verify if report with current id has been scheduled for this frame and slot
if ((n_slots_frame*frame + slot - offset)%period == 0) {
reportQuantity_type = UE_info->csi_report_template[UE_id][csi_report_id].reportQuantity_type;
LOG_I(MAC,"SFN/SF:%d/%d reportQuantity type = %d\n",frame,slot,reportQuantity_type);
LOG_D(MAC,"SFN/SF:%d/%d reportQuantity type = %d\n",frame,slot,reportQuantity_type);
switch(reportQuantity_type){
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP:
evaluate_rsrp_report(UE_info,sched_ctrl,UE_id,csi_report_id,payload,&cumul_bits,reportQuantity_type);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+25 -7
View File
@@ -499,19 +499,26 @@ void abort_nr_ul_harq(module_id_t mod_id, int UE_id, int8_t harq_pid)
sched_ctrl->sched_ul_bytes = 0;
}
void handle_nr_ul_harq(module_id_t mod_id,
void handle_nr_ul_harq(const int CC_idP,
module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
const nfapi_nr_crc_t *crc_pdu)
{
gNB_MAC_INST *gNB_mac = RC.nrmac[mod_id];
int UE_id = find_nr_UE_id(mod_id, crc_pdu->rnti);
if (UE_id < 0) {
for (int i = 0; i < NR_NB_RA_PROC_MAX; ++i) {
NR_RA_t *ra = &gNB_mac->common_channels[CC_idP].ra[i];
if (ra->state >= WAIT_Msg3 &&
ra->rnti == crc_pdu->rnti)
return;
}
LOG_E(NR_MAC, "%s(): unknown RNTI %04x in PUSCH\n", __func__, crc_pdu->rnti);
return;
}
NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
int8_t harq_pid = sched_ctrl->feedback_ul_harq.head;
while (crc_pdu->harq_id != harq_pid || harq_pid < 0) {
LOG_W(NR_MAC,
@@ -574,6 +581,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
const uint16_t timing_advance,
const uint8_t ul_cqi,
const uint16_t rssi){
gNB_MAC_INST *gNB_mac = RC.nrmac[gnb_mod_idP];
NR_UE_info_t *UE_info = &gNB_mac->UE_info;
@@ -758,7 +766,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
nr_process_mac_pdu(gnb_mod_idP, UE_id, CC_idP, frameP, slotP, sduP, sdu_lenP);
ra->state = Msg4;
ra->Msg4_frame = ( frameP +2 ) % 1024;
ra->Msg4_frame = (frameP + 2) % 1024;
ra->Msg4_slot = 1;
LOG_I(NR_MAC, "Scheduling RA-Msg4 for TC_RNTI %04x (state %d, frame %d, slot %d)\n", ra->rnti, ra->state, ra->Msg4_frame, ra->Msg4_slot);
@@ -772,9 +780,19 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
if (ra->state != WAIT_Msg3)
continue;
LOG_W(NR_MAC, "Random Access %i failed at state %i (state is not WAIT_Msg3)\n", i, ra->state);
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
if( (frameP!=ra->Msg3_frame) || (slotP!=ra->Msg3_slot))
continue;
if (ra->msg3_round >= MAX_HARQ_ROUNDS - 1) {
LOG_W(NR_MAC, "Random Access %i failed at state %i (Reached msg3 max harq rounds)\n", i, ra->state);
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
return;
}
LOG_W(NR_MAC, "Random Access %i Msg3 CRC did not pass)\n", i);
ra->msg3_round++;
ra->state = Msg3_retransmission;
}
}
}
@@ -1550,7 +1568,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
ul_dci_req->numPdus += 1;
nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, sched_ctrl->active_bwp);
nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, genericParameters, NULL);
pdcch_pdu_bwp_coreset[bwpid][coresetid] = pdcch_pdu;
}
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+29 -12
View File
@@ -51,6 +51,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int ssb_SubcarrierOffset,
int pdsch_AntennaPorts,
int pusch_AntennaPorts,
int sib1_tda,
NR_ServingCellConfigCommon_t *scc,
int nsa_flag,
uint32_t rnti,
@@ -72,18 +73,19 @@ void nr_schedule_ue_spec(module_id_t module_id,
frame_t frame,
sub_frame_t slot);
uint32_t schedule_control_sib1(module_id_t module_id,
int CC_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
int startSymbolIndex,
int nrOfSymbols,
uint16_t dlDmrsSymbPos,
uint8_t candidate_idx,
int num_total_bytes);
/* \brief default FR1 DL preprocessor init routine, returns preprocessor to call */
nr_pp_impl_dl nr_init_fr1_dlsch_preprocessor(module_id_t module_id, int CC_id);
void schedule_control_sib1(module_id_t module_id,
int CC_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
uint8_t mcsTableIdx,
uint8_t mcs,
uint8_t candidate_idx,
int num_total_bytes);
void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
@@ -124,6 +126,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
NR_RA_t *ra,
int16_t *tdd_beam_association);
void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra);
/* \brief Function in gNB to fill RAR pdu when requested by PHY.
@param ra Instance of RA resources of gNB
@param dlsch_buffer Pointer to RAR input buffer
@@ -134,6 +138,15 @@ void nr_fill_rar(uint8_t Mod_idP,
uint8_t * dlsch_buffer,
nfapi_nr_pusch_pdu_t *pusch_pdu);
void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_ServingCellConfigCommon_t *scc,
int round,
int startSymbolAndLength,
rnti_t rnti, int scs,
int bwp_size, int bwp_start,
int mappingtype, int fh,
int msg3_first_rb, int msg3_nb_rb);
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
@@ -236,7 +249,8 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
NR_SearchSpace_t *ss,
NR_ControlResourceSet_t *coreset,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_Downlink_t *bwp);
NR_BWP_t *bwp,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *CellGroup,
@@ -269,7 +283,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *secondaryCellGroup,
const NR_BWP_Downlink_t *bwp,
int tda,
uint8_t num_dmrs_cdm_grps_no_data,
const long dci_format,
NR_pdsch_semi_static_t *ps);
void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
@@ -388,7 +402,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
const uint8_t ul_cqi,
const uint16_t rssi);
void handle_nr_ul_harq(module_id_t mod_id,
void handle_nr_ul_harq(const int CC_idP,
module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
const nfapi_nr_crc_t *crc_pdu);
@@ -402,6 +417,8 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
void find_SSB_and_RO_available(module_id_t module_idP);
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps);
void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp);
void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ubwp);
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+9 -5
View File
@@ -93,8 +93,9 @@ typedef enum {
RA_IDLE = 0,
Msg2 = 1,
WAIT_Msg3 = 2,
Msg4 = 3,
WAIT_Msg4_ACK = 4
Msg3_retransmission = 3,
Msg4 = 4,
WAIT_Msg4_ACK = 5
} RA_gNB_state_t;
typedef struct NR_preamble_ue {
@@ -156,6 +157,8 @@ typedef struct {
int msg4_TBsize;
/// MCS used for Msg4
int msg4_mcs;
/// MAC PDU length for Msg4
int mac_pdu_length;
/// RA search space
NR_SearchSpace_t *ra_ss;
// Beam index
@@ -365,9 +368,9 @@ typedef struct NR_pdsch_semi_static {
int startSymbolIndex;
int nrOfSymbols;
uint8_t nrOfLayers;
uint8_t mcsTableIdx;
uint8_t dmrs_ports_id;
uint8_t N_PRB_DMRS;
uint8_t N_DMRS_SLOT;
uint16_t dl_dmrs_symb_pos;
@@ -383,7 +386,6 @@ typedef struct NR_sched_pdsch {
uint8_t mcs;
/// TBS-related info
uint8_t nrOfLayers;
uint16_t R;
uint8_t Qm;
uint32_t tb_size;
@@ -670,6 +672,8 @@ typedef struct gNB_MAC_INST_s {
int pusch_failure_thres;
/// Subcarrier Offset
int ssb_SubcarrierOffset;
/// SIB1 Time domain allocation
int sib1_tda;
/// Common cell resources
NR_COMMON_channels_t common_channels[NFAPI_CC_MAX];
/// current PDU index (BCH,DLSCH)
openair2/LAYER2/nr_rlc/nr_rlc_entity_am.c
+1 -1
View File
@@ -218,7 +218,7 @@ static void reassemble_and_deliver(nr_rlc_entity_am_t *entity, int sn)
bad_sdu = 1;
}
if (!bad_sdu && len > 0) {
memcpy(sdu + so, pdu->data, len);
memcpy(sdu + so, pdu->data + so - pdu->so, len);
so += len;
}
free(pdu->data);
openair2/LAYER2/nr_rlc/nr_rlc_entity_um.c
+1 -1
View File
@@ -148,7 +148,7 @@ static void reassemble_and_deliver(nr_rlc_entity_um_t *entity, int sn)
bad_sdu = 1;
}
if (!bad_sdu && len > 0) {
memcpy(sdu + so, pdu->data, len);
memcpy(sdu + so, pdu->data + so - pdu->so, len);
so += len;
}
free(pdu->data);
openair2/LAYER2/nr_rlc/tests/run_tests.sh
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
test_count=15
test_count=17
for i in `seq $test_count`
do
openair2/LAYER2/nr_rlc/tests/test.c
+8 -8
View File
@@ -22,13 +22,13 @@
* create the UE RLC AM entity with given parameters
*
* GNB_UM <rx_maxsize> <tx_maxsize> <t_reassembly> <sn_field_length>
* create the eNB RLC UM entity with given parameters
* create the gNB RLC UM entity with given parameters
*
* UE_UM <rx_maxsize> <tx_maxsize> <t_reassembly> <sn_field_length>
* create the UE RLC UM entity with given parameters
*
* GNB_TM <tx_maxsize>
* create the eNB RLC TM entity with given parameters
* create the gNB RLC TM entity with given parameters
*
* UE_UM <tx_maxsize>
* create the UE RLC TM entity with given parameters
@@ -39,7 +39,7 @@
* You must end your test definition with a line 'TIME, -1'.
*
* GNB_SDU <id> <size>
* send an SDU to eNB with id <i> and size <size>
* send an SDU to gNB with id <i> and size <size>
* the SDU is [00 01 ... ff 01 ...]
* (ie. start byte is 00 then we increment for each byte, loop if needed)
*
@@ -47,10 +47,10 @@
* same as GNB_SDU but the SDU is sent to the UE
*
* GNB_PDU <size> <'size' bytes>
* send a custom PDU from eNB to UE (eNB does not see this PDU at all)
* send a custom PDU from gNB to UE (gNB does not see this PDU at all)
*
* UE_PDU <size> <'size' bytes>
* send a custom PDU from UE to eNB (UE does not see this PDU at all)
* send a custom PDU from UE to gNB (UE does not see this PDU at all)
*
* GNB_PDU_SIZE <size>
* set 'gnb_pdu_size'
@@ -70,7 +70,7 @@
* that the test must fail (ie. exit with non zero, crash not allowed)
*
* GNB_BUFFER_STATUS
* call buffer_status for eNB and print result
* call buffer_status for gNB and print result
*
* UE_BUFFER_STATUS
* call buffer_status for UE and print result
@@ -82,7 +82,7 @@
* discards given SDU
*
* RE_ESTABLISH
* re-establish both eNB and UE
* re-establish both gNB and UE
*/
enum action {
@@ -368,7 +368,7 @@ int test_main(void)
pos += 2;
break;
case RE_ESTABLISH:
printf("TEST: %d: re-establish eNB and UE\n", i);
printf("TEST: %d: re-establish gNB and UE\n", i);
gnb->reestablishment(gnb);
ue->reestablishment(ue);
pos++;
openair2/LAYER2/nr_rlc/tests/test16.h
+19
View File
@@ -0,0 +1,19 @@
/*
* am test (SN field size 18):
* there was a bug when we receive a full PDU after receiving only the
* beginning of it; the data was copied at the end but from the start of the
* full PDU instead of the correct offset. This test captures this case.
* Gnb sends the start of a PDU then the full PDU. That is the SDU is
* [00 .. 09]. First gnb sends [00 .. 08] then it sends [00 .. 09].
*/
TIME, 1,
GNB_AM, 100000, 100000, 45, 35, 0, -1, -1, 8, 18,
UE_AM, 100000, 100000, 45, 35, 0, -1, -1, 8, 18,
GNB_PDU_SIZE, 12,
UE_PDU_SIZE, 20,
GNB_PDU, 12, 0x90, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
TIME, 2,
GNB_PDU_SIZE, 20,
GNB_PDU, 13, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
TIME, -1
openair2/LAYER2/nr_rlc/tests/test16.txt.gz
BIN
View File
Binary file not shown.
openair2/LAYER2/nr_rlc/tests/test17.h
+18
View File
@@ -0,0 +1,18 @@
/*
* um test (SN field size 12):
* same problem as for test16, but we test by sending [00 .. 08] then
* [02 .. 09] (they overlap, the full SDU is [00 .. 09]), which probably
* never occurs in practice but triggers the bug. Doing as for test16 does
* not trigger the bug.
*/
TIME, 1,
GNB_UM, 100000, 100000, 35, 12,
UE_UM, 100000, 100000, 35, 12,
GNB_PDU_SIZE, 8,
UE_PDU_SIZE, 20,
GNB_PDU, 11, 0x40, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
TIME, 2,
GNB_PDU_SIZE, 20,
GNB_PDU, 12, 0x80, 0x00, 0x00, 0x02, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
TIME, -1
openair2/LAYER2/nr_rlc/tests/test17.txt.gz
BIN
View File
Binary file not shown.
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+136 -98
View File
@@ -48,59 +48,83 @@ extern int oai_nfapi_crc_indication(nfapi_crc_indication_t *crc_ind);
extern int oai_nfapi_cqi_indication(nfapi_cqi_indication_t *cqi_ind);
extern int oai_nfapi_sr_indication(nfapi_sr_indication_t *ind);
extern int oai_nfapi_rx_ind(nfapi_rx_indication_t *ind);
extern int oai_nfapi_nr_slot_indication(nfapi_nr_slot_indication_scf_t *ind);
extern int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind);
extern int oai_nfapi_nr_crc_indication(nfapi_nr_crc_indication_t *ind);
extern int oai_nfapi_nr_srs_indication(nfapi_nr_srs_indication_t *ind);
extern int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind);
extern int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind);
extern uint8_t nfapi_mode;
extern uint16_t sf_ahead;
extern uint16_t sl_ahead;
void handle_nr_rach(NR_UL_IND_t *UL_info) {
if (UL_info->rach_ind.number_of_pdus>0) {
LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SLOT:%d/%d\n",UL_info->frame,UL_info->slot, UL_info->rach_ind.sfn,UL_info->rach_ind.slot);
int npdus = UL_info->rach_ind.number_of_pdus;
for(int i = 0; i < npdus; i++) {
UL_info->rach_ind.number_of_pdus--;
if (UL_info->rach_ind.pdu_list[i].num_preamble>0)
AssertFatal(UL_info->rach_ind.pdu_list[i].num_preamble==1,
"More than 1 preamble not supported\n");
nr_initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->rach_ind.sfn,
UL_info->rach_ind.slot,
UL_info->rach_ind.pdu_list[i].preamble_list[0].preamble_index,
UL_info->rach_ind.pdu_list[i].freq_index,
UL_info->rach_ind.pdu_list[i].symbol_index,
UL_info->rach_ind.pdu_list[i].preamble_list[0].timing_advance);
if(NFAPI_MODE == NFAPI_MODE_PNF) {
if (UL_info->rach_ind.number_of_pdus>0) {
LOG_D(PHY,"UL_info->UL_info->rach_ind.number_of_pdus:%d SFN/Slot:%d.%d \n", UL_info->rach_ind.number_of_pdus, UL_info->rach_ind.sfn,UL_info->rach_ind.slot);
oai_nfapi_nr_rach_indication(&UL_info->rach_ind);
UL_info->rach_ind.number_of_pdus = 0;
}
}
else{
if (UL_info->rach_ind.number_of_pdus>0) {
LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SLOT:%d/%d\n",UL_info->frame,UL_info->slot, UL_info->rach_ind.sfn,UL_info->rach_ind.slot);
int npdus = UL_info->rach_ind.number_of_pdus;
for(int i = 0; i < npdus; i++) {
UL_info->rach_ind.number_of_pdus--;
if (UL_info->rach_ind.pdu_list[i].num_preamble>0)
AssertFatal(UL_info->rach_ind.pdu_list[i].num_preamble==1,
"More than 1 preamble not supported\n");
nr_initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->rach_ind.sfn,
UL_info->rach_ind.slot,
UL_info->rach_ind.pdu_list[i].preamble_list[0].preamble_index,
UL_info->rach_ind.pdu_list[i].freq_index,
UL_info->rach_ind.pdu_list[i].symbol_index,
UL_info->rach_ind.pdu_list[i].preamble_list[0].timing_advance);
}
}
}
}
void handle_nr_uci(NR_UL_IND_t *UL_info)
{
const module_id_t mod_id = UL_info->module_id;
const frame_t frame = UL_info->frame;
const sub_frame_t slot = UL_info->slot;
int num_ucis = UL_info->uci_ind.num_ucis;
nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
{
if(NFAPI_MODE == NFAPI_MODE_PNF) {
if (UL_info->uci_ind.num_ucis>0) {
LOG_D(PHY,"PNF Sending UL_info->num_ucis:%d PDU_type: %d, SFN/SF:%d.%d \n", UL_info->uci_ind.num_ucis, UL_info->uci_ind.uci_list[0].pdu_type ,UL_info->frame, UL_info->slot);
oai_nfapi_nr_uci_indication(&UL_info->uci_ind);
UL_info->uci_ind.num_ucis = 0;
}
}
else{
const module_id_t mod_id = UL_info->module_id;
const frame_t frame = UL_info->frame;
const sub_frame_t slot = UL_info->slot;
int num_ucis = UL_info->uci_ind.num_ucis;
nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
LOG_D(MAC,"handling UCI SFN/slot: %d.%d, num_ucis: %d \n", frame,slot, num_ucis);
for (int i = 0; i < num_ucis; i++) {
switch (uci_list[i].pdu_type) {
case NFAPI_NR_UCI_PUSCH_PDU_TYPE:
LOG_E(MAC, "%s(): unhandled NFAPI_NR_UCI_PUSCH_PDU_TYPE\n", __func__);
break;
for (int i = 0; i < num_ucis; i++) {
switch (uci_list[i].pdu_type) {
case NFAPI_NR_UCI_PUSCH_PDU_TYPE:
LOG_E(MAC, "%s(): unhandled NFAPI_NR_UCI_PUSCH_PDU_TYPE\n", __func__);
break;
case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
handle_nr_uci_pucch_0_1(mod_id, frame, slot, uci_pdu);
break;
}
case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
handle_nr_uci_pucch_0_1(mod_id, frame, slot, uci_pdu);
break;
}
case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
handle_nr_uci_pucch_2_3_4(mod_id, frame, slot, uci_pdu);
break;
case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
handle_nr_uci_pucch_2_3_4(mod_id, frame, slot, uci_pdu);
break;
}
}
LOG_D(MAC, "UCI handled \n");
}
}
@@ -109,60 +133,75 @@ void handle_nr_uci(NR_UL_IND_t *UL_info)
void handle_nr_ulsch(NR_UL_IND_t *UL_info)
{
if (UL_info->rx_ind.number_of_pdus > 0 && UL_info->crc_ind.number_crcs > 0) {
for (int i = 0; i < UL_info->rx_ind.number_of_pdus; i++) {
for (int j = 0; j < UL_info->crc_ind.number_crcs; j++) {
// find crc_indication j corresponding rx_indication i
const nfapi_nr_rx_data_pdu_t *rx = &UL_info->rx_ind.pdu_list[i];
const nfapi_nr_crc_t *crc = &UL_info->crc_ind.crc_list[j];
LOG_D(PHY,
"UL_info->crc_ind.pdu_list[%d].rnti:%04x "
"UL_info->rx_ind.pdu_list[%d].rnti:%04x\n",
j,
crc->rnti,
i,
rx->rnti);
if(NFAPI_MODE == NFAPI_MODE_PNF) {
if (UL_info->crc_ind.number_crcs>0) {
LOG_D(PHY,"UL_info->UL_info->crc_ind.number_crcs:%d CRC_IND:SFN/Slot:%d.%d\n", UL_info->crc_ind.number_crcs, UL_info->crc_ind.sfn, UL_info->crc_ind.slot);
oai_nfapi_nr_crc_indication(&UL_info->crc_ind);
UL_info->crc_ind.number_crcs = 0;
}
if (crc->rnti != rx->rnti)
continue;
if (UL_info->rx_ind.number_of_pdus>0) {
LOG_D(PHY,"UL_info->rx_ind.number_of_pdus:%d RX_IND:SFN/Slot:%d.%d \n", UL_info->rx_ind.number_of_pdus, UL_info->rx_ind.sfn, UL_info->rx_ind.slot);
oai_nfapi_nr_rx_data_indication(&UL_info->rx_ind);
UL_info->rx_ind.number_of_pdus = 0;
}
}
else{
if (UL_info->rx_ind.number_of_pdus > 0 && UL_info->crc_ind.number_crcs > 0) {
for (int i = 0; i < UL_info->rx_ind.number_of_pdus; i++) {
for (int j = 0; j < UL_info->crc_ind.number_crcs; j++) {
// find crc_indication j corresponding rx_indication i
const nfapi_nr_rx_data_pdu_t *rx = &UL_info->rx_ind.pdu_list[i];
const nfapi_nr_crc_t *crc = &UL_info->crc_ind.crc_list[j];
LOG_D(PHY,
"UL_info->crc_ind.pdu_list[%d].rnti:%04x "
"UL_info->rx_ind.pdu_list[%d].rnti:%04x\n",
j,
crc->rnti,
i,
rx->rnti);
LOG_D(MAC,
"%4d.%2d Calling rx_sdu (CRC %s/tb_crc_status %d)\n",
UL_info->frame,
UL_info->slot,
crc->tb_crc_status ? "error" : "ok",
crc->tb_crc_status);
if (crc->rnti != rx->rnti)
continue;
/* if CRC passes, pass PDU, otherwise pass NULL as error indication */
nr_rx_sdu(UL_info->module_id,
UL_info->CC_id,
UL_info->rx_ind.sfn,
UL_info->rx_ind.slot,
rx->rnti,
crc->tb_crc_status ? NULL : rx->pdu,
rx->pdu_length,
rx->timing_advance,
rx->ul_cqi,
rx->rssi);
handle_nr_ul_harq(UL_info->module_id, UL_info->frame, UL_info->slot, crc);
break;
} // for (j=0;j<UL_info->crc_ind.number_crcs;j++)
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++)
LOG_D(MAC,
"%4d.%2d Calling rx_sdu (CRC %s/tb_crc_status %d)\n",
UL_info->frame,
UL_info->slot,
crc->tb_crc_status ? "error" : "ok",
crc->tb_crc_status);
UL_info->crc_ind.number_crcs = 0;
UL_info->rx_ind.number_of_pdus = 0;
} else if (UL_info->rx_ind.number_of_pdus != 0
|| UL_info->crc_ind.number_crcs != 0) {
LOG_E(PHY,
"hoping not to have mis-match between CRC ind and RX ind - "
"hopefully the missing message is coming shortly "
"rx_ind:%d(SFN/SL:%d/%d) crc_ind:%d(SFN/SL:%d/%d) \n",
UL_info->rx_ind.number_of_pdus,
UL_info->rx_ind.sfn,
UL_info->rx_ind.slot,
UL_info->crc_ind.number_crcs,
UL_info->rx_ind.sfn,
UL_info->rx_ind.slot);
/* if CRC passes, pass PDU, otherwise pass NULL as error indication */
nr_rx_sdu(UL_info->module_id,
UL_info->CC_id,
UL_info->rx_ind.sfn,
UL_info->rx_ind.slot,
rx->rnti,
crc->tb_crc_status ? NULL : rx->pdu,
rx->pdu_length,
rx->timing_advance,
rx->ul_cqi,
rx->rssi);
handle_nr_ul_harq(UL_info->CC_id, UL_info->module_id, UL_info->frame, UL_info->slot, crc);
break;
} // for (j=0;j<UL_info->crc_ind.number_crcs;j++)
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++)
UL_info->crc_ind.number_crcs = 0;
UL_info->rx_ind.number_of_pdus = 0;
} else if (UL_info->rx_ind.number_of_pdus != 0
|| UL_info->crc_ind.number_crcs != 0) {
LOG_E(PHY,
"hoping not to have mis-match between CRC ind and RX ind - "
"hopefully the missing message is coming shortly "
"rx_ind:%d(SFN/SL:%d/%d) crc_ind:%d(SFN/SL:%d/%d) \n",
UL_info->rx_ind.number_of_pdus,
UL_info->rx_ind.sfn,
UL_info->rx_ind.slot,
UL_info->crc_ind.number_crcs,
UL_info->rx_ind.sfn,
UL_info->rx_ind.slot);
}
}
}
@@ -181,7 +220,15 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
module_id,CC_id, UL_info->rach_ind.number_of_pdus,
UL_info->rx_ind.number_of_pdus, UL_info->crc_ind.number_crcs);
handle_nr_rach(UL_info);
handle_nr_uci(UL_info);
// clear UL DCI prior to handling ULSCH
mac->UL_dci_req[CC_id].numPdus = 0;
handle_nr_ulsch(UL_info);
if (NFAPI_MODE != NFAPI_MODE_PNF) {
if (ifi->CC_mask==0) {
ifi->current_frame = UL_info->frame;
ifi->current_slot = UL_info->slot;
@@ -191,16 +238,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
}
ifi->CC_mask |= (1<<CC_id);
}
handle_nr_rach(UL_info);
handle_nr_uci(UL_info);
// clear HI prior to handling ULSCH
mac->UL_dci_req[CC_id].numPdus = 0;
handle_nr_ulsch(UL_info);
if (NFAPI_MODE != NFAPI_MODE_PNF) {
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
/*
eNB_dlsch_ulsch_scheduler(module_id,
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+3 -3
View File
@@ -79,13 +79,13 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t
// L2 Abstraction Layer
// Note: sdu should always be processed because data and timing advance updates are transmitted by the UE
int8_t handle_dlsch (nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){
int8_t handle_dlsch(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){
update_harq_status(dl_info, pdu_id);
nr_ue_send_sdu(dl_info, ul_time_alignment, pdu_id);
if(dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.ack_nack)
nr_ue_send_sdu(dl_info, ul_time_alignment, pdu_id);
return 0;
}
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
openair2/RRC/NAS/nas_config.c
+18
View File
@@ -344,6 +344,24 @@ int nas_config(int interface_id, int thirdOctet, int fourthOctet, char *ifname)
LOG_E(OIP,"Interface %s couldn't be configured (ip address %s, mask %s broadcast address %s)\n",
interfaceName, ipAddress, netMask, broadcastAddress);
int res;
char command_line[500];
res = sprintf(command_line,
"ip rule add from %s/32 table %d && "
"ip rule add to %s/32 table %d && "
"ip route add default dev %s%d table %d",
ipAddress, interface_id - 1 + 10000,
ipAddress, interface_id - 1 + 10000,
UE_NAS_USE_TUN ? "oaitun_ue" : "oip",
interface_id, interface_id - 1 + 10000);
if (res < 0) {
LOG_E(OIP,"Could not create ip rule/route commands string\n");
return res;
}
background_system(command_line);
return returnValue;
}
openair2/RRC/NR/MESSAGES/asn1_msg.c
+22 -2
View File
@@ -419,8 +419,28 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
nrMultiBandInfo->freqBandIndicatorNR = configuration->scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[i];
ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list,nrMultiBandInfo);
}
//sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA = configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA = 86;
int scs_scaling0 = 1<<(configuration->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing);
int scs_scaling = scs_scaling0;
int scs_scaling2 = scs_scaling0;
if (configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA < 600000) {
scs_scaling = scs_scaling0*3;
}
if (configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA > 2016666) {
scs_scaling = scs_scaling0>>2;
scs_scaling2 = scs_scaling0>>2;
}
uint32_t absolute_diff = (*configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB -
configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA = scs_scaling2 * (absolute_diff/(12*scs_scaling) - 10);
LOG_I(NR_RRC,"SIB1 freq: absoluteFrequencySSB %ld, absoluteFrequencyPointA %ld\n",
*configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB,
configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
LOG_I(NR_RRC,"SIB1 freq: absolute_diff %d, %d*(absolute_diff/(12*%d) - 10) %d\n",
absolute_diff,scs_scaling2,scs_scaling,(int)sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA);
for(int i = 0; i< configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.count; i++) {
ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list,configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[i]);
}
openair2/RRC/NR/MESSAGES/asn1c/ASN1_files/extract_asn1_from_spce.pl
+37 -23
View File
@@ -26,38 +26,52 @@ while (<INPUT_FILE>) {
syswrite OUTPUT_FILE,"END\n\n";
while(<INPUT_FILE>) {
if( m/NR-UE-Variables DEFINITIONS AUTOMATIC TAGS ::=/){
syswrite OUTPUT_FILE,"$_ \n";
syswrite OUTPUT_FILE,"BEGIN\n\n";
while(<INPUT_FILE>) {
if( m/PC5-RRC-Definitions DEFINITIONS AUTOMATIC TAGS ::=/){
syswrite OUTPUT_FILE,"$_ \n";
syswrite OUTPUT_FILE,"BEGIN\n\n";
# Get all the text delimited by -- ASN1START and -- ASN1STOP
extract_asn1();
# Get all the text delimited by -- ASN1START and -- ASN1STOP
extract_asn1();
syswrite OUTPUT_FILE,"END\n\n";
syswrite OUTPUT_FILE,"END\n\n";
while(<INPUT_FILE>) {
while(<INPUT_FILE>) {
if( m/NR-UE-Variables DEFINITIONS AUTOMATIC TAGS ::=/){
syswrite OUTPUT_FILE,"$_ \n";
syswrite OUTPUT_FILE,"BEGIN\n\n";
# Get all the text delimited by -- ASN1START and -- ASN1STOP
extract_asn1();
syswrite OUTPUT_FILE,"END\n\n";
while(<INPUT_FILE>) {
if( m/NR-Sidelink-Preconf DEFINITIONS AUTOMATIC TAGS ::=/){
syswrite OUTPUT_FILE,"$_ \n";
syswrite OUTPUT_FILE,"BEGIN\n\n";
# Get all the text delimited by -- ASN1START and -- ASN1STOP
extract_asn1();
syswrite OUTPUT_FILE,"END\n\n";
while(<INPUT_FILE>) {
if( m/NR-InterNodeDefinitions DEFINITIONS AUTOMATIC TAGS ::=/){
syswrite OUTPUT_FILE,"$_ \n";
syswrite OUTPUT_FILE,"BEGIN\n\n";
syswrite OUTPUT_FILE,"$_ \n";
syswrite OUTPUT_FILE,"BEGIN\n\n";
# Get all the text delimited by -- ASN1START and -- ASN1STOP
extract_asn1();
# Get all the text delimited by -- ASN1START and -- ASN1STOP
extract_asn1();
syswrite OUTPUT_FILE,"END\n\n";
}
syswrite OUTPUT_FILE,"END\n\n";
}
}
}
}
}
}
}
}
}
}
close(OUTPUT_FILE);
}
}
close(INPUT_FILE);
openair2/RRC/NR/MESSAGES/asn1c/ASN1_files/nr-rrc-16.4.1.asn1
+14304
View File
File diff suppressed because it is too large Load Diff
openair2/RRC/NR/nr_rrc_defs.h
+2 -1
View File
@@ -443,7 +443,8 @@ typedef struct {
NR_SIB2_t *sib2;
NR_SIB3_t *sib3;
NR_BCCH_DL_SCH_Message_t systemInformation; // SIB23
int ssb_SubcarrierOffset;
int ssb_SubcarrierOffset;
int sib1_tda;
int pdsch_AntennaPorts;
int pusch_AntennaPorts;
int pusch_TargetSNRx10;
openair2/RRC/NR/nr_rrc_proto.h
-6
View File
@@ -73,12 +73,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
void rrc_remove_nsa_user(gNB_RRC_INST *rrc, int rnti);
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0);
void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_ServingCellConfig_t *servingcellconfigdedicated,
NR_CellGroupConfig_t *secondaryCellGroup,
openair2/RRC/NR/rrc_gNB.c
+14 -7
View File
@@ -238,6 +238,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration
rrc->carrier.ssb_SubcarrierOffset,
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
(NR_ServingCellConfigCommon_t *)rrc->carrier.servingcellconfigcommon,
0,
0, // WIP hardcoded rnti
@@ -330,6 +331,7 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu
rrc->carrier.ssb_SubcarrierOffset = configuration->ssb_SubcarrierOffset;
rrc->carrier.pdsch_AntennaPorts = configuration->pdsch_AntennaPorts;
rrc->carrier.pusch_AntennaPorts = configuration->pusch_AntennaPorts;
rrc->carrier.sib1_tda = configuration->sib1_tda;
rrc->carrier.do_CSIRS = configuration->do_CSIRS;
/// System Information INIT
pthread_mutex_init(&rrc->cell_info_mutex,NULL);
@@ -384,13 +386,14 @@ void apply_macrlc_config(gNB_RRC_INST *rrc,
const protocol_ctxt_t *const ctxt_pP ) {
rrc_mac_config_req_gNB(rrc->module_id,
rrc->carrier.ssb_SubcarrierOffset,
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
NULL,
0,
ue_context_pP->ue_context.rnti,
get_softmodem_params()->sa ? ue_context_pP->ue_context.masterCellGroup : (NR_CellGroupConfig_t *)NULL);
rrc->carrier.ssb_SubcarrierOffset,
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
NULL,
0,
ue_context_pP->ue_context.rnti,
get_softmodem_params()->sa ? ue_context_pP->ue_context.masterCellGroup : (NR_CellGroupConfig_t *)NULL);
nr_rrc_rlc_config_asn1_req(ctxt_pP,
ue_context_pP->ue_context.SRB_configList,
@@ -528,6 +531,7 @@ rrc_gNB_generate_RRCSetup(
// ue_context_pP->ue_context.ue_rrc_inactivity_timer = 0;
// configure MAC
apply_macrlc_config(rrc,ue_context_pP,ctxt_pP);
apply_pdcp_config(ue_context_pP,ctxt_pP);
@@ -576,6 +580,7 @@ rrc_gNB_generate_RRCSetup_for_RRCReestablishmentRequest(
rrc_instance_p->carrier.ssb_SubcarrierOffset,
rrc_instance_p->carrier.pdsch_AntennaPorts,
rrc_instance_p->carrier.pusch_AntennaPorts,
rrc_instance_p->carrier.sib1_tda,
(NR_ServingCellConfigCommon_t *)rrc_instance_p->carrier.servingcellconfigcommon,
0,
ue_context_pP->ue_context.rnti,
@@ -1318,11 +1323,13 @@ rrc_gNB_process_RRCReconfigurationComplete(
NULL,
get_softmodem_params()->sa ? ue_context_pP->ue_context.masterCellGroup->rlc_BearerToAddModList : NULL);
/* Refresh SRBs/DRBs */
if (!NODE_IS_CU(RC.nrrrc[ctxt_pP->module_id]->node_type)) {
rrc_mac_config_req_gNB(rrc->module_id,
rrc->carrier.ssb_SubcarrierOffset,
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
NULL,
0,
ue_context_pP->ue_context.rnti,
openair2/RRC/NR/rrc_gNB_nsa.c
+3 -1
View File
@@ -352,7 +352,8 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
rrc_mac_config_req_gNB(rrc->module_id,
rrc->carrier.ssb_SubcarrierOffset,
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
rrc->carrier.servingcellconfigcommon,
1, // add_ue flag
ue_context_p->ue_id_rnti,
@@ -362,6 +363,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
rrc->carrier.ssb_SubcarrierOffset,
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
NULL,
1, // add_ue flag
ue_context_p->ue_id_rnti,
openair2/RRC/NR/rrc_gNB_reconfig.c
+6 -85
View File
@@ -49,87 +49,6 @@
#define false 0
#define true 1
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
bwp->bwp_Id = 0;
bwp->bwp_Common=calloc(1,sizeof(*bwp->bwp_Common));
*bwp->bwp_Common = *servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP;
}
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
coreset0->controlResourceSetId = 0;
// frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B,
if(coreset0->frequencyDomainResources.buf == NULL) coreset0->frequencyDomainResources.buf = calloc(1,6);
int curr_bwp = NRRIV2BW(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
if (curr_bwp < 48)
coreset0->frequencyDomainResources.buf[0] = 0xf0;
else
coreset0->frequencyDomainResources.buf[0] = 0xff;
if (curr_bwp < 96)
coreset0->frequencyDomainResources.buf[1] = 0;
else
coreset0->frequencyDomainResources.buf[1] = 0xff;
coreset0->frequencyDomainResources.buf[2] = 0;
coreset0->frequencyDomainResources.buf[3] = 0;
coreset0->frequencyDomainResources.buf[4] = 0;
coreset0->frequencyDomainResources.buf[5] = 0;
coreset0->frequencyDomainResources.size = 6;
coreset0->frequencyDomainResources.bits_unused = 3;
coreset0->duration = 1;
coreset0->cce_REG_MappingType.present=NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved;
coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved));
coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6;
coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = servingcellconfigcommon->physCellId;
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8];
for (int i=0;i<8;i++) {
tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i;
ASN_SEQUENCE_ADD(&coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]);
}
coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
coreset0->tci_PresentInDCI = NULL;
coreset0->pdcch_DMRS_ScramblingID = NULL;
}
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) {
if(ss0->controlResourceSetId == NULL) ss0->controlResourceSetId=calloc(1,sizeof(*ss0->controlResourceSetId));
if(ss0->monitoringSymbolsWithinSlot == NULL) ss0->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss0->monitoringSymbolsWithinSlot));
if(ss0->monitoringSymbolsWithinSlot->buf == NULL) ss0->monitoringSymbolsWithinSlot->buf = calloc(1,2);
if(ss0->nrofCandidates == NULL) ss0->nrofCandidates = calloc(1,sizeof(*ss0->nrofCandidates));
if(ss0->searchSpaceType == NULL) ss0->searchSpaceType = calloc(1,sizeof(*ss0->searchSpaceType));
if(ss0->searchSpaceType->choice.common == NULL) ss0->searchSpaceType->choice.common=calloc(1,sizeof(*ss0->searchSpaceType->choice.common));
if(ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
ss0->searchSpaceId = 0;
*ss0->controlResourceSetId = 0;
ss0->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss0->monitoringSlotPeriodicityAndOffset));
ss0->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
ss0->duration=NULL;
// should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed
ss0->monitoringSymbolsWithinSlot->buf[1] = 0;
ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7);
ss0->monitoringSymbolsWithinSlot->size = 2;
ss0->monitoringSymbolsWithinSlot->bits_unused = 2;
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n2;
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss0->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
}
void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_ServingCellConfig_t *servingcellconfigdedicated,
NR_CellGroupConfig_t *secondaryCellGroup,
@@ -542,9 +461,11 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss);
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=0;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=NULL;
if(get_softmodem_params()->sa) {
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=0;
}
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->pagingSearchSpace=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace));
@@ -1363,7 +1284,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup->spCellConfig->spCellConfigDedicated->sCellDeactivationTimer=NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig=NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->tag_Id=0;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->dummy=NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->dummy1=NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->pathlossReferenceLinking=NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->servingCellMO=NULL;
openair2/RRC/NR_UE/rrc_UE.c
+69 -68
View File
@@ -201,42 +201,38 @@ extern rlc_op_status_t nr_rrc_rlc_config_asn1_req (const protocol_ctxt_t * con
struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_bearer2add_list);
// from LTE-RRC DL-DCCH RRCConnectionReconfiguration nr-secondary-cell-group-config (encoded)
int8_t nr_rrc_ue_decode_secondary_cellgroup_config(
const module_id_t module_id,
const uint8_t *buffer,
const uint32_t size ){
int8_t nr_rrc_ue_decode_secondary_cellgroup_config(const module_id_t module_id,
const uint8_t *buffer,
const uint32_t size){
NR_CellGroupConfig_t *cell_group_config = NULL;
uint32_t i;
NR_CellGroupConfig_t *cell_group_config = NULL;
uint32_t i;
asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
&asn_DEF_NR_CellGroupConfig,
(void **)&cell_group_config,
(uint8_t *)buffer,
size );
asn_dec_rval_t dec_rval = uper_decode(NULL,
&asn_DEF_NR_CellGroupConfig,
(void **)&cell_group_config,
(uint8_t *)buffer,
size, 0, 0);
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
printf("NR_CellGroupConfig decode error\n");
for (i=0; i<size; i++){
printf("%02x ",buffer[i]);
}
printf("\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_CellGroupConfig, (void *)cell_group_config, 1 );
return -1;
}
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
printf("NR_CellGroupConfig decode error\n");
for (i=0; i<size; i++)
printf("%02x ",buffer[i]);
printf("\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_CellGroupConfig, (void *)cell_group_config, 1 );
return -1;
}
if(NR_UE_rrc_inst[module_id].scell_group_config == NULL){
NR_UE_rrc_inst[module_id].scell_group_config = cell_group_config;
nr_rrc_ue_process_scg_config(module_id,cell_group_config);
}else{
nr_rrc_ue_process_scg_config(module_id,cell_group_config);
SEQUENCE_free(&asn_DEF_NR_CellGroupConfig, (void *)cell_group_config, 0);
}
if(NR_UE_rrc_inst[module_id].scell_group_config == NULL){
NR_UE_rrc_inst[module_id].scell_group_config = cell_group_config;
nr_rrc_ue_process_scg_config(module_id,cell_group_config);
}else{
nr_rrc_ue_process_scg_config(module_id,cell_group_config);
SEQUENCE_free(&asn_DEF_NR_CellGroupConfig, (void *)cell_group_config, 0);
}
//nr_rrc_mac_config_req_ue( 0,0,0,NULL, cell_group_config->mac_CellGroupConfig, cell_group_config->physicalCellGroupConfig, cell_group_config->spCellConfig );
return 0;
return 0;
}
int8_t nr_rrc_ue_process_RadioBearerConfig(NR_RadioBearerConfig_t *RadioBearerConfig){
@@ -262,25 +258,33 @@ int8_t nr_rrc_ue_process_rrcReconfiguration(const module_id_t module_id, NR_RRCR
}
}
if(rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->secondaryCellGroup != NULL){
NR_CellGroupConfig_t *cellGroupConfig = NULL;
uper_decode(NULL,
&asn_DEF_NR_CellGroupConfig, //might be added prefix later
(void **)&cellGroupConfig,
(uint8_t *)rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->secondaryCellGroup->buf,
rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->secondaryCellGroup->size, 0, 0);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)cellGroupConfig);
if(get_softmodem_params()->sa) {
if(NR_UE_rrc_inst[module_id].cell_group_config == NULL){
// first time receive the configuration, just use the memory allocated from uper_decoder. TODO this is not good implementation, need to maintain RRC_INST own structure every time.
NR_UE_rrc_inst[module_id].cell_group_config = cellGroupConfig;
nr_rrc_ue_process_scg_config(module_id,cellGroupConfig);
}else{
// after first time, update it and free the memory after.
SEQUENCE_free(&asn_DEF_NR_CellGroupConfig, (void *)NR_UE_rrc_inst[module_id].cell_group_config, 0);
NR_UE_rrc_inst[module_id].cell_group_config = cellGroupConfig;
nr_rrc_ue_process_scg_config(module_id,cellGroupConfig);
NR_CellGroupConfig_t *cellGroupConfig = NULL;
uper_decode(NULL,
&asn_DEF_NR_CellGroupConfig, //might be added prefix later
(void **)&cellGroupConfig,
(uint8_t *)rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->secondaryCellGroup->buf,
rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->secondaryCellGroup->size, 0, 0);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)cellGroupConfig);
if(NR_UE_rrc_inst[module_id].cell_group_config == NULL){
// first time receive the configuration, just use the memory allocated from uper_decoder. TODO this is not good implementation, need to maintain RRC_INST own structure every time.
NR_UE_rrc_inst[module_id].cell_group_config = cellGroupConfig;
nr_rrc_ue_process_scg_config(module_id,cellGroupConfig);
}else{
// after first time, update it and free the memory after.
SEQUENCE_free(&asn_DEF_NR_CellGroupConfig, (void *)NR_UE_rrc_inst[module_id].cell_group_config, 0);
NR_UE_rrc_inst[module_id].cell_group_config = cellGroupConfig;
nr_rrc_ue_process_scg_config(module_id,cellGroupConfig);
}
}
else
nr_rrc_ue_decode_secondary_cellgroup_config(module_id,
rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->secondaryCellGroup->buf,
rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->secondaryCellGroup->size);
}
if(rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration->measConfig != NULL){
if(NR_UE_rrc_inst[module_id].meas_config == NULL){
@@ -317,7 +321,7 @@ int8_t nr_rrc_ue_process_meas_config(NR_MeasConfig_t *meas_config){
int8_t nr_rrc_ue_process_scg_config(const module_id_t module_id, NR_CellGroupConfig_t *cell_group_config){
int i;
if(NR_UE_rrc_inst[module_id].cell_group_config==NULL){
if(cell_group_config==NULL){
// initial list
if(cell_group_config->spCellConfig != NULL){
if(cell_group_config->spCellConfig->spCellConfigDedicated != NULL){
@@ -512,7 +516,8 @@ NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){
fclose(fd);
process_nsa_message(NR_UE_rrc_inst, nr_RadioBearerConfigX_r15, buffer,msg_len);
}
}else{
}
else{
NR_UE_rrc_inst = NULL;
}
@@ -551,8 +556,8 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
const uint8_t gNB_index,
uint8_t *const bufferP,
const uint8_t buffer_len ){
NR_BCCH_BCH_Message_t *bcch_message = NULL;
NR_BCCH_BCH_Message_t *bcch_message = NULL;
if (NR_UE_rrc_inst[module_id].mib != NULL)
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
@@ -565,21 +570,21 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
buffer_len );
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
LOG_E(NR_RRC,"NR_BCCH_BCH decode error\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
return -1;
LOG_E(NR_RRC,"NR_BCCH_BCH decode error\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
return -1;
}
else {
// link to rrc instance
SEQUENCE_free( &asn_DEF_NR_MIB, (void *)NR_UE_rrc_inst[module_id].mib, 1 );
NR_UE_rrc_inst[module_id].mib = bcch_message->message.choice.mib;
SEQUENCE_free( &asn_DEF_NR_MIB, (void *)NR_UE_rrc_inst[module_id].mib, 1 );
NR_UE_rrc_inst[module_id].mib = bcch_message->message.choice.mib;
//memcpy( (void *)mib,
// (void *)&bcch_message->message.choice.mib,
// sizeof(NR_MIB_t) );
nr_rrc_mac_config_req_ue( 0, 0, 0, NR_UE_rrc_inst[module_id].mib, NULL, NULL, NULL);
}
nr_rrc_mac_config_req_ue( 0, 0, 0, NR_UE_rrc_inst[module_id].mib, NULL, NULL, NULL);
}
return 0;
}
@@ -1004,7 +1009,6 @@ int nr_decode_SI( const protocol_ctxt_t *const ctxt_pP, const uint8_t gNB_index
}
if (new_sib == 1) {
NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].SIcnt++;
if (NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].SIcnt == sib1->si_SchedulingInfo->schedulingInfoList.list.count)
nr_rrc_set_sub_state( ctxt_pP->module_id, RRC_SUB_STATE_IDLE_SIB_COMPLETE );
@@ -1125,13 +1129,12 @@ int8_t nr_rrc_ue_generate_ra_msg(module_id_t module_id, uint8_t gNB_index) {
return 0;
}
int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(
module_id_t module_id,
const uint8_t gNB_index,
uint8_t *const Sdu,
const uint8_t Sdu_len,
const uint8_t rsrq,
const uint8_t rsrp) {
int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(module_id_t module_id,
const uint8_t gNB_index,
uint8_t *const Sdu,
const uint8_t Sdu_len,
const uint8_t rsrq,
const uint8_t rsrp) {
NR_BCCH_DL_SCH_Message_t *bcch_message = NULL;
NR_SIB1_t *sib1 = NR_UE_rrc_inst[module_id].sib1[gNB_index];
@@ -1190,8 +1193,6 @@ int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(
check_requested_SI_List(module_id, NR_UE_rrc_inst[module_id].requested_SI_List, *sib1);
if( nr_rrc_get_state(module_id) <= RRC_STATE_IDLE_NR ) {
NR_UE_rrc_inst[module_id].ra_trigger = INITIAL_ACCESS_FROM_RRC_IDLE;
// TODO: remove flag after full RA procedures implemented
// get_softmodem_params()->do_ra = 1;
LOG_D(PHY,"Setting state to NR_RRC_SI_RECEIVED\n");
nr_rrc_set_state (module_id, NR_RRC_SI_RECEIVED);
}
openair2/RRC/NR_UE/rrc_defs.h
+1 -2
View File
@@ -105,9 +105,8 @@ typedef struct NR_UE_RRC_INST_s {
NR_MeasConfig_t *meas_config;
NR_CellGroupConfig_t *cell_group_config;
NR_CellGroupConfig_t *scell_group_config;
NR_ServingCellConfigCommonSIB_t *servingCellConfigCommonSIB;
NR_CellGroupConfig_t *scell_group_config;
NR_RadioBearerConfig_t *radio_bearer_config;
NR_MeasObjectToAddMod_t *MeasObj[NB_CNX_UE][MAX_MEAS_OBJ];