Merge remote-tracking branch 'origin/develop' into NR_RA_updates

2020-10-15 10:18:16 +02:00
parent 5f1fe21c7c 0fe3e5fde2
commit 62dbda5c83
29 changed files with 927 additions and 606 deletions
@@ -211,7 +211,7 @@ schedule_MBMS_NFAPI(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
 			msi_pos++;
 		   while((non_mbsfn_SubframeConfig & (0x100 >> msi_pos)) == (0x100>>msi_pos))
 			msi_pos++;
-		   	mbms_mch_i=0;
+		   mbms_mch_i=0;

 		   if((subframeP==0)){
 		   	x=0;
@@ -89,9 +89,8 @@ uint32_t nr_compute_tbs(uint16_t Qm,

 //tbslbrm calculation according to 5.4.2.1 of 38.212
 uint32_t nr_compute_tbslbrm(uint16_t table,
-                            uint16_t nb_rb,
-                            uint8_t Nl,
-                            uint8_t C)
+			    uint16_t nb_rb,
+		            uint8_t Nl)
 {

  uint16_t R, nb_re;
@@ -99,7 +98,7 @@ uint32_t nr_compute_tbslbrm(uint16_t table,
  uint8_t Qm;
  int i;
  uint32_t nr_tbs=0;
-  uint32_t Ninfo, Np_info;
+  uint32_t Ninfo, Np_info, C;
  uint8_t n;

  for (i=0; i<7; i++) {
@@ -117,27 +116,34 @@ uint32_t nr_compute_tbslbrm(uint16_t table,
  Ninfo = (nb_re * R * Qm * Nl)>>10;

  if (Ninfo <=3824) {
-    n = max(3, floor(log2(Ninfo)) - 6);
-    Np_info = max(24, (Ninfo>>n)<<n);
-    for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
-      if (Tbstable_nr[i] >= Np_info){
-        nr_tbs = Tbstable_nr[i];
-        break;
-      }
-    }
-  } else {
-    n = log2(Ninfo-24)-5;
-    Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
+    	n = max(3, floor(log2(Ninfo)) - 6);
+        Np_info = max(24, (Ninfo>>n)<<n);
+        for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
+        	if (Tbstable_nr[i] >= Np_info){
+        		nr_tbs = Tbstable_nr[i];
+        		break;
+        	}
+        }
+  }
+  else {
+    	n = log2(Ninfo-24)-5;
+        Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
+
+        if (R <= 256) { 
+            C = CEILIDIV((Np_info+24),3816);
+            nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
+        }
+        else {
+            if (Np_info > 8424){
+                C = CEILIDIV((Np_info+24),8424);
+                nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
+            }
+            else {
+            	nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
+            }
+
+        }

-    if (R <= 256) {
-        nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
-    } else {
-      if (Np_info > 8424){
-          nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
-      } else {
-        nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
-      }
-    }
  }
  return nr_tbs;
 }
@@ -174,7 +174,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,

 void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, frame_t frame, int slot);

-void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
+int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
                         int dci_format,
                         uint8_t dci_length,
                         uint16_t rnti,
@@ -64,7 +64,7 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd

 }

-void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id, uint8_t dci_format){
+void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id){

  uint16_t monitoringSymbolsWithinSlot = 0;
  uint8_t bwp_id = 1, coreset_id = 1;
@@ -76,9 +76,6 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
  NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
  NR_SearchSpace_t *ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];

-  // DCI format configuration
-  rel15->dci_format = dci_format;
-
  // CORESET configuration
  NR_ControlResourceSet_t *coreset = mac->coreset[bwp_id - 1][coreset_id - 1];
  rel15->coreset.duration = coreset->duration;
@@ -123,7 +120,9 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
    rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275);
    rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275);
    rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
-    rel15->dci_length = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format, NR_RNTI_C, rel15->BWPSize, bwp_id);
+    for (int i = 0; i < rel15->num_dci_options; i++) {
+      rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, bwp_id);
+    }
    break;
    case NR_RNTI_RA:
    // we use the initial DL BWP
@@ -133,7 +132,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
    rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
    rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
    rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
-    rel15->dci_length = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format, NR_RNTI_RA, rel15->BWPSize, bwp_id);
+    rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id);
    break;
    case NR_RNTI_P:
    break;
@@ -214,7 +213,9 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
            LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type1-PDCCH common random access search space\n");
            switch(mac->ra_state){
              case WAIT_RAR:
-              config_dci_pdu(mac, rel15, dl_config, NR_RNTI_RA, ss_id, NR_DL_DCI_FORMAT_1_0);
+              rel15->num_dci_options = 1;
+              rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
+              config_dci_pdu(mac, rel15, dl_config, NR_RNTI_RA, ss_id);
              fill_dci_search_candidates(ss, rel15);
              break;
              case WAIT_CONTENTION_RESOLUTION:
@@ -285,7 +286,10 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
          // Monitors DCI 01 and 11 scrambled with C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
          if (get_softmodem_params()->phy_test == 1 && mac->crnti > 0) {
            LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in the user specific search space\n");
-            config_dci_pdu(mac, rel15, dl_config, NR_RNTI_C, ss_id, NR_DL_DCI_FORMAT_1_1);
+            rel15->num_dci_options = 2;
+            rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_1;
+            rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_1;
+            config_dci_pdu(mac, rel15, dl_config, NR_RNTI_C, ss_id);
            fill_dci_search_candidates(ss, rel15);

            #ifdef DEBUG_DCI
@@ -794,7 +794,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
      NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
      uint8_t access_mode   = SCHEDULED_ACCESS;

-      // program PUSCH. this should actually be done upon reception of an UL DCI
+      // program PUSCH with UL DCI parameters
      nr_dcireq_t dcireq;
      nr_scheduled_response_t scheduled_response;
      fapi_nr_tx_request_t tx_req;
@@ -802,30 +802,41 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
      fapi_nr_ul_config_request_t *ul_config = &dcireq.ul_config_req;
      nfapi_nr_ue_ptrs_ports_t ptrs_ports_list;

-      //--------------------------Temporary configuration-----------------------------//
-      uint16_t rnti               = 0x1234;
-      uint32_t rb_size            = 50;
-      uint32_t rb_start           = 0;
-      uint8_t  nr_of_symbols      = 11;
-      uint8_t  start_symbol_index = 0;
+      fapi_nr_ul_config_request_pdu_t *ulcfg_pdu = &mac->ul_config_request.ul_config_list[0];
+
+      uint16_t rnti               = ulcfg_pdu->pusch_config_pdu.rnti;
+      uint32_t rb_size            = ulcfg_pdu->pusch_config_pdu.rb_size;
+      uint32_t rb_start           = ulcfg_pdu->pusch_config_pdu.rb_start;
+      uint8_t  nr_of_symbols      = ulcfg_pdu->pusch_config_pdu.nr_of_symbols;
+      uint8_t  start_symbol_index = ulcfg_pdu->pusch_config_pdu.start_symbol_index;
      uint8_t  nrOfLayers         = 1;
-      uint8_t  mcs_index          = 9;
-      uint8_t  mcs_table          = 0;
-      uint8_t  harq_process_id    = 0;
-      uint8_t  rv_index           = 0;
+      uint8_t  mcs_index          = ulcfg_pdu->pusch_config_pdu.mcs_index;
+      uint8_t  mcs_table          = ulcfg_pdu->pusch_config_pdu.mcs_table;
+      uint8_t  harq_process_id    = ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id;
+      uint8_t  rv_index           = ulcfg_pdu->pusch_config_pdu.pusch_data.rv_index;
      uint16_t l_prime_mask       = get_l_prime(nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1);
      uint8_t  dmrs_config_type   = 0;
+      uint16_t pdu_bit_map        = PUSCH_PDU_BITMAP_PUSCH_DATA;
+      // These should come from RRC config!!!
      uint8_t  ptrs_mcs1          = 2;
      uint8_t  ptrs_mcs2          = 4;
      uint8_t  ptrs_mcs3          = 10;
      uint16_t n_rb0              = 25;
      uint16_t n_rb1              = 75;
-      uint16_t pdu_bit_map        = PUSCH_PDU_BITMAP_PUSCH_DATA;
      uint8_t  ptrs_time_density  = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, mcs_index, mcs_table);
      uint8_t  ptrs_freq_density  = get_K_ptrs(n_rb0, n_rb1, rb_size);
      uint16_t number_dmrs_symbols = 0;
      uint16_t ul_dmrs_symb_pos   = l_prime_mask << start_symbol_index;
-      //------------------------------------------------------------------------------//
+
+#ifdef DEBUG_DCI      
+      LOG_I(MAC, " UL config params \n rnti: %x \n rb_size: %d \n", 
+                rnti, rb_size);
+      LOG_I(MAC, "rb_start: %x \n nr_of_symbols: %d \n start_symbol_index: %d \n nrOfLayers: %d \n mcs_index: %d \n \
+                mcs_table: %d \n harq_process_id: %d \n ndi: %d \n num_cb: %d \n rv_index: %d \n", 
+                rb_start, nr_of_symbols, start_symbol_index, nrOfLayers, mcs_index,
+                mcs_table, harq_process_id, ndi, num_cb, rv_index);
+#endif
+
      // PTRS ports configuration
      // TbD: ptrs_dmrs_port and ptrs_port_index are not initialised!
      ptrs_ports_list.ptrs_re_offset = 0;
@@ -2383,13 +2394,22 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
 	 */
  if(pusch_config_pdu != NULL){
    NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
-    if (mac->ULbwp[0]->bwp_Dedicated->pusch_Config)
+    if (mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
      pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
-	
+    }
+    else if (mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
+      pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
+    }
+    	
    if (pusch_TimeDomainAllocationList) {
-      AssertFatal(pusch_TimeDomainAllocationList->list.count > time_domain_ind,
-		  "time_domain_ind %d >= pdsch->TimeDomainAllocationList->list.count %d\n",
-		  time_domain_ind,pusch_TimeDomainAllocationList->list.count);
+      if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) {
+        LOG_E(MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n",
+              time_domain_ind, pusch_TimeDomainAllocationList->list.count);
+        pusch_config_pdu->start_symbol_index=0;
+        pusch_config_pdu->nr_of_symbols=0;
+        return -1;
+      }
+      
      int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength;
      int S,L;
      SLIV2SL(startSymbolAndLength,&S,&L);
@@ -2417,8 +2437,8 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
  LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
 	dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits);

-  nr_extract_dci_info(mac,dci->dci_format,dci->payloadSize,dci->rnti,(uint64_t *)dci->payloadBits,def_dci_pdu_rel15);
-  return (nr_ue_process_dci(module_id, cc_id, gNB_index, def_dci_pdu_rel15, dci->rnti, dci->dci_format));
+  int dci_format = nr_extract_dci_info(mac,dci->dci_format,dci->payloadSize,dci->rnti,(uint64_t *)dci->payloadBits,def_dci_pdu_rel15);
+  return (nr_ue_process_dci(module_id, cc_id, gNB_index, def_dci_pdu_rel15, dci->rnti, dci_format));
 }

 int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format){
@@ -2439,6 +2459,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
  LOG_D(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP);

  NR_PDSCH_Config_t *pdsch_config=mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup;
+  NR_PUSCH_Config_t *pusch_config=mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup;

  switch(dci_format){
  case NR_UL_DCI_FORMAT_0_0:
@@ -2545,6 +2566,23 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
      pusch_config_pdu_0_1->frequency_hopping = dci->frequency_hopping_flag.val;
    /* MCS */
    pusch_config_pdu_0_1->mcs_index = dci->mcs;
+    /* MCS TABLE */
+    if (pusch_config->transformPrecoder == NULL) {
+      if (mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
+        pusch_config_pdu_0_1->transform_precoding = 1;
+      else
+        pusch_config_pdu_0_1->transform_precoding = 0;
+    }
+    else
+      pusch_config_pdu_0_1->transform_precoding = *pusch_config->transformPrecoder;
+      
+    if (pusch_config_pdu_0_1->transform_precoding == transform_precoder_disabled) 
+      pusch_config_pdu_0_1->mcs_table = get_pusch_mcs_table(pusch_config->mcs_Table, 0,
+                                                 dci_format, NR_RNTI_C, NR_SearchSpace__searchSpaceType_PR_ue_Specific, false);
+    else
+      pusch_config_pdu_0_1->mcs_table = get_pusch_mcs_table(pusch_config->mcs_TableTransformPrecoder, 1,
+                                                 dci_format, NR_RNTI_C, NR_SearchSpace__searchSpaceType_PR_ue_Specific, false);
+    
    /* NDI */
    pusch_config_pdu_0_1->pusch_data.new_data_indicator = dci->ndi;
    /* RV */
@@ -3250,7 +3288,7 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){

 }

-void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
+int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
 			 int dci_format,
 			 uint8_t dci_size,
 			 uint16_t rnti,
@@ -3274,6 +3312,33 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,

  int pos=0;
  int fsize=0;
+
+  if (rnti_type == NR_RNTI_C) {
+    // First find out the DCI format from the first bit (UE performed blind decoding)
+    pos++;
+    dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
+#ifdef DEBUG_EXTRACT_DCI
+    LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
+#endif
+
+    if (dci_format == NR_UL_DCI_FORMAT_0_0 || dci_format == NR_DL_DCI_FORMAT_1_0) {
+      if (dci_pdu_rel15->format_indicator == 0) 
+        dci_format = NR_UL_DCI_FORMAT_0_0;
+      else
+        dci_format = NR_DL_DCI_FORMAT_1_0;
+    }
+    else if (dci_format == NR_UL_DCI_FORMAT_0_1 || dci_format == NR_DL_DCI_FORMAT_1_1) {
+      // In case the sizes of formats 0_1 and 1_1 happen to be the same
+      if (dci_pdu_rel15->format_indicator == 0) 
+        dci_format = NR_UL_DCI_FORMAT_0_1;
+      else
+        dci_format = NR_DL_DCI_FORMAT_1_1;
+    }
+  }
+#ifdef DEBUG_EXTRACT_DCI
+  LOG_D(MAC, "DCI format is %d\n", dci_format);
+#endif
+  
  switch(dci_format) {

  case NR_DL_DCI_FORMAT_1_0:
@@ -3315,13 +3380,6 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,

    case NR_RNTI_C:
 	
-      // indicating a DL DCI format 1bit
-      pos++;
-      dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
-#ifdef DEBUG_EXTRACT_DCI
-      LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
-#endif
-  	
      // Freq domain assignment (275rb >> fsize = 16)
      fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
      pos+=fsize;
@@ -3522,18 +3580,16 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
    switch(rnti_type)
      {
      case NR_RNTI_C:
-	// indicating a DL DCI format 1bit
-	dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
-	// Freq domain assignment  max 16 bit
 	fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
 	pos+=fsize;
 	dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
 	// Time domain assignment 4bit
 	pos+=4;
 	dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf;
-	// Frequency hopping flag – 1 bit
-	pos++;
-	dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1;
+	// This is not supported yet - Skip for now
+  // Frequency hopping flag – 1 bit
+	//pos++;
+	//dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1;
 	// MCS  5 bit
 	pos+=5;
 	dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f;
@@ -3597,89 +3653,203 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
    break;

  case NR_DL_DCI_FORMAT_1_1:
-    // Format indicator
-    pos=1;
-    dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
-    // Carrier indicator
-    pos+=dci_pdu_rel15->carrier_indicator.nbits;
-    dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1);
-    // BWP Indicator
-    pos+=dci_pdu_rel15->bwp_indicator.nbits;
-    dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->bwp_indicator.nbits)-1);
-    // Frequency domain resource assignment
-    pos+=dci_pdu_rel15->frequency_domain_assignment.nbits;
-    dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->frequency_domain_assignment.nbits)-1);
-    // Time domain resource assignment
-    pos+=dci_pdu_rel15->time_domain_assignment.nbits;
-    dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->time_domain_assignment.nbits)-1);
-    // VRB-to-PRB mapping
-    pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits;
-    dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->vrb_to_prb_mapping.nbits)-1);
-    // PRB bundling size indicator
-    pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits;
-    dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->prb_bundling_size_indicator.nbits)-1);
-    // Rate matching indicator
-    pos+=dci_pdu_rel15->rate_matching_indicator.nbits;
-    dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rate_matching_indicator.nbits)-1);
-    // ZP CSI-RS trigger
-    pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits;
-    dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->zp_csi_rs_trigger.nbits)-1);
-    //TB1
-    // MCS 5bit
-    pos+=5;
-    dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f;
-    // New data indicator 1bit
-    pos+=1;
-    dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1;
-    // Redundancy version  2bit
-    pos+=2;
-    dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3;
-    //TB2
-    // MCS 5bit
-    pos+=dci_pdu_rel15->mcs2.nbits;
-    dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->mcs2.nbits)-1);
-    // New data indicator 1bit
-    pos+=dci_pdu_rel15->ndi2.nbits;
-    dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->ndi2.nbits)-1);
-    // Redundancy version  2bit
-    pos+=dci_pdu_rel15->rv2.nbits;
-    dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rv2.nbits)-1);
-    // HARQ process number  4bit
-    pos+=4;
-    dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
-    // Downlink assignment index
-    pos+=dci_pdu_rel15->dai[0].nbits;
-    dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->dai[0].nbits)-1);
-    // TPC command for scheduled PUCCH  2bit
-    pos+=2;
-    dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3;
-    // PUCCH resource indicator  3bit
-    pos+=3;
-    dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3;
-    // PDSCH-to-HARQ_feedback timing indicator
-    pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits;
-    dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits)-1);
-    // Antenna ports
-    pos+=dci_pdu_rel15->antenna_ports.nbits;
-    dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->antenna_ports.nbits)-1);
-    // TCI
-    pos+=dci_pdu_rel15->transmission_configuration_indication.nbits;
-    dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->transmission_configuration_indication.nbits)-1);
-    // SRS request
-    pos+=dci_pdu_rel15->srs_request.nbits;
-    dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->srs_request.nbits)-1);
-    // CBG transmission information
-    pos+=dci_pdu_rel15->cbgti.nbits;
-    dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgti.nbits)-1);
-    // CBG flushing out information
-    pos+=dci_pdu_rel15->cbgfi.nbits;
-    dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgfi.nbits)-1);
-    // DMRS sequence init
-    pos+=1;
-    dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1;
-    break;
+  switch(rnti_type)
+    {
+      case NR_RNTI_C:
+        // Carrier indicator
+        pos+=dci_pdu_rel15->carrier_indicator.nbits;
+        dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1);
+        // BWP Indicator
+        pos+=dci_pdu_rel15->bwp_indicator.nbits;
+        dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->bwp_indicator.nbits)-1);
+        // Frequency domain resource assignment
+        pos+=dci_pdu_rel15->frequency_domain_assignment.nbits;
+        dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->frequency_domain_assignment.nbits)-1);
+        // Time domain resource assignment
+        pos+=dci_pdu_rel15->time_domain_assignment.nbits;
+        dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->time_domain_assignment.nbits)-1);
+        // VRB-to-PRB mapping
+        pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits;
+        dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->vrb_to_prb_mapping.nbits)-1);
+        // PRB bundling size indicator
+        pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits;
+        dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->prb_bundling_size_indicator.nbits)-1);
+        // Rate matching indicator
+        pos+=dci_pdu_rel15->rate_matching_indicator.nbits;
+        dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rate_matching_indicator.nbits)-1);
+        // ZP CSI-RS trigger
+        pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits;
+        dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->zp_csi_rs_trigger.nbits)-1);
+        //TB1
+        // MCS 5bit
+        pos+=5;
+        dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f;
+        // New data indicator 1bit
+        pos+=1;
+        dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1;
+        // Redundancy version  2bit
+        pos+=2;
+        dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3;
+        //TB2
+        // MCS 5bit
+        pos+=dci_pdu_rel15->mcs2.nbits;
+        dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->mcs2.nbits)-1);
+        // New data indicator 1bit
+        pos+=dci_pdu_rel15->ndi2.nbits;
+        dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->ndi2.nbits)-1);
+        // Redundancy version  2bit
+        pos+=dci_pdu_rel15->rv2.nbits;
+        dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rv2.nbits)-1);
+        // HARQ process number  4bit
+        pos+=4;
+        dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
+        // Downlink assignment index
+        pos+=dci_pdu_rel15->dai[0].nbits;
+        dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->dai[0].nbits)-1);
+        // TPC command for scheduled PUCCH  2bit
+        pos+=2;
+        dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3;
+        // PUCCH resource indicator  3bit
+        pos+=3;
+        dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3;
+        // PDSCH-to-HARQ_feedback timing indicator
+        pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits;
+        dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits)-1);
+        // Antenna ports
+        pos+=dci_pdu_rel15->antenna_ports.nbits;
+        dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->antenna_ports.nbits)-1);
+        // TCI
+        pos+=dci_pdu_rel15->transmission_configuration_indication.nbits;
+        dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->transmission_configuration_indication.nbits)-1);
+        // SRS request
+        pos+=dci_pdu_rel15->srs_request.nbits;
+        dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->srs_request.nbits)-1);
+        // CBG transmission information
+        pos+=dci_pdu_rel15->cbgti.nbits;
+        dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgti.nbits)-1);
+        // CBG flushing out information
+        pos+=dci_pdu_rel15->cbgfi.nbits;
+        dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgfi.nbits)-1);
+        // DMRS sequence init
+        pos+=1;
+        dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1;
+        break;
+      }
+      break;

-  }
+  case NR_UL_DCI_FORMAT_0_1:
+    switch(rnti_type)
+      {
+      case NR_RNTI_C:
+        // Carrier indicator
+        pos+=dci_pdu_rel15->carrier_indicator.nbits;
+        dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1);
+        
+        // UL/SUL Indicator
+        pos+=dci_pdu_rel15->ul_sul_indicator.nbits;
+        dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->ul_sul_indicator.nbits)-1);
+        
+        // BWP Indicator
+        pos+=dci_pdu_rel15->bwp_indicator.nbits;
+        dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->bwp_indicator.nbits)-1);
+        
+        // Freq domain assignment  max 16 bit
+        fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
+        //pos+=dci_pdu_rel15->frequency_domain_assignment.nbits;
+        pos+=fsize;
+        
+        //pos+=dci_pdu_rel15->frequency_domain_assignment.nbits;
+        dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
+        
+        // Time domain assignment 4bit
+        //pos+=4;
+        pos+=dci_pdu_rel15->time_domain_assignment.nbits;
+        dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3;
+        
+        // Not supported yet - skip for now
+        // Frequency hopping flag – 1 bit 
+        //pos++;
+        //dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1;
+
+        // MCS  5 bit
+        pos+=5;
+        dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f;
+
+        // New data indicator 1bit
+        pos++;
+        dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1;
+
+        // Redundancy version  2bit
+        pos+=2;
+        dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3;
+
+        // HARQ process number  4bit
+        pos+=4;
+        dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
+
+        // 1st Downlink assignment index
+        pos+=dci_pdu_rel15->dai[0].nbits;
+        dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->dai[0].nbits)-1);
+
+        // 2nd Downlink assignment index
+        pos+=dci_pdu_rel15->dai[1].nbits;
+        dci_pdu_rel15->dai[1].val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->dai[1].nbits)-1);
+
+        // TPC command for scheduled PUSCH – 2 bits
+        pos+=2;
+        dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3;
+
+        // SRS resource indicator
+        pos+=dci_pdu_rel15->srs_resource_indicator.nbits;
+        dci_pdu_rel15->srs_resource_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->srs_resource_indicator.nbits)-1);
+
+        // Precoding info and n. of layers
+        pos+=dci_pdu_rel15->precoding_information.nbits;
+        dci_pdu_rel15->precoding_information.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->precoding_information.nbits)-1);
+
+        // Antenna ports
+        pos+=dci_pdu_rel15->antenna_ports.nbits;
+        dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->antenna_ports.nbits)-1);
+
+        // SRS request
+        pos+=dci_pdu_rel15->srs_request.nbits;
+        dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->srs_request.nbits)-1);
+
+        // CSI request
+        pos+=dci_pdu_rel15->csi_request.nbits;
+        dci_pdu_rel15->csi_request.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->csi_request.nbits)-1);
+
+        // CBG transmission information
+        pos+=dci_pdu_rel15->cbgti.nbits;
+        dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgti.nbits)-1);
+
+        // PTRS DMRS association
+        pos+=dci_pdu_rel15->ptrs_dmrs_association.nbits;
+        dci_pdu_rel15->ptrs_dmrs_association.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->ptrs_dmrs_association.nbits)-1);
+
+        // Beta offset indicator
+        pos+=dci_pdu_rel15->beta_offset_indicator.nbits;
+        dci_pdu_rel15->beta_offset_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->beta_offset_indicator.nbits)-1);
+
+        // DMRS sequence initialization
+        pos+=dci_pdu_rel15->dmrs_sequence_initialization.nbits;
+        dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->dmrs_sequence_initialization.nbits)-1);
+
+        // UL-SCH indicator
+        pos+=1;
+        dci_pdu_rel15->ulsch_indicator = (*dci_pdu>>(dci_size-pos))&0x1;
+
+        // UL/SUL indicator – 1 bit
+        /* commented for now (RK): need to get this from BWP descriptor
+          if (cfg->pucch_config.pucch_GroupHopping.value)
+          dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++);
+        */
+        break;
+      }
+    break;
+       }
+    
+    return dci_format;
 }


@@ -864,7 +864,8 @@ void schedule_fapi_ul_pdu(int Mod_idP,
   * conditions might exclude each other and never be true */
  const int slot_idx = (slotP + K2) % num_slots_per_tdd;
  if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx)
-        && (!get_softmodem_params()->phy_test || slotP == 6)) {
+      && (!get_softmodem_params()->phy_test || slot_idx == 8)) {
+
    nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0];
    UL_dci_req->SFN = frameP;
    UL_dci_req->Slot = slotP;
@@ -976,7 +977,7 @@ void schedule_fapi_ul_pdu(int Mod_idP,
      if (get_softmodem_params()->phy_test==1)
        pusch_pdu->rb_size = 50;
      else
-        pusch_pdu->rb_size = 5;
+        pusch_pdu->rb_size = pusch_pdu->bwp_size;
    }
    else
      AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n");
@@ -1633,7 +1633,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
        UE_info->num_UEs);
  dump_nr_ue_list(&UE_info->list);

-  for (int i = 0; i < MAX_MOBILES_PER_ENB; i++) {
+  for (int i = 0; i < MAX_MOBILES_PER_GNB; i++) {
    if (UE_info->active[i])
      continue;

@@ -1684,7 +1684,8 @@ void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti)
  NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info;

  for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
-    if (!UE_info->active[i])
+
+    if (UE_info->active[i] != TRUE)
      continue;
    if (UE_info->rnti[i] != rnti)
      continue;
@@ -357,9 +357,9 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
    return;
  }

-
  if (UE_id != -1) {
    UE_scheduling_control = &(UE_info->UE_sched_ctrl[UE_id]);
+
    UE_info->mac_stats[UE_id].ulsch_total_bytes_rx += sdu_lenP;
    LOG_D(MAC, "[gNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH sdu from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
          gnb_mod_idP,