From 434186fd9f1cd60d7b469c9be276fbf7465dce2d Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 11 Nov 2020 16:42:46 +0100 Subject: [PATCH 1/4] Correct TA timer condition - wrap around 1024 (frame number is 0-1023) - check for equality of frames with high numbers will trigger every 10ms --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index a3c724e6f6..6a04e06073 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -641,7 +641,7 @@ void nr_schedule_ue_spec(module_id_t module_id, * Possible improvement: take the periodicity from input file. * If such UE is not scheduled now, it will be by the preprocessor later. * If we add the CE, ta_apply will be reset */ - if (frame >= (sched_ctrl->ta_frame + 10) % 1023) + if (frame == (sched_ctrl->ta_frame + 10) % 1024) sched_ctrl->ta_apply = true; /* the timer is reset once TA CE is scheduled */ if (sched_ctrl->rbSize <= 0) From 67d63111437b7ab9e92afea8d7a021343b5cb0ab Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 11 Nov 2020 16:47:18 +0100 Subject: [PATCH 2/4] Hotfix: disable TA to keep RTT low + HARQ retx intact --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 6a04e06073..7a7fe1288c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -642,7 +642,7 @@ void nr_schedule_ue_spec(module_id_t module_id, * If such UE is not scheduled now, it will be by the preprocessor later. * If we add the CE, ta_apply will be reset */ if (frame == (sched_ctrl->ta_frame + 10) % 1024) - sched_ctrl->ta_apply = true; /* the timer is reset once TA CE is scheduled */ + sched_ctrl->ta_apply = false; /* the timer is reset once TA CE is scheduled */ if (sched_ctrl->rbSize <= 0) continue; From 308de3b68d7c2dc3e619a2c7671839fe874c5222 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 11 Nov 2020 16:48:40 +0100 Subject: [PATCH 3/4] Lower PHY/HARQ log level --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 6 +++--- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 1fd89ea568..83a66b55fb 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -412,7 +412,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_confidence_level = (no_conf) ? 1 : 0; uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1); uci_pdu->harq->harq_list[0].harq_value = index&0x01; - LOG_I(PHY, "Slot %d HARQ value %d with confidence level (0 is good, 1 is bad) %d\n", + LOG_D(PHY, "Slot %d HARQ value %d with confidence level (0 is good, 1 is bad) %d\n", slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); @@ -427,7 +427,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2); uci_pdu->harq->harq_list[1].harq_value = index&0x01; uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01; - LOG_I(PHY, "Slot %d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d\n", + LOG_D(PHY, "Slot %d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d\n", slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); @@ -1464,7 +1464,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB, } } // cw loop corr_dB = dB_fixed64((uint64_t)corr); - LOG_I(PHY,"cw_ML %d, metric %d dB\n",cw_ML,corr_dB); + LOG_D(PHY,"cw_ML %d, metric %d dB\n",cw_ML,corr_dB); decodedPayload[0]=(uint64_t)cw_ML; } else { // polar coded case diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 148f77c768..74eee7077f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -372,7 +372,7 @@ void nr_schedule_pucch(int Mod_idP, memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t)); UL_tti_req->n_pdus+=1; - LOG_I(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n", + LOG_D(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n", frameP,slotP,O_sr,O_ack,curr_pucch->csi_bits); nr_configure_pucch(pucch_pdu, From fe6f7244df16a451e3aaa25d2839507e57001cb6 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 6 Nov 2020 16:59:37 +0100 Subject: [PATCH 4/4] Fix compiler warning: %ld in printf --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 74eee7077f..5d701bf5b8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -449,7 +449,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, break; default: - AssertFatal(1==0,"Undefined tdd period %d\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); + AssertFatal(1==0,"Undefined tdd period %ld\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); } int num_slots_per_tdd = (slots_per_frame[*scc->ssbSubcarrierSpacing])/nb_periods_per_frame;