From 6377d5a73af3da8736c81e1e2e4b24ecd51e5c40 Mon Sep 17 00:00:00 2001 From: Guy De Souza Date: Thu, 7 Feb 2019 14:18:21 +0100 Subject: [PATCH] PDCCH procedure debugs --- cmake_targets/CMakeLists.txt | 2 +- .../CODING/nrPolar_tools/nr_polar_decoder.c | 1 - openair1/PHY/MODULATION/slot_fep_nr.c | 4 +-- openair1/PHY/NR_REFSIG/nr_dmrs_rx.c | 1 + openair1/PHY/NR_TRANSPORT/nr_dci.c | 28 +++++++++---------- openair1/PHY/NR_TRANSPORT/nr_dci_tools.c | 26 +++++++++-------- .../nr_dl_channel_estimation.c | 1 + openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 22 +++++++-------- openair1/SIMULATION/NR_PHY/dlsim.c | 16 ++++++----- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 8 ++++-- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 10 ++++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 4 +-- openair2/LAYER2/NR_MAC_gNB/main.c | 4 ++- 13 files changed, 69 insertions(+), 58 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index c4e2399351..40fbb2d117 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -2651,7 +2651,7 @@ if (${T_TRACER}) #all "add_executable" definitions (except tests, rb_tool, updatefw) lte-softmodem lte-softmodem-nos1 lte-uesoftmodem lte-uesoftmodem-nos1 nr-softmodem nr-softmodem-nos1 nr-uesoftmodem nr-uesoftmodem-nos1 - dlsim_tm4 dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim + dlsim_tm4 nr_dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim ulsim ldpctest polartest #all "add_library" definitions diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c index 305a9c6266..91d20b51bb 100644 --- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c +++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c @@ -1160,7 +1160,6 @@ uint32_t polar_decoder_int16(int16_t *input, out[0]=Ar; - return(crc^rxcrc); diff --git a/openair1/PHY/MODULATION/slot_fep_nr.c b/openair1/PHY/MODULATION/slot_fep_nr.c index 8ef29d016d..0815055889 100644 --- a/openair1/PHY/MODULATION/slot_fep_nr.c +++ b/openair1/PHY/MODULATION/slot_fep_nr.c @@ -55,9 +55,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10; unsigned int rx_offset; NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0]; - uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB; + uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;//+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB; uint16_t nb_rb_coreset = 24; - uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset+516; + uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;//+516; uint16_t nb_rb_pdsch = 50; uint8_t p=0; uint8_t l0 = 2; diff --git a/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c b/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c index 2e5ad47d91..e0c17bfb75 100644 --- a/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c +++ b/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c @@ -32,6 +32,7 @@ //#define NR_PBCH_DMRS_LENGTH_DWORD 5 //#define NR_PBCH_DMRS_LENGTH 144 +//#define DEBUG_PDCCH #include "refsig_defs_ue.h" #include "PHY/defs_nr_UE.h" diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 86701b23b8..dba114ed8a 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -35,7 +35,6 @@ //#define DEBUG_PDCCH_DMRS //#define DEBUG_DCI //#define DEBUG_CHANNEL_CODING -#define PDCCH_TEST_POLAR_TEMP_FIX extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT]; @@ -154,7 +153,7 @@ void nr_pdcch_scrambling(uint32_t *in, } } (*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f); - // printf("nr_pdcch_scrambling: in %d => out %d\n",((*in)>>(i&0x1f))&1,((*out)>>(i&0x1f))&1); + //printf("nr_pdcch_scrambling: in %d seq 0x%08x => out %d\n",((*in)>>(i&0x1f))&1,s,((*out)>>(i&0x1f))&1); } } @@ -186,9 +185,10 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, * in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0 * or the rb_offset for other coresets * in time: by its first slot and its first symbol*/ - if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1) - cset_start_sc = frame_parms.first_carrier_offset + frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB + - pdcch_params.rb_offset*NR_NB_SC_PER_RB; + if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1){ + cset_start_sc = frame_parms.first_carrier_offset + (frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB + + pdcch_params.rb_offset)*NR_NB_SC_PER_RB; + } else cset_start_sc = frame_parms.first_carrier_offset + pdcch_params.rb_offset*NR_NB_SC_PER_RB; @@ -208,7 +208,8 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, /*There is a need to shift from which index the pregenerated DMRS sequence is used * see 38211 r15.2.0 section 7.4.1.3.2: assumption is the reference point for k refers to the DMRS sequence*/ if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG) { - gold_pdcch_dmrs += (pdcch_params.rb_offset*3)>>5; + for (int symb=cset_start_symb; symb>5; dmrs_offset = (pdcch_params.rb_offset*3)&0x1f; LOG_I(PHY, "PDCCH DMRS offset %d\n", dmrs_offset); } @@ -244,8 +245,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, /// DCI payload processing // CRC attachment + Scrambling + Channel coding + Rate matching uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD]; - uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? - ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0; + uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti:0; uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value; @@ -256,12 +256,12 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, #ifdef DEBUG_CHANNEL_CODING printf("polar rnti %d\n",pdcch_params.rnti); - for (int i=0;i<54;i++) printf("Encoded Payload: [%d]->0x%08x \n", i,encoder_output[i]); - - printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", - dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]); - printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", - encoder_output[0], encoder_output[1], encoder_output[2], encoder_output[3]); + printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n", + dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1]); + printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5); + for (int i=0;i>5;i++) + printf("[%d]->0x%08x \t", i,encoder_output[i]); + printf("\n"); #endif /// Scrambling diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c index 9b28be8ff2..f8d4c20813 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c @@ -61,10 +61,11 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m else { //NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC } - uint8_t cond = N_reg%(bsize*R); - AssertFatal(cond==0, "CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %d, bsize %d R %d)\n", - N_reg, bsize, R); - C = N_reg/(bsize*R); + if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { + AssertFatal((N_reg%(bsize*R))==0, "CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %d, bsize %d R %d)\n", + N_reg, bsize, R); + C = N_reg/(bsize*R); + } tmp = L * (( Y + (m*N_cce)/(L*M_s_max) + n_CI ) % (N_cce/L)); @@ -190,14 +191,16 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, #endif break; - case NFAPI_NR_RNTI_C: + case NFAPI_NR_RNTI_C: + // indicating a DL DCI format 1bit pos++; *dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos); + // Freq domain assignment (275rb >> fsize = 16) fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); pos+=fsize; - *dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<size-pos)); + *dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<size-pos)); if (((pdu_rel15->frequency_domain_assignment+1)&1) ==0) //fsize are all 1 38.212 p86 { @@ -224,8 +227,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, // Time domain assignment 4bit pos+=4; - *dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos)); - + *dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos)); // VRB to PRB mapping 1bit pos++; @@ -245,7 +247,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, // HARQ process number 4bit pos+=4; - *dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos)); + *dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos)); // Downlink assignment index 2bit pos+=2; @@ -253,15 +255,15 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, // TPC command for scheduled PUCCH 2bit pos+=2; - *dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos)); + *dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos)); // PUCCH resource indicator 3bit pos+=3; - *dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos)); + *dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos)); // PDSCH-to-HARQ_feedback timing indicator 3bit pos+=3; - *dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos)); + *dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos)); } //end else break; diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c index 942bf8c0ba..33d1f2d758 100644 --- a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c +++ b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c @@ -29,6 +29,7 @@ #include "filt16a_32.h" #include "T.h" //#define DEBUG_PDSCH +//#define DEBUG_PDCCH int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index 3659be8456..497a91c4a6 100755 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -49,7 +49,7 @@ //#define NR_LTE_PDCCH_DCI_SWITCH #define NR_PDCCH_DCI_RUN // activates new nr functions -#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs +//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs #define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0) #define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0) #define PDCCH_TEST_POLAR_TEMP_FIX @@ -805,7 +805,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, // For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1) //uint32_t n_BWP_start = 0; //uint32_t n_rb_offset = 0; - uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB); + uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset/*+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)*/; // start time position for CORESET // parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot uint8_t start_symbol = 0; @@ -1048,7 +1048,7 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8 x2 = (((1<<16)*n_rnti)+n_id); //mod 2^31 is implicit //this is c_init in 38.211 v15.1.0 Section 7.3.2.3 // x2 = (nr_tti_rx << 9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2 #ifdef NR_PDCCH_DCI_DEBUG - printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length); + //printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length); #endif for (i = 0; i < length; i++) { if ((i & 0x1f) == 0) { @@ -1118,13 +1118,13 @@ void nr_dci_decoding_procedure0(int s, uint32_t *CCEmap1, uint32_t *CCEmap2) { - uint16_t crc, CCEind, nCCE[3]; + uint32_t crc, CCEind, nCCE[3]; uint32_t *CCEmap = NULL, CCEmap_mask = 0; uint8_t L2 = (1 << L); unsigned int Yk, nb_candidates = 0, i, m; unsigned int CCEmap_cand; - int8_t decoderState=0; + uint32_t decoderState=0; // A[p], p is the current active CORESET uint16_t A[3]={39827,39829,39839}; @@ -1361,17 +1361,17 @@ void nr_dci_decoding_procedure0(int s, #endif */ - uint32_t dci_estimation[4]={0}; - + uint64_t dci_estimation[2]={0}; nr_polar_init(&nrPolar_params, 1, sizeof_bits, L2); - t_nrPolar_paramsPtr currentPtrDCI=nr_polar_params(nrPolar_params, 1, sizeof_bits, L2); decoderState = polar_decoder_int16(&pdcch_vars[eNB_id]->e_rx[CCEind*9*6*2], - (uint64_t*)dci_estimation, + dci_estimation, currentPtrDCI); - crc = decoderState; + crc = decoderState; + + //crc = (crc16(&dci_decoded_output[current_thread_id][0], sizeof_bits) >> 16) ^ extract_crc(&dci_decoded_output[current_thread_id][0], sizeof_bits); #ifdef NR_PDCCH_DCI_DEBUG printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we end function dci_decoding() with crc=%x\n",crc); @@ -2834,7 +2834,7 @@ uint8_t nr_dci_decoding_procedure(int s, printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n", css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes); #endif - for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8 + for (int aggregationLevel = 3; aggregationLevel<4 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8 //for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) { // for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0 #ifdef NR_PDCCH_DCI_DEBUG diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index f3a3219d71..1a47e6c5e4 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -395,11 +395,11 @@ int main(int argc, char **argv) frame_parms->N_RB_UL = N_RB_DL; // stub to configure frame_parms - nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu); + nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell); // call MAC to configure common parameters phy_init_nr_gNB(gNB,0,0); - + mac_top_init_gNB(); double fs,bw; @@ -501,6 +501,8 @@ int main(int argc, char **argv) nr_l2_init_ue(); UE_mac = get_mac_inst(0); + + UE->pdcch_vars[0][0]->crnti = 0x1234; UE->if_inst = nr_ue_if_module_init(0); UE->if_inst->scheduled_response = nr_ue_scheduled_response; @@ -517,7 +519,7 @@ int main(int argc, char **argv) gNB->pbch_configured = 1; for (int i=0;i<4;i++) gNB->pbch_pdu[i]=i+1; - nr_schedule_css_dlsch_phytest(0,frame,slot); + nr_schedule_uss_dlsch_phytest(0,frame,slot); Sched_INFO.module_id = 0; Sched_INFO.CC_id = 0; Sched_INFO.frame = frame; @@ -598,7 +600,7 @@ int main(int argc, char **argv) // Type0 PDCCH search space dl_config.number_pdus = 1; dl_config.dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; - dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 3; // to be set + dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234; // to be set uint64_t mask = 0x0; uint16_t num_rbs=24; @@ -613,9 +615,9 @@ int main(int argc, char **argv) dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.duration = num_symbols; - dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_INTERLEAVED; - dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2 - dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2 + dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_NON_INTERLEAVED; + dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 0; // L 38.211 7.3.2.2 + dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 0; // R 38.211 7.3.2.2 dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_shift_index = cell_id; dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE; dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.pdcch_dmrs_scrambling_id = cell_id; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 2c95353219..dcf372198e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -237,11 +237,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, dlsch_pdu_rel15->ndi = 1; dlsch_pdu_rel15->redundancy_version = 0; - nr_configure_dci_from_pdcch_config(params_rel15, coreset, search_space, - cfg); + *cfg, + dl_carrier_bandwidth); pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value); pdu_rel15->time_domain_assignment = get_SLIV(dlsch_pdu_rel15->start_symbol, dlsch_pdu_rel15->nb_symbols); @@ -271,12 +271,14 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, params_rel15->rnti = rnti; params_rel15->rnti_type = NFAPI_NR_RNTI_C; params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0; + //params_rel15->aggregation_level = 1; - LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \ + LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d, config type %d\n \ coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d \n \ ss params : first symb %d, ss type %d\n", params_rel15->rnti, params_rel15->rnti_type, + params_rel15->config_type, params_rel15->dci_format, params_rel15->mux_pattern, params_rel15->n_rb, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 817fad3367..483bc0e0bf 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -347,11 +347,12 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, nfapi_nr_coreset_t* coreset, nfapi_nr_search_space_t* search_space, - nfapi_nr_config_request_t cfg) { + nfapi_nr_config_request_t cfg, + uint16_t N_RB) { /// coreset //ControlResourceSetId - pdcch_params->config_type = (coreset->coreset_id==0)?NFAPI_NR_CSET_CONFIG_MIB_SIB1: NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; + pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; //frequencyDomainResources uint8_t count=0, start=0, start_set=0; @@ -377,8 +378,8 @@ void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel1 pdcch_params->interleaver_size = coreset->interleaver_size; } else { - pdcch_params->reg_bundle_size = 6; - pdcch_params->interleaver_size = 1; + pdcch_params->reg_bundle_size = 0; + pdcch_params->interleaver_size = 0; } //shift index @@ -495,6 +496,7 @@ void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel1 } } */ + pdcch_params->n_RB_BWP = N_RB; } int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 8750d2819a..c0ba26fb5d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -84,11 +84,11 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space, uint16_t slot, nfapi_nr_config_request_t cfg); -void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, +void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, nfapi_nr_coreset_t* coreset, nfapi_nr_search_space_t* search_space, nfapi_nr_config_request_t cfg, - uint8_t pdcch_scs); + uint16_t N_RB); int get_dlscs(nfapi_nr_config_request_t *cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index b8e53d86d9..7e6705d87f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -47,9 +47,11 @@ extern RAN_CONTEXT_t RC; void nr_init_coreset(nfapi_nr_coreset_t *coreset) { coreset->coreset_id = 1; - coreset->frequency_domain_resources = 0x1FFFE0000000; // 96 RB starting from CRB0 + coreset->frequency_domain_resources = 0x1E0000000000;//0x1FFFE0000000; // 96 RB starting from CRB0 coreset->duration = 2; coreset->cce_reg_mapping_type = NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED; + coreset->reg_bundle_size = 6; + coreset->interleaver_size = 2; coreset->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE; coreset->tci_present_in_dci = 0; coreset->dmrs_scrambling_id = 0;