diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 84f90d48ae..d2193d5f63 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -64,18 +64,18 @@ uint8_t vnf_first_sched_entry = 1; void clear_nr_nfapi_information(gNB_MAC_INST * gNB, int CC_idP, frame_t frameP, - sub_frame_t slotP){ + sub_frame_t slotP) +{ NR_ServingCellConfigCommon_t *scc = gNB->common_channels->ServingCellConfigCommon; const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; UL_tti_req_ahead_initialization(gNB, scc, num_slots, CC_idP); - nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; + nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP]; - nfapi_nr_ul_tti_request_t *future_ul_tti_req = - &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; - nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; - nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0]; + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; + nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; + nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0]; gNB->pdu_index[CC_idP] = 0; @@ -223,7 +223,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, nr_schedule_srs(module_idP, frame); // This schedule RA procedure if not in phy_test mode - // Otherwise already consider 5G already connected + // Otherwise consider 5G already connected if (get_softmodem_params()->phy_test == 0) { nr_schedule_RA(module_idP, frame, slot); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 9f78ac06c1..da84ccd18f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -344,7 +344,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ const int mu = ul_bwp->scs; const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ul_bwp->tdaList; - const int temp_tda = get_ul_tda(nr_mac, scc, slot); + const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); if (temp_tda < 0) return false; AssertFatal(temp_tda < tdaList->list.count, @@ -354,7 +354,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ int K2 = get_K2(ul_bwp->tdaList, temp_tda, mu); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; - const int tda = get_ul_tda(nr_mac, scc, sched_slot); + const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot); if (tda < 0) return false; AssertFatal(tda < tdaList->list.count, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c index 8eddea2eab..d58eb8885d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c @@ -174,7 +174,7 @@ void nr_schedule_srs(int module_id, frame_t frame) { int n_slots_frame = nr_slots_per_frame[current_BWP->scs]; // Check if UE will transmit the SRS in this frame - if ( ((frame - offset/n_slots_frame)*n_slots_frame)%period == 0) { + if (((frame - offset / n_slots_frame) * n_slots_frame) % period == 0) { LOG_D(NR_MAC,"Scheduling SRS reception for %d.%d\n", frame, offset%n_slots_frame); nr_fill_nfapi_srs(module_id, CC_id, UE, offset%n_slots_frame, srs_resource_set, srs_resource); sched_ctrl->sched_srs.frame = frame; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 0318418370..411950ebe6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -39,7 +39,7 @@ //#define SRS_IND_DEBUG -const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot) { +const int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int frame, int slot) { /* there is a mixed slot only when in TDD */ const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; @@ -48,8 +48,16 @@ const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon if (tdd && tdd->nrofUplinkSymbols > 1) { // if there is uplink symbols in mixed slot const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + 1; if ((slot%nr_slots_period) == tdd->nrofDownlinkSlots) + return 2; + } + + // Avoid slots with the SRS + UE_iterator(nrmac->UE_info.list, UE) { + NR_sched_srs_t sched_srs = UE->UE_sched_ctrl.sched_srs; + if(sched_srs.srs_scheduled && sched_srs.frame == frame && sched_srs.slot == slot) return 1; } + return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) } @@ -1573,7 +1581,7 @@ void pf_ul(module_id_t module_id, LOG_D(NR_MAC,"pf_ul: UE %04x harq_pid %d\n",UE->rnti,sched_pusch->ul_harq_pid); if (sched_pusch->ul_harq_pid >= 0) { /* Allocate retransmission*/ - const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot); + const int tda = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); bool r = allocate_ul_retransmission(nrmac, frame, slot, rballoc_mask, &n_rb_sched, UE, sched_pusch->ul_harq_pid, scc, tda); if (!r) { LOG_D(NR_MAC, "%4d.%2d UL retransmission UE RNTI %04x can NOT be allocated\n", frame, slot, UE->rnti); @@ -1628,7 +1636,7 @@ void pf_ul(module_id_t module_id, } sched_pusch->nrOfLayers = 1; - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot); + sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation); sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, @@ -1715,7 +1723,7 @@ void pf_ul(module_id_t module_id, NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; sched_pusch->nrOfLayers = 1; - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot); + sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation); sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, @@ -1812,11 +1820,11 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t NR_UE_sched_ctrl_t *sched_ctrl = &nr_mac->UE_info.list[0]->UE_sched_ctrl; NR_UE_UL_BWP_t *current_BWP = &nr_mac->UE_info.list[0]->current_UL_BWP; int mu = current_BWP->scs; - const int temp_tda = get_ul_tda(nr_mac, scc, slot); + const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); int K2 = get_K2(current_BWP->tdaList, temp_tda, mu); const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; - const int tda = get_ul_tda(nr_mac, scc, sched_slot); + const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot); if (tda < 0) return false; DevAssert(K2 == get_K2(current_BWP->tdaList, tda, mu)); @@ -1824,14 +1832,6 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) return false; - // Avoid slots with the SRS - UE_iterator(nr_mac->UE_info.list, UE) { - NR_sched_srs_t sched_srs = UE->UE_sched_ctrl.sched_srs; - if(sched_srs.srs_scheduled && sched_srs.frame==sched_frame && sched_srs.slot==sched_slot) { - return false; - } - } - sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.frame = sched_frame; UE_iterator(nr_mac->UE_info.list, UE2) { diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 4fe6309102..59eebda80b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -471,7 +471,7 @@ void set_sched_pucch_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_ServingCellConfigCommon_t *scc); const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); -const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); +const int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int frame, int slot); int get_cce_index(const gNB_MAC_INST *nrmac, const int CC_id, diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c index 0912aa6906..62713e36b5 100644 --- a/openair2/RRC/NR/nr_rrc_config.c +++ b/openair2/RRC/NR/nr_rrc_config.c @@ -712,11 +712,19 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){ pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(0,13); ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); + // UL TDA index 1 in case of SRS + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation1 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation1->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation1->k2 = k2; + pusch_timedomainresourceallocation1->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation1->startSymbolAndLength = get_SLIV(0,12); + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation1); + if(frame_type==TDD) { if(scc->tdd_UL_DL_ConfigurationCommon) { int ul_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols; if (ul_symb>1) { - // UL TDA index 1 for mixed slot (TDD) + // UL TDA index 2 for mixed slot (TDD) pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); *pusch_timedomainresourceallocation->k2 = k2; @@ -724,7 +732,7 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){ pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); } - // UL TDA index 2 for msg3 in the mixed slot (TDD) + // UL TDA index 3 for msg3 in the mixed slot (TDD) int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); int nb_slots_per_period = ((1<