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Merge remote-tracking branch 'origin/nfapi-fixes' into integration_2025_w04 (!2999)

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Repair nFAPI in 5G

Add 5G nFAPI in OAI/Make it it work.

Many commits in this branch are basically bug fixes of things that don't work
properly, such as

- check for correct conditions (e.g. instance numbers in the RAN context)
- remove artificial limitation (e.g. only one PUCCH per TDD period in the PNF)
- improve performance (reduce big mallocs, make some static buffers such as a
  global ring buffer for nFAPI messages in the PNF)
- fix bugs in nFAPI (e.g., increase maximum message size to ~64kB instead of
  1500 bytes, because the latter is way too small for many TX_data.requests in
  5G, and it will delay message arrival unduly)
- fix bugs in message enc/dec (e.g., handle FDD in config.request)
- adjust the L1 such that the condition "we run monolithic" is not necessery
  (e.g., some message numbers in nFAPI struct where reset in MAC, instead of
  L1, and this breaks when running the PNF)

There are instructions that explain how to set it up. Two CI tests have been
added, one with COTS UE and MIMO in DL+UL in TDD numerology 1 (30kHz), and a
second test with FDD mu=0 (15kHZ) in RFsimulator.

These were some old to-dos that have been addressed.

- test with COTS UE - 4x4 pipeline works good in DL, UL now also work
- test in RFsim
- make PNF status message
- make FDD in u0 work
This commit is contained in:
Jaroslava Fiedlerova
2025-01-27 15:46:19 +01:00
parent 377ff8970e 382820dce2
commit 699f2e5d81
80 changed files with 2104 additions and 21998 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+2 -2
View File
@@ -93,7 +93,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
harq->unav_res = ptrsSymbPerSlot * n_ptrs;
/// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
AssertFatal(harq->pdu != NULL, "%4d.%2d no HARQ PDU for PDSCH generation\n", msgTx->frame, msgTx->slot);
/* output and its parts for each dlsch should be aligned on 64 bytes
* => size_output is a sum of parts sizes rounded up to a multiple of 64
@@ -533,7 +533,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
int rb = 0;
while(rb < rel15->rbSize) {
//get pmi info
const int pmi = (pb->prg_size > 0) ? (pb->prgs_list[(int)rb / pb->prg_size].pm_idx) : 0;
const int pmi = (pb->num_prgs > 0 && pb->prg_size > 0) ? (pb->prgs_list[(int)rb / pb->prg_size].pm_idx) : 0;
const int pmi2 = (rb < (rel15->rbSize - 1) && pb->prg_size > 0) ? (pb->prgs_list[(int)(rb+1)/pb->prg_size].pm_idx) : -1;
// If pmi of next RB and pmi of current RB are the same, we do 2 RB in a row
openair1/PHY/NR_TRANSPORT/nr_dlsch.h
+2 -5
View File
@@ -35,9 +35,8 @@
#include "PHY/defs_gNB.h"
void nr_fill_dlsch(processingData_L1tx_t *msgTx,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
unsigned char *sdu);
void nr_fill_dlsch_dl_tti_req(processingData_L1tx_t *msgTx, nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu);
void nr_fill_dlsch_tx_req(processingData_L1tx_t *msgTx, int idx, uint8_t *sdu);
void nr_generate_pdsch(processingData_L1tx_t *msgTx,
int frame,
@@ -57,8 +56,6 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats);
void nr_emulate_dlsch_payload(uint8_t* payload, uint16_t size);
void dump_pdsch_stats(FILE *fd,PHY_VARS_gNB *gNB);
#endif
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
-5
View File
@@ -66,7 +66,6 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch, uint16_t N_RB, const NR_DL_FRAME_PARM
harq->c[r] = NULL;
}
free(harq->c);
free(harq->pdu);
}
NR_gNB_DLSCH_t new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, uint16_t N_RB)
@@ -87,10 +86,6 @@ NR_gNB_DLSCH_t new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, uint16_t N_RB)
bzero(harq, sizeof(NR_DL_gNB_HARQ_t));
harq->b = malloc16(dlsch_bytes);
AssertFatal(harq->b, "cannot allocate memory for harq->b\n");
harq->pdu = malloc16(dlsch_bytes);
AssertFatal(harq->pdu, "cannot allocate memory for harq->pdu\n");
bzero(harq->pdu, dlsch_bytes);
nr_emulate_dlsch_payload(harq->pdu, (dlsch_bytes) >> 3);
bzero(harq->b, dlsch_bytes);
harq->c = (uint8_t **)malloc16(a_segments*sizeof(uint8_t *));
openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c
+17 -9
View File
@@ -36,21 +36,29 @@
extern void set_taus_seed(unsigned int seed_type);
/// Payload emulation
void nr_emulate_dlsch_payload(uint8_t* pdu, uint16_t size) {
set_taus_seed(0);
for (int i=0; i<size; i++)
*(pdu+i) = (uint8_t)rand();
}
void nr_fill_dlsch(processingData_L1tx_t *msgTx, nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu, uint8_t *sdu)
void nr_fill_dlsch_dl_tti_req(processingData_L1tx_t *msgTx, nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu)
{
NR_gNB_DLSCH_t *dlsch = &msgTx->dlsch[msgTx->num_pdsch_slot][0];
NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process;
/// DLSCH struct
memcpy((void*)&harq->pdsch_pdu, (void*)pdsch_pdu, sizeof(nfapi_nr_dl_tti_pdsch_pdu));
AssertFatal(msgTx->num_pdsch_slot == pdsch_pdu->pdsch_pdu_rel15.pduIndex,
"PDSCH PDU index %d does not match msgTx index %d\n",
pdsch_pdu->pdsch_pdu_rel15.pduIndex,
msgTx->num_pdsch_slot);
msgTx->num_pdsch_slot++;
harq->pdu = NULL;
}
void nr_fill_dlsch_tx_req(processingData_L1tx_t *msgTx, int idx, uint8_t *sdu)
{
AssertFatal(sdu != NULL, "sdu is null\n");
/* not sure if FAPI could transmit DL_TTI_req and TX_req in different orders.
* for the moment, assume they are in the same order (and check!) */
NR_gNB_DLSCH_t *dlsch = &msgTx->dlsch[idx][0];
NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process;
nfapi_nr_dl_tti_pdsch_pdu *pdsch = &harq->pdsch_pdu;
AssertFatal(pdsch->pdsch_pdu_rel15.pduIndex == idx, "PDSCH PDU index %d does not match %d\n", pdsch->pdsch_pdu_rel15.pduIndex, idx);
harq->pdu = sdu;
}
openair1/PHY/NR_TRANSPORT/pucch_rx.c
-4
View File
@@ -62,10 +62,6 @@ void nr_fill_pucch(PHY_VARS_gNB *gNB,
int slot,
nfapi_nr_pucch_pdu_t *pucch_pdu)
{
if (NFAPI_MODE == NFAPI_MODE_PNF)
gNB->pucch[0].active = false; // check if true in monolithic mode
bool found = false;
for (int i = 0; i < gNB->max_nb_pucch; i++) {
NR_gNB_PUCCH_t *pucch = &gNB->pucch[i];
openair1/PHY/impl_defs_top.h
-1
View File
@@ -268,7 +268,6 @@
#if 1
#define NB_NUMEROLOGIES_NR (5)
#define TDD_CONFIG_NB_FRAMES (2)
#define NR_MAX_SLOTS_PER_FRAME (160) /* number of slots per frame */
/* FFS_NR_TODO it defines ue capability which is the number of slots */
openair1/SCHED_NR/fapi_nr_l1.c
+140 -170
View File
@@ -66,44 +66,6 @@ void handle_nr_nfapi_ssb_pdu(processingData_L1tx_t *msgTx,int frame,int slot,
}
}
/*void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int subframe,gNB_L1_rxtx_proc_t *proc,
uint8_t codeword_index,
uint8_t *sdu)
{
int UE_id = 0; //Hardcode UE_id for now
int harq_pid;
NR_gNB_DLSCH_t *dlsch0=NULL, *dlsch1=NULL;
NR_DL_gNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
// Based on nr_fill_dci_and_dlsch only gNB->dlsch[0][0] gets filled now. So maybe we do not need dlsch1.
dlsch0 = gNB->dlsch[UE_id][0];
dlsch1 = gNB->dlsch[UE_id][1];
harq_pid = dlsch0->harq_ids[subframe];
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
//if (dlsch0_harq->round==0) { //get pointer to SDU if this a new SDU
if(sdu == NULL) {
LOG_E(PHY,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d subframe %d]: programming dlsch for round 0 \n",
frame,subframe,
proc->frame_tx,proc->slot_tx);
return;
}
//AssertFatal(sdu!=NULL,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d subframe %d]: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d dlsch0_harq[round:%d SFN/SF:%d%d pdu:%p mcs:%d ndi:%d pdschstart:%d]\n",
// frame,subframe,
// proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
// dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
if (codeword_index == 0) dlsch0_harq->pdu = sdu;
else dlsch1_harq->pdu = sdu;
LOG_I(PHY, "SFN/SF: %d/%d DLSCH PDU filled \n",frame, subframe);
// }
}*/
void handle_nfapi_nr_csirs_pdu(processingData_L1tx_t *msgTx, int frame, int slot, nfapi_nr_dl_tti_csi_rs_pdu *csirs_pdu)
{
int found = 0;
@@ -122,165 +84,173 @@ void handle_nfapi_nr_csirs_pdu(processingData_L1tx_t *msgTx, int frame, int slot
LOG_E(MAC,"CSI-RS list is full\n");
}
void handle_nr_nfapi_pdsch_pdu(processingData_L1tx_t *msgTx,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu)
void nr_schedule_dl_tti_req(PHY_VARS_gNB *gNB, nfapi_nr_dl_tti_request_t *DL_req)
{
DevAssert(gNB != NULL);
DevAssert(DL_req != NULL);
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
nr_fill_dlsch(msgTx,pdsch_pdu,sdu);
int frame = DL_req->SFN;
int slot = DL_req->Slot;
int slot_type = nr_slot_select(cfg, frame, slot);
DevAssert(slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT);
processingData_L1tx_t *msgTx = gNB->msgDataTx;
msgTx->slot = slot;
msgTx->frame = frame;
uint8_t number_dl_pdu = DL_req->dl_tti_request_body.nPDUs;
for (int i = 0; i < number_dl_pdu; i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(NR_PHY, "NFAPI: dl_pdu %d : type %d\n", i, dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
handle_nr_nfapi_ssb_pdu(msgTx, frame, slot, dl_tti_pdu);
break;
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
LOG_D(NR_PHY, "frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n", frame, slot, DL_req->SFN, DL_req->Slot);
msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu;
msgTx->num_dl_pdcch++;
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(NR_PHY, "frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n", frame, slot, DL_req->SFN, DL_req->Slot);
handle_nfapi_nr_csirs_pdu(msgTx, frame, slot, &dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
LOG_D(NR_PHY, "frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n", frame, slot, DL_req->SFN, DL_req->Slot);
nr_fill_dlsch_dl_tti_req(msgTx, &dl_tti_pdu->pdsch_pdu);
}
}
}
void nr_schedule_ul_tti_req(PHY_VARS_gNB *gNB, nfapi_nr_ul_tti_request_t *UL_tti_req)
{
DevAssert(gNB != NULL);
DevAssert(UL_tti_req != NULL);
int frame = UL_tti_req->SFN;
int slot = UL_tti_req->Slot;
for (int i = 0; i < UL_tti_req->n_pdus; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
LOG_D(NR_PHY,
"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUSCH_PDU_TYPE for %d.%d\n",
frame,
slot,
UL_tti_req->SFN,
UL_tti_req->Slot);
nr_fill_ulsch(gNB, UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pusch_pdu);
break;
case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:
LOG_D(NR_PHY,
"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUCCH_PDU_TYPE for %d.%d\n",
frame,
slot,
UL_tti_req->SFN,
UL_tti_req->Slot);
nr_fill_pucch(gNB, UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pucch_pdu);
break;
case NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE:
LOG_D(NR_PHY,
"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PRACH_PDU_TYPE for %d.%d\n",
frame,
slot,
UL_tti_req->SFN,
UL_tti_req->Slot);
nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[i].prach_pdu;
nr_fill_prach(gNB, UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
if (gNB->RU_list[0]->if_south == LOCAL_RF || gNB->RU_list[0]->if_south == REMOTE_IF5)
nr_fill_prach_ru(gNB->RU_list[0], UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
break;
case NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE:
LOG_D(NR_PHY,
"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE for %d.%d\n",
frame,
slot,
UL_tti_req->SFN,
UL_tti_req->Slot);
nr_fill_srs(gNB, UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].srs_pdu);
break;
}
}
}
void nr_schedule_tx_req(PHY_VARS_gNB *gNB, nfapi_nr_tx_data_request_t *TX_req)
{
DevAssert(gNB != NULL);
DevAssert(TX_req != NULL);
processingData_L1tx_t *msgTx = gNB->msgDataTx;
for (int idx = 0; idx < TX_req->Number_of_PDUs; ++idx) {
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[idx].TLVs[0].value.direct;
nr_fill_dlsch_tx_req(msgTx, idx, sdu);
}
}
void nr_schedule_ul_dci_req(PHY_VARS_gNB *gNB, nfapi_nr_ul_dci_request_t *UL_dci_req)
{
DevAssert(gNB != NULL);
DevAssert(UL_dci_req != NULL);
processingData_L1tx_t *msgTx = gNB->msgDataTx;
msgTx->num_ul_pdcch = UL_dci_req->numPdus;
for (int i = 0; i < UL_dci_req->numPdus; i++)
msgTx->ul_pdcch_pdu[i] = UL_dci_req->ul_dci_pdu_list[i];
}
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
{
// copy data from L2 interface into L1 structures
module_id_t Mod_id = Sched_INFO->module_id;
nfapi_nr_dl_tti_request_t *DL_req = &Sched_INFO->DL_req;
nfapi_nr_tx_data_request_t *TX_req = &Sched_INFO->TX_req;
nfapi_nr_ul_tti_request_t *UL_tti_req = &Sched_INFO->UL_tti_req;
nfapi_nr_ul_dci_request_t *UL_dci_req = &Sched_INFO->UL_dci_req;
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
module_id_t Mod_id = Sched_INFO->module_id;
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
AssertFatal(RC.gNB != NULL, "RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id] != NULL, "RC.gNB[%d] is null\n", Mod_id);
PHY_VARS_gNB *gNB = RC.gNB[Mod_id];
start_meas(&gNB->schedule_response_stats);
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int slot_type = nr_slot_select(cfg,frame,slot);
uint8_t number_dl_pdu = (DL_req==NULL) ? 0 : DL_req->dl_tti_request_body.nPDUs;
uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus;
uint8_t number_tx_data_pdu = (TX_req == NULL) ? 0 : TX_req->Number_of_PDUs;
int slot_type = nr_slot_select(cfg, frame, slot);
clear_slot_beamid(gNB, slot); // reset beam_id information for the slot to be processed
DevAssert(NFAPI_MODE == NFAPI_MONOLITHIC);
bool is_dl = slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT;
if (NFAPI_MODE == NFAPI_MONOLITHIC) {
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
processingData_L1tx_t *msgTx = gNB->msgDataTx;
msgTx->num_pdsch_slot = 0;
msgTx->num_dl_pdcch = 0;
msgTx->num_ul_pdcch = number_ul_dci_pdu;
msgTx->slot = slot;
msgTx->frame = frame;
/* store the sched_response_id for the TX thread to release it when done */
msgTx->sched_response_id = Sched_INFO->sched_response_id;
processingData_L1tx_t *msgTx = gNB->msgDataTx;
/* store the sched_response_id for the TX thread to release it when done */
msgTx->sched_response_id = Sched_INFO->sched_response_id;
for (int i=0;i<number_dl_pdu;i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(NR_PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
handle_nr_nfapi_ssb_pdu(msgTx,frame,slot,
dl_tti_pdu);
break;
DevAssert(Sched_INFO->DL_req.SFN == frame);
DevAssert(Sched_INFO->DL_req.Slot == slot);
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu;
msgTx->num_dl_pdcch++;
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_csirs_pdu(msgTx,frame,slot,&dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
AssertFatal(msgTx->num_pdsch_slot < gNB->max_nb_pdsch,
"Number of PDSCH PDUs %d exceeded the limit %d\n",
msgTx->num_pdsch_slot,
gNB->max_nb_pdsch);
handle_nr_nfapi_pdsch_pdu(msgTx,&dl_tti_pdu->pdsch_pdu, sdu);
}
}
for (int i=0; i<number_ul_dci_pdu; i++)
msgTx->ul_pdcch_pdu[i] = UL_dci_req->ul_dci_pdu_list[i];
/* Both the current thread and the TX thread will access the sched_info
* at the same time, so increase its reference counter, so that it is
* released only when both threads are done with it.
*/
inc_ref_sched_response(Sched_INFO->sched_response_id);
}
for (int i = 0; i < number_ul_tti_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUSCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_ulsch(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pusch_pdu);
break;
case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUCCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_pucch(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pucch_pdu);
break;
case NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PRACH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[i].prach_pdu;
nr_fill_prach(gNB, UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
if (gNB->RU_list[0]->if_south == LOCAL_RF || gNB->RU_list[0]->if_south == REMOTE_IF5)
nr_fill_prach_ru(gNB->RU_list[0], UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
break;
case NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_srs(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].srs_pdu);
break;
}
}
if (is_dl) {
nr_schedule_dl_tti_req(gNB, &Sched_INFO->DL_req);
}
if (NFAPI_MODE == NFAPI_MODE_VNF) { // If VNF, oai_nfapi functions send respective p7 msgs to PNF for which nPDUs > 0
nr_schedule_ul_tti_req(gNB, &Sched_INFO->UL_tti_req);
if (number_ul_tti_pdu > 0)
oai_nfapi_ul_tti_req(UL_tti_req);
if (is_dl) {
nr_schedule_tx_req(gNB, &Sched_INFO->TX_req);
if (number_ul_dci_pdu > 0)
oai_nfapi_ul_dci_req(UL_dci_req);
if (number_dl_pdu > 0)
oai_nfapi_dl_tti_req(DL_req);
if (number_tx_data_pdu > 0)
oai_nfapi_tx_data_req(TX_req);
} else if (NFAPI_MODE == NFAPI_MODE_AERIAL) {
#ifdef ENABLE_AERIAL
bool send_slt_resp = false;
if (number_dl_pdu > 0) {
oai_fapi_dl_tti_req(DL_req);
send_slt_resp = true;
}
if (number_ul_tti_pdu > 0) {
oai_fapi_ul_tti_req(UL_tti_req);
send_slt_resp = true;
}
if (number_tx_data_pdu > 0) {
oai_fapi_tx_data_req(TX_req);
send_slt_resp = true;
}
if (number_ul_dci_pdu > 0) {
oai_fapi_ul_dci_req(UL_dci_req);
send_slt_resp = true;
}
if (send_slt_resp) {
oai_fapi_send_end_request(0,frame,slot);
}
#endif
nr_schedule_ul_dci_req(gNB, &Sched_INFO->UL_dci_req);
/* Both the current thread and the TX thread will access the sched_info
* at the same time, so increase its reference counter, so that it is
* released only when both threads are done with it.
*/
inc_ref_sched_response(Sched_INFO->sched_response_id);
}
/* this thread is done with the sched_info, decrease the reference counter */
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
if ((slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) && NFAPI_MODE == NFAPI_MONOLITHIC) {
LOG_D(NR_PHY, "Calling dref_sched_response for id %d in %d.%d (sched_response)\n", Sched_INFO->sched_response_id, frame, slot);
deref_sched_response(Sched_INFO->sched_response_id);
}
openair1/SCHED_NR/phy_frame_config_nr.c
+70 -105
View File
@@ -67,96 +67,84 @@ int set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg,
int nrofUplinkSlots,
int nrofUplinkSymbols)
{
int slot_number = 0;
int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period.value);
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<<mu)*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_to_set = (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_per_period = ((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
int nb_slots_per_period = ((1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) / nb_periods_per_frame;
if ( (nrofDownlinkSymbols + nrofUplinkSymbols) == 0 )
if ((nrofDownlinkSymbols + nrofUplinkSymbols) == 0)
AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots),
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, nrofUplinkSlots %d, nb_slots_per_period %d \n",
nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period);
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, "
"nrofUplinkSlots %d, nb_slots_per_period %d \n",
nrofDownlinkSlots,
nrofUplinkSlots,
nb_slots_per_period);
else {
AssertFatal(nrofDownlinkSymbols + nrofUplinkSymbols < 14,"illegal symbol configuration DL %d, UL %d\n",nrofDownlinkSymbols,nrofUplinkSymbols);
AssertFatal(nrofDownlinkSymbols + nrofUplinkSymbols < 14,
"illegal symbol configuration DL %d, UL %d\n",
nrofDownlinkSymbols,
nrofUplinkSymbols);
AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots + 1),
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, nrofUplinkSlots %d, nrofMixed slots 1, nb_slots_per_period %d \n",
nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period);
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, "
"nrofUplinkSlots %d, nrofMixed slots 1, nb_slots_per_period %d \n",
nrofDownlinkSlots,
nrofUplinkSlots,
nb_slots_per_period);
}
cfg->tdd_table.max_tdd_periodicity_list = (nfapi_nr_max_tdd_periodicity_t *) malloc(nb_slots_to_set*sizeof(nfapi_nr_max_tdd_periodicity_t));
cfg->tdd_table.max_tdd_periodicity_list = calloc(nb_slots_to_set, sizeof(nfapi_nr_max_tdd_periodicity_t));
for(int memory_alloc =0 ; memory_alloc<nb_slots_to_set; memory_alloc++)
cfg->tdd_table.max_tdd_periodicity_list[memory_alloc].max_num_of_symbol_per_slot_list = (nfapi_nr_max_num_of_symbol_per_slot_t *) malloc(NR_NUMBER_OF_SYMBOLS_PER_SLOT*sizeof(
nfapi_nr_max_num_of_symbol_per_slot_t));
for (int slot = 0; slot < nb_slots_to_set; slot++) {
nfapi_nr_max_tdd_periodicity_t *p_list = &cfg->tdd_table.max_tdd_periodicity_list[slot];
p_list->max_num_of_symbol_per_slot_list =
calloc(NR_NUMBER_OF_SYMBOLS_PER_SLOT, sizeof(*p_list->max_num_of_symbol_per_slot_list));
for (int sym = 0; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
// for each symbol, assign the TLV tag for usage when packing
p_list->max_num_of_symbol_per_slot_list[sym].slot_config.tl.tag = NFAPI_NR_CONFIG_SLOT_CONFIG_TAG;
}
}
while(slot_number != nb_slots_to_set) {
if(nrofDownlinkSlots != 0) {
for (int number_of_symbol = 0; number_of_symbol < nrofDownlinkSlots*NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value= 0;
while (slot_number != nb_slots_to_set) {
if (nrofDownlinkSlots != 0) {
for (int sym = 0; sym < nrofDownlinkSlots * NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number]
.max_num_of_symbol_per_slot_list[sym % NR_NUMBER_OF_SYMBOLS_PER_SLOT]
.slot_config.value = 0;
if((number_of_symbol+1)%NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
if ((sym + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
slot_number++;
}
}
if (nrofDownlinkSymbols != 0 || nrofUplinkSymbols != 0) {
for(int number_of_symbol =0; number_of_symbol < nrofDownlinkSymbols; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config.value= 0;
for (int sym = 0; sym < nrofDownlinkSymbols; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[sym].slot_config.value = 0;
}
for(int number_of_symbol = nrofDownlinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT-nrofUplinkSymbols; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config.value= 2;
for (int sym = nrofDownlinkSymbols; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofUplinkSymbols; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[sym].slot_config.value = 2;
}
for(int number_of_symbol = NR_NUMBER_OF_SYMBOLS_PER_SLOT-nrofUplinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config.value= 1;
for (int sym = NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofUplinkSymbols; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[sym].slot_config.value = 1;
}
slot_number++;
}
if(nrofUplinkSlots != 0) {
for (int number_of_symbol = 0; number_of_symbol < nrofUplinkSlots*NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value= 1;
if (nrofUplinkSlots != 0) {
for (int sym = 0; sym < nrofUplinkSlots * NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number]
.max_num_of_symbol_per_slot_list[sym % NR_NUMBER_OF_SYMBOLS_PER_SLOT]
.slot_config.value = 1;
if((number_of_symbol+1)%NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
if ((sym + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
slot_number++;
}
}
}
/*
while(slot_number != nb_slots_to_set) {
for (int number_of_slot = 0; number_of_slot < nrofDownlinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_DOWNLINK_SLOT;
printf("slot %d set as downlink\n",slot_number);
slot_number++;
}
if (nrofDownlinkSymbols != 0 || nrofUplinkSymbols != 0) {
frame_parms->tdd_uplink_nr[slot_number] = (1<<nrofUplinkSymbols) - 1;
printf("slot %d set as SL\n",slot_number);
slot_number++;
}
for (int number_of_slot = 0; number_of_slot < nrofUplinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_UPLINK_SLOT;
printf("slot %d set as uplink\n",slot_number);
slot_number++;
}
if (p_tdd_ul_dl_configuration->nrofUplinkSymbols != 0) {
LOG_E(PHY,"set_tdd_configuration_nr: uplink symbol for slot is not supported for tdd configuration \n");
return (-1);
}
}
if (frame_parms->p_tdd_UL_DL_ConfigurationCommon2 != NULL) {
LOG_E(PHY,"set_tdd_configuration_nr: additionnal tdd configuration 2 is not supported for tdd configuration \n");
return (-1);
}*/
return (nb_periods_per_frame);
}
@@ -230,7 +218,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) {
while(p_current_TDD_UL_DL_SlotConfig != NULL) {
int slot_index = p_current_TDD_UL_DL_SlotConfig->slotIndex;
if (slot_index < TDD_CONFIG_NB_FRAMES * frame_parms->slots_per_frame) {
if (slot_index < frame_parms->slots_per_frame) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols != 0) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols == NR_TDD_SET_ALL_SYMBOLS) {
if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols == 0) {
@@ -301,62 +289,39 @@ int get_next_downlink_slot(PHY_VARS_gNB *gNB, nfapi_nr_config_request_scf_t *cfg
}
}
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot) {
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot)
{
(void) nr_frame;
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common.value,check_slot=0;
int check_slot = 0;
if (cfg->cell_config.frame_duplex_type.value == FDD) {
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT );
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT);
}
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
for (int symbol_count = 0; symbol_count < NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value == 1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
if (check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for (int symbol_count = 0; symbol_count < NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value == 0) {
check_slot++;
}
}
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} else {
return (NR_MIXED_SLOT);
}
if (check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} else {
return (NR_MIXED_SLOT);
}
return (NR_MIXED_SLOT);
}
}
openair1/SCHED_NR/phy_frame_config_nr.h
-4
View File
@@ -34,10 +34,6 @@
#ifndef PHY_FRAME_CONFIG_NR_H
#define PHY_FRAME_CONFIG_NR_H
/************** DEFINE ********************************************/
#define TDD_CONFIG_NB_FRAMES (2)
/*************** FUNCTIONS *****************************************/
/** \brief This function processes tdd dedicated configuration for nr
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+3 -2
View File
@@ -242,6 +242,8 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,0);
}
msgTx->num_dl_pdcch = 0;
msgTx->num_ul_pdcch = 0;
if (msgTx->num_pdsch_slot > 0) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1);
@@ -249,6 +251,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
nr_generate_pdsch(msgTx, frame, slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
}
msgTx->num_pdsch_slot = 0;
for (int i = 0; i < NR_SYMBOLS_PER_SLOT; i++){
NR_gNB_CSIRS_t *csirs = &msgTx->csirs_pdu[i];
@@ -730,8 +733,6 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, N
for (int i = 0; i < gNB->max_nb_pucch; i++) {
NR_gNB_PUCCH_t *pucch = &gNB->pucch[i];
if (pucch) {
if (NFAPI_MODE == NFAPI_MODE_PNF)
pucch->frame = frame_rx;
if (pucch->active && (pucch->frame == frame_rx) && (pucch->slot == slot_rx)) {
c16_t **rxdataF = gNB->common_vars.rxdataF[pucch->beam_nb];
pucch_decode_done = 1;
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+4 -3
View File
@@ -178,10 +178,11 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response
crc_ind->crc_list[j].tb_crc_status = 0;
crc_ind->crc_list[j].timing_advance = 31;
crc_ind->crc_list[j].ul_cqi = 255;
AssertFatal(mac->nr_ue_emul_l1.harq[crc_ind->crc_list[j].harq_id].active_ul_harq_sfn_slot == -1,
emul_l1_harq_t *harq = &mac->nr_ue_emul_l1.harq[crc_ind->crc_list[j].harq_id];
AssertFatal(harq->active_ul_harq_sfn == -1 && harq->active_ul_harq_slot == -1,
"We did not send an active CRC when we should have!\n");
mac->nr_ue_emul_l1.harq[crc_ind->crc_list[j].harq_id].active_ul_harq_sfn_slot =
NFAPI_SFNSLOT2HEX(crc_ind->sfn, crc_ind->slot);
harq->active_ul_harq_sfn = crc_ind->sfn;
harq->active_ul_harq_slot = crc_ind->slot;
LOG_D(NR_MAC,
"This is sched sfn/sl [%d %d] and crc sfn/sl [%d %d] with mcs_index in ul_cqi -> %d\n",
frame,
openair1/SIMULATION/NR_PHY/dlschsim.c
+3 -2
View File
@@ -497,7 +497,8 @@ int main(int argc, char **argv)
dlsch0_ue->dlsch_config.tbslbrm = Tbslbrm;
printf("harq process ue mcs = %d Qm = %d, symb %d\n", dlsch0_ue->dlsch_config.mcs, dlsch0_ue->dlsch_config.qamModOrder, nb_symb_sch);
unsigned char *test_input=dlsch->harq_process.pdu;
uint8_t test_input[TBS / 8 + 4]; // + 3 for CRC + 1 additional byte, see nr_dlsch_encoding()
dlsch->harq_process.pdu = test_input;
//unsigned char test_input[TBS / 8] __attribute__ ((aligned(16)));
for (i = 0; i < TBS / 8; i++)
test_input[i] = (unsigned char) rand();
@@ -656,7 +657,7 @@ int main(int argc, char **argv)
reset_DLSCH_struct(gNB, &msgDataTx);
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES * (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_to_set = (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
for (int i = 0; i < nb_slots_to_set; ++i)
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list);
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list);
openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
+2
View File
@@ -15,6 +15,8 @@ int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { return (0); }
int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind) { return (0); }
int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind) { return 0; }
void handle_nr_slot_ind(uint16_t sfn, uint16_t slot) { }
int pack_nr_srs_beamforming_report(void *pMessageBuf, void *pPackedBuf, uint32_t packedBufLen) { return 0; }
int unpack_nr_srs_beamforming_report(void *pMessageBuf, uint32_t messageBufLen, void *pUnpackedBuf, uint32_t unpackedBufLen) { return 0; }
int pack_nr_srs_normalized_channel_iq_matrix(void *pMessageBuf, void *pPackedBuf, uint32_t packedBufLen) { return 0; }
openair1/SIMULATION/NR_PHY/pbchsim.c
+1 -1
View File
@@ -782,7 +782,7 @@ int main(int argc, char **argv)
free_channel_desc_scm(gNB2UE);
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES * (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_to_set = (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
for (int i = 0; i < nb_slots_to_set; ++i)
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list);
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list);
openair1/SIMULATION/NR_PHY/prachsim.c
+1 -1
View File
@@ -824,7 +824,7 @@ int main(int argc, char **argv){
phy_free_nr_gNB(gNB);
// allocated in set_tdd_config_nr()
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<<mu)*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_to_set = (1<<mu)*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
free(gNB->gNB_config.prach_config.num_prach_fd_occasions_list);
for (int i = 0; i < nb_slots_to_set; ++i)
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list);
openair1/SIMULATION/NR_PHY/pucchsim.c
+1 -1
View File
@@ -762,7 +762,7 @@ int main(int argc, char **argv)
free_channel_desc_scm(UE2gNB);
term_freq_channel();
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES * (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_to_set = (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
for (int i = 0; i < nb_slots_to_set; ++i)
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list);
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list);
openair1/SIMULATION/NR_PHY/ulschsim.c
+1 -1
View File
@@ -598,7 +598,7 @@ int main(int argc, char **argv)
free_nr_ue_ul_harq(UE->ul_harq_processes, NR_MAX_ULSCH_HARQ_PROCESSES, UE->frame_parms.N_RB_UL, UE->frame_parms.nb_antennas_tx);
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES * (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_to_set = (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
for (int i = 0; i < nb_slots_to_set; ++i)
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list);
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list);
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c
+3 -3
View File
@@ -54,9 +54,9 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->slots_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
frame_parms->p_tdd_UL_DL_Configuration->nrofUplinkSlots, frame_parms->p_tdd_UL_DL_Configuration->dl_UL_TransmissionPeriodicity);
int k = (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int k = NR_NUMBER_OF_SUBFRAMES_PER_FRAME - 1;
int tti = 0;
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->slots_per_frame; j++) {
for (int j = 0; j < frame_parms->slots_per_frame; j++) {
int frame = 0;
if (j != 0) {
frame = j / frame_parms->slots_per_frame;
@@ -81,7 +81,7 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
}
if (j == k) {
printf("\n");
k += (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME); // 20
k += NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
}
printf("\n");