From 0286138f33c5559ceca805c9a842aea241a5cc51 Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Wed, 27 Oct 2021 12:09:27 +0200 Subject: [PATCH 01/67] Adaptations of the MAC scheduling to support FDD - removed calls to the TDD UL/DL configuration common in FDD mode - bugfix in the generation of prach info from index - initial adaptation of gNB schedulers - adapted PUCCH ack/nack scheduling by taking into account 6 slots min delay in FDD mode (to be integrated with latest development of PUCCH) - made the use of nr_slots_per_frame more consistent --- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 11 --- openair2/GNB_APP/gnb_config.c | 13 +++- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 5 +- openair2/LAYER2/NR_MAC_UE/config_ue.c | 70 +++++++++++-------- openair2/LAYER2/NR_MAC_UE/main_ue_nr.c | 8 ++- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 10 +-- openair2/LAYER2/NR_MAC_gNB/config.c | 47 +++++++------ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 7 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 41 +++++++---- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 5 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 3 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 10 ++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 47 +++++++------ .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 10 ++- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 1 + openair2/RRC/NR/MESSAGES/asn1_msg.c | 17 +++-- openair2/RRC/NR/rrc_gNB_reconfig.c | 2 +- 17 files changed, 178 insertions(+), 129 deletions(-) diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 63cf6f2f2d..3135a96028 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -206,17 +206,6 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx, VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX+offset,0); } - - -/* - - if ((cfg->subframe_config.duplex_mode.value == TDD) && - ((nr_slot_select(fp,frame,slot)&NR_DOWNLINK_SLOT)==SF_DL)) return; - - // VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX,1); - -*/ - void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) { ldpcDecode_t *rdata = (ldpcDecode_t*) NotifiedFifoData(req); NR_UL_gNB_HARQ_t *ulsch_harq = rdata->ulsch_harq; diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index af21fd8b08..ee20760941 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -291,9 +291,16 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { asn_sequence_del(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,i,1); } } - if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) { - free(scc->tdd_UL_DL_ConfigurationCommon->pattern2); - scc->tdd_UL_DL_ConfigurationCommon->pattern2=NULL; + + lte_frame_type_t frame_type = get_frame_type((int)*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); + if (frame_type == FDD) { + free(scc->tdd_UL_DL_ConfigurationCommon); + scc->tdd_UL_DL_ConfigurationCommon = NULL; + } else { // TDD + if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) { + free(scc->tdd_UL_DL_ConfigurationCommon->pattern2); + scc->tdd_UL_DL_ConfigurationCommon->pattern2 = NULL; + } } if ((int)*scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing == -1) { diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index 3750bb156d..c8fa48b0ee 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -1753,9 +1753,11 @@ int get_nr_prach_info_from_index(uint8_t index, subframe = slot >> mu; s_map = table_6_3_3_2_2_prachConfig_Index[index][4]; if ( (s_map>>subframe)&0x01 ) { + *N_RA_slot = table_6_3_3_2_2_prachConfig_Index[index][6]; // Number of RACH slots within a subframe if (mu == 1) { - if ( (table_6_3_3_2_2_prachConfig_Index[index][6] <= 1) && (slot%2 == 0) ) + if ((*N_RA_slot <= 1) && (slot % 2 == 0)){ return 0; // no prach in even slots @ 30kHz for 1 prach per subframe + } } for(int i = 0; i <= subframe ; i++) { if ( (s_map >> i) & 0x01) { @@ -1764,6 +1766,7 @@ int get_nr_prach_info_from_index(uint8_t index, } if (start_symbol != NULL && N_t_slot != NULL && N_dur != NULL && format != NULL){ *start_symbol = table_6_3_3_2_2_prachConfig_Index[index][5]; + *config_period = x; *N_t_slot = table_6_3_3_2_2_prachConfig_Index[index][7]; *N_dur = table_6_3_3_2_2_prachConfig_Index[index][8]; if (table_6_3_3_2_2_prachConfig_Index[index][1] != -1) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 1accbf30cb..d848595ce4 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -228,27 +228,28 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac, } // TDD Table Configuration - if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) - cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; - else { - AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, - "scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); - cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; - } if(cfg->cell_config.frame_duplex_type == TDD){ + if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) { + cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; + } else { + AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, + "scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); + cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; + } LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period); int return_tdd = set_tdd_config_nr_ue(cfg, - scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, + scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols ); - if (return_tdd !=0) + if (return_tdd !=0) { LOG_E(PHY,"TDD configuration can not be done\n"); - else + } else { LOG_I(PHY,"TDD has been properly configurated\n"); + } } // PRACH configuration @@ -411,14 +412,14 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, } // TDD Table Configuration - if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) - cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; - else { - AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, - "scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); - cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; - } if(cfg->cell_config.frame_duplex_type == TDD){ + if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) { + cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; + } else { + AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, + "scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); + cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; + } LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period); int return_tdd = set_tdd_config_nr_ue(cfg, scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, @@ -427,15 +428,14 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols ); - - if (return_tdd !=0) - LOG_E(PHY,"TDD configuration can not be done\n"); - else - LOG_I(PHY,"TDD has been properly configurated\n"); + if (return_tdd !=0) { + LOG_E(PHY, "TDD configuration can not be done\n"); + } else { + LOG_I(PHY, "TDD has been properly configurated\n"); + } } - + // PRACH configuration - uint8_t nb_preambles = 64; if(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles != NULL) nb_preambles = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles; @@ -628,6 +628,7 @@ int nr_rrc_mac_config_req_ue( NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); RA_config_t *ra = &mac->ra; + fapi_nr_config_request_t *cfg = &mac->phy_config.config_req; // TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc. @@ -642,11 +643,20 @@ int nr_rrc_mac_config_req_ue( if (sccP != NULL) { mac->scc_SIB=sccP; - LOG_D(MAC,"Keeping ServingCellConfigCommonSIB\n"); + LOG_D(NR_MAC, "In %s: Keeping ServingCellConfigCommonSIB\n", __FUNCTION__); config_common_ue_sa(mac,module_id,cc_idP); - int num_slots_ul = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; - if (mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0) num_slots_ul++; - LOG_I(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul); + + int num_slots_ul = nr_slots_per_frame[mac->mib->subCarrierSpacingCommon]; + if(cfg->cell_config.frame_duplex_type == FDD){ + free(mac->scc_SIB->tdd_UL_DL_ConfigurationCommon); + mac->scc_SIB->tdd_UL_DL_ConfigurationCommon = NULL; + } else { + num_slots_ul = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; + if (mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0) { + num_slots_ul++; + } + } + LOG_I(NR_MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul); mac->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t)); // Setup the SSB to Rach Occasions mapping according to the config build_ssb_to_ro_map(mac);//->scc, mac->phy_config.config_req.cell_config.frame_duplex_type); @@ -665,6 +675,10 @@ int nr_rrc_mac_config_req_ue( ra->rach_ConfigDedicated = scell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink; } mac->scc = scell_group_config->spCellConfig->reconfigurationWithSync->spCellConfigCommon; + if(cfg->cell_config.frame_duplex_type == FDD){ + free(mac->scc->tdd_UL_DL_ConfigurationCommon); + mac->scc->tdd_UL_DL_ConfigurationCommon = NULL; + } mac->physCellId = *mac->scc->physCellId; config_common_ue(mac,module_id,cc_idP); mac->crnti = scell_group_config->spCellConfig->reconfigurationWithSync->newUE_Identity; diff --git a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c index b27837043f..992427b4e2 100644 --- a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c +++ b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c @@ -68,10 +68,12 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst) { // point to a list of structures (one for each UL slot) to store PUSCH scheduling parameters // received from UL DCI. if (nr_ue_mac_inst->scc) { - int num_slots_ul = nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; - if (nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0) + NR_TDD_UL_DL_ConfigCommon_t *tdd = nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon; + int num_slots_ul = tdd ? tdd->pattern1.nrofUplinkSlots : nr_slots_per_frame[*nr_ue_mac_inst->scc->ssbSubcarrierSpacing]; + if (tdd && nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0) { num_slots_ul++; - LOG_D(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul); + } + LOG_D(NR_MAC, "In %s: Initializing ul_config_request. num_slots_ul = %d\n", __FUNCTION__, num_slots_ul); nr_ue_mac_inst->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t)); } } diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 145b24f00e..5615c1aa95 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -148,12 +148,14 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl int mu = mac->ULbwp[0] ? mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing : mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; - NR_TDD_UL_DL_Pattern_t *tdd_pattern = &tdd_config->pattern1; - const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity); - const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0); + const int n = nr_slots_per_frame[mu]; + const int num_slots_per_tdd = tdd_config ? (n >> (7 - tdd_config->pattern1.dl_UL_TransmissionPeriodicity)) : n; + const int num_slots_ul = tdd_config ? (tdd_config->pattern1.nrofUplinkSlots + (tdd_config->pattern1.nrofUplinkSymbols != 0)) : n; int index = slot % num_slots_ul; - LOG_D(NR_MAC, "In %s slots per tdd %d, num_slots_ul %d, index %d\n", __FUNCTION__, + LOG_D(NR_MAC, "In %s slots per %s: %d, num_slots_ul %d, index %d\n", + __FUNCTION__, + tdd_config ? "TDD" : "FDD", num_slots_per_tdd, num_slots_ul, index); diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index a2c130078e..347b3f9495 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -58,6 +58,7 @@ void process_rlcBearerConfig(struct NR_CellGroupConfig__rlc_BearerToAddModList * struct NR_CellGroupConfig__rlc_BearerToReleaseList *rlc_bearer2release_list, NR_UE_sched_ctrl_t *sched_ctrl) { + if (rlc_bearer2add_list) // keep lcids for (int i=0;ilist.count;i++) { @@ -394,18 +395,17 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts cfg->num_tlv++; // TDD Table Configuration - //cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; - cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG; - cfg->num_tlv++; - if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) - cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; - else { - AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, - "scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); - cfg->tdd_table.tdd_period.value = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; - } - if(cfg->cell_config.frame_duplex_type.value == TDD){ - LOG_I(NR_MAC,"Setting TDD configuration period to %d\n",cfg->tdd_table.tdd_period.value); + if (cfg->cell_config.frame_duplex_type.value == TDD){ + cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG; + cfg->num_tlv++; + if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) { + cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; + } else { + AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, + "In %s: scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n", __FUNCTION__); + cfg->tdd_table.tdd_period.value = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; + } + LOG_I(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value); int periods_per_frame = set_tdd_config_nr(cfg, scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots, @@ -439,8 +439,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present); /* dimension UL_tti_req_ahead for number of slots in frame */ - const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; - const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; RC.nrmac[Mod_idP]->UL_tti_req_ahead[0] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t)); AssertFatal(RC.nrmac[Mod_idP]->UL_tti_req_ahead[0], "could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n"); @@ -490,19 +489,23 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, find_SSB_and_RO_available(Mod_idP); - const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; - const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; - const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots; - const int nr_dlmix_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0); - const int nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0); + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; + const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; + const int nr_dlmix_slots = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0) : 0; + const int nr_dl_slots = tdd ? nr_dlmix_slots : n; + const int nr_ulstart_slot = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0) : 1; for (int slot = 0; slot < n; ++slot) { /* FIXME: it seems there is a problem with slot 0/10/slots right after UL: * we just get retransmissions. Thus, do not schedule such slots in DL */ - if (slot % nr_slots_period != 0) - RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dlmix_slots) << (slot % 64); + if (slot % nr_slots_period != 0){ + RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dl_slots) << (slot % 64); + } RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) >= nr_ulstart_slot) << (slot % 64); - LOG_D(NR_MAC, "slot %d DL %d UL %d\n", + + LOG_I(NR_MAC, "In %s: slot %d DL %d UL %d\n", + __FUNCTION__, slot, (RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] & ((uint64_t)1 << (slot % 64))) != 0, (RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] & ((uint64_t)1 << (slot % 64))) != 0); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 956a76ddbb..f961a9c01c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -170,7 +170,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, /* advance last round's future UL_tti_req to be ahead of current frame/slot */ future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024; - LOG_D(MAC,"Future_ul_tti SFN = %d for slot %d \n", future_ul_tti_req->SFN, (slotP + num_slots - 1) % num_slots); + LOG_D(NR_MAC, "In %s: UL_tti_req_ahead SFN.slot = %d.%d for slot %d \n", __FUNCTION__, future_ul_tti_req->SFN, future_ul_tti_req->Slot, (slotP + num_slots - 1) % num_slots); /* future_ul_tti_req->Slot is fixed! */ future_ul_tti_req->n_pdus = 0; future_ul_tti_req->n_ulsch = 0; @@ -367,9 +367,10 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) { const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; - const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots; + const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; + const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; const int nb_periods_per_frame = n / nr_slots_period; + // re-initialization of tdd_beam_association at beginning of frame (only for FR2) for (int i=0; itdd_beam_association[i] = -1; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index c6752d37c2..8b645c06f3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -406,14 +406,19 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, uint8_t mu = *scc->ssbSubcarrierSpacing; uint8_t response_window = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow; uint8_t slot_window; + const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; // number of mixed slot or of last dl slot if there is no mixed slot - uint8_t last_dl_slot_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; + uint8_t last_dl_slot_period = tdd ? tdd->nrofDownlinkSlots : 0; // lenght of tdd period in slots - uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; - if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols == 0) + uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame; + + if (tdd && (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols == 0)) { last_dl_slot_period--; - if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0)) + } + if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) { tdd_period_slot++; + } switch(response_window){ case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1: @@ -714,10 +719,17 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t // beam association for FR2 int16_t *tdd_beam_association = nr_mac->tdd_beam_association; if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) { - uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; - if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0)) + + const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame; + + if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) { tdd_period_slot++; + } + int num_tdd_period = sched_slot/tdd_period_slot; + if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id)) return; // can't schedule retransmission in this slot else @@ -879,15 +891,18 @@ void nr_get_Msg3alloc(module_id_t module_id, ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList: scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + const int n_slots_frame = nr_slots_per_frame[mu]; + const int nrofUplinkSymbols = tdd ? tdd->nrofUplinkSymbols : 4; uint8_t k2 = 0; for (int i=0; ilist.count; i++) { startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); // we want to transmit in the uplink symbols of mixed slot - if (NrOfSymbols == scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols) { + if (NrOfSymbols == nrofUplinkSymbols) { k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2; temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 - ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; + ra->Msg3_slot = temp_slot % n_slots_frame; if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) { ra->Msg3_tda_id = i; break; @@ -897,16 +912,17 @@ void nr_get_Msg3alloc(module_id_t module_id, AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n"); - if (nr_slots_per_frame[mu]>temp_slot) + if (n_slots_frame > temp_slot) ra->Msg3_frame = current_frame; else - ra->Msg3_frame = (current_frame + (temp_slot/nr_slots_per_frame[mu]))%1024; + ra->Msg3_frame = (current_frame + (temp_slot / n_slots_frame)) % 1024; // beam association for FR2 if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) { - uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; - if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0)) + uint8_t tdd_period_slot = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots : n_slots_frame; + if (tdd && ((tdd->nrofDownlinkSymbols > 0) || (tdd->nrofUplinkSymbols > 0))) { tdd_period_slot++; + } int num_tdd_period = ra->Msg3_slot/tdd_period_slot; if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id)) AssertFatal(1==0,"Cannot schedule MSG3\n"); @@ -979,7 +995,6 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->dmrs_ports = 1; // 6.2.2 in 38.214 only port 0 to be used pusch_pdu->num_dmrs_cdm_grps_no_data = 2; // no data in dmrs symbols as in 6.2.2 in 38.214 pusch_pdu->resource_alloc = 1; //type 1 - pusch_pdu->rb_start = msg3_first_rb; if (msg3_nb_rb > pusch_pdu->bwp_size) AssertFatal(1==0,"MSG3 allocated number of RBs exceed the BWP size\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 28b7ea3c21..ccbda816f9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -266,8 +266,9 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1)); fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; - const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; - const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots; + const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; + const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; + const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame; num_tdd_period = rel_slot/nr_slots_period; gNB->tdd_beam_association[num_tdd_period]=i_ssb; num_ssb++; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index d32e45a379..9b8a78c198 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -124,8 +124,7 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * } } - const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; - const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_dl_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id])); const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 668a88d746..5766b39e29 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2097,6 +2097,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP, int bwp_id, NR_SearchSpace__searchSpaceType_PR ss_type, int *max_fb_time, + int *min_fb_time, uint8_t *pdsch_to_harq_feedback) { NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; @@ -2135,9 +2136,10 @@ void get_pdsch_to_harq_feedback(int Mod_idP, // common search type uses DCI format 1_0 if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) { for (int i=0; i<8; i++) { - pdsch_to_harq_feedback[i] = i+1; + pdsch_to_harq_feedback[i] = i+1; // TODO take into account the min feedback time here if(pdsch_to_harq_feedback[i]>*max_fb_time) *max_fb_time = pdsch_to_harq_feedback[i]; + *min_fb_time = 6; } } else { @@ -2158,12 +2160,12 @@ void get_pdsch_to_harq_feedback(int Mod_idP, } AssertFatal(found==1,"Couldn't find a ue specific searchspace\n"); - if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) { for (int i=0; i<8; i++) { - pdsch_to_harq_feedback[i] = i+1; + pdsch_to_harq_feedback[i] = i+1; // TODO take into account the min feedback time here if(pdsch_to_harq_feedback[i]>*max_fb_time) *max_fb_time = pdsch_to_harq_feedback[i]; + *min_fb_time = 6; } } else { @@ -2173,6 +2175,8 @@ void get_pdsch_to_harq_feedback(int Mod_idP, pdsch_to_harq_feedback[i] = *ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[i]; if(pdsch_to_harq_feedback[i]>*max_fb_time) *max_fb_time = pdsch_to_harq_feedback[i]; + if(pdsch_to_harq_feedback[i]<*min_fb_time) + *min_fb_time = pdsch_to_harq_feedback[i]; } } else diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index f2ce8498fd..cccc930dce 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1173,19 +1173,21 @@ int nr_acknack_scheduling(int mod_id, const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon; const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; - const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; - const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots; - const int first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period); - const int first_ul_slot_period = first_ul_slot_tdd%nr_slots_period; + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; + const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame; + const int first_ul_slot_tdd = tdd ? tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period) : 0; + const int first_ul_slot_period = tdd ? first_ul_slot_tdd % nr_slots_period : 0; const int CC_id = 0; NR_sched_pucch_t *csi_pucch; - AssertFatal(slot < first_ul_slot_tdd + (tdd->nrofUplinkSymbols != 0), - "cannot handle multiple TDD periods (yet): slot %d first_ul_slot_tdd %d nrofUplinkSlots %ld\n", - slot, - first_ul_slot_tdd, - tdd->nrofUplinkSlots); + if (tdd) { + AssertFatal(slot < first_ul_slot_tdd + (tdd->nrofUplinkSymbols != 0), + "cannot handle multiple TDD periods (yet): slot %d first_ul_slot_tdd %d nrofUplinkSlots %ld\n", + slot, + first_ul_slot_tdd, + tdd->nrofUplinkSlots); + } /* for the moment, we consider: * * only pucch_sched[0] holds HARQ (and SR) @@ -1195,19 +1197,21 @@ int nr_acknack_scheduling(int mod_id, * * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */ NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id]; NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0]; - LOG_D(NR_MAC,"pucch_acknak %d.%d Trying to allocate pucch, current DAI %d\n",frame,slot,pucch->dai_c); + LOG_D(NR_MAC, "In %s: %d.%d Trying to allocate pucch, current DAI %d\n", __FUNCTION__, frame, slot, pucch->dai_c); + pucch->r_pucch=r_pucch; AssertFatal(pucch->csi_bits == 0, "%s(): csi_bits %d in sched_pucch[0]\n", __func__, pucch->csi_bits); + /* if the currently allocated PUCCH of this UE is full, allocate it */ if (pucch->dai_c == 2) { /* advance the UL slot information in PUCCH by one so we won't schedule in * the same slot again */ const int f = pucch->frame; const int s = pucch->ul_slot; - LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n",frame,slot,f,s); + LOG_D(NR_MAC, "In %s: %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n", __FUNCTION__, frame, slot, f, s); nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; @@ -1234,7 +1238,7 @@ int nr_acknack_scheduling(int mod_id, } } - LOG_D(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); + LOG_D(NR_MAC, "In %s: pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n", __FUNCTION__, frame, slot, pucch->frame, pucch->ul_slot, pucch->dai_c); // this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]; @@ -1253,10 +1257,11 @@ int nr_acknack_scheduling(int mod_id, if (sched_ctrl->active_ubwp) bwp_Id = sched_ctrl->active_ubwp->bwp_Id; int max_fb_time = 0; - get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback); + int min_fb_time = 6; + get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, &min_fb_time, pdsch_to_harq_feedback); int max_absslot = frame*n_slots_frame + slot + max_fb_time; - LOG_D(NR_MAC,"pucch_acknak 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); + LOG_D(NR_MAC, "In %s: 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); /* there is a HARQ. Check whether we can use it for this ACKNACK */ if (pucch->dai_c > 0) { /* this UE already has a PUCCH occasion */ @@ -1272,7 +1277,7 @@ int nr_acknack_scheduling(int mod_id, const int f = pucch->frame; const int s = pucch->ul_slot; const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI > 0, cannot reach timing for pucch in %d.%d, advancing slot by 1 and trying again\n",frame,slot,f,s); + LOG_D(NR_MAC, "In %s: %d.%d DAI > 0, cannot reach timing for pucch in %d.%d, advancing slot by 1 and trying again\n", __FUNCTION__, frame, slot, f, s); nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; @@ -1286,11 +1291,11 @@ int nr_acknack_scheduling(int mod_id, pucch->timing_indicator = i; pucch->dai_c++; // retain old resource indicator, and we are good - LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); + LOG_D(NR_MAC, "In %s: %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); return 0; } - LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 0, looking for new pucch occasion\n",frame,slot); + LOG_D(NR_MAC, "In %s: %d.%d DAI = 0, looking for new pucch occasion\n", __FUNCTION__, frame, slot); /* we need to find a new PUCCH occasion */ /*Inizialization of timing information*/ @@ -1299,7 +1304,7 @@ int nr_acknack_scheduling(int mod_id, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); pucch->frame = frame; - pucch->ul_slot = first_ul_slot_tdd; + pucch->ul_slot = tdd ? first_ul_slot_tdd : first_ul_slot_tdd + min_fb_time; } // Find the right timing_indicator value. @@ -1308,7 +1313,7 @@ int nr_acknack_scheduling(int mod_id, while ((pucch->frame*n_slots_frame + pucch->ul_slot) <= max_absslot) { int i = 0; while (i < 8) { - LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", + LOG_D(NR_MAC, "In %s: pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", __FUNCTION__, i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot); if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) { ind_found = i; @@ -1373,7 +1378,7 @@ int nr_acknack_scheduling(int mod_id, pucch->timing_indicator = ind_found; // index in the list of timing indicators - LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); + LOG_D(NR_MAC, "In %s: 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); pucch->dai_c++; pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 51192b4d63..64297c2617 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -165,10 +165,8 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub symb_tda_mi); } - const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; - const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id])); - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; for (int slot = 0; slot < n; ++slot) { @@ -181,11 +179,12 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub LOG_D(MAC, "DL slot %d UL slot %d preferred_ul_tda %d\n", slot, sched_slot, nrmac->preferred_ul_tda[bwp_id][slot]); } - if (k2 < tdd->nrofUplinkSlots) + if (tdd && k2 < tdd->nrofUplinkSlots) { LOG_W(NR_MAC, "k2 %d < tdd->nrofUplinkSlots %ld: not all UL slots can be scheduled\n", k2, tdd->nrofUplinkSlots); + } } // For both UL-SCH except: @@ -882,8 +881,7 @@ long get_K2(NR_ServingCellConfigCommon_t *scc,NR_BWP_Uplink_t *ubwp, int time_do bool nr_UE_is_to_be_scheduled(module_id_t mod_id, int CC_id, int UE_id, frame_t frame, sub_frame_t slot) { const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon; - const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; - const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const int now = frame * n + slot; const struct gNB_MAC_INST_s *nrmac = RC.nrmac[mod_id]; diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index d17448437d..8147f47847 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -213,6 +213,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP, int bwp_id, NR_SearchSpace__searchSpaceType_PR ss_type, int *max_fb_time, + int *min_fb_time, uint8_t *pdsch_to_harq_feedback); void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index eb6f86fda6..9f50168260 100755 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -619,10 +619,12 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, } sib1->servingCellConfigCommon->ssb_PeriodicityServingCell = *configuration->scc->ssb_periodicityServingCell; - sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon = CALLOC(1,sizeof(struct NR_TDD_UL_DL_ConfigCommon)); - sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = configuration->scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing; - sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->pattern1 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern1; - sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->pattern2 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern2; + if (configuration->scc->tdd_UL_DL_ConfigurationCommon) { + sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon = CALLOC(1,sizeof(struct NR_TDD_UL_DL_ConfigCommon)); + sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = configuration->scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing; + sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->pattern1 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern1; + sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->pattern2 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern2; + } sib1->servingCellConfigCommon->ss_PBCH_BlockPower = configuration->scc->ss_PBCH_BlockPower; // ims-EmergencySupport @@ -1181,8 +1183,11 @@ void fill_initial_SpCellConfig(rnti_t rnti, // Check for above configuration and exit for now if it is not the case AssertFatal(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing==NR_SubcarrierSpacing_kHz30, "SCS != 30kHz\n"); - AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity==NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5, - "TDD period != 5ms : %ld\n",scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); + + if (scc->tdd_UL_DL_ConfigurationCommon) { + AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity == NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5, + "TDD period != 5ms : %ld\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); + } schedulingRequestResourceConfig->periodicityAndOffset->choice.sl40 = 8+(10*((rnti>>1)&3)) + (rnti&1); schedulingRequestResourceConfig->resource = calloc(1,sizeof(*schedulingRequestResourceConfig->resource)); diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index 980bd39c37..401a3a1aba 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -945,7 +945,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - *delay[i] = (i<6) ? (i+2) : 0; + *delay[i] = i + 6; // (i<6) ? (i+2) : 0; // (Temp) TODO replace with param from conf ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } pucch_Config->spatialRelationInfoToAddModList = calloc(1,sizeof(*pucch_Config->spatialRelationInfoToAddModList)); From a5f18dbb2067549000c19c148dde5f9130a7c8be Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Wed, 3 Nov 2021 15:31:03 +0100 Subject: [PATCH 02/67] Enhancements to the overall MAC logging - updating to NR_MAC tag - minor cleanups - added more relavant info for debugging purposes --- openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c | 2 +- openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c | 6 +++--- openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c | 4 ++-- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 9 ++++++++- openair2/LAYER2/NR_MAC_UE/config_ue.c | 8 ++++---- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 11 +---------- 7 files changed, 20 insertions(+), 22 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c b/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c index 8bbf569814..f957c38182 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c @@ -522,7 +522,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB, A = (harq_process->TBS)<<3; - LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d, Coderate %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers, R); + LOG_D(NR_PHY, "ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d, Coderate %d\n", harq_pid, A, G, mcs, n_layers, nb_rb, Qm, n_layers, R); if (R<1024) Coderate = (float) R /(float) 1024; diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c index ba5c65ceb7..8f0f5bea5d 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c @@ -265,9 +265,9 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue, VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_UE_ULSCH_ENCODING, VCD_FUNCTION_IN); - LOG_D(PHY,"ulsch coding nb_rb %d, Nl = %d\n", nb_rb, harq_process->pusch_pdu.nrOfLayers); - LOG_D(PHY,"ulsch coding A %d G %d mod_order %d\n", A,G, mod_order); - LOG_D(PHY,"harq_pid %d harq_process->ndi %d, pusch_data.new_data_indicator %d\n", + LOG_D(NR_PHY, "ulsch coding nb_rb %d, Nl = %d\n", nb_rb, harq_process->pusch_pdu.nrOfLayers); + LOG_D(NR_PHY, "ulsch coding A %d G %d mod_order %d\n", A, G, mod_order); + LOG_D(NR_PHY, "harq_pid %d harq_process->ndi %d, pusch_data.new_data_indicator %d\n", harq_pid,harq_process->ndi,harq_process->pusch_pdu.pusch_data.new_data_indicator); if (harq_process->first_tx == 1 || diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c index 4fcbd322db..c33946fa5a 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c @@ -51,7 +51,7 @@ uint32_t nr_compute_tbs(uint16_t Qm, uint32_t Ninfo, Np_info, C; uint8_t n, scale; - LOG_D(NR_MAC,"nb_symb_sch %d, nb_dmrs_prb %d, nb_rb_oh %d\n",nb_symb_sch,nb_dmrs_prb,nb_rb_oh); + LOG_D(NR_MAC, "In %s: nb_symb_sch %d, nb_dmrs_prb %d, nb_rb %d, nb_rb_oh %d, tb_scaling %d Nl %d\n", __FUNCTION__, nb_symb_sch, nb_dmrs_prb, nb_rb, nb_rb_oh, tb_scaling, Nl); nbp_re = NR_NB_SC_PER_RB * nb_symb_sch - nb_dmrs_prb - nb_rb_oh; nb_re = min(156, nbp_re) * nb_rb; @@ -86,7 +86,7 @@ uint32_t nr_compute_tbs(uint16_t Qm, } } - LOG_D(NR_MAC, "In %s: Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d\n", __FUNCTION__, Ninfo, nbp_re, nb_re, Qm, R, nr_tbs); + LOG_D(NR_MAC, "In %s: Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d bits\n", __FUNCTION__, Ninfo, nbp_re, nb_re, Qm, R, nr_tbs); return nr_tbs; diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index c8fa48b0ee..341ba9c641 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -2597,7 +2597,14 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr uint8_t row, colomn; int32_t l_prime; - LOG_D(NR_MAC, "PUSCH: NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", duration_in_symbols, start_symbol, mapping_type, dmrs_typeA_position); + LOG_D(NR_MAC, "In %s: PUSCH NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d additional_pos:%d, pusch_maxLength:%d\n", + __FUNCTION__, + duration_in_symbols, + start_symbol, + mapping_type, + dmrs_typeA_position, + additional_pos, + pusch_maxLength); // Section 6.4.1.1.3 in Spec 38.211 // For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PUSCH resources diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index d848595ce4..3691fcee7f 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -246,9 +246,9 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac, ); if (return_tdd !=0) { - LOG_E(PHY,"TDD configuration can not be done\n"); + LOG_E(NR_PHY, "TDD configuration cannot be done\n"); } else { - LOG_I(PHY,"TDD has been properly configurated\n"); + LOG_I(NR_PHY, "TDD has been properly configurated\n"); } } @@ -429,9 +429,9 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols ); if (return_tdd !=0) { - LOG_E(PHY, "TDD configuration can not be done\n"); + LOG_E(NR_PHY, "TDD configuration can not be done\n"); } else { - LOG_I(PHY, "TDD has been properly configurated\n"); + LOG_I(NR_PHY, "TDD has been properly configurated\n"); } } diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 5615c1aa95..e8176f16e8 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -601,7 +601,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_config_pdu->nr_of_symbols = NrOfSymbols; l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, add_pos, dmrslength, StartSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position); - LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask); + LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask); #ifdef DEBUG_MSG3 LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 8b645c06f3..807549d595 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -988,7 +988,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->nrOfLayers = 1; pusch_pdu->ul_dmrs_symb_pos = get_l_prime(nr_of_symbols,mappingtype,pusch_dmrs_pos2,pusch_len1,start_symbol_index, scc->dmrs_TypeA_Position); - LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos); + LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos); pusch_pdu->dmrs_config_type = 0; pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id. pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0. @@ -1912,25 +1912,16 @@ void nr_fill_rar(uint8_t Mod_idP, rar->UL_GRANT_4 = (uint8_t) ul_grant & 0xff; #ifdef DEBUG_RAR - //LOG_I(NR_MAC, "rarbi->E = 0x%x\n", rarbi->E); - //LOG_I(NR_MAC, "rarbi->T = 0x%x\n", rarbi->T); - //LOG_I(NR_MAC, "rarbi->R = 0x%x\n", rarbi->R); - //LOG_I(NR_MAC, "rarbi->BI = 0x%x\n", rarbi->BI); - LOG_I(NR_MAC, "rarh->E = 0x%x\n", rarh->E); LOG_I(NR_MAC, "rarh->T = 0x%x\n", rarh->T); LOG_I(NR_MAC, "rarh->RAPID = 0x%x (%i)\n", rarh->RAPID, rarh->RAPID); - LOG_I(NR_MAC, "rar->R = 0x%x\n", rar->R); LOG_I(NR_MAC, "rar->TA1 = 0x%x\n", rar->TA1); - LOG_I(NR_MAC, "rar->TA2 = 0x%x\n", rar->TA2); LOG_I(NR_MAC, "rar->UL_GRANT_1 = 0x%x\n", rar->UL_GRANT_1); - LOG_I(NR_MAC, "rar->UL_GRANT_2 = 0x%x\n", rar->UL_GRANT_2); LOG_I(NR_MAC, "rar->UL_GRANT_3 = 0x%x\n", rar->UL_GRANT_3); LOG_I(NR_MAC, "rar->UL_GRANT_4 = 0x%x\n", rar->UL_GRANT_4); - LOG_I(NR_MAC, "rar->TCRNTI_1 = 0x%x\n", rar->TCRNTI_1); LOG_I(NR_MAC, "rar->TCRNTI_2 = 0x%x\n", rar->TCRNTI_2); #endif From 755c8d5055a37895c8464d6c46fcd4a3234644c8 Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Wed, 3 Nov 2021 15:33:46 +0100 Subject: [PATCH 03/67] Fixed calculation of num dmrs per prb at gnb side - the param was hardcoded to 12 at gNB side while it was computed at UE side - the same function used at UE side has been moved to the common file - now the computation at gNB side is consistent with the UE --- openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c | 8 +++++++- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 19 ++++++++++++++++++ openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h | 9 +++++++++ openair2/LAYER2/NR_MAC_UE/mac_proto.h | 4 ---- openair2/LAYER2/NR_MAC_UE/nr_l1_helpers.c | 20 ------------------- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 8 +++++++- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 14 ++++++++++++- 7 files changed, 55 insertions(+), 27 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c index b1addf740a..4357f6dd49 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c @@ -143,7 +143,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ulsch_ue->Nid_cell = Nid_cell; - get_num_re_dmrs(pusch_pdu, &nb_dmrs_re_per_rb, &number_dmrs_symbols); + get_num_re_dmrs(pusch_pdu->start_symbol_index, + pusch_pdu->nr_of_symbols, + pusch_pdu->ul_dmrs_symb_pos, + pusch_pdu->dmrs_config_type, + pusch_pdu->num_dmrs_cdm_grps_no_data, + &nb_dmrs_re_per_rb, + &number_dmrs_symbols); LOG_D(PHY,"ulsch %x : start_rb %d bwp_start %d start_sc %d start_symbol %d num_symbols %d cdmgrpsnodata %d num_dmrs %d dmrs_re_per_rb %d\n", rnti,start_rb,pusch_pdu->bwp_start,start_sc,start_symbol,number_of_symbols,cdm_grps_no_data,number_dmrs_symbols,nb_dmrs_re_per_rb); diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index 341ba9c641..7bf0f84f71 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -4294,3 +4294,22 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config, return valid; } +void get_num_re_dmrs(int start_symbol, + uint8_t number_of_symbols, + uint16_t ul_dmrs_symb_pos, + uint8_t dmrs_type, + uint8_t cdm_grps_no_data, + uint8_t *nb_dmrs_re_per_rb, + uint16_t *number_dmrs_symbols){ + + *number_dmrs_symbols = 0; + + for (int i = start_symbol; i < start_symbol + number_of_symbols; i++) { + if((ul_dmrs_symb_pos >> i) & 0x01){ + *number_dmrs_symbols += 1; + } + } + + *nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6 : 4) * cdm_grps_no_data; + +} diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index e107553117..5e70cb2d4d 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -62,6 +62,15 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP, uint16_t N_RB, int bwp_id); + +void get_num_re_dmrs(int start_symbol, + uint8_t number_of_symbols, + uint16_t ul_dmrs_symb_pos, + uint8_t dmrs_type, + uint8_t cdm_grps_no_data, + uint8_t *nb_dmrs_re_per_rb, + uint16_t *number_dmrs_symbols); + void find_aggregation_candidates(uint8_t *aggregation_level, uint8_t *nr_of_candidates, NR_SearchSpace_t *ss, diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index 30b87a056e..92710b3c0d 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -390,10 +390,6 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id); void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15); -void get_num_re_dmrs(nfapi_nr_ue_pusch_pdu_t *pusch_pdu, - uint8_t *nb_dmrs_re_per_rb, - uint16_t *number_dmrs_symbols); - void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac); void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_l1_helpers.c b/openair2/LAYER2/NR_MAC_UE/nr_l1_helpers.c index 7f1011fb28..a8b1428673 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_l1_helpers.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_l1_helpers.c @@ -160,26 +160,6 @@ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t m return receivedTargerPower; } -void get_num_re_dmrs(nfapi_nr_ue_pusch_pdu_t *pusch_pdu, - uint8_t *nb_dmrs_re_per_rb, - uint16_t *number_dmrs_symbols){ - - int start_symbol = pusch_pdu->start_symbol_index; - uint8_t number_of_symbols = pusch_pdu->nr_of_symbols; - uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos; - uint8_t dmrs_type = pusch_pdu->dmrs_config_type; - uint8_t cdm_grps_no_data = pusch_pdu->num_dmrs_cdm_grps_no_data; - - *number_dmrs_symbols = 0; - for (int i = start_symbol; i < start_symbol + number_of_symbols; i++) { - if((ul_dmrs_symb_pos >> i) & 0x01) - *number_dmrs_symbols += 1; - } - - *nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4)*cdm_grps_no_data; - -} - // Implementation of 6.2.4 Configured ransmitted power // 3GPP TS 38.101-1 version 16.5.0 Release 16 // - diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index e8176f16e8..70abd545cd 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -842,7 +842,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, return -1; } - get_num_re_dmrs(pusch_config_pdu, &nb_dmrs_re_per_rb, &number_dmrs_symbols); + get_num_re_dmrs(pusch_config_pdu->start_symbol_index, + pusch_config_pdu->nr_of_symbols, + pusch_config_pdu->ul_dmrs_symb_pos, + pusch_config_pdu->dmrs_config_type, + pusch_config_pdu->num_dmrs_cdm_grps_no_data, + &nb_dmrs_re_per_rb, + &number_dmrs_symbols); // Compute TBS pusch_config_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_config_pdu->qam_mod_order, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 807549d595..16543d6a7c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -968,6 +968,9 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, int start_symbol_index,nr_of_symbols; + uint8_t nb_dmrs_re_per_rb = 0; + uint16_t number_dmrs_symbols = 0; + SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols); pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; @@ -1013,11 +1016,20 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->pusch_data.harq_process_id = 0; pusch_pdu->pusch_data.new_data_indicator = 1; pusch_pdu->pusch_data.num_cb = 0; + + get_num_re_dmrs(pusch_pdu->start_symbol_index, + pusch_pdu->nr_of_symbols, + pusch_pdu->ul_dmrs_symb_pos, + pusch_pdu->dmrs_config_type, + pusch_pdu->num_dmrs_cdm_grps_no_data, + &nb_dmrs_re_per_rb, + &number_dmrs_symbols); + pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, pusch_pdu->target_code_rate, pusch_pdu->rb_size, pusch_pdu->nr_of_symbols, - 12, // nb dmrs set for no data in dmrs symbol + nb_dmrs_re_per_rb*number_dmrs_symbols, // nb dmrs set for no data in dmrs symbol 0, //nb_rb_oh 0, // to verify tb scaling pusch_pdu->nrOfLayers)>>3; From 9d9bc0e718a3dc5078f5e66669139fd2508013fd Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Thu, 4 Nov 2021 10:17:45 +0100 Subject: [PATCH 04/67] Conf file for band 66 in SA mode --- .../gnb.sa.band66.fr1.106PRB.usrpn300.conf | 303 ++++++++++++++++++ 1 file changed, 303 insertions(+) create mode 100644 targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf new file mode 100644 index 0000000000..09772440a4 --- /dev/null +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf @@ -0,0 +1,303 @@ +Active_gNBs = ( "gNB-Eurecom-5GNRBox"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + gNB_name = "gNB-Eurecom-5GNRBox"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 0xa000; + plmn_list = ({ + mcc = 208; + mnc = 99; + mnc_length = 2; + snssaiList = ( + { + sst = 1; + sd = 0x1; // 0 false, else true + }, + { + sst = 1; + sd = 0x1; // 0 false, else true + } + ); + + }); + + nr_cellid = 12345678L; + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 1; + sib1_tda = 0; + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 12; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) + absoluteFrequencySSB = 433096; + dl_frequencyBand = 66; + # this is 3600 MHz + dl_absoluteFrequencyPointA = 430000; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=27,L=48 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 13475; # 6366 12925 12956 28875 12952 +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 12; + initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 66; + ul_absoluteFrequencyPointA = 350000; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 13475; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 13; + preambleReceivedTargetPower = -118; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = -25; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// MME parameters: + amf_ip_address = ( { ipv4 = "192.168.70.132"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + + NETWORK_INTERFACES : + { + GNB_INTERFACE_NAME_FOR_S1_MME = "eth0"; + GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24"; + GNB_INTERFACE_NAME_FOR_S1U = "eth0"; + GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + ulsch_max_slots_inactivity = 100; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + pusch_proc_threads = 8; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 0 + att_rx = 0; + bands = [7]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + eNB_instances = [0]; + #beamforming 1x4 matrix: + bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000]; + clock_src = "internal"; + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +rfsimulator : +{ + serveraddr = "server"; + serverport = "4043"; + options = (); #("saviq"); or/and "chanmod" + modelname = "AWGN"; + IQfile = "/tmp/rfsimulator.iqs"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + ngap_log_level ="debug"; + ngap_log_verbosity ="medium"; + }; + From 565fb8834201748e339a3e290848f216f6b07d64 Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Thu, 4 Nov 2021 16:08:41 +0100 Subject: [PATCH 05/67] Simplified set_tdd_config_nr_ue function - reviewed redundant code - removed unnecessary return --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 74 ++++++++++----------------- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 6 +-- 2 files changed, 29 insertions(+), 51 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 3691fcee7f..d9514691ba 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -38,15 +38,27 @@ #include "common/utils/nr/nr_common.h" #include "executables/softmodem-common.h" -int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, - int mu, - int nrofDownlinkSlots, int nrofDownlinkSymbols, - int nrofUplinkSlots, int nrofUplinkSymbols) { +void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, + int mu, + NR_TDD_UL_DL_ConfigCommon_t *tdd_config) { + int nrofDownlinkSlots = tdd_config->pattern1.nrofDownlinkSlots; + int nrofDownlinkSymbols = tdd_config->pattern1.nrofDownlinkSymbols; + int nrofUplinkSlots = tdd_config->pattern1.nrofUplinkSlots; + int nrofUplinkSymbols = tdd_config->pattern1.nrofUplinkSymbols; int slot_number = 0; int nb_periods_per_frame; int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<pattern1.ext1 == NULL) { + cfg->tdd_table.tdd_period = tdd_config->pattern1.dl_UL_TransmissionPeriodicity; + } else { + AssertFatal(tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, "tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); + cfg->tdd_table.tdd_period = *tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; + } + + LOG_I(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period); + switch(cfg->tdd_table.tdd_period) { case 0: nb_periods_per_frame = 20; // 10ms/0p5ms @@ -140,7 +152,8 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, } } - return (0); + LOG_I(NR_MAC, "TDD has been properly configurated\n"); + } @@ -228,28 +241,10 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac, } // TDD Table Configuration - if(cfg->cell_config.frame_duplex_type == TDD){ - if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) { - cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; - } else { - AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, - "scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); - cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; - } - LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period); - int return_tdd = set_tdd_config_nr_ue(cfg, - scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols - ); - - if (return_tdd !=0) { - LOG_E(NR_PHY, "TDD configuration cannot be done\n"); - } else { - LOG_I(NR_PHY, "TDD has been properly configurated\n"); - } + if (cfg->cell_config.frame_duplex_type == TDD){ + set_tdd_config_nr_ue(cfg, + scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, + scc->tdd_UL_DL_ConfigurationCommon); } // PRACH configuration @@ -412,27 +407,10 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, } // TDD Table Configuration - if(cfg->cell_config.frame_duplex_type == TDD){ - if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) { - cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; - } else { - AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, - "scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); - cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; - } - LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period); - int return_tdd = set_tdd_config_nr_ue(cfg, - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols - ); - if (return_tdd !=0) { - LOG_E(NR_PHY, "TDD configuration can not be done\n"); - } else { - LOG_I(NR_PHY, "TDD has been properly configurated\n"); - } + if (cfg->cell_config.frame_duplex_type == TDD){ + set_tdd_config_nr_ue(cfg, + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, + scc->tdd_UL_DL_ConfigurationCommon); } // PRACH configuration diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index 92710b3c0d..3531fa564e 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -213,9 +213,9 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, uint8_t *ulsch_buffer, uint16_t buflen); -int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu, - int nrofDownlinkSlots, int nrofDownlinkSymbols, - int nrofUplinkSlots, int nrofUplinkSymbols); +void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, + int mu, + NR_TDD_UL_DL_ConfigCommon_t *tdd_config); void set_harq_status(NR_UE_MAC_INST_t *mac, uint8_t pucch_id, From d872a9bc95da8dcd804650bd692221546eb812f4 Mon Sep 17 00:00:00 2001 From: francescomani Date: Fri, 8 Oct 2021 15:16:08 +0200 Subject: [PATCH 06/67] runmodem update for IF frequency --- doc/RUNMODEM.md | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/doc/RUNMODEM.md b/doc/RUNMODEM.md index dc7a982310..f51d3a7318 100644 --- a/doc/RUNMODEM.md +++ b/doc/RUNMODEM.md @@ -171,15 +171,9 @@ With the RF simulator (on the same machine): ## IF setup with OAI -The -C and --CO flags can be used together at UE side to set custom downlink and uplink FR1 arbitrary frequencies for the IF equipment. +The `if_freq` and `if_freq_off` options can be used to set (via command line) custom downlink and uplink FR1 arbitrary frequencies for the IF equipment both. -In order to run this setup, the following flags are needed at the UE side: - -`-C` - -`--CO` - -and the following parameters must be configured in the RUs section of the gNB configuration file: +In the same way, the following parameters must be configured in the RUs section of the gNB configuration file: `if_freq` @@ -199,7 +193,7 @@ gNB on machine 1: UE on machine 2: -`sudo ./nr-uesoftmodem -C 2169080000 --CO -400000000` +`sudo ./nr-uesoftmodem --if_freq 2169080000 --if_freq_off -400000000` From 6784eac3f5d53e343179bb37257a72105ccd806c Mon Sep 17 00:00:00 2001 From: francescomani Date: Fri, 8 Oct 2021 12:00:32 +0200 Subject: [PATCH 07/67] runmodem update for sa --- doc/RUNMODEM.md | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/doc/RUNMODEM.md b/doc/RUNMODEM.md index f51d3a7318..8976cbc39c 100644 --- a/doc/RUNMODEM.md +++ b/doc/RUNMODEM.md @@ -151,6 +151,14 @@ At the UE the --sa flag will: 4) 5G-NR RRC Reconfiguration 5) Start Downlink and Uplink Data Transfer +Command line parameters for UE in --sa mode: +- `C` : downlink carrier frequency in Hz (default value 0) +- `CO` : uplink frequency offset for FDD in Hz (default value 0) +- `numerology` : numerology index (default value 1) +- `r` : bandwidth in terms of RBs (default value 106) +- `band` : NR band number (default value 78) +- `s` : SSB start subcarrier (default value 512) + ### Run OAI in SA mode From the `cmake_targets/ran_build/build` folder: From 3fcbfdadadf03eca0caaf54001f886f8e925933e Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 27 Sep 2021 18:45:59 +0200 Subject: [PATCH 08/67] Minimum value of DL to ACK --- openair1/SIMULATION/NR_PHY/dlsim.c | 2 +- openair1/SIMULATION/NR_PHY/ulsim.c | 2 +- openair2/GNB_APP/gnb_config.c | 2 ++ openair2/GNB_APP/gnb_paramdef.h | 2 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 19 +++++++++++-------- openair2/RRC/NR/nr_rrc_proto.h | 2 ++ openair2/RRC/NR/rrc_gNB_nsa.c | 2 ++ openair2/RRC/NR/rrc_gNB_reconfig.c | 5 ++++- 8 files changed, 24 insertions(+), 12 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 83d6625830..3e982eb887 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -765,7 +765,7 @@ int main(int argc, char **argv) prepare_scd(scd); - fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0); + fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 2, 0, 0, 0); /* RRC parameter validation for secondaryCellGroup */ fix_scd(scd); diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c index 69316d6b88..a7075eb218 100644 --- a/openair1/SIMULATION/NR_PHY/ulsim.c +++ b/openair1/SIMULATION/NR_PHY/ulsim.c @@ -713,7 +713,7 @@ int main(int argc, char **argv) prepare_scd(scd); - fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0); + fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0, 0); // xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup); diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index ee20760941..82e0233633 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -1113,6 +1113,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr; + printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); + NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; diff --git a/openair2/GNB_APP/gnb_paramdef.h b/openair2/GNB_APP/gnb_paramdef.h index bf1d12825e..0c3d971569 100644 --- a/openair2/GNB_APP/gnb_paramdef.h +++ b/openair2/GNB_APP/gnb_paramdef.h @@ -149,7 +149,7 @@ typedef enum { {GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \ {GNB_CONFIG_STRING_MINRXTXTIMEPDSCH, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \ -{GNB_CONFIG_STRING_ULPRBBLACKLIST, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0} \ +{GNB_CONFIG_STRING_ULPRBBLACKLIST, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0} \ } #define GNB_GNB_ID_IDX 0 diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index f06d50be48..07648d0074 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -1182,14 +1182,17 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr uint8_t feedback_ti = ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; - // set the harq status at MAC for feedback - set_harq_status(mac,dci->pucch_resource_indicator, - dci->harq_pid, - dlsch_config_pdu_1_1->accumulated_delta_PUCCH, - feedback_ti, - dci->dai[0].val, - dci_ind->n_CCE,dci_ind->N_CCE,0, - frame,slot); + AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d)\n", + feedback_ti,DURATION_RX_TO_TX); + + // set the harq status at MAC for feedback + set_harq_status(mac,dci->pucch_resource_indicator, + dci->harq_pid, + dlsch_config_pdu_1_1->accumulated_delta_PUCCH, + feedback_ti, + dci->dai[0].val, + dci_ind->n_CCE,dci_ind->N_CCE, + 0,frame,slot); dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); diff --git a/openair2/RRC/NR/nr_rrc_proto.h b/openair2/RRC/NR/nr_rrc_proto.h index 9465b9b4b0..22109c3029 100644 --- a/openair2/RRC/NR/nr_rrc_proto.h +++ b/openair2/RRC/NR/nr_rrc_proto.h @@ -79,6 +79,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco int scg_id, int servCellIndex, int dl_antenna_ports, + int minRXTXTIMEpdsch, int do_csirs, int initial_csi_index, int uid); @@ -90,6 +91,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon NR_RRCReconfiguration_IEs_t *reconfig, NR_CellGroupConfig_t *secondaryCellGroup, int dl_antenna_ports, + int minRXTXTIMEpdsch, int do_csirs, int initial_csi_index, int uid); diff --git a/openair2/RRC/NR/rrc_gNB_nsa.c b/openair2/RRC/NR/rrc_gNB_nsa.c index 52f451d7bb..e606e22a57 100644 --- a/openair2/RRC/NR/rrc_gNB_nsa.c +++ b/openair2/RRC/NR/rrc_gNB_nsa.c @@ -256,6 +256,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, + carrier->minRXTXTIMEpdsch, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); @@ -265,6 +266,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, + carrier->minRXTXTIMEpdsch, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index 401a3a1aba..4b8fd77dc5 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -55,6 +55,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco int scg_id, int servCellIndex, int dl_antenna_ports, + int minRXTXTIMEpdsch, int do_csirs, int initial_csi_index, int uid) { @@ -945,7 +946,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - *delay[i] = i + 6; // (i<6) ? (i+2) : 0; // (Temp) TODO replace with param from conf + *delay[i] = i+minRXTXTIMEpdsch; ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } pucch_Config->spatialRelationInfoToAddModList = calloc(1,sizeof(*pucch_Config->spatialRelationInfoToAddModList)); @@ -1348,6 +1349,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon NR_RRCReconfiguration_IEs_t *reconfig, NR_CellGroupConfig_t *secondaryCellGroup, int dl_antenna_ports, + int minRXTXTIMEpdsch, int do_csirs, int initial_csi_index, int uid) { @@ -1363,6 +1365,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon 1, 1, dl_antenna_ports, + minRXTXTIMEpdsch, do_csirs, initial_csi_index, uid); From 30cc2b764f605cf687c1d4910632e265d5b13201 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 8 Nov 2021 11:00:59 +0100 Subject: [PATCH 09/67] removing min_fb_time from acknack scheduling --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c | 10 +++------- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 5 ++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 1 - 3 files changed, 5 insertions(+), 11 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 5766b39e29..edb3c02a49 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2097,7 +2097,6 @@ void get_pdsch_to_harq_feedback(int Mod_idP, int bwp_id, NR_SearchSpace__searchSpaceType_PR ss_type, int *max_fb_time, - int *min_fb_time, uint8_t *pdsch_to_harq_feedback) { NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; @@ -2136,10 +2135,9 @@ void get_pdsch_to_harq_feedback(int Mod_idP, // common search type uses DCI format 1_0 if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) { for (int i=0; i<8; i++) { - pdsch_to_harq_feedback[i] = i+1; // TODO take into account the min feedback time here + pdsch_to_harq_feedback[i] = i+1; if(pdsch_to_harq_feedback[i]>*max_fb_time) *max_fb_time = pdsch_to_harq_feedback[i]; - *min_fb_time = 6; } } else { @@ -2162,10 +2160,10 @@ void get_pdsch_to_harq_feedback(int Mod_idP, if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) { for (int i=0; i<8; i++) { - pdsch_to_harq_feedback[i] = i+1; // TODO take into account the min feedback time here + pdsch_to_harq_feedback[i] = i+1; if(pdsch_to_harq_feedback[i]>*max_fb_time) *max_fb_time = pdsch_to_harq_feedback[i]; - *min_fb_time = 6; + } } else { @@ -2175,8 +2173,6 @@ void get_pdsch_to_harq_feedback(int Mod_idP, pdsch_to_harq_feedback[i] = *ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[i]; if(pdsch_to_harq_feedback[i]>*max_fb_time) *max_fb_time = pdsch_to_harq_feedback[i]; - if(pdsch_to_harq_feedback[i]<*min_fb_time) - *min_fb_time = pdsch_to_harq_feedback[i]; } } else diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index cccc930dce..982270b3a8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1257,8 +1257,7 @@ int nr_acknack_scheduling(int mod_id, if (sched_ctrl->active_ubwp) bwp_Id = sched_ctrl->active_ubwp->bwp_Id; int max_fb_time = 0; - int min_fb_time = 6; - get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, &min_fb_time, pdsch_to_harq_feedback); + get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback); int max_absslot = frame*n_slots_frame + slot + max_fb_time; LOG_D(NR_MAC, "In %s: 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); @@ -1304,7 +1303,7 @@ int nr_acknack_scheduling(int mod_id, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); pucch->frame = frame; - pucch->ul_slot = tdd ? first_ul_slot_tdd : first_ul_slot_tdd + min_fb_time; + pucch->ul_slot = first_ul_slot_tdd; } // Find the right timing_indicator value. diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 8147f47847..d17448437d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -213,7 +213,6 @@ void get_pdsch_to_harq_feedback(int Mod_idP, int bwp_id, NR_SearchSpace__searchSpaceType_PR ss_type, int *max_fb_time, - int *min_fb_time, uint8_t *pdsch_to_harq_feedback); void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, From c9f2f54df3b4600393af6cb407d0199c9f0d6b89 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 8 Nov 2021 15:18:05 +0100 Subject: [PATCH 10/67] using minRXTXTIMEpdsch in acknack scheduling (for common case) --- openair1/SIMULATION/NR_PHY/dlsim.c | 4 ++-- openair1/SIMULATION/NR_PHY/ulsim.c | 4 ++-- openair2/GNB_APP/gnb_config.c | 9 +++------ openair2/LAYER2/NR_MAC_gNB/config.c | 2 ++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 -- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 8 ++++++-- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 5 +++-- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 1 + openair2/RRC/NR/rrc_gNB.c | 4 ++++ openair2/RRC/NR/rrc_gNB_nsa.c | 2 ++ 10 files changed, 25 insertions(+), 16 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 2f30609d7d..ea15f937fe 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -787,9 +787,9 @@ int main(int argc, char **argv) AssertFatal((gNB->if_inst = NR_IF_Module_init(0))!=NULL,"Cannot register interface"); gNB->if_inst->NR_PHY_config_req = nr_phy_config_request; // common configuration - rrc_mac_config_req_gNB(0,0, n_tx, n_tx, 0, scc, NULL, 0, 0, NULL); + rrc_mac_config_req_gNB(0,0, n_tx, n_tx, 0, 6, scc, NULL, 0, 0, NULL); // UE dedicated configuration - rrc_mac_config_req_gNB(0,0, n_tx, n_tx, 0, scc, NULL, 1, secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup); + rrc_mac_config_req_gNB(0,0, n_tx, n_tx, 0, 6, scc, NULL, 1, secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup); // reset preprocessor to the one of DLSIM after it has been set during // rrc_mac_config_req_gNB gNB_mac->pre_processor_dl = nr_dlsim_preprocessor; diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c index a7075eb218..0fa5165244 100644 --- a/openair1/SIMULATION/NR_PHY/ulsim.c +++ b/openair1/SIMULATION/NR_PHY/ulsim.c @@ -724,9 +724,9 @@ int main(int argc, char **argv) gNB->if_inst->NR_PHY_config_req = nr_phy_config_request; // common configuration - rrc_mac_config_req_gNB(0,0, n_tx, n_rx, 0, scc, &rrc.carrier.mib,0, 0, NULL); + rrc_mac_config_req_gNB(0,0, n_tx, n_rx, 0, 6, scc, &rrc.carrier.mib,0, 0, NULL); // UE dedicated configuration - rrc_mac_config_req_gNB(0,0, n_tx, n_rx, 0, scc, &rrc.carrier.mib,1, secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup); + rrc_mac_config_req_gNB(0,0, n_tx, n_rx, 0, 6, scc, &rrc.carrier.mib,1, secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup); frame_parms->nb_antennas_tx = n_tx; frame_parms->nb_antennas_rx = n_rx; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config; diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 82e0233633..fa20d8e4e0 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -31,6 +31,7 @@ #include #include "common/utils/LOG/log.h" +#include "common/utils/nr/nr_common.h" #include "common/utils/LOG/log_extern.h" #include "assertions.h" #include "gnb_config.h" @@ -47,7 +48,6 @@ // #include "SystemInformationBlockType2.h" // #include "LAYER2/MAC/extern.h" // #include "LAYER2/MAC/proto.h" -#include "PHY/phy_extern.h" #include "PHY/INIT/phy_init.h" #include "targets/ARCH/ETHERNET/USERSPACE/LIB/ethernet_lib.h" #include "nfapi_vnf.h" @@ -947,8 +947,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { if (num_gnbs>0) { - - // Output a list of all gNBs. ////////// Identification parameters config_getlist( &GNBParamList,GNBParams,sizeof(GNBParams)/sizeof(paramdef_t),NULL); @@ -1112,14 +1110,12 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr; printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; + printf("SIB1 TDA %d\n",*GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr; - printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); - NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; NRRRC_CONFIGURATION_REQ (msg_p).scd = scd; - }// }//End for (k=0; k configuration.pdsch_AntennaPorts, rrc->configuration.pusch_AntennaPorts, rrc->configuration.sib1_tda, + rrc->configuration.minRXTXTIMEpdsch, rrc->configuration.scc, NULL, 0, diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 626b6724bb..06ad17df6e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -429,6 +429,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, int pdsch_AntennaPorts, int pusch_AntennaPorts, int sib1_tda, + int minRXTXTIMEpdsch, NR_ServingCellConfigCommon_t *scc, NR_BCCH_BCH_Message_t *mib, int add_ue, @@ -479,6 +480,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, } } RC.nrmac[Mod_idP]->ssb_SubcarrierOffset = ssb_SubcarrierOffset; + RC.nrmac[Mod_idP]->minRXTXTIMEpdsch = minRXTXTIMEpdsch; NR_PHY_Config_t phycfg; phycfg.Mod_id = Mod_idP; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index bc1c11c1ba..77d55eb1df 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -968,8 +968,6 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, int start_symbol_index,nr_of_symbols; - uint8_t nb_dmrs_re_per_rb = 0; - uint16_t number_dmrs_symbols = 0; SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 11bee1ade6..5fdaebf637 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1180,6 +1180,8 @@ int nr_acknack_scheduling(int mod_id, const int first_ul_slot_tdd = tdd? tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period) : 0; const int first_ul_slot_period = tdd? tdd->nrofDownlinkSlots : 0; const int CC_id = 0; + const int minfbtime = RC.nrmac[mod_id]->minRXTXTIMEpdsch; + NR_sched_pucch_t *csi_pucch; if (tdd) { @@ -1270,7 +1272,8 @@ int nr_acknack_scheduling(int mod_id, int diff = pucch->ul_slot - slot; if (diff<0) diff += n_slots_frame; - if (pdsch_to_harq_feedback[i] == diff) + if (pdsch_to_harq_feedback[i] == diff && + pdsch_to_harq_feedback[i] >= minfbtime) break; ++i; } @@ -1322,7 +1325,8 @@ int nr_acknack_scheduling(int mod_id, int diff = pucch->ul_slot - slot; if (diff<0) diff += n_slots_frame; - if (pdsch_to_harq_feedback[i] == diff) { + if (pdsch_to_harq_feedback[i] == diff && + pdsch_to_harq_feedback[i] >= minfbtime) { ind_found = i; break; } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 5136a4a57c..6b254cd0af 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -50,10 +50,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, int pdsch_AntennaPorts, int pusch_AntennaPorts, int sib1_tda, + int minRXTXTIMEpdsch, NR_ServingCellConfigCommon_t *scc, NR_BCCH_BCH_Message_t *mib, - int add_ue, - uint32_t rnti, + int add_ue, + uint32_t rnti, NR_CellGroupConfig_t *CellGroup); void clear_nr_nfapi_information(gNB_MAC_INST * gNB, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index b2735b2428..8690f7192f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -678,6 +678,7 @@ typedef struct gNB_MAC_INST_s { int ssb_SubcarrierOffset; /// SIB1 Time domain allocation int sib1_tda; + int minRXTXTIMEpdsch; /// Common cell resources NR_COMMON_channels_t common_channels[NFAPI_CC_MAX]; /// current PDU index (BCH,DLSCH) diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 655e6973a1..85674bf9b5 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -239,6 +239,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, + rrc->carrier.minRXTXTIMEpdsch, (NR_ServingCellConfigCommon_t *)rrc->carrier.servingcellconfigcommon, &rrc->carrier.mib, 0, @@ -392,6 +393,7 @@ void apply_macrlc_config(gNB_RRC_INST *rrc, rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, + rrc->carrier.minRXTXTIMEpdsch, NULL, NULL, 0, @@ -585,6 +587,7 @@ rrc_gNB_generate_RRCSetup_for_RRCReestablishmentRequest( rrc_instance_p->carrier.pdsch_AntennaPorts, rrc_instance_p->carrier.pusch_AntennaPorts, rrc_instance_p->carrier.sib1_tda, + rrc_instance_p->carrier.minRXTXTIMEpdsch, (NR_ServingCellConfigCommon_t *)rrc_instance_p->carrier.servingcellconfigcommon, &rrc_instance_p->carrier.mib, 0, @@ -1379,6 +1382,7 @@ rrc_gNB_process_RRCReconfigurationComplete( rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, + rrc->carrier.minRXTXTIMEpdsch, NULL, NULL, 0, diff --git a/openair2/RRC/NR/rrc_gNB_nsa.c b/openair2/RRC/NR/rrc_gNB_nsa.c index e606e22a57..bf82888329 100644 --- a/openair2/RRC/NR/rrc_gNB_nsa.c +++ b/openair2/RRC/NR/rrc_gNB_nsa.c @@ -367,6 +367,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, + rrc->carrier.minRXTXTIMEpdsch, rrc->carrier.servingcellconfigcommon, &rrc->carrier.mib, 1, // add_ue flag @@ -378,6 +379,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, + rrc->carrier.minRXTXTIMEpdsch, NULL, NULL, 1, // add_ue flag From 6ce5f98c622c13c96bc401bb65be348e281b74b2 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 8 Nov 2021 16:52:00 +0100 Subject: [PATCH 11/67] some fixes --- .../gnb.band66.tm1.106PRB.usrpn300.conf | 15 +-------------- openair2/LAYER2/NR_MAC_gNB/config.c | 1 + openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 4 ++-- 3 files changed, 4 insertions(+), 16 deletions(-) diff --git a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf index 850cf9a60c..5211c3de6f 100644 --- a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf @@ -24,6 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime_pdsch = 6; servingCellConfigCommon = ( { @@ -157,20 +158,6 @@ gNBs = # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 subcarrierSpacing = 1; - - #tdd-UL-DL-ConfigurationCommon -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - referenceSubcarrierSpacing = 1; - # pattern1 - # dl_UL_TransmissionPeriodicity - # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; - nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; - ssPBCH_BlockPower = -25; } diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 06ad17df6e..0a1d7bce2e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -136,6 +136,7 @@ void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sche process_rlcBearerConfig(CellGroup->rlc_BearerToAddModList,CellGroup->rlc_BearerToReleaseList,sched_ctrl); } + void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) { nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[Mod_idP]->config[0]; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 5fdaebf637..ef3ac0d5f5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1174,7 +1174,7 @@ int nr_acknack_scheduling(int mod_id, const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon; const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; const int nr_mix_slots = tdd? (tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0) : 0; const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame; const int first_ul_slot_tdd = tdd? tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period) : 0; @@ -1311,7 +1311,7 @@ int nr_acknack_scheduling(int mod_id, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); pucch->frame = frame; - pucch->ul_slot = first_ul_slot_tdd; + pucch->ul_slot = tdd ? first_ul_slot_tdd : slot + minfbtime; } // Find the right timing_indicator value. From bde7e3a37897dbaca957f255dba4f849f01e7207 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 8 Nov 2021 17:39:58 +0100 Subject: [PATCH 12/67] fixing initialization of UL_tti_req_ahead --- openair2/LAYER2/NR_MAC_gNB/config.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 0a1d7bce2e..b7882906bc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -424,7 +424,7 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts } -extern uint16_t sl_ahead; + int rrc_mac_config_req_gNB(module_id_t Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts, @@ -447,17 +447,16 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, "could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n"); /* fill in slot/frame numbers: slot is fixed, frame will be updated by * scheduler */ + uint16_t sf_ahead = (uint16_t) ceil((float)6/(0x01<<(*scc->ssbSubcarrierSpacing))); + uint16_t sl_ahead = sf_ahead * (0x01<<(*scc->ssbSubcarrierSpacing)); + /* consider that scheduler runs sl_ahead: the first sl_ahead slots are + * already "in the past" and thus we put frame 1 instead of 0! Note that + * extern variable sl_ahead is not initialized yet, so computing it above */ for (int i = 0; i < n; ++i) { nfapi_nr_ul_tti_request_t *req = &RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][i]; - /* consider that scheduler runs sl_ahead: the first sl_ahead slots are - * already "in the past" and thus we put frame 1 instead of 0! Note that - * variable sl_ahead seems to not be correctly initialized, but I leave - * it for information purposes here (the fix would always put 0, what - * happens now, too) */ - req->SFN = i < sl_ahead; + req->SFN = i < (sl_ahead-1); req->Slot = i; } - RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL = calloc(n * MAX_BWP_SIZE, sizeof(uint16_t)); AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL, From 911b38776ff8712dc4b7024bececf0e71e56212f Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 8 Nov 2021 18:07:38 +0100 Subject: [PATCH 13/67] to avoid unnecessary error message for mixed slot in fdd --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 41 ++++++++++--------- 2 files changed, 22 insertions(+), 21 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 2d658ab8f7..a5978dd635 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -97,7 +97,7 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * /* check that TDA index 1 fits into DL part of mixed slot, if it exists */ int tdaMi = -1; - if (tdaList->list.count > 1) { + if (tdd && tdaList->list.count > 1) { const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; AssertFatal(!tdaP_Mi->k0 || *tdaP_Mi->k0 == 0, "TimeDomainAllocation at index 1: non-null k0 (%ld) is not supported by the scheduler\n", diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 64297c2617..e0ac0c7381 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -144,27 +144,28 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub // get largest time domain allocation (TDA) for UL slot and UL in mixed slot int tdaMi = -1; - const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; - AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), - "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", - k2, - get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); - SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); - const uint16_t symb_tda_mi = ((1 << len) - 1) << start; - // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check - // whether TDA is entirely within mixed slot, UL. Note that here we assume - // that the PUCCH is scheduled in every slot, and on all RBs (which is - // mostly not true, this is a simplification) - if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { - tdaMi = 1; - } else { - LOG_E(NR_MAC, - "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", - symb_pucch, - symb_ulMixed, - symb_tda_mi); + if (tdd) { + const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; + AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), + "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", + k2, + get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); + SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); + const uint16_t symb_tda_mi = ((1 << len) - 1) << start; + // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check + // whether TDA is entirely within mixed slot, UL. Note that here we assume + // that the PUCCH is scheduled in every slot, and on all RBs (which is + // mostly not true, this is a simplification) + if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { + tdaMi = 1; + } else { + LOG_E(NR_MAC, + "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", + symb_pucch, + symb_ulMixed, + symb_tda_mi); + } } - const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id])); const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; From 1624e811419e7eda1d4ad6b69bd6601aabc9a41f Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 9 Nov 2021 10:18:39 +0100 Subject: [PATCH 14/67] fixes in UL scheduler at UE --- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index dae3f6a8a3..b4938e2fe1 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -1079,7 +1079,7 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, // Calculate TX slot and frame *slot_tx = (current_slot + k2) % nr_slots_per_frame[mu]; - *frame_tx = ((current_slot + k2) > nr_slots_per_frame[mu]) ? (current_frame + 1) % 1024 : current_frame; + *frame_tx = ((current_slot + k2) > (nr_slots_per_frame[mu]-1)) ? (current_frame + 1) % 1024 : current_frame; } @@ -1768,7 +1768,7 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in } // CSI - if (mac->ra.ra_state == RA_SUCCEEDED) + if (mac->ra.ra_state == RA_SUCCEEDED || get_softmodem_params()->phy_test == 1) O_CSI = nr_get_csi_measurements(mac, frameP, slotP, pucch); // ACKNACK From 6087030c7884e305419b1b4a30c487d7e4534bd7 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 9 Nov 2021 13:53:58 +0100 Subject: [PATCH 15/67] adding min_rxtxtime_pdsch to fdd config file --- .../GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf | 1 + 1 file changed, 1 insertion(+) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf index 09772440a4..0b0a46a1f1 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf @@ -35,6 +35,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime_pdsch = 6; sib1_tda = 0; pdcch_ConfigSIB1 = ( From 47847f170102369f54942107a22596959cdbbcbb Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 9 Nov 2021 15:57:31 +0100 Subject: [PATCH 16/67] bugfix in ul preprocessor --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index e0ac0c7381..16a77cdfcf 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1293,8 +1293,13 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) return false; - bool is_mixed_slot = is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[sched_slot / 64], sched_slot) && - is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot); + bool is_mixed_slot = false; + const NR_TDD_UL_DL_Pattern_t *tdd = + scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + + if (tdd) + is_mixed_slot = is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[sched_slot / 64], sched_slot) && + is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot); // FIXME: Avoid mixed slots for initialUplinkBWP if (sched_ctrl->active_ubwp==NULL && is_mixed_slot) From bf8a191370283f2e26dc479df7628997f949a6b8 Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 10 Nov 2021 15:24:08 +0100 Subject: [PATCH 17/67] fixing msg2 scheduler --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 77d55eb1df..08d0a38038 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -481,9 +481,16 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, // go to previous slot if the current scheduled slot is beyond the response window // and if the slot is not among the PDCCH monitored ones (38.213 10.1) - while (((*msg2_slot>slot_limit)&&(*msg2_frame>frame_limit)) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) { - if((*msg2_slot%tdd_period_slot) > 0) + while ((*msg2_frame>frame_limit) || + ((*msg2_frame==frame_limit) && + (*msg2_slot>slot_limit)) || + ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) { + + if(!tdd || ((*msg2_slot%tdd_period_slot) > 0)) { + if (*msg2_slot==0) + (*msg2_frame)--; (*msg2_slot)--; + } else AssertFatal(1==0,"No available DL slot to schedule msg2 has been found"); } From 26a541e2b0b9b4b7d38c75276f83a9d08e8d0255 Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 10 Nov 2021 16:24:05 +0100 Subject: [PATCH 18/67] removing unnecessary free tdd_UL_DL_ConfigurationCommon --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index d9514691ba..7586342998 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -625,10 +625,7 @@ int nr_rrc_mac_config_req_ue( config_common_ue_sa(mac,module_id,cc_idP); int num_slots_ul = nr_slots_per_frame[mac->mib->subCarrierSpacingCommon]; - if(cfg->cell_config.frame_duplex_type == FDD){ - free(mac->scc_SIB->tdd_UL_DL_ConfigurationCommon); - mac->scc_SIB->tdd_UL_DL_ConfigurationCommon = NULL; - } else { + if(cfg->cell_config.frame_duplex_type == TDD){ num_slots_ul = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; if (mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0) { num_slots_ul++; @@ -653,10 +650,6 @@ int nr_rrc_mac_config_req_ue( ra->rach_ConfigDedicated = scell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink; } mac->scc = scell_group_config->spCellConfig->reconfigurationWithSync->spCellConfigCommon; - if(cfg->cell_config.frame_duplex_type == FDD){ - free(mac->scc->tdd_UL_DL_ConfigurationCommon); - mac->scc->tdd_UL_DL_ConfigurationCommon = NULL; - } mac->physCellId = *mac->scc->physCellId; config_common_ue(mac,module_id,cc_idP); mac->crnti = scell_group_config->spCellConfig->reconfigurationWithSync->newUE_Identity; From 04662813802900817dfe16004a0924d98470f263 Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Mon, 15 Nov 2021 16:07:11 +0100 Subject: [PATCH 19/67] Update conf file for band 66 according to default SA mode scenario - conf file now takes into account the basic SA scenario with gNB and CN in the same PC - Network parameters and gNB interfaces have been updated accordingly --- .../gnb.sa.band66.fr1.106PRB.usrpn300.conf | 29 +++++++++++++++---- 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf index 0b0a46a1f1..d74bff4656 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf @@ -10,7 +10,7 @@ gNBs = gNB_name = "gNB-Eurecom-5GNRBox"; // Tracking area code, 0x0000 and 0xfffe are reserved values - tracking_area_code = 0xa000; + tracking_area_code = 1; plmn_list = ({ mcc = 208; mnc = 99; @@ -22,7 +22,7 @@ gNBs = }, { sst = 1; - sd = 0x1; // 0 false, else true + sd = 0x112233; // 0 false, else true } ); @@ -217,10 +217,10 @@ gNBs = NETWORK_INTERFACES : { - GNB_INTERFACE_NAME_FOR_S1_MME = "eth0"; - GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24"; - GNB_INTERFACE_NAME_FOR_S1U = "eth0"; - GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24"; + GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24"; + GNB_INTERFACE_NAME_FOR_NGU = "demo-oai"; + GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24"; GNB_PORT_FOR_S1U = 2152; # Spec 2152 }; @@ -282,6 +282,23 @@ rfsimulator : IQfile = "/tmp/rfsimulator.iqs"; }; +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + log_config : { global_log_level ="info"; From 7c941435ad6fccde51cb219ae12a09729e8d6369 Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Mon, 15 Nov 2021 16:06:28 +0100 Subject: [PATCH 20/67] Bugfix wrong configuration of initial ack nack timing in FDD mode --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index ef3ac0d5f5..d202145864 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1310,8 +1310,9 @@ int nr_acknack_scheduling(int mod_id, AssertFatal(pucch->sr_flag + pucch->dai_c == 0, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); - pucch->frame = frame; - pucch->ul_slot = tdd ? first_ul_slot_tdd : slot + minfbtime; + const int s = tdd ? first_ul_slot_tdd : slot + minfbtime; + pucch->frame = (s < n_slots_frame - 1) ? frame : (frame + 1) % 1024; + pucch->ul_slot = s % n_slots_frame; } // Find the right timing_indicator value. From 12700a17277b27f93a2ec94136add843461c9e0a Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Mon, 15 Nov 2021 16:09:38 +0100 Subject: [PATCH 21/67] Updated band 78 conf file for SA mode --- .../GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf | 1 + 1 file changed, 1 insertion(+) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index 9c0427789d..82d478769c 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -36,6 +36,7 @@ gNBs = pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; sib1_tda = 0; + min_rxtxtime_pdsch = 6; pdcch_ConfigSIB1 = ( { From 0f48386133c6907e486a427b23c368e7fc12752c Mon Sep 17 00:00:00 2001 From: francescomani Date: Fri, 10 Dec 2021 17:44:46 +0100 Subject: [PATCH 22/67] improvements in handling tdd structure --- common/utils/nr/nr_common.c | 42 +++++++++++++++++++ common/utils/nr/nr_common.h | 1 + openair2/LAYER2/NR_MAC_gNB/config.c | 23 ++++++---- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 11 +++-- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 38 +++++++++-------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 4 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 25 +++++++---- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 34 ++++++++------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 26 ++++++++---- 9 files changed, 141 insertions(+), 63 deletions(-) diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index a704a66c76..4b006ca425 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -257,6 +257,48 @@ void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { *n_rb = 6*count; } +int get_nb_periods_per_frame(uint8_t tdd_period) { + + int nb_periods_per_frame; + switch(tdd_period) { + case 0: + nb_periods_per_frame = 20; // 10ms/0p5ms + break; + + case 1: + nb_periods_per_frame = 16; // 10ms/0p625ms + break; + + case 2: + nb_periods_per_frame = 10; // 10ms/1ms + break; + + case 3: + nb_periods_per_frame = 8; // 10ms/1p25ms + break; + + case 4: + nb_periods_per_frame = 5; // 10ms/2ms + break; + + case 5: + nb_periods_per_frame = 4; // 10ms/2p5ms + break; + + case 6: + nb_periods_per_frame = 2; // 10ms/5ms + break; + + case 7: + nb_periods_per_frame = 1; // 10ms/10ms + break; + + default: + AssertFatal(1==0,"Undefined tdd period %d\n", tdd_period); + } + return nb_periods_per_frame; +} + int get_dmrs_port(int nl, uint16_t dmrs_ports) { diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index d9f2b0c03a..4165ca2d41 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -71,6 +71,7 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx); int get_subband_size(int NPRB,int size); void SLIV2SL(int SLIV,int *S,int *L); int get_dmrs_port(int nl, uint16_t dmrs_ports); +int get_nb_periods_per_frame(uint8_t tdd_period); #define CEILIDIV(a,b) ((a+b-1)/b) #define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1)) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 5223b00e2a..0c397187b5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -492,16 +492,25 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, find_SSB_and_RO_available(Mod_idP); const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; - const int nr_dlmix_slots = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0) : 0; - const int nr_dl_slots = tdd ? nr_dlmix_slots : n; - const int nr_ulstart_slot = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0) : 1; + + int nr_slots_period = n; + int nr_dl_slots = n; + int nr_ulstart_slot = 0; + if (tdd) { + nr_dl_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0); + nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0); + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + } + else{ + if(RC.nrmac[Mod_idP]->common_channels[0].frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } for (int slot = 0; slot < n; ++slot) { /* FIXME: it seems there is a problem with slot 0/10/slots right after UL: - * we just get retransmissions. Thus, do not schedule such slots in DL */ - if (slot % nr_slots_period != 0){ + * we just get retransmissions. Thus, do not schedule such slots in DL in TDD */ + if (RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD || + (slot % nr_slots_period != 0)){ RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dl_slots) << (slot % 64); } RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) >= nr_ulstart_slot) << (slot % 64); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 7b6dc0e01d..1929f58943 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -36,6 +36,7 @@ #include "NR_MAC_gNB/mac_proto.h" #include "common/utils/LOG/log.h" +#include "common/utils/nr/nr_common.h" #include "common/utils/LOG/vcd_signal_dumper.h" #include "UTIL/OPT/opt.h" #include "OCG.h" @@ -284,13 +285,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) { + //FR2 const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; - const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; - const int nb_periods_per_frame = n / nr_slots_period; - - // re-initialization of tdd_beam_association at beginning of frame (only for FR2) + AssertFatal(tdd,"Dynamic TDD not handled yet\n"); + const int nb_periods_per_frame = get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + // re-initialization of tdd_beam_association at beginning of frame for (int i=0; itdd_beam_association[i] = -1; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index fcfbc455ca..dcd85e880b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -397,6 +397,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, uint16_t *msg2_frame, uint16_t *msg2_slot, NR_ServingCellConfigCommon_t *scc, + lte_frame_type_t frame_type, uint16_t monitoring_slot_period, uint16_t monitoring_offset,uint8_t beam_index, uint8_t num_active_ssb, @@ -411,17 +412,20 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; // number of mixed slot or of last dl slot if there is no mixed slot - uint8_t last_dl_slot_period = tdd ? tdd->nrofDownlinkSlots : 0; + uint8_t last_dl_slot_period = n_slots_frame-1; // lenght of tdd period in slots - uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame; + uint8_t tdd_period_slot = n_slots_frame; - if (tdd && (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols == 0)) { - last_dl_slot_period--; + if (tdd) { + last_dl_slot_period = tdd->nrofDownlinkSymbols == 0? (tdd->nrofDownlinkSlots-1) : tdd->nrofDownlinkSlots; + tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); } - if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) { - tdd_period_slot++; + else{ + if(frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); } + switch(response_window){ case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1: slot_window = 1; @@ -515,6 +519,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + lte_frame_type_t frame_type = cc->frame_type; uint8_t total_RApreambles = MAX_NUM_NR_PRACH_PREAMBLES; uint8_t num_ssb_per_RO = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present; @@ -619,6 +624,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, &msg2_frame, &msg2_slot, scc, + frame_type, monitoring_slot_period, monitoring_offset, beam_index, @@ -728,15 +734,11 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t // beam association for FR2 int16_t *tdd_beam_association = nr_mac->tdd_beam_association; if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) { - + // FR2 const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame; - - if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) { - tdd_period_slot++; - } - + AssertFatal(tdd,"Dynamic TDD not handled yet\n"); + uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); int num_tdd_period = sched_slot/tdd_period_slot; if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id)) @@ -886,6 +888,8 @@ void nr_get_Msg3alloc(module_id_t module_id, uint16_t msg3_nb_rb = 8; // sdu has 6 or 8 bytes + lte_frame_type_t frame_type = RC.nrmac[module_id]->common_channels->frame_type; + int mu = ubwp ? ubwp->bwp_Common->genericParameters.subcarrierSpacing : scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; @@ -901,7 +905,7 @@ void nr_get_Msg3alloc(module_id_t module_id, const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; const int n_slots_frame = nr_slots_per_frame[mu]; - const int nrofUplinkSymbols = tdd ? tdd->nrofUplinkSymbols : 4; + const int nrofUplinkSymbols = (frame_type==TDD) ? tdd->nrofUplinkSymbols : 11; // TODO change in favor of harmonization branch uint8_t k2 = 0; for (int i=0; ilist.count; i++) { startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; @@ -927,10 +931,8 @@ void nr_get_Msg3alloc(module_id_t module_id, // beam association for FR2 if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) { - uint8_t tdd_period_slot = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots : n_slots_frame; - if (tdd && ((tdd->nrofDownlinkSymbols > 0) || (tdd->nrofUplinkSymbols > 0))) { - tdd_period_slot++; - } + AssertFatal(tdd,"Dynamic TDD not handled yet\n"); + uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); int num_tdd_period = ra->Msg3_slot/tdd_period_slot; if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id)) AssertFatal(1==0,"Cannot schedule MSG3\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 090c9523ef..d7a004b17f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -268,8 +268,8 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame; + // FR2 is only TDD, to be fixed for flexible TDD + const int nr_slots_period = tdd ? n_slots_frame/get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity) : n_slots_frame; num_tdd_period = rel_slot/nr_slots_period; gNB->tdd_beam_association[num_tdd_period]=i_ssb; num_ssb++; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 0f0f38cd75..65a97e01ac 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -62,9 +62,23 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * /* there is a mixed slot only when in TDD */ NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon; + lte_frame_type_t frame_type = nrmac->common_channels->frame_type; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - const int symb_dlMixed = tdd ? (1 << tdd->nrofDownlinkSymbols) - 1 : 0; + + int symb_dlMixed = 0; + int nr_mix_slots = 0; + int nr_slots_period = n; + if (tdd) { + symb_dlMixed = (1 << tdd->nrofDownlinkSymbols) - 1; + nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + } + else{ + if(frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } int target_ss; if (bwp) { @@ -97,7 +111,7 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * /* check that TDA index 1 fits into DL part of mixed slot, if it exists */ int tdaMi = -1; - if (tdd && tdaList->list.count > 1) { + if (frame_type == TDD && tdaList->list.count > 1) { const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; AssertFatal(!tdaP_Mi->k0 || *tdaP_Mi->k0 == 0, "TimeDomainAllocation at index 1: non-null k0 (%ld) is not supported by the scheduler\n", @@ -120,16 +134,13 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * } } - const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_dl_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id])); - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; for (int i = 0; i < n; ++i) { nrmac->preferred_dl_tda[bwp_id][i] = -1; - if (!tdd || i % nr_slots_period < tdd->nrofDownlinkSlots) + if (frame_type == FDD || i % nr_slots_period < tdd->nrofDownlinkSlots) nrmac->preferred_dl_tda[bwp_id][i] = 0; - else if (tdd && nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots) + else if (nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots) nrmac->preferred_dl_tda[bwp_id][i] = tdaMi; LOG_D(MAC, "slot %d preferred_dl_tda %d\n", i, nrmac->preferred_dl_tda[bwp_id][i]); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 42dffee5cc..1365a02505 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -32,6 +32,7 @@ #include "NR_MAC_COMMON/nr_mac_extern.h" #include "NR_MAC_gNB/mac_proto.h" #include "common/ran_context.h" +#include "common/utils/nr/nr_common.h" #include "nfapi/oai_integration/vendor_ext.h" extern RAN_CONTEXT_t RC; @@ -1182,26 +1183,27 @@ int nr_acknack_scheduling(int mod_id, int r_pucch, int is_common) { - const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon; - const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - const int nr_mix_slots = tdd? (tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0) : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame; - const int first_ul_slot_tdd = tdd? tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period) : 0; - const int first_ul_slot_period = tdd? tdd->nrofDownlinkSlots : 0; const int CC_id = 0; const int minfbtime = RC.nrmac[mod_id]->minRXTXTIMEpdsch; + const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels[CC_id].ServingCellConfigCommon; + const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + // initializing the values for FDD + int nr_slots_period = n_slots_frame; + int first_ul_slot_tdd = slot + minfbtime; + int first_ul_slot_period = 0; + if(tdd){ + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period); + first_ul_slot_period = tdd->nrofDownlinkSlots; + } + else{ + if(RC.nrmac[mod_id]->common_channels[CC_id].frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } NR_sched_pucch_t *csi_pucch; - if (tdd) { - AssertFatal(slot < first_ul_slot_tdd + (tdd->nrofUplinkSymbols != 0), - "cannot handle multiple TDD periods (yet): slot %d first_ul_slot_tdd %d nrofUplinkSlots %ld\n", - slot, - first_ul_slot_tdd, - tdd->nrofUplinkSlots); - } - /* for the moment, we consider: * * only pucch_sched[0] holds HARQ (and SR) * * we do not multiplex with CSI, which is always in pucch_sched[2] @@ -1320,7 +1322,7 @@ int nr_acknack_scheduling(int mod_id, AssertFatal(pucch->sr_flag + pucch->dai_c == 0, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); - const int s = tdd ? first_ul_slot_tdd : slot + minfbtime; + const int s = first_ul_slot_tdd; pucch->frame = (s < n_slots_frame - 1) ? frame : (frame + 1) % 1024; pucch->ul_slot = s % n_slots_frame; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 49871670a3..37f735a0c5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -59,11 +59,24 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub /* there is a mixed slot only when in TDD */ NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon; + lte_frame_type_t frame_type = nrmac->common_channels->frame_type; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; /* Uplink symbols are at the end of the slot */ - const int symb_ulMixed = tdd ? ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols) : 0; + int symb_ulMixed = 0; + int nr_mix_slots = 0; + int nr_slots_period = n; + if (tdd) { + symb_ulMixed = ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols); + nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + } + else{ + if(frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } const struct NR_PUCCH_Config__resourceToAddModList *resList = ubwp->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList; // for the moment, just block any symbol that might hold a PUCCH, regardless @@ -117,7 +130,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub // get largest time domain allocation (TDA) for UL slot and UL in mixed slot int tdaMi = -1; - if (tdd) { + if (nr_mix_slots>0) { const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", @@ -139,16 +152,15 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub symb_tda_mi); } } - const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; + nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id])); - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; + for (int slot = 0; slot < n; ++slot) { const int sched_slot = (slot + k2) % n; nrmac->preferred_ul_tda[bwp_id][slot] = -1; - if (!tdd || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots) + if (frame_type == FDD || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots) nrmac->preferred_ul_tda[bwp_id][slot] = 0; - else if (tdd && nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots) + else if (nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots) nrmac->preferred_ul_tda[bwp_id][slot] = tdaMi; LOG_D(MAC, "DL slot %d UL slot %d preferred_ul_tda %d\n", slot, sched_slot, nrmac->preferred_ul_tda[bwp_id][slot]); } From 29599ab91fd45cdf065dd2415b58f5befb212b60 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 13 Dec 2021 15:52:46 +0100 Subject: [PATCH 23/67] fixes for FDD --- ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf index 6f65d983d7..5211c3de6f 100644 --- a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime = 6; + min_rxtxtime_pdsch = 6; servingCellConfigCommon = ( { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index dcd85e880b..b70112032c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -1034,12 +1034,15 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->pusch_data.harq_process_id = 0; pusch_pdu->pusch_data.new_data_indicator = 1; pusch_pdu->pusch_data.num_cb = 0; + int num_dmrs_symb = 0; + for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++) + num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, pusch_pdu->target_code_rate, pusch_pdu->rb_size, pusch_pdu->nr_of_symbols, - 12, // nb dmrs set for no data in dmrs symbol + num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol 0, //nb_rb_oh 0, // to verify tb scaling pusch_pdu->nrOfLayers)>>3; From 9f9fdb95eb4656ea6d37f003df04bdbc4f29d766 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 13 Dec 2021 16:12:10 +0100 Subject: [PATCH 24/67] fix in config file --- ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf index 27cf57f50a..4200300c50 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime = 6; + min_rxtxtime_pdsch = 6; servingCellConfigCommon = ( { From ad37d8ae5f1100c08efb04d9d137af64a355136b Mon Sep 17 00:00:00 2001 From: rmagueta Date: Wed, 10 Nov 2021 17:31:49 +0000 Subject: [PATCH 25/67] Change LOG levels --- .../NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 37 ++++++++----------- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 17 ++++++--- 2 files changed, 27 insertions(+), 27 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index 37a2849d21..1ce8c238cb 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -32,9 +32,6 @@ #include "PHY/phy_extern_nr_ue.h" #include "PHY/NR_TRANSPORT/nr_transport_proto.h" #include "nr_transport_proto_ue.h" -//#include "SCHED/defs.h" -//#include "PHY/defs.h" -//#include "extern.h" #include "PHY/sse_intrin.h" #include "T.h" #include "openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h" @@ -379,10 +376,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, len = (pilots==1)? ((config_type==NFAPI_NR_DMRS_TYPE1)?nb_rb*(12-6*dlsch0_harq->n_dmrs_cdm_groups): nb_rb*(12-4*dlsch0_harq->n_dmrs_cdm_groups)):(nb_rb*12); stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", - frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else + +#ifdef DEBUG_PDSCH_RX LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif @@ -402,11 +397,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, nb_rb_pdsch); stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else + +#ifdef DEBUG_PDSCH_RX LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif + start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); if (first_symbol_flag==1) { if (beamforming_mode==0){ @@ -463,9 +458,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #endif stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else + +#ifdef DEBUG_PDSCH_RX LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif @@ -515,11 +509,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else + +#ifdef DEBUG_PDSCH_RX LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif + start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); if (frame_parms->nb_antennas_rx > 1) { @@ -574,11 +568,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else + +#ifdef DEBUG_PDSCH_RX LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif + start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); /* Store the valid DL RE's */ pdsch_vars[gNB_id]->dl_valid_re[symbol-1] = len; @@ -657,9 +651,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else + +#ifdef DEBUG_PDSCH_RX LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index bfa16ef715..bb911195c7 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -60,6 +60,7 @@ //#define NR_PDCCH_SCHED_DEBUG //#define NR_PUCCH_SCHED //#define NR_PUCCH_SCHED_DEBUG +//#define NR_PDSCH_DEBUG #ifndef PUCCH #define PUCCH @@ -1020,15 +1021,14 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch0->harq_processes[harq_pid]->TBS, dlsch0->harq_processes[harq_pid]->TBS / 8); - - - stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); +#ifdef NR_PDSCH_DEBUG LOG_I(PHY, " --> Unscrambling for CW0 %5.3f\n", (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); LOG_I(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); +#endif if(is_cw1_active) { // start ldpc decode for CW 1 @@ -1080,13 +1080,20 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, LOG_T(PHY,"CWW sequential dlsch decoding, ret1 = %d\n", ret1); } + stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); - stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); - +#if PHYSIM + printf(" --> Unscrambling for CW1 %5.3f\n", + (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); + printf("AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", + frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); +#else LOG_D(PHY, " --> Unscrambling for CW1 %5.3f\n", (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); +#endif + LOG_D(PHY,"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); From c713d499f4db92e9bec3d7f028b74b2863f0c93a Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 22 Dec 2021 17:40:08 +0100 Subject: [PATCH 26/67] bugfix --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index b70112032c..0c4d771afb 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -458,7 +458,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, // slot and frame limit to transmit msg2 according to response window uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu]; - uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1); + uint16_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1); // computing start of next period From b830090a5a525f8025c14e430f93ed5d4088129b Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Wed, 22 Dec 2021 18:27:26 +0000 Subject: [PATCH 27/67] Perform frequency offset correction in two consecutive frames for SA --- openair1/PHY/NR_REFSIG/ss_pbch_nr.h | 1 + .../PHY/NR_UE_TRANSPORT/nr_initial_sync.c | 37 ++++++++++++------- 2 files changed, 25 insertions(+), 13 deletions(-) diff --git a/openair1/PHY/NR_REFSIG/ss_pbch_nr.h b/openair1/PHY/NR_REFSIG/ss_pbch_nr.h index 52a9c41ae9..44f8549258 100644 --- a/openair1/PHY/NR_REFSIG/ss_pbch_nr.h +++ b/openair1/PHY/NR_REFSIG/ss_pbch_nr.h @@ -65,6 +65,7 @@ /* SS/PBCH parameters */ #define N_RB_SS_PBCH_BLOCK (20) #define NB_SYMBOLS_PBCH (3) +#define NR_N_SYMBOLS_SSB (4) #define IQ_SIZE (sizeof(int16_t) * 2) /* I and Q are alternatively stored into buffers */ #define N_SYMB_SLOT (14) diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c index 767edf9cc6..3466f43452 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c @@ -42,6 +42,7 @@ #include "common_lib.h" #include +#include #include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_REFSIG/sss_nr.h" @@ -250,21 +251,31 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, #endif // digital compensation of FFO for SSB symbols - if (ue->UE_fo_compensation){ - double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time - double off_angle = -2*M_PI*s_time*(ue->common_vars.freq_offset); // offset rotation angle compensation per sample + if (ue->UE_fo_compensation){ + double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time + double off_angle = -2*M_PI*s_time*(ue->common_vars.freq_offset); // offset rotation angle compensation per sample - int start = is*fp->samples_per_frame+ue->ssb_offset; // start for offset correction is at ssb_offset (pss time position) - int end = start + 4*(fp->ofdm_symbol_size + fp->nb_prefix_samples); // loop over samples in 4 symbols (ssb size), including prefix + // In SA we need to perform frequency offset correction in two consecutive frames because we need to decode SIB1 + // and we do not know yet in which slot it goes. - for(int n=start; nnb_antennas_rx; ar++) { - re = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n]); - im = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n+1]); - ((short *)ue->common_vars.rxdata[ar])[2*n] = (short)(round(re*cos(n*off_angle) - im*sin(n*off_angle))); - ((short *)ue->common_vars.rxdata[ar])[2*n+1] = (short)(round(re*sin(n*off_angle) + im*cos(n*off_angle))); - } - } + // start for offset correction + int start = get_softmodem_params()->sa ? + is*fp->samples_per_frame : + is*fp->samples_per_frame + ue->ssb_offset; + + // loop over samples + int end = get_softmodem_params()->sa ? + start + (fp->samples_per_frame<<1): + start + NR_N_SYMBOLS_SSB*(fp->ofdm_symbol_size + fp->nb_prefix_samples); + + for(int n=start; nnb_antennas_rx; ar++) { + re = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n]); + im = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n+1]); + ((short *)ue->common_vars.rxdata[ar])[2*n] = (short)(round(re*cos(n*off_angle) - im*sin(n*off_angle))); + ((short *)ue->common_vars.rxdata[ar])[2*n+1] = (short)(round(re*sin(n*off_angle) + im*cos(n*off_angle))); + } + } } /* check that SSS/PBCH block is continuous inside the received buffer */ From a2014a52496747627eec5856907dded770ce3905 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Thu, 23 Dec 2021 10:36:58 +0000 Subject: [PATCH 28/67] Increase SSS phase hypothesis resolution --- openair1/PHY/NR_REFSIG/sss_nr.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/openair1/PHY/NR_REFSIG/sss_nr.h b/openair1/PHY/NR_REFSIG/sss_nr.h index 12d91ed3d1..e413400097 100644 --- a/openair1/PHY/NR_REFSIG/sss_nr.h +++ b/openair1/PHY/NR_REFSIG/sss_nr.h @@ -63,18 +63,22 @@ /************** VARIABLES *****************************************/ -#define PHASE_HYPOTHESIS_NUMBER (7) +#define PHASE_HYPOTHESIS_NUMBER (16) #define INDEX_NO_PHASE_DIFFERENCE (3) /* this is for no phase shift case */ EXTERN const int16_t phase_re_nr[PHASE_HYPOTHESIS_NUMBER] #ifdef INIT_VARIABLES_SSS_NR_H -= {16383, 25101, 30791, 32767, 30791, 25101, 16383} +// -pi/3 ---- pi/3 += {16384,20173,23571,26509,28932,30791,32051,32687,32687,32051,30791, + 28932,26509,23571,20173,16384} #endif ; EXTERN const int16_t phase_im_nr[PHASE_HYPOTHESIS_NUMBER] #ifdef INIT_VARIABLES_SSS_NR_H -= {-28378, -21063, -11208, 0, 11207, 21062, 28377}; +// -pi/3 ---- pi/3 += {-28377,-25821,-22762,-19260,-15383,-11207,-6813,-2286,2286,6813,11207, + 15383,19260,22762,25821,28377} #endif ; From f508d8c80df110616e467f553629734f48ac77a6 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Thu, 23 Dec 2021 17:14:46 +0000 Subject: [PATCH 29/67] Improve frequency offset correction in two consecutive frames for SA --- openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c index 3466f43452..dcb8035e8a 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c @@ -31,8 +31,6 @@ */ #include "PHY/types.h" #include "PHY/defs_nr_UE.h" -#include "PHY/phy_extern_nr_ue.h" -#include "PHY/INIT/phy_init.h" #include "PHY/MODULATION/modulation_UE.h" #include "nr_transport_proto_ue.h" #include "PHY/NR_UE_ESTIMATION/nr_estimation.h" @@ -42,12 +40,10 @@ #include "common_lib.h" #include -#include #include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_REFSIG/sss_nr.h" #include "PHY/NR_REFSIG/refsig_defs_ue.h" -#include "PHY/NR_TRANSPORT/nr_dci.h" extern openair0_config_t openair0_cfg[]; //static nfapi_nr_config_request_t config_t; @@ -202,6 +198,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, { int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2, + int32_t accumulated_freq_offset = 0; int32_t metric_tdd_ncp=0; uint8_t phase_tdd_ncp; double im, re; @@ -254,19 +251,16 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, if (ue->UE_fo_compensation){ double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time double off_angle = -2*M_PI*s_time*(ue->common_vars.freq_offset); // offset rotation angle compensation per sample + accumulated_freq_offset += ue->common_vars.freq_offset; - // In SA we need to perform frequency offset correction in two consecutive frames because we need to decode SIB1 + // In SA we need to perform frequency offset correction until the end of buffer because we need to decode SIB1 // and we do not know yet in which slot it goes. // start for offset correction - int start = get_softmodem_params()->sa ? - is*fp->samples_per_frame : - is*fp->samples_per_frame + ue->ssb_offset; + int start = sa ? is*fp->samples_per_frame : is*fp->samples_per_frame + ue->ssb_offset; // loop over samples - int end = get_softmodem_params()->sa ? - start + (fp->samples_per_frame<<1): - start + NR_N_SYMBOLS_SSB*(fp->ofdm_symbol_size + fp->nb_prefix_samples); + int end = sa ? n_frames*fp->samples_per_frame-1 : start + NR_N_SYMBOLS_SSB*(fp->ofdm_symbol_size + fp->nb_prefix_samples); for(int n=start; nnb_antennas_rx; ar++) { @@ -555,6 +549,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, } if (dec == false) // sib1 not decoded ret = -1; + + ue->common_vars.freq_offset = accumulated_freq_offset; } // exit_fun("debug exit"); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INITIAL_UE_SYNC, VCD_FUNCTION_OUT); From 22754562cf67df26b8184c894af8c890c3d33bef Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Fri, 24 Dec 2021 10:26:52 +0000 Subject: [PATCH 30/67] Adjust sync based on PSS --- executables/nr-ue.c | 4 +- openair1/PHY/NR_REFSIG/pss_nr.h | 2 + openair1/PHY/NR_UE_TRANSPORT/pss_nr.c | 85 +++++++++++++++++++ openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 11 ++- ...gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf | 1 + .../gnb.sa.band78.fr1.106PRB.usrpb210.conf | 1 + 6 files changed, 101 insertions(+), 3 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 60ff40abeb..c90a5119cd 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -642,7 +642,9 @@ void *UE_thread(void *arg) { readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms); writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms); } else { - UE->rx_offset_diff = computeSamplesShift(UE); + //UE->rx_offset_diff = computeSamplesShift(UE); + + readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms) - UE->rx_offset_diff; writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms)- UE->rx_offset_diff; diff --git a/openair1/PHY/NR_REFSIG/pss_nr.h b/openair1/PHY/NR_REFSIG/pss_nr.h index b32d48a2e9..e2dd0e456b 100644 --- a/openair1/PHY/NR_REFSIG/pss_nr.h +++ b/openair1/PHY/NR_REFSIG/pss_nr.h @@ -141,6 +141,8 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain int *eNB_id, int *f_off); +int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off); + #endif #undef EXTERN diff --git a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c index 28b6677b2c..4ee5884afd 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c @@ -34,6 +34,7 @@ #include #include #include +#include #include "PHY/defs_nr_UE.h" @@ -975,3 +976,87 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain return(peak_position); } +int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off) { + + int **rxdata = ue->common_vars.rxdata; + NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; + uint8_t Nid2 = GET_NID2(frame_parms->Nid_cell); + + int maxval=0; + for (int i=0;i<2*(frame_parms->ofdm_symbol_size);i++) { + maxval = max(maxval,primary_synchro_time_nr[Nid2][i]); + maxval = max(maxval,-primary_synchro_time_nr[Nid2][i]); + } + int shift = log2_approx(maxval); + + /* Search pss in the received buffer each 4 samples which ensures a memory alignment on 128 bits (32 bits x 4 ) */ + /* This is required by SIMD (single instruction Multiple Data) Extensions of Intel processors. */ + /* Correlation computation is based on a dot product which is realized thank to SIMS extensions */ + int64_t peak_value = 0; + int peak_position = 0; + int64_t result = 0; + int64_t avg=0; + int start = 2*(frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples) + frame_parms->nb_prefix_samples0 - 200; + int length = 2*frame_parms->ofdm_symbol_size + 200; + memset(pss_corr_ue[Nid2],0,(start+length)*sizeof(int64_t)); + for (int n=start; n < start+length; n+=4) { // + for (int ar=0; arnb_antennas_rx; ar++) { + result = dot_product64((short*)primary_synchro_time_nr[Nid2], + (short*) &(rxdata[ar][n]), + frame_parms->ofdm_symbol_size, + shift); + pss_corr_ue[Nid2][n] += abs64(result); + } + avg+=pss_corr_ue[Nid2][n]; + if (pss_corr_ue[Nid2][n] > peak_value) { + peak_value = pss_corr_ue[Nid2][n]; + peak_position = n; + } + } + + avg/=(length/4); + if (peak_value < 5*avg) { + return 0; + } + + int peak_position_diff = peak_position - ( ((frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples)<<1) + frame_parms->nb_prefix_samples0); + + // Fractional frequency offset computation according to Cross-correlation Synchronization Algorithm Using PSS + // Shoujun Huang, Yongtao Su, Ying He and Shan Tang, "Joint time and frequency offset estimation in LTE downlink," + // 7th International Conference on Communications and Networking in China, 2012. + + // Computing cross-correlation at peak on half the symbol size for first half of data + int64_t result1 = dot_product64((short*)primary_synchro_time_nr[Nid2], + (short*) &(rxdata[0][peak_position]), + frame_parms->ofdm_symbol_size>>1, + shift); + + // Computing cross-correlation at peak on half the symbol size for data shifted by half symbol size + // as it is real and complex it is necessary to shift by a value equal to symbol size to obtain such shift + int64_t result2 = dot_product64((short*)primary_synchro_time_nr[Nid2]+(frame_parms->ofdm_symbol_size), + (short*) &(rxdata[0][peak_position])+frame_parms->ofdm_symbol_size, + frame_parms->ofdm_symbol_size>>1, + shift); + + int64_t re1 = ((int*) &result1)[0]; + int64_t re2 = ((int*) &result2)[0]; + int64_t im1 = ((int*) &result1)[1]; + int64_t im2 = ((int*) &result2)[1]; + + // Estimation of fractional frequency offset: angle[(result1)'*(result2)]/pi + double ffo_est = atan2(re1*im2-re2*im1,re1*re2+im1*im2)/M_PI; + + // Computing absolute value of frequency offset + *f_off = ffo_est*frame_parms->subcarrier_spacing; + + /*nr_rf_card_config_freq(&openair0_cfg[ue->rf_map.card], openair0_cfg->tx_freq[0], openair0_cfg->rx_freq[0], ue->common_vars.freq_offset); + + if (ue->mode != loop_through_memory) { + ue->rfdevice.trx_set_freq_func(&ue->rfdevice,&openair0_cfg[0],0); + }*/ + + LOG_I(NR_PHY,"nr_adjust_pss_synch: peak_position %d, peak_position_diff %d, peak_value %d dB, avg %d dB, ffo %lf\n", + peak_position, peak_position_diff, dB_fixed64(peak_value),dB_fixed64(avg),ffo_est); + + return peak_position_diff; +} diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index bb911195c7..fb36b3ee86 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -39,6 +39,7 @@ #include "PHY/phy_extern_nr_ue.h" #include "PHY/MODULATION/modulation_UE.h" #include "PHY/NR_REFSIG/refsig_defs_ue.h" +#include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" #include "SCHED_NR_UE/defs.h" @@ -1647,10 +1648,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, if ((ue->decode_MIB == 1) && slot_pbch) { + int peak_position_diff = nr_adjust_pss_synch(ue, (int *)&ue->common_vars.freq_offset); + LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); nr_ue_pbch_procedures(gNB_id, ue, proc, 0); - if (ue->no_timing_correction==0) { + /* if (ue->no_timing_correction==0) { LOG_D(PHY,"start adjust sync slot = %d no timing %d\n", nr_slot_rx, ue->no_timing_correction); nr_adjust_synch_ue(fp, ue, @@ -1659,7 +1662,11 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, nr_slot_rx, 0, 16384); - } + }*/ + + //ue->rx_offset = peak_position_diff; + + ue->rx_offset_diff = -peak_position_diff; LOG_D(PHY, "Doing N0 measurements in %s\n", __FUNCTION__); nr_ue_rrc_measurements(ue, proc, nr_slot_rx); diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf index abc64b6e46..c4b06c1139 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf @@ -35,6 +35,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 2; + min_rxtxtime_pdsch = 6; ul_prbblacklist = "51,52,53,54" pdcch_ConfigSIB1 = ( diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index 83b39b85ec..c7531f39ba 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -35,6 +35,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime_pdsch = 6; sib1_tda = 0; pdcch_ConfigSIB1 = ( From 29268d0a66c1a88a0058de066ce5968e9d8bfe3d Mon Sep 17 00:00:00 2001 From: Luis Pereira Date: Fri, 24 Dec 2021 13:12:30 +0000 Subject: [PATCH 31/67] Revert "Merge remote-tracking branch 'origin/develop' into ue-phy-sync-improvements" This reverts commit 96554bef5148f2610e2d0f4d72fe151a69b46d96 --- ci-scripts/Jenkinsfile-trig-nsa | 11 +- ci-scripts/checkCodingFormattingRules.sh | 4 +- ci-scripts/conf_files/benetel-5g.conf | 22 + .../enb.band38.lte_2x2.100PRB.usrpn310.conf | 2 +- .../enb.band38.nsa_2x2.100PRB.usrpn310.conf | 2 +- .../gNB_SA_n78_106PRB.2x2_usrpn310.conf | 29 + .../gNB_SA_n78_133PRB.2x2_usrpn310.conf | 29 + .../gnb.band261.tm1.32PRB.usrpn300.conf | 26 +- .../gnb.band66.tm1.106PRB.usrpn300.conf | 22 +- .../gnb.band78.nsa_2x2.106PRB.usrpn310.conf | 21 + ...gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf | 29 + .../gnb.band78.sa.fr1.106PRB.usrpn310.conf | 659 +++++++++--------- .../gnb.band78.sa.fr1.162PRB.usrpn310.conf | 316 --------- .../gnb.band78.tm1.106PRB.usrpn300.conf | 24 +- .../gnb.band78.tm1.fr1.106PRB.usrpb210.conf | 21 + .../gnb.band78.tm1.fr1.106PRB.usrpn310.conf | 28 + ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml | 2 +- .../fr1_nsa_2x2_quectel_attach_detach.xml | 2 +- ci-scripts/xml_files/fr1_sa_oaiue_n310.xml | 6 +- ci-scripts/xml_files/fr1_sa_oaiue_x300.xml | 123 ---- .../xml_files/fr1_sa_quectel_162prb.xml | 129 ---- .../fr1_sa_quectel_stages_162prb.xml | 166 ----- cmake_targets/CMakeLists.txt | 10 +- common/utils/nr/nr_common.c | 54 +- common/utils/nr/nr_common.h | 11 +- common/utils/threadPool/Makefile | 14 +- common/utils/threadPool/thread-pool.c | 45 +- common/utils/threadPool/thread-pool.h | 5 +- doc/testing_gnb_w_cots_ue_resources/gnb.conf | 37 + executables/nr-gnb.c | 10 +- executables/nr-ue.c | 2 +- openair1/PHY/CODING/crc.h | 543 --------------- openair1/PHY/CODING/crc_byte.c | 86 +-- openair1/PHY/CODING/crcext.h | 89 --- openair1/PHY/CODING/nrLDPC_defs.h | 37 +- .../nrLDPC_encoder/ldpc_encode_parity_check.c | 15 +- .../PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c | 2 + .../nrLDPC_encoder/ldpc_encoder_optim.c | 25 +- .../nrLDPC_encoder/ldpc_encoder_optim8seg.c | 18 +- .../ldpc_encoder_optim8segmulti.c | 94 +-- openair1/PHY/CODING/types.h | 98 --- openair1/PHY/INIT/nr_init_ue.c | 2 +- openair1/PHY/INIT/nr_parms.c | 1 + openair1/PHY/LTE_REFSIG/lte_refsig.h | 3 +- openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c | 75 ++ openair1/PHY/LTE_TRANSPORT/lte_mcs.c | 22 +- openair1/PHY/LTE_TRANSPORT/pcfich.c | 2 +- openair1/PHY/LTE_TRANSPORT/pucch.c | 2 +- .../LTE_TRANSPORT/transport_common_proto.h | 2 +- openair1/PHY/LTE_TRANSPORT/transport_proto.h | 46 +- openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c | 2 +- .../PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c | 54 +- .../LTE_UE_TRANSPORT/dlsch_llr_computation.c | 6 +- openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c | 4 +- .../PHY/LTE_UE_TRANSPORT/transport_proto_ue.h | 2 +- openair1/PHY/NR_TRANSPORT/nr_dlsch.c | 209 ++---- openair1/PHY/NR_TRANSPORT/nr_dlsch.h | 3 +- openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c | 393 ++++++----- openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c | 5 + .../NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 46 +- .../nr_dlsch_llr_computation.c | 2 +- .../NR_UE_TRANSPORT/nr_transport_proto_ue.h | 39 +- openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c | 5 +- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c | 4 +- openair1/PHY/defs_gNB.h | 17 +- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 5 +- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 27 +- openair1/SIMULATION/NR_PHY/dlschsim.c | 29 +- openair1/SIMULATION/NR_PHY/dlsim.c | 45 +- openair1/SIMULATION/NR_PHY/nr_unitary_defs.h | 162 ++++- openair1/SIMULATION/NR_PHY/ulsim.c | 8 +- openair2/COMMON/rrc_messages_types.h | 2 +- openair2/GNB_APP/RRC_nr_paramsvalues.h | 194 ++++++ openair2/GNB_APP/gnb_config.c | 127 +--- openair2/GNB_APP/gnb_paramdef.h | 6 +- openair2/LAYER2/NR_MAC_UE/config_ue.c | 39 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 10 +- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 54 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 42 +- openair2/LAYER2/NR_MAC_gNB/main.c | 2 +- openair2/RRC/NR/MESSAGES/asn1_msg.c | 6 +- openair2/RRC/NR/nr_rrc_config.c | 159 +++-- openair2/RRC/NR/nr_rrc_config.h | 25 +- openair2/RRC/NR/nr_rrc_defs.h | 2 +- openair2/RRC/NR/rrc_gNB.c | 77 +- openair2/RRC/NR/rrc_gNB_nsa.c | 4 +- openair2/RRC/NR/rrc_gNB_reconfig.c | 16 +- .../GENERIC-LTE-EPC/CONF/benetel-5g.conf | 22 + .../CONF/gnb.band257.tm1.32PRB.usrpn300.conf | 23 + .../CONF/gnb.band257.tm1.32PRB.usrpx300.conf | 21 + .../CONF/gnb.band257.tm1.66PRB.usrpn300.conf | 22 + .../CONF/gnb.band261.tm1.32PRB.usrpn300.conf | 21 + .../CONF/gnb.band66.tm1.106PRB.usrpn300.conf | 21 + .../CONF/gnb.band66.tm1.106PRB.usrpx300.conf | 21 + .../gnb.band78.106PRB.30kHz,usrpb2x0.conf | 21 + .../CONF/gnb.band78.106PRB.slave.conf | 21 + .../CONF/gnb.band78.slave.conf | 21 + .../gnb.band78.tm1.106PRB.PTRS.usrpx300.conf | 23 + .../CONF/gnb.band78.tm1.106PRB.usrpb210.conf | 21 + .../CONF/gnb.band78.tm1.106PRB.usrpn300.conf | 22 + .../CONF/gnb.band78.tm1.106PRB.usrpx300.conf | 23 + .../CONF/gnb.band78.tm1.217PRB.usrpn300.conf | 21 + .../CONF/gnb.band78.tm1.217PRB.usrpx300.conf | 21 + .../CONF/gnb.band78.tm1.24PRB.usrpb210.conf | 23 + .../CONF/gnb.band78.tm1.24PRB.usrpn300.conf | 23 + .../CONF/gnb.band78.tm1.24PRB.usrpx300.conf | 23 + .../CONF/gnb.band78.tm1.273PRB.usrpn300.conf | 21 + .../CONF/rcc.band78.tm1.106PRB.nfapi.conf | 39 ++ .../GENERIC-LTE-EPC/CONF/testing_gnb.conf | 21 + .../CONF/testing_gnb_24PRB.conf | 36 + .../CONF/testing_gnb_n310.conf | 21 + .../CONF/testing_gnb_nsa_n310.conf | 21 + .../PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf | 39 ++ ...b.band78.tm1.106PRB.usrpn300.gtp-itti.conf | 38 + .../gnb.sa.band41.fr1.106PRB.usrpb210.conf | 22 + ...gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf | 22 + .../gnb.sa.band78.fr1.106PRB.usrpb210.conf | 22 + ...b.sa.band78.fr1.106PRB.usrpb210.sabox.conf | 39 ++ 120 files changed, 2798 insertions(+), 2816 deletions(-) delete mode 100644 ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf delete mode 100644 ci-scripts/xml_files/fr1_sa_oaiue_x300.xml delete mode 100644 ci-scripts/xml_files/fr1_sa_quectel_162prb.xml delete mode 100644 ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml delete mode 100644 openair1/PHY/CODING/crc.h delete mode 100644 openair1/PHY/CODING/crcext.h delete mode 100644 openair1/PHY/CODING/types.h create mode 100644 openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c diff --git a/ci-scripts/Jenkinsfile-trig-nsa b/ci-scripts/Jenkinsfile-trig-nsa index 7b4238d678..4a56270e90 100644 --- a/ci-scripts/Jenkinsfile-trig-nsa +++ b/ci-scripts/Jenkinsfile-trig-nsa @@ -88,15 +88,7 @@ pipeline { // booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) //] //calling OAIUE N310 - //build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [ - // string(name: 'eNB_MR', value: String.valueOf(MR)), - // string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)), - // string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)), - // string(name: 'eNB_TargetBranch', value: String.valueOf(TARGET_BRANCH)), - // booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) - //] - //calling OAIUE N310-X300 - build job: "RAN-SA-OAIUE-N310-X300-CN5G", wait : true, propagate : false, parameters: [ + build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [ string(name: 'eNB_MR', value: String.valueOf(MR)), string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)), string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)), @@ -104,6 +96,7 @@ pipeline { booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) ] + } } } diff --git a/ci-scripts/checkCodingFormattingRules.sh b/ci-scripts/checkCodingFormattingRules.sh index a805f765df..45cf08aa9a 100755 --- a/ci-scripts/checkCodingFormattingRules.sh +++ b/ci-scripts/checkCodingFormattingRules.sh @@ -77,7 +77,7 @@ then IS_NFAPI=`echo $FILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true` IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FILE || true` IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FILE || true` - IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true` + IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true` if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ] then if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ] @@ -198,7 +198,7 @@ do IS_NFAPI=`echo $FULLFILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true` IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FULLFILE || true` IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FULLFILE || true` - IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true` + IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true` if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ] then if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ] diff --git a/ci-scripts/conf_files/benetel-5g.conf b/ci-scripts/conf_files/benetel-5g.conf index 79b2f7f877..47898aad15 100644 --- a/ci-scripts/conf_files/benetel-5g.conf +++ b/ci-scripts/conf_files/benetel-5g.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -110,6 +119,19 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; #p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf index 758bb44879..d2e91fb872 100644 --- a/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf @@ -237,7 +237,7 @@ RUs = ( max_pdschReferenceSignalPower = -27; max_rxgain = 75; eNB_instances = [0]; - sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2"; + sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2"; } ); diff --git a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf index d1d32e2b58..6c8d5ba6f0 100644 --- a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf @@ -237,7 +237,7 @@ RUs = ( max_pdschReferenceSignalPower = -27; max_rxgain = 75; eNB_instances = [0]; - sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2"; + sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2"; } ); diff --git a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf index 77693d5f72..9bf3136690 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf @@ -89,6 +89,19 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -143,6 +156,22 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; + initialULBWPmappingType_0 = 1 + # this is SS=2 L=13 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 2; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=4 + initialULBWPstartSymbolAndLength_1 = 52; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf index c9b369eaff..dfbbdf659d 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf @@ -86,6 +86,19 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 10; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -140,6 +153,22 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=2 L=13 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=4 + initialULBWPstartSymbolAndLength_1 = 52; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf index 4338c00b36..e93177e7cc 100644 --- a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime = 6; + min_rxtxtime_pdsch = 6; servingCellConfigCommon = ( { @@ -55,6 +55,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_3 = 0; #for mixed slot + initialDLBWPmappingType_3 = 0; + initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -109,6 +118,21 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 14; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf index 1c2133bebe..850cf9a60c 100644 --- a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf @@ -24,7 +24,6 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime = 6; servingCellConfigCommon = ( { @@ -55,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_3 = 0; #for mixed slot + initialDLBWPmappingType_3 = 0; + initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -110,6 +118,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf index b0a757c9d0..c8dc1477b0 100644 --- a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf @@ -55,6 +55,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -109,6 +118,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf index 16456f939c..e8be5a6ef0 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf @@ -90,6 +90,19 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -144,6 +157,22 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=2 L=13 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=4 + initialULBWPstartSymbolAndLength_1 = 52; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf index ff05aa6e65..f00a343089 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -1,316 +1,343 @@ -Active_gNBs = ( "gNB-OAI"); -# Asn1_verbosity, choice in: none, info, annoying -Asn1_verbosity = "none"; - -gNBs = -( - { - ////////// Identification parameters: - gNB_CU_ID = 0xe00; - -# cell_type = "CELL_MACRO_GNB"; - - gNB_name = "gNB-OAI"; - min_rxtxtime_pdsch = 6; - - // Tracking area code, 0x0000 and 0xfffe are reserved values - tracking_area_code = 1; - - plmn_list = ({ - mcc = 208; - mnc = 97; - mnc_length = 2; - snssaiList = ( - { - sst = 1; - sd = 0x010203; // 0 false, else true - }, - { - sst = 1; - sd = 0x112233; // 0 false, else true - } - ); - }); - - nr_cellid = 12345678L - -# tr_s_preference = "local_mac" - - ////////// Physical parameters: - - ssb_SubcarrierOffset = 0; - pdsch_AntennaPorts = 1; - pusch_AntennaPorts = 1; - #pusch_TargetSNRx10 = 200; - #pucch_TargetSNRx10 = 200; - ul_prbblacklist = "51,52,53,54" - - pdcch_ConfigSIB1 = ( - { - controlResourceSetZero = 11; - searchSpaceZero = 0; - } - ); - - servingCellConfigCommon = ( - { - #spCellConfigCommon - - physCellId = 0; - -# downlinkConfigCommon - #frequencyInfoDL - # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 - #absoluteFrequencySSB = 620640; - # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 - absoluteFrequencySSB = 621312; - # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 - #absoluteFrequencySSB = 634080; - # this is 3600.48 MHz - #absoluteFrequencySSB = 640032; - #dl_frequencyBand = 78; - # this is 3301.68 MHz - #dl_absoluteFrequencyPointA = 620112; - # this is 3300.60 MHz - dl_absoluteFrequencyPointA = 620040; - # this is 3502.56 MHz - #dl_absoluteFrequencyPointA = 633552; - # this is 3600.48 MHz - #dl_absoluteFrequencyPointA = 640032; - #scs-SpecificCarrierList - dl_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - dl_subcarrierSpacing = 1; - dl_carrierBandwidth = 106; - #initialDownlinkBWP - #genericParameters - # this is RBstart=0,L=106 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialDLBWPsubcarrierSpacing = 1; - #pdcch-ConfigCommon - initialDLBWPcontrolResourceSetZero = 11; - initialDLBWPsearchSpaceZero = 0; - - - - #uplinkConfigCommon - #frequencyInfoUL - ul_frequencyBand = 78; - #scs-SpecificCarrierList - ul_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - ul_subcarrierSpacing = 1; - ul_carrierBandwidth = 106; - pMax = 20; - #initialUplinkBWP - #genericParameters - initialULBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialULBWPsubcarrierSpacing = 1; - #rach-ConfigCommon - #rach-ConfigGeneric - prach_ConfigurationIndex = 98; -#prach_msg1_FDM -#0 = one, 1=two, 2=four, 3=eight - prach_msg1_FDM = 0; - prach_msg1_FrequencyStart = 0; - zeroCorrelationZoneConfig = 12; - preambleReceivedTargetPower = -104; -#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) - preambleTransMax = 6; -#powerRampingStep -# 0=dB0,1=dB2,2=dB4,3=dB6 - powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; -#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR -#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen - ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; -#oneHalf (0..15) 4,8,12,16,...60,64 - ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; -#ra_ContentionResolutionTimer -#(0..7) 8,16,24,32,40,48,56,64 - ra_ContentionResolutionTimer = 7; - rsrp_ThresholdSSB = 19; -#prach-RootSequenceIndex_PR -#1 = 839, 2 = 139 - prach_RootSequenceIndex_PR = 2; - prach_RootSequenceIndex = 1; - # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex - # - msg1_SubcarrierSpacing = 1, -# restrictedSetConfig -# 0=unrestricted, 1=restricted type A, 2=restricted type B - restrictedSetConfig = 0, - - msg3_DeltaPreamble = 1; - p0_NominalWithGrant =-90; - -# pucch-ConfigCommon setup : -# pucchGroupHopping -# 0 = neither, 1= group hopping, 2=sequence hopping - pucchGroupHopping = 0; - hoppingId = 40; - p0_nominal = -90; -# ssb_PositionsInBurs_BitmapPR -# 1=short, 2=medium, 3=long - ssb_PositionsInBurst_PR = 2; - ssb_PositionsInBurst_Bitmap = 1; - -# ssb_periodicityServingCell -# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 - ssb_periodicityServingCell = 2; - -# dmrs_TypeA_position -# 0 = pos2, 1 = pos3 - dmrs_TypeA_Position = 0; - -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - subcarrierSpacing = 1; - - - #tdd-UL-DL-ConfigurationCommon -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - referenceSubcarrierSpacing = 1; - # pattern1 - # dl_UL_TransmissionPeriodicity - # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; - nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; - - ssPBCH_BlockPower = -25; - } - - ); - - - # ------- SCTP definitions - SCTP : - { - # Number of streams to use in input/output - SCTP_INSTREAMS = 2; - SCTP_OUTSTREAMS = 2; - }; - - ////////// AMF parameters: - amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; - ipv6 = "192:168:30::17"; - active = "yes"; - preference = "ipv4"; - } - ); - - NETWORK_INTERFACES : - { - - GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; - GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; - GNB_INTERFACE_NAME_FOR_NGU = "em1"; - GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; - GNB_PORT_FOR_S1U = 2152; # Spec 2152 - }; - - } -); - -MACRLCs = ( - { - num_cc = 1; - tr_s_preference = "local_L1"; - tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 200; - pucch_TargetSNRx10 = 200; - ulsch_max_frame_inactivity = 1; - } -); - -L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 4; - prach_dtx_threshold = 120; -# pucch0_dtx_threshold = 150; - } -); - -RUs = ( - { - local_rf = "yes" - nb_tx = 1 - nb_rx = 1 - att_tx = 0 - att_rx = 0; - bands = [78]; - max_pdschReferenceSignalPower = -27; - max_rxgain = 75; - eNB_instances = [0]; - ##beamforming 1x2 matrix: 1 layer x 2 antennas - bf_weights = [0x00007fff, 0x0000]; - ##beamforming 1x4 matrix: 1 layer x 4 antennas - #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; - ## beamforming 2x2 matrix: - # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; - ## beamforming 4x4 matrix: - #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; - sf_extension = 0 - sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" - } -); - -THREAD_STRUCT = ( - { - #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" - parallel_config = "PARALLEL_SINGLE_THREAD"; - #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" - worker_config = "WORKER_ENABLE"; - } -); - -security = { - # preferred ciphering algorithms - # the first one of the list that an UE supports in chosen - # valid values: nea0, nea1, nea2, nea3 - ciphering_algorithms = ( "nea0" ); - - # preferred integrity algorithms - # the first one of the list that an UE supports in chosen - # valid values: nia0, nia1, nia2, nia3 - integrity_algorithms = ( "nia2", "nia0" ); - - # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter - # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' - drb_ciphering = "yes"; - drb_integrity = "no"; -}; - - log_config : - { - global_log_level ="info"; - global_log_verbosity ="medium"; - hw_log_level ="info"; - hw_log_verbosity ="medium"; - phy_log_level ="info"; - phy_log_verbosity ="medium"; - mac_log_level ="info"; - mac_log_verbosity ="high"; - rlc_log_level ="info"; - rlc_log_verbosity ="medium"; - pdcp_log_level ="info"; - pdcp_log_verbosity ="medium"; - rrc_log_level ="info"; - rrc_log_verbosity ="medium"; - f1ap_log_level ="debug"; - f1ap_log_verbosity ="medium"; - }; +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_CU_ID = 0xe00; + +# cell_type = "CELL_MACRO_GNB"; + + gNB_name = "gNB-OAI"; + min_rxtxtime_pdsch = 6; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + + plmn_list = ({ + mcc = 208; + mnc = 97; + mnc_length = 2; + snssaiList = ( + { + sst = 1; + sd = 0x010203; // 0 false, else true + }, + { + sst = 1; + sd = 0x112233; // 0 false, else true + } + ); + }); + + nr_cellid = 12345678L + +# tr_s_preference = "local_mac" + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 1; + #pusch_TargetSNRx10 = 200; + #pucch_TargetSNRx10 = 200; + ul_prbblacklist = "51,52,53,54" + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 + #absoluteFrequencySSB = 620640; + # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 + absoluteFrequencySSB = 621312; + # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 + #absoluteFrequencySSB = 634080; + # this is 3600.48 MHz + #absoluteFrequencySSB = 640032; + #dl_frequencyBand = 78; + # this is 3301.68 MHz + #dl_absoluteFrequencyPointA = 620112; + # this is 3300.60 MHz + dl_absoluteFrequencyPointA = 620040; + # this is 3502.56 MHz + #dl_absoluteFrequencyPointA = 633552; + # this is 3600.48 MHz + #dl_absoluteFrequencyPointA = 640032; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=0,L=106 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_1 = 57; + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 12; + preambleReceivedTargetPower = -104; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=2 L=13 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=4 + initialULBWPstartSymbolAndLength_1 = 52; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = -25; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + ////////// AMF parameters: + amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + NETWORK_INTERFACES : + { + + GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; + GNB_INTERFACE_NAME_FOR_NGU = "em1"; + GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + ulsch_max_frame_inactivity = 1; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + pusch_proc_threads = 2; + prach_dtx_threshold = 120; +# pucch0_dtx_threshold = 150; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 0 + att_rx = 0; + bands = [78]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + eNB_instances = [0]; + ##beamforming 1x2 matrix: 1 layer x 2 antennas + bf_weights = [0x00007fff, 0x0000]; + ##beamforming 1x4 matrix: 1 layer x 4 antennas + #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; + ## beamforming 2x2 matrix: + # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; + ## beamforming 4x4 matrix: + #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; + sf_extension = 0 + sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; + }; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf deleted file mode 100644 index ff05aa6e65..0000000000 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf +++ /dev/null @@ -1,316 +0,0 @@ -Active_gNBs = ( "gNB-OAI"); -# Asn1_verbosity, choice in: none, info, annoying -Asn1_verbosity = "none"; - -gNBs = -( - { - ////////// Identification parameters: - gNB_CU_ID = 0xe00; - -# cell_type = "CELL_MACRO_GNB"; - - gNB_name = "gNB-OAI"; - min_rxtxtime_pdsch = 6; - - // Tracking area code, 0x0000 and 0xfffe are reserved values - tracking_area_code = 1; - - plmn_list = ({ - mcc = 208; - mnc = 97; - mnc_length = 2; - snssaiList = ( - { - sst = 1; - sd = 0x010203; // 0 false, else true - }, - { - sst = 1; - sd = 0x112233; // 0 false, else true - } - ); - }); - - nr_cellid = 12345678L - -# tr_s_preference = "local_mac" - - ////////// Physical parameters: - - ssb_SubcarrierOffset = 0; - pdsch_AntennaPorts = 1; - pusch_AntennaPorts = 1; - #pusch_TargetSNRx10 = 200; - #pucch_TargetSNRx10 = 200; - ul_prbblacklist = "51,52,53,54" - - pdcch_ConfigSIB1 = ( - { - controlResourceSetZero = 11; - searchSpaceZero = 0; - } - ); - - servingCellConfigCommon = ( - { - #spCellConfigCommon - - physCellId = 0; - -# downlinkConfigCommon - #frequencyInfoDL - # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 - #absoluteFrequencySSB = 620640; - # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 - absoluteFrequencySSB = 621312; - # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 - #absoluteFrequencySSB = 634080; - # this is 3600.48 MHz - #absoluteFrequencySSB = 640032; - #dl_frequencyBand = 78; - # this is 3301.68 MHz - #dl_absoluteFrequencyPointA = 620112; - # this is 3300.60 MHz - dl_absoluteFrequencyPointA = 620040; - # this is 3502.56 MHz - #dl_absoluteFrequencyPointA = 633552; - # this is 3600.48 MHz - #dl_absoluteFrequencyPointA = 640032; - #scs-SpecificCarrierList - dl_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - dl_subcarrierSpacing = 1; - dl_carrierBandwidth = 106; - #initialDownlinkBWP - #genericParameters - # this is RBstart=0,L=106 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialDLBWPsubcarrierSpacing = 1; - #pdcch-ConfigCommon - initialDLBWPcontrolResourceSetZero = 11; - initialDLBWPsearchSpaceZero = 0; - - - - #uplinkConfigCommon - #frequencyInfoUL - ul_frequencyBand = 78; - #scs-SpecificCarrierList - ul_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - ul_subcarrierSpacing = 1; - ul_carrierBandwidth = 106; - pMax = 20; - #initialUplinkBWP - #genericParameters - initialULBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialULBWPsubcarrierSpacing = 1; - #rach-ConfigCommon - #rach-ConfigGeneric - prach_ConfigurationIndex = 98; -#prach_msg1_FDM -#0 = one, 1=two, 2=four, 3=eight - prach_msg1_FDM = 0; - prach_msg1_FrequencyStart = 0; - zeroCorrelationZoneConfig = 12; - preambleReceivedTargetPower = -104; -#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) - preambleTransMax = 6; -#powerRampingStep -# 0=dB0,1=dB2,2=dB4,3=dB6 - powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; -#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR -#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen - ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; -#oneHalf (0..15) 4,8,12,16,...60,64 - ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; -#ra_ContentionResolutionTimer -#(0..7) 8,16,24,32,40,48,56,64 - ra_ContentionResolutionTimer = 7; - rsrp_ThresholdSSB = 19; -#prach-RootSequenceIndex_PR -#1 = 839, 2 = 139 - prach_RootSequenceIndex_PR = 2; - prach_RootSequenceIndex = 1; - # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex - # - msg1_SubcarrierSpacing = 1, -# restrictedSetConfig -# 0=unrestricted, 1=restricted type A, 2=restricted type B - restrictedSetConfig = 0, - - msg3_DeltaPreamble = 1; - p0_NominalWithGrant =-90; - -# pucch-ConfigCommon setup : -# pucchGroupHopping -# 0 = neither, 1= group hopping, 2=sequence hopping - pucchGroupHopping = 0; - hoppingId = 40; - p0_nominal = -90; -# ssb_PositionsInBurs_BitmapPR -# 1=short, 2=medium, 3=long - ssb_PositionsInBurst_PR = 2; - ssb_PositionsInBurst_Bitmap = 1; - -# ssb_periodicityServingCell -# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 - ssb_periodicityServingCell = 2; - -# dmrs_TypeA_position -# 0 = pos2, 1 = pos3 - dmrs_TypeA_Position = 0; - -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - subcarrierSpacing = 1; - - - #tdd-UL-DL-ConfigurationCommon -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - referenceSubcarrierSpacing = 1; - # pattern1 - # dl_UL_TransmissionPeriodicity - # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; - nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; - - ssPBCH_BlockPower = -25; - } - - ); - - - # ------- SCTP definitions - SCTP : - { - # Number of streams to use in input/output - SCTP_INSTREAMS = 2; - SCTP_OUTSTREAMS = 2; - }; - - ////////// AMF parameters: - amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; - ipv6 = "192:168:30::17"; - active = "yes"; - preference = "ipv4"; - } - ); - - NETWORK_INTERFACES : - { - - GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; - GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; - GNB_INTERFACE_NAME_FOR_NGU = "em1"; - GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; - GNB_PORT_FOR_S1U = 2152; # Spec 2152 - }; - - } -); - -MACRLCs = ( - { - num_cc = 1; - tr_s_preference = "local_L1"; - tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 200; - pucch_TargetSNRx10 = 200; - ulsch_max_frame_inactivity = 1; - } -); - -L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 4; - prach_dtx_threshold = 120; -# pucch0_dtx_threshold = 150; - } -); - -RUs = ( - { - local_rf = "yes" - nb_tx = 1 - nb_rx = 1 - att_tx = 0 - att_rx = 0; - bands = [78]; - max_pdschReferenceSignalPower = -27; - max_rxgain = 75; - eNB_instances = [0]; - ##beamforming 1x2 matrix: 1 layer x 2 antennas - bf_weights = [0x00007fff, 0x0000]; - ##beamforming 1x4 matrix: 1 layer x 4 antennas - #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; - ## beamforming 2x2 matrix: - # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; - ## beamforming 4x4 matrix: - #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; - sf_extension = 0 - sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" - } -); - -THREAD_STRUCT = ( - { - #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" - parallel_config = "PARALLEL_SINGLE_THREAD"; - #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" - worker_config = "WORKER_ENABLE"; - } -); - -security = { - # preferred ciphering algorithms - # the first one of the list that an UE supports in chosen - # valid values: nea0, nea1, nea2, nea3 - ciphering_algorithms = ( "nea0" ); - - # preferred integrity algorithms - # the first one of the list that an UE supports in chosen - # valid values: nia0, nia1, nia2, nia3 - integrity_algorithms = ( "nia2", "nia0" ); - - # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter - # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' - drb_ciphering = "yes"; - drb_integrity = "no"; -}; - - log_config : - { - global_log_level ="info"; - global_log_verbosity ="medium"; - hw_log_level ="info"; - hw_log_verbosity ="medium"; - phy_log_level ="info"; - phy_log_verbosity ="medium"; - mac_log_level ="info"; - mac_log_verbosity ="high"; - rlc_log_level ="info"; - rlc_log_verbosity ="medium"; - pdcp_log_level ="info"; - pdcp_log_verbosity ="medium"; - rrc_log_level ="info"; - rrc_log_verbosity ="medium"; - f1ap_log_level ="debug"; - f1ap_log_verbosity ="medium"; - }; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf index 6ade355053..4200300c50 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime = 6; + min_rxtxtime_pdsch = 6; servingCellConfigCommon = ( { @@ -55,6 +55,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -109,6 +118,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 38; # this is SS=10 L=3 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf index b7a04b1f36..015d9ee0d0 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf @@ -52,6 +52,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -106,6 +115,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf index 299a19cc4e..e6bbbf2d41 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf @@ -53,6 +53,19 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0;#for DL slot + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0;#for mixed slot + initialDLBWPmappingType_1 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -107,6 +120,21 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 2; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml index 2516af9429..86af12b53e 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab1 NSA 2x2 Ping DL UL with QUECTEL tasks - 1 + 5 030000 040000 diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml index 52cf1ec6e8..2d17ff38e2 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab2 NSA 2x2 Attach-Detach with QUECTEL tasks - 1 + 5 031000 041000 diff --git a/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml b/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml index cd79e49f2c..28eee1e224 100644 --- a/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml +++ b/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml @@ -22,7 +22,7 @@ --> TEST-SA-FR1-Tab1 - SA Ping DL UL with OAI NR UE (N310) + SA Ping DL UL with OAI NR UE tasks 1 @@ -40,9 +40,9 @@ Initialize_OAI_UE - Initialize OAI UE (N310) + Initialize OAI UE nr - --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation + --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation diff --git a/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml b/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml deleted file mode 100644 index d527737b3c..0000000000 --- a/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml +++ /dev/null @@ -1,123 +0,0 @@ - - - TEST-SA-FR1-Tab2 - SA Ping DL UL with OAI NR UE (X300) - tasks - 1 - - 040000 - 000002 - 010000 - 000002 - 050000 - 050001 - 000001 - 010002 - 080000 - - - - - Initialize_OAI_UE - Initialize OAI UE (X300) - nr - --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "addr=192.168.60.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation - - - - Terminate_OAI_UE - Terminate OAI UE - - - - - Initialize_eNB - Initialize gNB - -O ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf --sa --usrp-tx-thread-config 1 - 0 - 0 - nr - yes - yes - 192.168.18.240 - - - - IdleSleep - Sleep - 5 - - - - IdleSleep - Sleep - 20 - - - - - Ping - Ping from CN to UE: 20pings in 20sec - -c 20 - 5 - - - - Ping - Ping from CN to UE: 100pings in 20sec - -c 100 -i 0.2 - 5 - - - - Iperf - iperf (DL/60Mbps/UDP)(60 sec)(single-ue profile) - -u -b 60M -t 60 - DL - nrmodule2_quectel - 5 - single-ue - - - - Iperf - iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile) - -u -b 3M -t 60 - UL - nrmodule2_quectel - 5 - single-ue - - - - - Terminate_eNB - Terminate gNB - 0 - 0 - nr - - - - diff --git a/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml b/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml deleted file mode 100644 index 2088678707..0000000000 --- a/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml +++ /dev/null @@ -1,129 +0,0 @@ - - - TEST-SA-FR1-Tab3 - SA Ping DL UL with QUECTEL - tasks - 1 - - 040000 - 000002 - 010000 - 000001 - 050000 - 050001 - 070000 - 070001 - 000001 - 010002 - 080000 - - - - - Initialize_UE - Initialize Quectel - nrmodule2_quectel - yes - - - - - Terminate_UE - Terminate Quectel - nrmodule2_quectel - - - - - Initialize_eNB - Initialize gNB - -O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 - 0 - 0 - nr - yes - yes - 192.168.18.240 - - - - IdleSleep - Sleep - 5 - - - - IdleSleep - Sleep - 20 - - - - - Ping - Ping: 20pings in 20sec - nrmodule2_quectel - -c 20 - 5 - - - - Ping - Ping: 100pings in 20sec - nrmodule2_quectel - -c 100 -i 0,2 - 5 - - - - Iperf - iperf (DL/140Mbps/UDP)(60 sec)(single-ue profile) - -u -b 140M -t 60 - DL - nrmodule2_quectel - 5 - single-ue - - - - Iperf - iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile) - -u -b 3M -t 60 - UL - nrmodule2_quectel - 5 - single-ue - - - - - Terminate_eNB - Terminate gNB - 0 - 0 - nr - - - - diff --git a/ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml b/ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml deleted file mode 100644 index 4b2400a4ac..0000000000 --- a/ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml +++ /dev/null @@ -1,166 +0,0 @@ - - - TEST-SA-FR1-Tab4 - SA Staged DL with QUECTEL - tasks - 1 - - 040000 - 000002 - 010000 - 000001 - 050000 - 000001 - 070000 - 000001 - 070001 - 000001 - 070002 - 000001 - 070003 - 000001 - 070004 - 000001 - 070005 - 000001 - 010002 - 080000 - - - - - Initialize_UE - Initialize Quectel - nrmodule2_quectel - yes - - - - - Terminate_UE - Terminate Quectel - nrmodule2_quectel - - - - - Initialize_eNB - Initialize gNB - -O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 - 0 - 0 - nr - yes - yes - 192.168.18.240 - - - - IdleSleep - Sleep - 5 - - - - IdleSleep - Sleep - 20 - - - - - Ping - Ping: 20pings in 20sec - nrmodule2_quectel - -c 20 - 5 - - - - - Iperf - iperf (DL/10Mbps/UDP)(30 sec)(single-ue profile) - -u -b 10M -t 30 - DL - nrmodule2_quectel - 5 - single-ue - - - Iperf - iperf (DL/20Mbps/UDP)(30 sec)(single-ue profile) - -u -b 20M -t 30 - DL - nrmodule2_quectel - 5 - single-ue - - - Iperf - iperf (DL/40Mbps/UDP)(30 sec)(single-ue profile) - -u -b 40M -t 30 - DL - nrmodule2_quectel - 5 - single-ue - - - Iperf - iperf (DL/60Mbps/UDP)(30 sec)(single-ue profile) - -u -b 60M -t 30 - DL - nrmodule2_quectel - 5 - single-ue - - - Iperf - iperf (DL/90Mbps/UDP)(30 sec)(single-ue profile) - -u -b 90M -t 30 - DL - nrmodule2_quectel - 5 - single-ue - - - Iperf - iperf (DL/140Mbps/UDP)(30 sec)(single-ue profile) - -u -b 140M -t 30 - DL - nrmodule2_quectel - 5 - single-ue - - - - - Terminate_eNB - Terminate gNB - 0 - 0 - nr - - - - diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index f513ac0563..329ed7bb3d 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1,4 +1,4 @@ -#/* +#/* # * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more # * contributor license agreements. See the NOTICE file distributed with # * this work for additional information regarding copyright ownership. @@ -308,7 +308,7 @@ else (CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7l") set(COMPILATION_AVX2 "False") endif() if (CPUINFO MATCHES "sse4_1") - set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1 -mpclmul") + set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1") endif() if (CPUINFO MATCHES "ssse3") set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -mssse3") @@ -889,7 +889,7 @@ set(HWLIB_BENETEL_4G_SOURCE ) add_library(benetel_4g MODULE ${HWLIB_BENETEL_4G_SOURCE} ) -set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") +set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive") TARGET_LINK_LIBRARIES(benetel_4g ${DPDK_LIBS}) @@ -907,7 +907,7 @@ set(HWLIB_BENETEL_5G_SOURCE ) add_library(benetel_5g MODULE ${HWLIB_BENETEL_5G_SOURCE} ) -set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") +set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive") TARGET_LINK_LIBRARIES(benetel_5g ${DPDK_LIBS}) @@ -993,6 +993,7 @@ add_boolean_option(TRACE_RLC_AM_HOLE False "TRACE for RLC AM, TO BE CHANGE add_boolean_option(TRACE_RLC_AM_PDU False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_RESEGMENT False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_RX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") +add_boolean_option(TRACE_RLC_AM_RX_DECODE False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_TX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_TX_STATUS False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_STATUS_CREATION False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") @@ -1571,6 +1572,7 @@ set(PHY_SRC_COMMON ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch_common.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dlsch_scrambling.c + ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_gold_generic.c ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/srs_modulation.c ${OPENAIR1_DIR}/PHY/MODULATION/ofdm_mod.c ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_time.c diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index 0de24bcf6d..a704a66c76 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -257,48 +257,6 @@ void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { *n_rb = 6*count; } -int get_nb_periods_per_frame(uint8_t tdd_period) { - - int nb_periods_per_frame; - switch(tdd_period) { - case 0: - nb_periods_per_frame = 20; // 10ms/0p5ms - break; - - case 1: - nb_periods_per_frame = 16; // 10ms/0p625ms - break; - - case 2: - nb_periods_per_frame = 10; // 10ms/1ms - break; - - case 3: - nb_periods_per_frame = 8; // 10ms/1p25ms - break; - - case 4: - nb_periods_per_frame = 5; // 10ms/2ms - break; - - case 5: - nb_periods_per_frame = 4; // 10ms/2p5ms - break; - - case 6: - nb_periods_per_frame = 2; // 10ms/5ms - break; - - case 7: - nb_periods_per_frame = 1; // 10ms/10ms - break; - - default: - AssertFatal(1==0,"Undefined tdd period %d\n", tdd_period); - } - return nb_periods_per_frame; -} - int get_dmrs_port(int nl, uint16_t dmrs_ports) { @@ -318,6 +276,14 @@ int get_dmrs_port(int nl, uint16_t dmrs_ports) { return p; } +int get_num_dmrs(uint16_t dmrs_mask ) { + + int num_dmrs=0; + + for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1); + return(num_dmrs); +} + lte_frame_type_t get_frame_type(uint16_t current_band, uint8_t scs_index) { lte_frame_type_t current_type; @@ -506,10 +472,6 @@ int get_subband_size(int NPRB,int size) { } -int get_SLIV(uint8_t S, uint8_t L) { - return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) ); -} - void SLIV2SL(int SLIV,int *S,int *L) { int SLIVdiv14 = SLIV/14; diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index 44a6e05577..d9f2b0c03a 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -50,17 +50,9 @@ typedef struct nr_bandentry_s { extern const size_t nr_bandtable_size; extern nr_bandentry_t nr_bandtable[]; -static inline int get_num_dmrs(uint16_t dmrs_mask ) { - int num_dmrs=0; - - for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1); - return(num_dmrs); -} - - -int get_SLIV(uint8_t S, uint8_t L); void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset); +int get_num_dmrs(uint16_t dmrs_mask); uint16_t config_bandwidth(int mu, int nb_rb, int nr_band); int get_nr_table_idx(int nr_bandP, uint8_t scs_index); int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index); @@ -79,7 +71,6 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx); int get_subband_size(int NPRB,int size); void SLIV2SL(int SLIV,int *S,int *L); int get_dmrs_port(int nl, uint16_t dmrs_ports); -int get_nb_periods_per_frame(uint8_t tdd_period); #define CEILIDIV(a,b) ((a+b-1)/b) #define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1)) diff --git a/common/utils/threadPool/Makefile b/common/utils/threadPool/Makefile index 729f9dd0e2..6b28eb2ba8 100644 --- a/common/utils/threadPool/Makefile +++ b/common/utils/threadPool/Makefile @@ -1,3 +1,13 @@ -thread-pool-test: thread-pool.c thread-pool.h - gcc -g -O3 thread-pool.c -I ${OPENAIR_DIR}/nfapi/open-nFAPI/nfapi/public_inc -I ${OPENAIR_DIR}/ -I ${OPENAIR_DIR}/common/utils/ -I. ${OPENAIR_DIR}/common/utils/backtrace.c -I ${OPENAIR_DIR}/openair2/COMMON ${OPENAIR_DIR}/common/utils/system.c ${OPENAIR_DIR}/common/utils/LOG/log.c ${OPENAIR_DIR}/common/config/config_userapi.c ${OPENAIR_DIR}/common/config/config_load_configmodule.c ${OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -DMAX_NUM_CCs=1 -I../LOG -I../../utils/T -o thread-pool-test +all: +measurement_display thread-pool-test + +measurement_display: +measurement_display.c thread-pool.h +gcc measurement_display.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -lpthread -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o +measurement_display + +thread-pool-test: +thread-pool.c thread-pool.h +gcc -g thread-pool.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -I $ {OPENAIR_DIR}/openair2/COMMON $ {OPENAIR_DIR}/common/utils/LOG/log.c $ {OPENAIR_DIR}/common/config/config_userapi.c +$ {OPENAIR_DIR}/common/config/config_load_configmodule.c $ {OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o thread-pool-test diff --git a/common/utils/threadPool/thread-pool.c b/common/utils/threadPool/thread-pool.c index fff09528a8..77729ae7a7 100644 --- a/common/utils/threadPool/thread-pool.c +++ b/common/utils/threadPool/thread-pool.c @@ -155,24 +155,21 @@ void initNamedTpool(char *params,tpool_t *pool, bool performanceMeas, char *name } #ifdef TEST_THREAD_POOL -volatile int oai_exit=0; void exit_function(const char *file, const char *function, const int line, const char *s) { } struct testData { int id; - int sleepTime; char txt[30]; }; void processing(void *arg) { struct testData *in=(struct testData *)arg; - //printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); + printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); sprintf(in->txt,"Done by %ld, job %d", pthread_self(), in->id); - in->sleepTime=rand()%1000; - usleep(in->sleepTime); - //printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); + usleep(rand()%100); + printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); } int main() { @@ -211,43 +208,11 @@ int main() { } while(tmp); tpool_t pool; - char params[]="1,2,3,4,5"; + char params[]="1,2,3,u"; initTpool(params,&pool, true); notifiedFIFO_t worker_back; initNotifiedFIFO(&worker_back); - sleep(1); - int cumulProcessTime=0, cumulTime=0; - struct timespec st,end; - clock_gettime(CLOCK_MONOTONIC, &st); - int nb_jobs=4; - for (int i=0; i <1000 ; i++) { - int parall=nb_jobs; - for (int j=0; j id=i; - pushTpool(&pool, work); - } - int sleepmax=0; - while (parall) { - tmp=pullTpool(&worker_back,&pool); - if (tmp) { - parall--; - struct testData *dd=NotifiedFifoData(tmp); - if (dd->sleepTime > sleepmax) - sleepmax=dd->sleepTime; - delNotifiedFIFO_elt(tmp); - } - } - cumulProcessTime+=sleepmax; - } - clock_gettime(CLOCK_MONOTONIC, &end); - long long dur=(end.tv_sec-st.tv_sec)*1000*1000+(end.tv_nsec-st.tv_nsec)/1000; - printf("In µs, Total time per group of %d job:%lld, work time per job %d, overhead per job %lld\n", - nb_jobs, dur/1000, cumulProcessTime/1000, (dur-cumulProcessTime)/(1000*nb_jobs)); - - /* for (int i=0; i <1000 ; i++) { notifiedFIFO_elt_t *work=newNotifiedFIFO_elt(sizeof(struct testData), i, &worker_back, processing); struct testData *x=(struct testData *)NotifiedFifoData(work); @@ -267,7 +232,7 @@ int main() { abortTpool(&pool,510); } while(tmp); - */ + return 0; } #endif diff --git a/common/utils/threadPool/thread-pool.h b/common/utils/threadPool/thread-pool.h index 1839b42f39..a32b7c3859 100644 --- a/common/utils/threadPool/thread-pool.h +++ b/common/utils/threadPool/thread-pool.h @@ -31,7 +31,6 @@ #include #include #include -//#include #ifdef DEBUG #define THREADINIT PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP @@ -51,7 +50,7 @@ AssertFatal(ret==0,"ret=%d\n",ret);} #define condbroadcast(signal) {int ret=pthread_cond_broadcast(&signal); \ AssertFatal(ret==0,"ret=%d\n",ret);} -#define condsignal(signal) {int ret=pthread_cond_signal(&signal); \ +#define condsignal(signal) {int ret=pthread_cond_broadcast(&signal); \ AssertFatal(ret==0,"ret=%d\n",ret);} #define tpool_nbthreads(tpool) (tpool.nbThreads) typedef struct notifiedFIFO_elt_s { @@ -131,7 +130,7 @@ static inline void pushNotifiedFIFO_nothreadSafe(notifiedFIFO_t *nf, notifiedFIF static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg) { mutexlock(nf->lockF); pushNotifiedFIFO_nothreadSafe(nf,msg); - condsignal(nf->notifF); + condbroadcast(nf->notifF); mutexunlock(nf->lockF); } diff --git a/doc/testing_gnb_w_cots_ue_resources/gnb.conf b/doc/testing_gnb_w_cots_ue_resources/gnb.conf index aae22a92ba..97935f92ee 100755 --- a/doc/testing_gnb_w_cots_ue_resources/gnb.conf +++ b/doc/testing_gnb_w_cots_ue_resources/gnb.conf @@ -53,7 +53,29 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_1 = 53; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 54; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=1,L=4 //5 (4 is for 43, 5 is for 57) + initialDLBWPstartSymbolAndLength_3 = 57; //43; //57; #uplinkConfigCommon #frequencyInfoUL ul_frequencyBand = 78; @@ -107,6 +129,21 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 55; + + initialULBWPk2_1 = 2; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/executables/nr-gnb.c b/executables/nr-gnb.c index dc8960846f..e9fc06ce4a 100644 --- a/executables/nr-gnb.c +++ b/executables/nr-gnb.c @@ -401,15 +401,15 @@ void init_gNB_Tpool(int inst) { LOG_I(PHY,"Number of threads requested in config file: %d, Number of threads available on this machine: %d\n",gNB->pusch_proc_threads,numCPU); int threadCnt = min(numCPU, gNB->pusch_proc_threads); if (threadCnt < 2) LOG_E(PHY,"Number of threads for gNB should be more than 1. Allocated only %d\n",threadCnt); - char pool[80]; - sprintf(pool,"-1"); + char ul_pool[80]; + sprintf(ul_pool,"-1"); int s_offset = 0; for (int icpu=1; icputhreadPool, false); + if (getenv("noThreads")) strcpy(ul_pool, "n"); + initTpool(ul_pool, gNB->threadPool, false); // ULSCH decoder result FIFO gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); initNotifiedFIFO(gNB->respDecode); diff --git a/executables/nr-ue.c b/executables/nr-ue.c index c4d8145c44..c90a5119cd 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -786,7 +786,7 @@ void init_NR_UE_threads(int nb_inst) { /* HACK: this function is needed to compile the UE * fix it somehow */ -int find_dlsch(uint16_t rnti, +int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB, find_type_t type) { diff --git a/openair1/PHY/CODING/crc.h b/openair1/PHY/CODING/crc.h deleted file mode 100644 index d6474eae9b..0000000000 --- a/openair1/PHY/CODING/crc.h +++ /dev/null @@ -1,543 +0,0 @@ -/******************************************************************************* - Copyright (c) 2009-2018, Intel Corporation - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - * Neither the name of Intel Corporation nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*******************************************************************************/ - -/** - * Header file for module with CRC computation methods - * - * PCLMULQDQ implementation is based on work by: - * Erdinc Ozturk - * Vinodh Gopal - * James Guilford - * - * "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction" - * URL: http://download.intel.com/design/intarch/papers/323102.pdf - */ - -#ifndef __CRC_H__ -#define __CRC_H__ - -#include - -#include "crcext.h" -#include "types.h" -#include -#include - -/** - * PCLMULQDQ CRC computation context structure - */ -struct crc_pclmulqdq_ctx { - /** - * K1 = reminder X^128 / P(X) : 0-63 - * K2 = reminder X^192 / P(X) : 64-127 - */ - uint64_t k1; - uint64_t k2; - - /** - * K3 = reminder X^64 / P(X) : 0-63 - * q = quotient X^64 / P(X) : 64-127 - */ - uint64_t k3; - uint64_t q; - - /** - * p = polynomial / P(X) : 0-63 - * res = reserved : 64-127 - */ - uint64_t p; - uint64_t res; -}; - -/** - * Functions and prototypes - */ - -/** - * @brief Initializes look-up-table (LUT) for given 8 bit polynomial - * - * @param poly CRC polynomial - * @param lut pointer to look-up-table to be initialized - */ -void crc8_init_lut(const uint8_t poly, uint8_t *lut); - -/** - * @brief Calculates 8 bit CRC using LUT method. - * - * @param crc CRC initial value - * @param data pointer to data block to calculate CRC for - * @param data_len size of data block - * @param lut 256x8bits look-up-table pointer - * - * @return New CRC value - */ -__forceinline -uint8_t crc8_calc_lut(const uint8_t *data, - uint32_t data_len, - uint8_t crc, - const uint8_t *lut) -{ - if (unlikely(data == NULL || lut == NULL)) - return crc; - - while (data_len--) - crc = lut[*data++ ^ crc]; - - return crc; -} - -/** - * @brief Initializes look-up-table (LUT) for given 16 bit polynomial - * - * @param poly CRC polynomial - * @param lut pointer to 256x16bits look-up-table to be initialized - */ -void crc16_init_lut(const uint16_t poly, uint16_t *lut); - -/** - * @brief Calculates 16 bit CRC using LUT method. - * - * @param crc CRC initial value - * @param data pointer to data block to calculate CRC for - * @param data_len size of data block - * @param lut 256x16bits look-up-table pointer - * - * @return New CRC value - */ -__forceinline -uint16_t crc16_calc_lut(const uint8_t *data, - uint32_t data_len, - uint16_t crc, - const uint16_t *lut) -{ - if (unlikely(data == NULL || lut == NULL)) - return crc; - - while (data_len--) - crc = lut[(crc >> 8) ^ *data++] ^ (crc << 8); - - return crc; -} - -/** - * @brief Initializes look-up-table (LUT) for given 32 bit polynomial - * - * @param poly CRC polynomial - * @param lut pointer to 256x32bits look-up-table to be initialized - */ -void crc32_init_lut(const uint32_t poly, uint32_t *lut); - -/** - * @brief Calculates 32 bit CRC using LUT method. - * - * @param crc CRC initial value - * @param data pointer to data block to calculate CRC for - * @param data_len size of data block - * @param lut 256x32bits look-up-table pointer - * - * @return New CRC value - */ -__forceinline -uint32_t crc32_calc_lut(const uint8_t *data, - uint32_t data_len, - uint32_t crc, - const uint32_t *lut) -{ - if (unlikely(data == NULL || lut == NULL)) - return crc; - - while (data_len--) - crc = lut[(crc >> 24) ^ *data++] ^ (crc << 8); - - return crc; -} - -/** - * @brief Initializes look up tables for slice-By-2 method. - * - * @param poly CRC polynomial - * @param slice1 slice-by-2 look-up-table 1 - * @param slice2 slice-by-2 look-up-table 2 - * - * @return New CRC value - */ -void crc16_init_slice2(const uint16_t poly, - uint16_t *slice1, - uint16_t *slice2); - -/** - * @brief Calculates 16 bit CRC using Slice-By-2 method. - * - * @param crc CRC initial value - * @param data pointer to data block to calculate CRC for - * @param data_len size of data block - * @param slice1 256x16bits slice look-up-table 1 - * @param slice2 256x16bits slice look-up-table 2 - * - * @return New CRC value - */ -__forceinline -uint16_t crc16_calc_slice2(const uint8_t *data, - uint32_t data_len, - uint16_t crc, - const uint16_t *slice1, - const uint16_t *slice2) -{ - uint_fast32_t i; - - if (unlikely(data == NULL)) - return crc; - - if (unlikely(slice1 == NULL || slice2 == NULL)) - return crc; - - crc = bswap2(crc); - for (i = (data_len & (~1)), data += (data_len & (~1)); i != 0; - i -= sizeof(uint16_t)) { - crc ^= (*((const uint16_t *)(data - i))); - crc = slice2[(uint8_t)crc] ^ slice1[(uint8_t)(crc >> 8)]; - } - crc = bswap2(crc); - if (data_len & 1) - crc = (crc << 8) ^ bswap2(slice1[(crc >> 8) ^ *data]); - - return crc; -} - -/** - * @brief Initializes look up tables for slice-By-4 method. - * - * @param poly CRC polynomial - * @param slice1 256x32bits slice look-up-table 1 - * @param slice2 256x32bits slice look-up-table 2 - * @param slice3 256x32bits slice look-up-table 3 - * @param slice4 256x32bits slice look-up-table 4 - * - * @return New CRC value - */ -void crc32_init_slice4(const uint32_t poly, - uint32_t *slice1, uint32_t *slice2, - uint32_t *slice3, uint32_t *slice4); - -/** - * @brief Calculates 32 bit CRC using Slice-By-4 method. - * - * @param data pointer to data block to calculate CRC for - * @param data_len size of data block - * @param crc CRC initial value - * @param slice1 256x32bits slice look-up-table 1 - * @param slice2 256x32bits slice look-up-table 2 - * @param slice3 256x32bits slice look-up-table 3 - * @param slice4 256x32bits slice look-up-table 4 - * - * @return New CRC value - */ -__forceinline -uint32_t crc32_calc_slice4(const uint8_t *data, - uint32_t data_len, uint32_t crc, - const uint32_t *slice1, const uint32_t *slice2, - const uint32_t *slice3, const uint32_t *slice4) -{ - uint_fast32_t i; - - if (unlikely(data == NULL)) - return crc; - - if (unlikely(slice1 == NULL || slice2 == NULL || - slice3 == NULL || slice4 == NULL)) - return crc; - - crc = bswap4(crc); - for (i = data_len & (~3), data += (data_len & (~3)); i != 0; - i -= sizeof(uint32_t)) { - crc ^= (*((const uint32_t *)(data - i))); - crc = slice4[(uint8_t)(crc)] ^ - slice3[(uint8_t)(crc >> 8)] ^ - slice2[(uint8_t)(crc >> 16)] ^ - slice1[(uint8_t)(crc >> 24)]; - } - crc = bswap4(crc); - for (i = data_len & 3, data += (data_len & 3); i != 0; i--) - crc = (crc << 8) ^ - bswap4(slice1[(crc >> 24) ^ *(data - i)]); - - return crc; -} - -/** - * @brief Performs one folding round - * - * Logically function operates as follows: - * DATA = READ_NEXT_16BYTES(); - * F1 = LSB8(FOLD) - * F2 = MSB8(FOLD) - * T1 = CLMUL( F1, K1 ) - * T2 = CLMUL( F2, K2 ) - * FOLD = XOR( T1, T2, DATA ) - * - * @param data_block 16 byte data block - * @param k1_k2 k1 and k2 constanst enclosed in XMM register - * @param fold running 16 byte folded data - * - * @return New 16 byte folded data - */ -__forceinline -__m128i crc32_folding_round(const __m128i data_block, - const __m128i k1_k2, - const __m128i fold) -{ - __m128i tmp = _mm_clmulepi64_si128(fold, k1_k2, 0x11); - - return _mm_xor_si128(_mm_clmulepi64_si128(fold, k1_k2, 0x00), - _mm_xor_si128(data_block, tmp)); -} - -/** - * @brief Performs Barret's reduction from 128 bits to 64 bits - * - * @param data128 128 bits data to be reduced - * @param k3_q k3 and Q constants enclosed in XMM register - * - * @return data reduced to 64 bits - */ -__forceinline -__m128i crc32_reduce_128_to_64(__m128i data128, const __m128i k3_q) -{ - __m128i tmp; - - tmp = _mm_xor_si128(_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */), - data128); - - data128 = _mm_xor_si128(_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */), - data128); - - return _mm_srli_si128(_mm_slli_si128(data128, 8), 8); -} - -/** - * @brief Performs Barret's reduction from 64 bits to 32 bits - * - * @param data64 64 bits data to be reduced - * @param k3_q k3 and Q constants enclosed in XMM register - * @param p_res P constant enclosed in XMM register - * - * @return data reduced to 32 bits - */ -__forceinline -uint32_t -crc32_reduce_64_to_32(__m128i fold, const __m128i k3_q, const __m128i p_res) -{ - __m128i temp; - - temp = _mm_clmulepi64_si128(_mm_srli_si128(fold, 4), - k3_q, 0x10 /* Q */); - temp = _mm_srli_si128(_mm_xor_si128(temp, fold), 4); - temp = _mm_clmulepi64_si128(temp, p_res, 0 /* P */); - return _mm_extract_epi32(_mm_xor_si128(temp, fold), 0); -} - -/** - * @brief Calculates 32 bit CRC for given \a data block by applying folding and - * reduction methods. - * - * Algorithm operates on 32 bit CRCs so polynomials and initial values may - * need to be promoted to 32 bits where required. - * - * @param crc initial CRC value (32 bit value) - * @param data pointer to data block - * @param data_len length of \a data block in bytes - * @param params pointer to PCLMULQDQ CRC calculation context - * - * @return CRC for given \a data block (32 bits wide). - */ -__forceinline -uint32_t -crc32_calc_pclmulqdq(const uint8_t *data, - uint32_t data_len, uint32_t crc, - const struct crc_pclmulqdq_ctx *params) -{ - __m128i temp, fold, k, swap; - uint32_t n; - - if (unlikely(data == NULL || data_len == 0 || params == NULL)) - return crc; - -#ifdef __KERNEL__ - /** - * Preserve FPU context - */ - kernel_fpu_begin(); -#endif - - /** - * Add 4 bytes to data block size - * This is to secure the following: - * CRC32 = M(X)^32 mod P(X) - * M(X) - message to compute CRC on - * P(X) - CRC polynomial - */ - data_len += 4; - - /** - * Load first 16 data bytes in \a fold and - * set \a swap BE<->LE 16 byte conversion variable - */ - fold = _mm_loadu_si128((__m128i *)data); - swap = crc_xmm_be_le_swap128; - - /** - * ------------------------------------------------- - * Folding all data into single 16 byte data block - * Assumes: \a fold holds first 16 bytes of data - */ - - if (unlikely(data_len <= 16)) { - /** - * Data block fits into 16 byte block - * - adjust data block - * - 4 least significant bytes need to be zero - */ - fold = _mm_shuffle_epi8(fold, swap); - fold = _mm_slli_si128(xmm_shift_right(fold, 20 - data_len), 4); - - /** - * Apply CRC init value - */ - temp = _mm_insert_epi32(_mm_setzero_si128(), bswap4(crc), 0); - temp = xmm_shift_left(temp, data_len - 4); - fold = _mm_xor_si128(fold, temp); - } else { - /** - * There are 2x16 data blocks or more - */ - __m128i next_data; - - /** - * n = number of bytes required to align \a data_len - * to multiple of 16 - */ - n = ((~data_len) + 1) & 15; - - /** - * Apply CRC initial value and - * get \a fold to BE format - */ - fold = _mm_xor_si128(fold, - _mm_insert_epi32(_mm_setzero_si128(), - crc, 0)); - fold = _mm_shuffle_epi8(fold, swap); - - /** - * Load next 16 bytes of data and - * adjust \a fold & \a next_data as follows: - * - * CONCAT(fold,next_data) >> (n*8) - */ - next_data = _mm_loadu_si128((__m128i *)&data[16]); - next_data = _mm_shuffle_epi8(next_data, swap); - next_data = _mm_or_si128(xmm_shift_right(next_data, n), - xmm_shift_left(fold, 16 - n)); - fold = xmm_shift_right(fold, n); - - if (unlikely(data_len <= 32)) - /** - * In such unlikely case clear 4 least significant bytes - */ - next_data = - _mm_slli_si128(_mm_srli_si128(next_data, 4), 4); - - /** - * Do the initial folding round on 2 first 16 byte chunks - */ - k = _mm_load_si128((__m128i *)(¶ms->k1)); - fold = crc32_folding_round(next_data, k, fold); - - if (likely(data_len > 32)) { - /** - * \a data_block needs to be at least 48 bytes long - * in order to get here - */ - __m128i new_data; - - /** - * Main folding loop - * - n is adjusted to point to next 16 data block - * to read - * (16+16) = 2x16; represents 2 first data blocks - * processed above - * (- n) is the number of zero bytes padded to - * the message in order to align it to 16 bytes - * - the last 16 bytes is processed separately - */ - for (n = 16 + 16 - n; n < (data_len - 16); n += 16) { - new_data = _mm_loadu_si128((__m128i *)&data[n]); - new_data = _mm_shuffle_epi8(new_data, swap); - fold = crc32_folding_round(new_data, k, fold); - } - - /** - * The last folding round works always on 12 bytes - * (12 bytes of data and 4 zero bytes) - * Read from offset -4 is to avoid one - * shift right operation. - */ - new_data = _mm_loadu_si128((__m128i *)&data[n - 4]); - new_data = _mm_shuffle_epi8(new_data, swap); - new_data = _mm_slli_si128(new_data, 4); - fold = crc32_folding_round(new_data, k, fold); - } /* if (data_len > 32) */ - } - - /** - * ------------------------------------------------- - * Reduction 128 -> 32 - * Assumes: \a fold holds 128bit folded data - */ - - /** - * REDUCTION 128 -> 64 - */ - k = _mm_load_si128((__m128i *)(¶ms->k3)); - fold = crc32_reduce_128_to_64(fold, k); - - /** - * REDUCTION 64 -> 32 - */ - n = crc32_reduce_64_to_32(fold, k, - _mm_load_si128((__m128i *)(¶ms->p))); - -#ifdef __KERNEL__ - /** - * - restore FPU context - */ - kernel_fpu_end(); -#endif - - return n; -} - -#endif /* __CRC_H__ */ diff --git a/openair1/PHY/CODING/crc_byte.c b/openair1/PHY/CODING/crc_byte.c index d1c3917c2c..287cbcd1f4 100644 --- a/openair1/PHY/CODING/crc_byte.c +++ b/openair1/PHY/CODING/crc_byte.c @@ -30,17 +30,10 @@ Modified in June, 2001, to include the length non multiple of 8 */ -#ifndef __SSE4_1__ -#define USE_INTEL_CRC 0 -#else -#define USE_INTEL_CRC __SSE4_1__ -#endif #include "coding_defs.h" #include "assertions.h" -#if USE_INTEL_CRC -#include "crc.h" -#endif + /*ref 36-212 v8.6.0 , pp 8-9 */ /* the highest degree is set by default */ @@ -101,28 +94,6 @@ static unsigned short crc11Table[256]; static unsigned char crc8Table[256]; static unsigned char crc6Table[256]; -#if USE_INTEL_CRC -static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = { - 0x64e4d700, /**< k1 */ - 0x2c8c9d00, /**< k2 */ - 0xd9fe8c00, /**< k3 */ - 0xf845fe24, /**< q */ - 0x864cfb00, /**< p */ - 0ULL /**< res */ -}; -__m128i crc_xmm_be_le_swap128; - -DECLARE_ALIGNED(const uint8_t crc_xmm_shift_tab[48], 16) = { - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, - 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff -}; - -#endif - void crcTableInit (void) { unsigned char c = 0; @@ -137,29 +108,23 @@ void crcTableInit (void) crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24); crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24); } while (++c); -#if USE_INTEL_CRC - crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b, - 0x04050607, 0x00010203); - -#endif } /********************************************************* -Byte by byte LUT implementations, +Byte by byte implementations, assuming initial byte is 0 padded (in MSB) if necessary -can use SIMD optimized Intel CRC for LTE/NR 24a/24b variants -*********************************************************/ +*********************************************************/ unsigned int crc24a (unsigned char * inptr, int bitlen) { - int octetlen = bitlen / 8; /* Change in octets */ - if ( bitlen % 8 || !USE_INTEL_CRC ) { - unsigned int crc = 0; - int resbit= (bitlen % 8); - + int octetlen, resbit; + unsigned int crc = 0; + octetlen = bitlen / 8; /* Change in octets */ + resbit = (bitlen % 8); + while (octetlen-- > 0) { // printf("crc24a: in %x => crc %x\n",crc,*inptr); crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)]; @@ -167,35 +132,17 @@ unsigned int crc24a (unsigned char * inptr, if (resbit > 0) crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]; - return crc; - } - #if USE_INTEL_CRC - else { - return crc32_calc_pclmulqdq(inptr, octetlen, 0, - <e_crc24a_pclmulqdq); - } - #endif + return crc; } -#if USE_INTEL_CRC -static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = { - 0x80140500, /**< k1 */ - 0x42000100, /**< k2 */ - 0x90042100, /**< k3 */ - 0xffff83ff, /**< q */ - 0x80006300, /**< p */ - 0ULL /**< res */ -}; -#endif unsigned int crc24b (unsigned char * inptr, - int bitlen) + int bitlen) { - int octetlen = bitlen / 8; /* Change in octets */ - - if ( bitlen % 8 || !USE_INTEL_CRC ) { + int octetlen, resbit; unsigned int crc = 0; - int resbit = (bitlen % 8); + octetlen = bitlen / 8; /* Change in octets */ + resbit = (bitlen % 8); while (octetlen-- > 0) { // printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]); @@ -206,13 +153,6 @@ unsigned int crc24b (unsigned char * inptr, crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]; return crc; - } -#if USE_INTEL_CRC - else { - return crc32_calc_pclmulqdq(inptr, octetlen, 0, - <e_crc24b_pclmulqdq); - } -#endif } unsigned int crc24c (unsigned char * inptr, diff --git a/openair1/PHY/CODING/crcext.h b/openair1/PHY/CODING/crcext.h deleted file mode 100644 index f441f25e50..0000000000 --- a/openair1/PHY/CODING/crcext.h +++ /dev/null @@ -1,89 +0,0 @@ -/******************************************************************************* - Copyright (c) 2009-2018, Intel Corporation - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - * Neither the name of Intel Corporation nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*******************************************************************************/ - -/** - * Header file with CRC external definitions - * - */ - -#ifndef __CRCEXT_H__ -#define __CRCEXT_H__ - -#include -#include "types.h" -/** - * Flag indicating availability of PCLMULQDQ instruction - * Only valid after running CRCInit() function. - */ -extern int pclmulqdq_available; - -/** - * Flag indicating availability of PCLMULQDQ instruction - * Only valid after running CRCInit() function. - */ -extern __m128i crc_xmm_be_le_swap128; -extern const uint8_t crc_xmm_shift_tab[48]; - -/** - * @brief Shifts right 128 bit register by specified number of bytes - * - * @param reg 128 bit value - * @param num number of bytes to shift right \a reg by (0-16) - * - * @return \a reg >> (\a num * 8) - */ -__forceinline -__m128i xmm_shift_right(__m128i reg, const unsigned int num) -{ - const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 + num); - - return _mm_shuffle_epi8(reg, _mm_loadu_si128(p)); -} - -/** - * @brief Shifts left 128 bit register by specified number of bytes - * - * @param reg 128 bit value - * @param num number of bytes to shift left \a reg by (0-16) - * - * @return \a reg << (\a num * 8) - */ -__forceinline -__m128i xmm_shift_left(__m128i reg, const unsigned int num) -{ - const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 - num); - - return _mm_shuffle_epi8(reg, _mm_loadu_si128(p)); -} - -/** - * @brief Initializes CRC module. - * @note It is mandatory to run it before using any of CRC API's. - */ -extern void CRCInit(void); - -#endif /* __CRCEXT_H__ */ diff --git a/openair1/PHY/CODING/nrLDPC_defs.h b/openair1/PHY/CODING/nrLDPC_defs.h index 0d7ff9ef9f..321ecaab7d 100644 --- a/openair1/PHY/CODING/nrLDPC_defs.h +++ b/openair1/PHY/CODING/nrLDPC_defs.h @@ -22,7 +22,6 @@ // encoder interface #ifndef __NRLDPC_DEFS__H__ #define __NRLDPC_DEFS__H__ -#include #include "openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h" /** \brief LDPC encoder @@ -37,31 +36,17 @@ \param 9-12 time_stats_t *tinput,*tprep, *tparity,*toutput */ typedef struct { - unsigned int n_segments; // optim8seg - unsigned int macro_num; // optim8segmulti - unsigned char gen_code; //orig - time_stats_t *tinput; - time_stats_t *tprep; - time_stats_t *tparity; - time_stats_t *toutput; - int Kr; - uint32_t Kb; - uint32_t *Zc; - void *harq; - /// Encoder BG - uint8_t BG; - /// Interleaver outputs - unsigned char *output; - /// Number of bits in "small" code segments - uint32_t K; - /// Number of "Filler" bits - uint32_t F; - /// LDPC-code outputs - uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS]; -} encoder_implemparams_t; + int n_segments; // optim8seg + unsigned int macro_num; // optim8segmulti + unsigned char gen_code; //orig + time_stats_t *tinput; + time_stats_t *tprep; + time_stats_t *tparity; + time_stats_t *toutput; +}encoder_implemparams_t; #define INIT0_LDPCIMPLEMPARAMS {0,0,0,NULL,NULL,NULL,NULL} -typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params *p_decParams, int8_t *p_llr, int8_t *p_out); -typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t *); +typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out); +typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t*); //============================================================================================================================ // decoder interface /** @@ -71,5 +56,5 @@ typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,sho \param p_llrOut Output vector \param p_profiler LDPC profiler statistics */ -typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params *, int8_t *, int8_t *, t_nrLDPC_procBuf *, t_nrLDPC_time_stats * ); +typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params* , int8_t*, int8_t* , t_nrLDPC_procBuf* , t_nrLDPC_time_stats* ); #endif diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c index 69d2ac4972..738fd49b7d 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c @@ -38,6 +38,8 @@ #include "common/utils/LOG/log.h" +//#define DEBUG_LDPC + #include "ldpc384_byte.c" #include "ldpc352_byte.c" #include "ldpc320_byte.c" @@ -71,18 +73,9 @@ -static void encode_parity_check_part_optim(uint8_t *cc,uint8_t *d, short BG,short Zc,short Kb, int simd_size, int ncols) +static inline void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb) { - unsigned char c[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c - - for (int i1=0; i1 < ncols; i1++) { - memcpy(&c[2*i1*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char)); - memcpy(&c[(2*i1+1)*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char)); - } - for (int i1=1;i1tinput != NULL) start_meas(impp->tinput); - for (int i=0; i>(i&7)))>>(7-(i&7)); //printf("c(%d,%d)=%d\n",j,i,temp); } @@ -103,10 +108,24 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); + for (i1=0; i1 < ncols; i1++) + { + memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); + memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); + } + for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c, d, BG, Zc, Kb,simd_size, ncols); + encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c index 6fa9c5ff53..a974e86e27 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c @@ -38,6 +38,7 @@ #include "common/utils/LOG/log.h" #include "PHY/TOOLS/time_meas.h" #include "openair1/PHY/CODING/nrLDPC_defs.h" +//#define DEBUG_LDPC #include "ldpc_encode_parity_check.c" #include "ldpc_generate_coefficient.c" @@ -101,6 +102,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size + unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c // calculate number of punctured bits no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc; @@ -149,10 +151,24 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); + for (i1=0; i1 < ncols; i1++) + { + memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); + memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); + } + for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c, d, BG, Zc, Kb, simd_size, ncols); + encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c index 15d4481eb6..b21f875b32 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c @@ -39,17 +39,17 @@ #include "PHY/TOOLS/time_meas.h" #include "openair1/PHY/CODING/nrLDPC_defs.h" +//#define DEBUG_LDPC + #include "ldpc_encode_parity_check.c" #include "ldpc_generate_coefficient.c" -int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp) +int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp) { - //set_log(PHY, 4); - - int nrows=0,ncols=0; - int rate=3; + short nrows=0,ncols=0; + int i,i1,j,rate=3; int no_punctured_columns,removed_bit; //Table of possible lifting sizes char temp; @@ -95,8 +95,8 @@ int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,shor } #ifdef DEBUG_LDPC - LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,impp->n_segments); - LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",input[0][0],input[0][1],input[0][2],input[0][3]); + LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,n_segments); + LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",test_input[0][0],test_input[0][1],test_input[0][2],test_input[0][3]); #endif AssertFatal(Zc>0,"no valid Zc found for block length %d\n",block_length); @@ -104,8 +104,10 @@ int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,shor if ((Zc&31) > 0) simd_size = 16; else simd_size = 32; - unsigned char cc[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size - unsigned char dd[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size + unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size + unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size + + unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c // calculate number of punctured bits no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc; @@ -113,8 +115,8 @@ int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,shor //printf("%d\n",no_punctured_columns); //printf("%d\n",removed_bit); // unpack input - memset(cc,0,sizeof(unsigned char) * ncols * Zc); - memset(dd,0,sizeof(unsigned char) * nrows * Zc); + memset(c,0,sizeof(unsigned char) * ncols * Zc); + memset(d,0,sizeof(unsigned char) * nrows * Zc); if(impp->tinput != NULL) start_meas(impp->tinput); #if 0 @@ -122,29 +124,29 @@ int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,shor //for (j=0; j>(i&7); + temp = (test_input[j][i/8]&(1<<(i&7)))>>(i&7); //printf("c(%d,%d)=%d\n",j,i,temp); c[i] |= (temp << (j-macro_segment)); } } #else #ifdef __AVX2__ - for (int i=0; i>5; i++) { - c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]); + for (i=0; i>5; i++) { + c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]); //for (j=1; j>5)<<5;i>5)<<5;i>(i&7)))>>(7-(i&7)); + temp = (test_input[j][i/8]&(128>>(i&7)))>>(7-(i&7)); //printf("c(%d,%d)=%d\n",j,i,temp); - cc[i] |= (temp << (j-macro_segment)); + c[i] |= (temp << (j-macro_segment)); } } #else @@ -157,14 +159,28 @@ int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,shor if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); + for (i1=0; i1 < ncols; i1++) + { + memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); + memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); + } + for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(cc, dd, BG, Zc, Kb, simd_size, ncols); + encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { - if (encode_parity_check_part_orig(cc, dd, BG, Zc, Kb, block_length)!=0) { + if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) { printf("Problem with encoder\n"); return(-1); } @@ -172,8 +188,8 @@ int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,shor if(impp->toutput != NULL) start_meas(impp->toutput); // information part and puncture columns /* - memcpy(&output[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); - memcpy(&output[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); + memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); + memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); */ #ifdef __AVX2__ if ((((2*Zc)&31) == 0) && (((block_length-(2*Zc))&31) == 0)) { @@ -181,34 +197,34 @@ int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,shor //AssertFatal(((block_length-(2*Zc))&31) == 0,"block_length-(2*Zc) needs to be a multiple of 32 for now\n"); uint32_t l1 = (block_length-(2*Zc))>>5; uint32_t l2 = ((nrows-no_punctured_columns) * Zc-removed_bit)>>5; - __m256i *c256p = (__m256i *)&cc[2*Zc]; - __m256i *d256p = (__m256i *)&dd[0]; + __m256i *c256p = (__m256i *)&c[2*Zc]; + __m256i *d256p = (__m256i *)&d[0]; // if (((block_length-(2*Zc))&31)>0) l1++; - for (int i=0;i0) l2++; - for (int i1=0, i=l1;i1>(j-macro_segment))&1; - for (int i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++) + for (j=macro_segment; j < macro_segment_end; j++) + channel_input[j][i] = (c[2*Zc+i]>>(j-macro_segment))&1; + for (i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++) //for (j=0; j>(j-macro_segment))&1; + for (j=macro_segment; j < macro_segment_end; j++) + channel_input[j][block_length-2*Zc+i] = (d[i]>>(j-macro_segment))&1; } #else diff --git a/openair1/PHY/CODING/types.h b/openair1/PHY/CODING/types.h deleted file mode 100644 index 2bc7739e36..0000000000 --- a/openair1/PHY/CODING/types.h +++ /dev/null @@ -1,98 +0,0 @@ -/******************************************************************************* - Copyright (c) 2009-2018, Intel Corporation - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - * Neither the name of Intel Corporation nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*******************************************************************************/ - -/* Common data types, macros and functions used across the CRC library */ - -#ifndef CRC_TYPES_H_ -#define CRC_TYPES_H_ - -#ifdef __KERNEL__ -#include -#include -typedef uint32_t uint_fast32_t; -typedef uint16_t uint_fast16_t; -typedef uint8_t uint_fast8_t; -#else -#include -#include -#endif - -/* Declare variable at address aligned to a boundary */ -#define DECLARE_ALIGNED(_declaration, _boundary) \ - _declaration __attribute__((aligned(_boundary))) - -/* Macro to make function to be always inlined */ -#ifndef DEBUG -#define __forceinline \ - static inline __attribute__((always_inline)) -#else -#define __forceinline \ - static -#endif - -/* Likely & unliekly hints for the compiler */ -#define likely(x) __builtin_expect(!!(x), 1) -#define unlikely(x) __builtin_expect(!!(x), 0) - -/* Macro to get dimension of an array */ -#ifndef DIM -#define DIM(x) (sizeof(x)/sizeof(x[0])) -#endif - -/** - * Common functions - */ - -/** - * @brief Swaps bytes in 16 bit word - * - * @param val 16 bit data value - * - * @return byte swapped value - */ -__forceinline uint16_t bswap2(const uint16_t val) -{ - return (uint16_t) ((val >> 8) | (val << 8)); -} - -/** - * @brief Swaps bytes in 32 bit word - * ABCD -> DCBA - * - * @param val 32 bit data value - * - * @return byte swapped value - */ -__forceinline uint32_t bswap4(const uint32_t val) -{ - return ((val >> 24) | /**< A*/ - ((val & 0xff0000) >> 8) | /**< B*/ - ((val & 0xff00) << 8) | /**< C*/ - (val << 24)); /**< D*/ -} - -#endif /* CRC_TYPES_H_ */ diff --git a/openair1/PHY/INIT/nr_init_ue.c b/openair1/PHY/INIT/nr_init_ue.c index f664a03ba0..b60e77e814 100644 --- a/openair1/PHY/INIT/nr_init_ue.c +++ b/openair1/PHY/INIT/nr_init_ue.c @@ -458,7 +458,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ue->decode_SIB = 1; init_nr_prach_tables(839); - init_symbol_rotation(fp); + return 0; } diff --git a/openair1/PHY/INIT/nr_parms.c b/openair1/PHY/INIT/nr_parms.c index 347155ed3b..42d4a30e3b 100644 --- a/openair1/PHY/INIT/nr_parms.c +++ b/openair1/PHY/INIT/nr_parms.c @@ -209,6 +209,7 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp) return samp_count; } + uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp) { uint32_t slot_idx = 0; diff --git a/openair1/PHY/LTE_REFSIG/lte_refsig.h b/openair1/PHY/LTE_REFSIG/lte_refsig.h index 9d3bae503b..84a2676082 100644 --- a/openair1/PHY/LTE_REFSIG/lte_refsig.h +++ b/openair1/PHY/LTE_REFSIG/lte_refsig.h @@ -36,7 +36,8 @@ \param reset resets the generator \return 32 bits of the gold sequence */ -#include +uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); + /*!\brief This function generates the LTE Gold sequence (36-211, Sec 7.2), specifically for DL reference signals. @param frame_parms LTE DL Frame parameters diff --git a/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c b/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c new file mode 100644 index 0000000000..a23f8db4f2 --- /dev/null +++ b/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c @@ -0,0 +1,75 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.1 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ + +#include "PHY/types.h" + +/** + \brief Gold Sequence Generation defined in 3x.211 + \param x1 x1 shift register + \param x2 x2 shift register / cinit if reset is set + \param reset Reset flag / reinitialize the generator + \return c 32 bits of gold output +*/ +extern inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset) +{ + int32_t n; + + // 3GPP 3x.211 + // Nc = 1600 + // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 + // x1(n+31) = [x1(n+3) + x1(n)]mod2 + // x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2 + if (reset) + { + // Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30 + // x1(31) = [x1(3) + x1(0)]mod2 = 1 + *x1 = 1 + (1U<<31); + // Init value for x2: cinit = sum_{i=0}^30 x2*2^i + // x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2 + // = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2 + *x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31); + + // x1 and x2 contain bits n = 0,1,...,31 + + // Nc = 1600 bits are skipped at the beginning + // i.e., 1600 / 32 = 50 32bit words + + for (n = 1; n < 50; n++) + { + // Compute x1(0),...,x1(27) + *x1 = (*x1>>1) ^ (*x1>>4); + // Compute x1(28),..,x1(31) and xor + *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); + // Compute x2(0),...,x2(27) + *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); + // Compute x2(28),..,x2(31) and xor + *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); + } + } + + *x1 = (*x1>>1) ^ (*x1>>4); + *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); + *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); + *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); + + // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 + return(*x1^*x2); +} diff --git a/openair1/PHY/LTE_TRANSPORT/lte_mcs.c b/openair1/PHY/LTE_TRANSPORT/lte_mcs.c index 38914506ee..6144b978bf 100644 --- a/openair1/PHY/LTE_TRANSPORT/lte_mcs.c +++ b/openair1/PHY/LTE_TRANSPORT/lte_mcs.c @@ -147,10 +147,10 @@ uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb) { } } -int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) { +int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) { int rb,re_pbch_sss=0; int rb_alloc_ind,nsymb; - nsymb = (Ncp==NORMAL) ? 14 : 12; + nsymb = (frame_parms->Ncp==NORMAL) ? 14 : 12; // printf("adjust_G2 : symbol %d, subframe %d\n",symbol,subframe); if ((subframe!=0) && (subframe!=5) && (subframe!=6)) // if not PBCH/SSS or SSS @@ -158,12 +158,12 @@ int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t //first half of slot and TDD (no adjustments in first slot except for subframe 6 - PSS) if ((symbol<(nsymb>>1))&& - (frame_type == TDD)&& + (frame_parms->frame_type == TDD)&& (subframe!=6)) return(0); // after PBCH - if (frame_type==TDD) { //TDD + if (frame_parms->frame_type==TDD) { //TDD if ((symbol>((nsymb>>1)+3)) && (symbol!=(nsymb-1))) ///SSS return(0); @@ -185,9 +185,9 @@ int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t return(0); } - if ((N_RB_DL&1) == 1) { // ODD N_RB_DL - for (rb=((N_RB_DL>>1)-3); - rb<=((N_RB_DL>>1)+3); + if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL + for (rb=((frame_parms->N_RB_DL>>1)-3); + rb<=((frame_parms->N_RB_DL>>1)+3); rb++) { if (rb < 32) rb_alloc_ind = (rb_alloc[0]>>rb) & 1; @@ -201,16 +201,16 @@ int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t rb_alloc_ind = 0; if (rb_alloc_ind==1) { - if ((rb==(N_RB_DL>>1)-3) || - (rb==((N_RB_DL>>1)+3))) { + if ((rb==(frame_parms->N_RB_DL>>1)-3) || + (rb==((frame_parms->N_RB_DL>>1)+3))) { re_pbch_sss += 6; } else re_pbch_sss += 12; } } } else { - for (rb=((N_RB_DL>>1)-3); - rb<((N_RB_DL>>1)+3); + for (rb=((frame_parms->N_RB_DL>>1)-3); + rb<((frame_parms->N_RB_DL>>1)+3); rb++) { if (rb < 32) rb_alloc_ind = (rb_alloc[0]>>rb) & 1; diff --git a/openair1/PHY/LTE_TRANSPORT/pcfich.c b/openair1/PHY/LTE_TRANSPORT/pcfich.c index 0ba63019a1..3646732ce3 100644 --- a/openair1/PHY/LTE_TRANSPORT/pcfich.c +++ b/openair1/PHY/LTE_TRANSPORT/pcfich.c @@ -44,7 +44,7 @@ void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms, { uint32_t i; uint8_t reset; - uint32_t x1=0, x2, s=0; + uint32_t x1, x2, s=0; reset = 1; // x1 is set in lte_gold_generic diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index 998edf235f..3270066448 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -895,7 +895,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, int frame, uint8_t subframe, uint8_t pucch1_thres, - int br_flag + uint8_t br_flag ) //----------------------------------------------------------------------------- { diff --git a/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h b/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h index af8e63c3ed..622f37b3bc 100644 --- a/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h +++ b/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h @@ -101,7 +101,7 @@ int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint int get_G_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode); int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); +int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); #ifndef modOrder diff --git a/openair1/PHY/LTE_TRANSPORT/transport_proto.h b/openair1/PHY/LTE_TRANSPORT/transport_proto.h index 1fbd1266d7..19af50056c 100644 --- a/openair1/PHY/LTE_TRANSPORT/transport_proto.h +++ b/openair1/PHY/LTE_TRANSPORT/transport_proto.h @@ -700,51 +700,7 @@ int find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type); int find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type); -static inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset) -{ - int32_t n; - - // 3GPP 3x.211 - // Nc = 1600 - // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 - // x1(n+31) = [x1(n+3) + x1(n)]mod2 - // x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2 - if (reset) - { - // Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30 - // x1(31) = [x1(3) + x1(0)]mod2 = 1 - *x1 = 1 + (1U<<31); - // Init value for x2: cinit = sum_{i=0}^30 x2*2^i - // x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2 - // = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2 - *x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31); - - // x1 and x2 contain bits n = 0,1,...,31 - - // Nc = 1600 bits are skipped at the beginning - // i.e., 1600 / 32 = 50 32bit words - - for (n = 1; n < 50; n++) - { - // Compute x1(0),...,x1(27) - *x1 = (*x1>>1) ^ (*x1>>4); - // Compute x1(28),..,x1(31) and xor - *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); - // Compute x2(0),...,x2(27) - *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); - // Compute x2(28),..,x2(31) and xor - *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); - } - } - - *x1 = (*x1>>1) ^ (*x1>>4); - *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); - *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); - *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); - - // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 - return(*x1^*x2); -} +uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); /**@}*/ diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c index efde277203..4f65edd6d5 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c @@ -1293,7 +1293,7 @@ void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms, } granted_re = nb_rb_alloc * (12-crs_re); - pbch_pss_sss_re = adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol); + pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol); pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12); data_re = granted_re - pbch_pss_sss_re; llr_offset = data_re * dlsch0_harq->Qm * 2; diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c index 6afd028099..91de5386ae 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c @@ -837,7 +837,7 @@ int rx_pdsch(PHY_VARS_UE *ue, symbol, first_symbol_flag, nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } else if (codeword_TB0 == -1) { dlsch_qpsk_llr(frame_parms, @@ -846,7 +846,7 @@ int rx_pdsch(PHY_VARS_UE *ue, symbol, first_symbol_flag, nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { if (dlsch1_harq->Qm == 2) { @@ -856,7 +856,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -866,7 +866,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -877,7 +877,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -888,7 +888,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -899,7 +899,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -910,7 +910,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } @@ -925,7 +925,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[0], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128, beamforming_mode); } else if (codeword_TB0 == -1) { @@ -934,7 +934,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[1], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream, beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { @@ -946,7 +946,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -957,7 +957,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -969,7 +969,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -981,7 +981,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -993,7 +993,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1005,7 +1005,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } @@ -1021,7 +1021,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } else if (codeword_TB0 == -1) { @@ -1031,7 +1031,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { @@ -1043,7 +1043,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1054,7 +1054,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -1066,7 +1066,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1078,7 +1078,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -1090,7 +1090,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, (int16_t *)pllr_symbol_cw0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol]); if (rx_type==rx_IC_dual_stream) { @@ -1102,7 +1102,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], (int16_t *)pllr_symbol_cw1, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol]); } } @@ -1124,7 +1124,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->rxdataF_comp0, (int16_t *)pllr_symbol_cw0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } @@ -1137,7 +1137,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[0], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128, beamforming_mode); } @@ -1152,7 +1152,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c index 43f3b5451f..4c74377ef6 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c @@ -746,7 +746,7 @@ int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms, amp_tmp=amp_tmp<<1; // to compensate for >> 1 shift in modulation - pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL ,&rb_alloc,2,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,2,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { if (frame_parms->nb_antenna_ports_eNB!=1) @@ -981,7 +981,7 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,4,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,4,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp=0x1fff;//dlsch0->sqrt_rho_b; already taken into account @@ -1281,7 +1281,7 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account diff --git a/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c index 9427ec3a5b..1f9fb86f80 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c @@ -336,8 +336,8 @@ void generate_pucch1x(int32_t **txdataF, -static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline)); -static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) { +inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline)); +inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) { uint32_t x1, x2, s=0; int i; diff --git a/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h b/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h index c5d096ceb7..7ab795cae9 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h +++ b/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h @@ -1303,7 +1303,7 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL); int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode); int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); - +int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); #ifndef modOrder diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c index 9bbc61d4b6..fa1b6c955b 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c @@ -180,15 +180,13 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, /// CRC, coding, interleaving and rate matching AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n"); - unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32))); - bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); start_meas(dlsch_encoding_stats); - nr_dlsch_encoding(gNB, - harq->pdu, frame, slot, dlsch, frame_parms, output, - tinput,tprep,tparity,toutput, - dlsch_rate_matching_stats, - dlsch_interleaving_stats, - dlsch_segmentation_stats); + if (nr_dlsch_encoding(gNB, + harq->pdu, frame, slot, dlsch, frame_parms,tinput,tprep,tparity,toutput, + dlsch_rate_matching_stats, + dlsch_interleaving_stats, + dlsch_segmentation_stats) == -1) + return; stop_meas(dlsch_encoding_stats); #ifdef DEBUG_DLSCH printf("PDSCH encoding:\nPayload:\n"); @@ -200,7 +198,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, printf("\nEncoded payload:\n"); for (int i=0; i>3; i++) { for (int j=0; j<8; j++) - printf("%d", output[(i<<3)+j]); + printf("%d", harq->f[(i<<3)+j]); printf("\t"); } printf("\n"); @@ -213,7 +211,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, for (int q=0; qNrOfCodewords; q++) memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t)); for (int q=0; qNrOfCodewords; q++) - nr_pdsch_codeword_scrambling_optim(output, + nr_pdsch_codeword_scrambling_optim(harq->f, encoded_length, q, rel15->dataScramblingId, @@ -250,7 +248,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } #endif - start_meas(&gNB->dlsch_layer_mapping_stats); + /// Layer mapping nr_layer_mapping(mod_symbs, rel15->nrOfLayers, @@ -268,7 +266,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } #endif - stop_meas(&gNB->dlsch_layer_mapping_stats); /// Resource mapping // Non interleaved VRB to PRB mapping @@ -282,7 +279,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n", start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers); #endif - start_meas(&gNB->dlsch_resource_mapping_stats); + for (int ap=0; apnrOfLayers; ap++) { // DMRS params for this ap @@ -324,13 +321,20 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, dmrs_idx = (rel15->rbStart+rel15->BWPStart)*4; } } + } + + // Update l_prime in the case of double DMRS config + if ((dmrs_symbol_map & (1 << l))){ //DMRS time occasion if (l==(l_overline+1)) //take into account the double DMRS symbols l_prime = 1; else if (l>(l_overline+1)) {//new DMRS pair l_overline = l; l_prime = 0; } - /// DMRS QPSK modulation + } + + /// DMRS QPSK modulation + if (rel15->dlDmrsSymbPos & (1 << l)) { nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated #ifdef DEBUG_DLSCH @@ -351,143 +355,73 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, ptrs_symbol = is_ptrs_symbol(l,dlPtrsSymPos); if(ptrs_symbol) { /* PTRS QPSK Modulation for each OFDM symbol in a slot */ - printf("Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs); nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs); } } uint16_t k = start_sc; - if (ptrs_symbol || dmrs_symbol_map & (1 << l)) { + // Loop Over SCs: + for (int i=0; irbSize*NR_NB_SC_PER_RB; i++) { + /* check if cuurent RE is PTRS RE*/ + is_ptrs_re=0; + /* check for PTRS symbol and set flag for PTRS RE */ + if(ptrs_symbol){ + is_ptrs_re = is_ptrs_subcarrier(k, + rel15->rnti, + ap, + rel15->dmrsConfigType, + rel15->PTRSFreqDensity, + rel15->rbSize, + rel15->PTRSReOffset, + start_sc, + frame_parms->ofdm_symbol_size); + } - // Loop Over SCs: - for (int i=0; irbSize*NR_NB_SC_PER_RB; i++) { - /* check if cuurent RE is PTRS RE*/ - is_ptrs_re = 0; - if (ptrs_symbol) - is_ptrs_re = is_ptrs_subcarrier(k, - rel15->rnti, - ap, - rel15->dmrsConfigType, - rel15->PTRSFreqDensity, - rel15->rbSize, - rel15->PTRSReOffset, - start_sc, - frame_parms->ofdm_symbol_size); - /* Map DMRS Symbol */ - if ( (dmrs_symbol_map & (1 << l)) && - (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; + /* Map DMRS Symbol */ + if ( ( dmrs_symbol_map & (1 << l) ) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", - dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", + dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); #endif - dmrs_idx++; - k_prime++; - k_prime&=1; - n+=(k_prime)?0:1; - } - else if(is_ptrs_re){ - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15; + dmrs_idx++; + k_prime++; + k_prime&=1; + n+=(k_prime)?0:1; + } + /* Map PTRS Symbol */ + else if(is_ptrs_re){ + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d, mod_ptrs: %d %d\n", - ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)],mod_ptrs[ptrs_idx<<1],mod_ptrs[(ptrs_idx<<1)+1]); + printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", + ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); #endif - ptrs_idx++; - } + ptrs_idx++; + } /* Map DATA Symbol */ - else if( ptrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15; + else if( (!(dmrs_symbol_map & (1 << l))) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", - m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", + m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); #endif - m++; - } - /* mute RE */ - else { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; - } - if (++k >= frame_parms->ofdm_symbol_size) - k -= frame_parms->ofdm_symbol_size; - } //RE loop - } - else { // no PTRS or DMRS in this symbol - // Loop Over SCs: - int upper_limit=rel15->rbSize*NR_NB_SC_PER_RB; - int remaining_re = 0; - if (start_sc + upper_limit > frame_parms->ofdm_symbol_size) { - remaining_re = upper_limit + start_sc - frame_parms->ofdm_symbol_size; - upper_limit = frame_parms->ofdm_symbol_size - start_sc; - } - // fix the alignment issues later, use 64-bit SIMD below instead of 128. - if (0/*(frame_parms->N_RB_DL&1)==0*/) { - __m128i *txF=(__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)]; - - __m128i *txl = (__m128i*)&tx_layers[ap][m<<1]; - __m128i amp128=_mm_set1_epi16(amp); - for (int i=0; i<(upper_limit>>2); i++) { - txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); - } //RE loop, first part - m+=upper_limit; - if (remaining_re > 0) { - txF = (__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)]; - txl = (__m128i*)&tx_layers[ap][m<<1]; - for (int i=0; i<(remaining_re>>2); i++) { - txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); - } - } + m++; } + /* mute RE */ else { - __m64 *txF=(__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)]; - - __m64 *txl = (__m64*)&tx_layers[ap][m<<1]; - __m64 amp64=_mm_set1_pi16(amp); - for (int i=0; i<(upper_limit>>1); i++) { - - txF[i] = _mm_mulhrs_pi16(amp64,txl[i]); -#ifdef DEBUG_DLSCH_MAPPING - if ((i&1) > 0) - printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", - m, l, start_sc+(i>>1), txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1 + (2*txdataF_offset)]); -#endif - /* handle this, mute RE */ - /*else { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; - }*/ - } //RE loop, first part - m+=upper_limit; - if (remaining_re > 0) { - txF = (__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)]; - txl = (__m64*)&tx_layers[ap][m<<1]; - for (int i=0; i<(remaining_re>>1); i++) { - txF[i] = _mm_mulhrs_pi16(amp64,txl[i]); -#ifdef DEBUG_DLSCH_MAPPING - if ((i&1) > 0) - printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", - m, l, i>>1, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1 + (2*txdataF_offset)]); -#endif - /* handle this, mute RE */ - /*else { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; - }*/ - } //RE loop, second part - } // - m+=remaining_re; - } // N_RB_DL even - } // no DMRS/PTRS in symbol + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; + } + if (++k >= frame_parms->ofdm_symbol_size) + k -= frame_parms->ofdm_symbol_size; + } //RE loop } // symbol loop }// layer loop - stop_meas(&gNB->dlsch_resource_mapping_stats); ///Layer Precoding and Antenna port mapping // tx_layers 1-8 are mapped on antenna ports 1000-1007 @@ -496,9 +430,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, // pmi = prgs_list[rbidx/prg_size].pm_idx, rbidx =0,...,rbSize-1 // The Precoding matrix: // The Codebook Type I and Type II are not supported yet. - // We`adopt the precoding matrices of PUSCH for 4 layers. - start_meas(&gNB->dlsch_precoding_stats); - + // We adopt the precoding matrices of PUSCH for 4 layers. for (int ap=0; apnb_antennas_tx; ap++) { for (int l=rel15->StartSymbolIndex; lStartSymbolIndex+rel15->NrOfSymbols; l++) { @@ -573,7 +505,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } // symbol loop }// port loop - stop_meas(&gNB->dlsch_precoding_stats); dlsch->slot_tx[slot]=0; // TODO: handle precoding diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h index 77db12672f..181c2ab273 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h @@ -43,6 +43,8 @@ void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB); +uint16_t get_SLIV(uint8_t S, uint8_t L); + uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position); void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type); @@ -83,7 +85,6 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, uint8_t slot, NR_gNB_DLSCH_t *dlsch, NR_DL_FRAME_PARMS* frame_parms, - unsigned char * output, time_stats_t *tinput, time_stats_t *tprep, time_stats_t *tparity, diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c index 5620018b73..0bcd1e3e51 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c @@ -50,47 +50,70 @@ //#define DEBUG_DLSCH_FREE 1 -void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) { +void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) +{ int r; - NR_gNB_DLSCH_t *dlsch = *dlschptr; - uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated + NR_gNB_DLSCH_t *dlsch = *dlschptr; + + uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated if (dlsch) { + if (N_RB != 273) { a_segments = a_segments*N_RB; a_segments = a_segments/273 +1; } - + #ifdef DEBUG_DLSCH_FREE LOG_D(PHY,"Freeing dlsch %p\n",dlsch); #endif NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; - if (harq->b) { free16(harq->b, a_segments * 1056); harq->b = NULL; #ifdef DEBUG_DLSCH_FREE LOG_D(PHY, "Freeing harq->b (%p)\n", harq->b); #endif - } - + + if (harq->e) { + free16(harq->e, 14 * N_RB * 12 * 8); + harq->e = NULL; #ifdef DEBUG_DLSCH_FREE - LOG_D(PHY, "Freeing dlsch process %d c (%p)\n", i, harq->c); + printf("Freeing dlsch process %d e (%p)\n", i, harq->e); #endif - - for (r = 0; r < a_segments; r++) { + } + + if (harq->f) { + free16(harq->f, 14 * N_RB * 12 * 8); + harq->f = NULL; #ifdef DEBUG_DLSCH_FREE - LOG_D(PHY, "Freeing dlsch process %d c[%d] (%p)\n", i, r, harq->c[r]); + printf("Freeing dlsch process %d f (%p)\n", i, harq->f); #endif - - if (harq->c[r]) { - free16(harq->c[r], 1056); - harq->c[r] = NULL; + } + +#ifdef DEBUG_DLSCH_FREE + LOG_D(PHY, "Freeing dlsch process %d c (%p)\n", i, harq->c); +#endif + + for (r = 0; r < a_segments; r++) { +#ifdef DEBUG_DLSCH_FREE + LOG_D(PHY, "Freeing dlsch process %d c[%d] (%p)\n", i, r, harq->c[r]); +#endif + + if (harq->c[r]) { + free16(harq->c[r], 1056); + harq->c[r] = NULL; + } + if (harq->d[r]) { + free16(harq->d[r], 3 * 8448); + harq->d[r] = NULL; + } } } - free16(dlsch, sizeof(NR_gNB_DLSCH_t)); - *dlschptr = NULL; } + + free16(dlsch, sizeof(NR_gNB_DLSCH_t)); + *dlschptr = NULL; } NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, @@ -98,7 +121,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, unsigned char Mdlharq, uint32_t Nsoft, uint8_t abstraction_flag, - uint16_t N_RB) { + uint16_t N_RB) +{ unsigned char i,r,aa,layer; int re; uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated @@ -109,8 +133,10 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, } uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment + NR_gNB_DLSCH_t *dlsch = malloc16(sizeof(NR_gNB_DLSCH_t)); AssertFatal(dlsch, "cannot allocate dlsch\n"); + bzero(dlsch,sizeof(NR_gNB_DLSCH_t)); dlsch->Kmimo = Kmimo; dlsch->Mdlharq = Mdlharq; @@ -118,12 +144,11 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, dlsch->Nsoft = Nsoft; for (layer=0; layerue_spec_bf_weights[layer] = (int32_t **)malloc16(64*sizeof(int32_t *)); + dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*)); for (aa=0; aa<64; aa++) { dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t)); - - for (re=0; reue_spec_bf_weights[layer][aa][re] = 0x00007fff; } } @@ -135,8 +160,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, for (int q=0; qmod_symbs[q] = (int32_t *)malloc16(NR_MAX_PDSCH_ENCODED_LENGTH*sizeof(int32_t)); - dlsch->calib_dl_ch_estimates = (int32_t **)malloc16(64*sizeof(int32_t *)); - + dlsch->calib_dl_ch_estimates = (int32_t**)malloc16(64*sizeof(int32_t*)); for (aa=0; aa<64; aa++) { dlsch->calib_dl_ch_estimates[aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t)); } @@ -148,6 +172,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; bzero(harq, sizeof(NR_DL_gNB_HARQ_t)); + harq->b = malloc16(dlsch_bytes); AssertFatal(harq->b, "cannot allocate memory for harq->b\n"); harq->pdu = malloc16(dlsch_bytes); @@ -163,33 +188,71 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, // In section 5.3.2 in 38.212, the for loop is up to N + 2*Zc (maximum size of N is 66*Zc, therefore 68*Zc) harq->c[r] = malloc16(8448); AssertFatal(harq->c[r], "cannot allocate harq->c[%d]\n", r); + harq->d[r] = malloc16(68 * 384); + AssertFatal(harq->d[r], "cannot allocate harq->d[%d]\n", r); // max size for coded output bzero(harq->c[r], 8448); + bzero(harq->d[r], (3 * 8448)); } + harq->e = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); + AssertFatal(harq->e, "cannot allocate harq->e\n"); + bzero(harq->e, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); + harq->f = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); + AssertFatal(harq->f, "cannot allocate harq->f\n"); + bzero(harq->f, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); + return(dlsch); } -void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch) { +void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch) +{ + + unsigned char Mdlharq; + unsigned char i,j,r; + AssertFatal(dlsch!=NULL,"dlsch is null\n"); - unsigned char Mdlharq = dlsch->Mdlharq; + Mdlharq = dlsch->Mdlharq; dlsch->rnti = 0; dlsch->active = 0; - for (int i=0; i<10; i++) { + NR_DL_gNB_HARQ_t *harq=&dlsch->harq_process; + + for (i=0; i<10; i++) { dlsch->harq_ids[0][i] = Mdlharq; dlsch->harq_ids[1][i] = Mdlharq; } + for (i=0; id[r]) + harq->d[r][j] = NR_NULL; + } } -void ldpc8blocks( void *p) { - encoder_implemparams_t *impp=(encoder_implemparams_t *) p; - NR_DL_gNB_HARQ_t *harq = (NR_DL_gNB_HARQ_t *)impp->harq; - uint16_t Kr= impp->K; +int nr_dlsch_encoding(PHY_VARS_gNB *gNB, + unsigned char *a, + int frame, + uint8_t slot, + NR_gNB_DLSCH_t *dlsch, + NR_DL_FRAME_PARMS* frame_parms, + time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput, + time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats, + time_stats_t *dlsch_segmentation_stats) +{ + + unsigned int G; + unsigned int crc=1; + NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15; - uint8_t mod_order = rel15->qamModOrder[0]; uint16_t nb_rb = rel15->rbSize; uint8_t nb_symb_sch = rel15->NrOfSymbols; - uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); - uint32_t A = rel15->TBSize[0]<<3; + uint32_t A, Kb, F=0; + uint32_t *Zc = &dlsch->harq_process.Z; + uint8_t mod_order = rel15->qamModOrder[0]; + uint16_t Kr=0,r; + uint32_t r_offset=0; + uint32_t E; + uint8_t Ilbrm = 1; + uint32_t Tbslbrm = 950984; //max tbs uint8_t nb_re_dmrs; if (rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1) @@ -197,115 +260,24 @@ void ldpc8blocks( void *p) { else nb_re_dmrs = 4*rel15->numDmrsCdmGrpsNoData; - unsigned int G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15->nrOfLayers); - LOG_D(PHY,"dlsch coding A %d Kr %d G %d (nb_rb %d, nb_symb_sch %d, nb_re_dmrs %d, length_dmrs %d, mod_order %d)\n", - A,impp->K,G, nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs,(int)mod_order); - // nrLDPC_encoder output is in "d" - // let's make this interface happy! - uint8_t tmp[8][68 * 384]__attribute__((aligned(32))); - for (int rr=impp->macro_num*8, i=0; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++,i++ ) - impp->d[rr]=tmp[i]; - nrLDPC_encoder(harq->c,impp->d,*impp->Zc, impp->Kb,Kr,impp->BG,impp); - // Compute where to place in output buffer that is concatenation of all segments - uint32_t r_offset=0; - for (int i=0; i < impp->macro_num*8; i++ ) - r_offset+=nr_get_E(G, impp->n_segments, mod_order, rel15->nrOfLayers, i); - for (int rr=impp->macro_num*8; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++ ) { - if (impp->F>0) { - // writing into positions d[r][k-2Zc] as in clause 5.3.2 step 2) in 38.212 - memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], impp->F, NR_NULL); - } - -#ifdef DEBUG_DLSCH_CODING - LOG_D(PHY,"rvidx in encoding = %d\n", rel15->rvIndex[0]); -#endif - uint32_t E = nr_get_E(G, impp->n_segments, mod_order, rel15->nrOfLayers, rr); - //#ifdef DEBUG_DLSCH_CODING - LOG_D(NR_PHY,"Rate Matching, Code segment %d/%d (coded bits (G) %u, E %d, Filler bits %d, Filler offset %d mod_order %d, nb_rb %d)...\n", - rr, - impp->n_segments, - G, - E, - impp->F, - Kr-impp->F-2*(*impp->Zc), - mod_order,nb_rb); - // for tbslbrm calculation according to 5.4.2.1 of 38.212 - uint8_t Nl = 4; - - if (rel15->nrOfLayers < Nl) - Nl = rel15->nrOfLayers; - - uint32_t Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl); - uint8_t Ilbrm = 1; - - uint8_t e[E]; - bzero (e, E); - nr_rate_matching_ldpc(Ilbrm, - Tbslbrm, - impp->BG, - *impp->Zc, - impp->d[rr], - e, - impp->n_segments, - impp->F, - Kr-impp->F-2*(*impp->Zc), - rel15->rvIndex[0], - E); -#ifdef DEBUG_DLSCH_CODING - - for (int i =0; i<16; i++) - printf("output ratematching e[%d]= %d r_offset %u\n", i,harq->e[i+r_offset], r_offset); - -#endif - nr_interleaving_ldpc(E, - mod_order, - e, - impp->output+r_offset); -#ifdef DEBUG_DLSCH_CODING - - for (int i =0; i<16; i++) - printf("output interleaving f[%d]= %d r_offset %u\n", i,impp->output[i+r_offset], r_offset); - - if (r==impp->n_segments-1) - write_output("enc_output.m","enc",impp->output,G,1,4); - -#endif - r_offset += E; - } -} - -int nr_dlsch_encoding(PHY_VARS_gNB *gNB, - unsigned char *a, - int frame, - uint8_t slot, - NR_gNB_DLSCH_t *dlsch, - NR_DL_FRAME_PARMS *frame_parms, - unsigned char * output, - time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput, - time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats, - time_stats_t *dlsch_segmentation_stats) { - encoder_implemparams_t impp; - impp.output=output; - unsigned int crc=1; - NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; - nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15; - impp.Zc = &dlsch->harq_process.Z; + uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); + uint16_t R=rel15->targetCodeRate[0]; float Coderate = 0.0; - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_IN); - uint32_t A = rel15->TBSize[0]<<3; + uint8_t Nl = 4; + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_IN); + + A = rel15->TBSize[0]<<3; if ( dlsch->rnti != SI_RNTI ) - trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, dlsch->rnti, frame, slot,0, 0); + trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, dlsch->rnti, frame, slot,0, 0); NR_gNB_SCH_STATS_t *stats=NULL; int first_free=-1; - - for (int i=0; idlsch_stats[i].rnti == 0 && first_free == -1) { first_free = i; stats=&gNB->dlsch_stats[i]; } - if (gNB->dlsch_stats[i].rnti == dlsch->rnti) { stats=&gNB->dlsch_stats[i]; break; @@ -318,94 +290,181 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, stats->current_RI = rel15->nrOfLayers; stats->current_Qm = rel15->qamModOrder[0]; } + G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15->nrOfLayers); + + LOG_D(PHY,"dlsch coding A %d G %d (nb_rb %d, nb_symb_sch %d, nb_re_dmrs %d, length_dmrs %d, mod_order %d)\n", + A,G, nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs,(int)mod_order); if (A > 3824) { // Add 24-bit crc (polynomial A) to payload crc = crc24a(a,A)>>8; - a[A>>3] = ((uint8_t *)&crc)[2]; - a[1+(A>>3)] = ((uint8_t *)&crc)[1]; - a[2+(A>>3)] = ((uint8_t *)&crc)[0]; + a[A>>3] = ((uint8_t*)&crc)[2]; + a[1+(A>>3)] = ((uint8_t*)&crc)[1]; + a[2+(A>>3)] = ((uint8_t*)&crc)[0]; //printf("CRC %x (A %d)\n",crc,A); //printf("a0 %d a1 %d a2 %d\n", a[A>>3], a[1+(A>>3)], a[2+(A>>3)]); + harq->B = A+24; // harq->b = a; + AssertFatal((A / 8) + 4 <= MAX_NR_DLSCH_PAYLOAD_BYTES, "A %d is too big (A/8+4 = %d > %d)\n", A, (A / 8) + 4, MAX_NR_DLSCH_PAYLOAD_BYTES); + memcpy(harq->b, a, (A / 8) + 4); // why is this +4 if the CRC is only 3 bytes? - } else { + } + else { // Add 16-bit crc (polynomial A) to payload crc = crc16(a,A)>>16; - a[A>>3] = ((uint8_t *)&crc)[1]; - a[1+(A>>3)] = ((uint8_t *)&crc)[0]; + a[A>>3] = ((uint8_t*)&crc)[1]; + a[1+(A>>3)] = ((uint8_t*)&crc)[0]; //printf("CRC %x (A %d)\n",crc,A); //printf("a0 %d a1 %d \n", a[A>>3], a[1+(A>>3)]); + harq->B = A+16; // harq->b = a; + AssertFatal((A / 8) + 3 <= MAX_NR_DLSCH_PAYLOAD_BYTES, "A %d is too big (A/8+3 = %d > %d)\n", A, (A / 8) + 3, MAX_NR_DLSCH_PAYLOAD_BYTES); + memcpy(harq->b, a, (A / 8) + 3); // using 3 bytes to mimic the case of 24 bit crc } - - if (rel15->targetCodeRate[0]<1000) - Coderate = (float)rel15->targetCodeRate[0] /(float) 1024; + if (R<1000) + Coderate = (float) R /(float) 1024; else // to scale for mcs 20 and 26 in table 5.1.3.1-2 which are decimal and input 2* in nr_tbs_tools - Coderate = (float)rel15->targetCodeRate[0] /(float) 2048; + Coderate = (float) R /(float) 2048; if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25) - impp.BG = 2; + harq->BG = 2; else - impp.BG = 1; + harq->BG = 1; start_meas(dlsch_segmentation_stats); - impp.Kb = nr_segmentation(harq->b, harq->c, harq->B, &impp.n_segments, &impp.K, impp.Zc, &impp.F, impp.BG); + Kb = nr_segmentation(harq->b, harq->c, harq->B, &harq->C, &harq->K, Zc, &harq->F, harq->BG); stop_meas(dlsch_segmentation_stats); + F = harq->F; - for (int r=0; rK; +#ifdef DEBUG_DLSCH_CODING + uint16_t Kr_bytes; + Kr_bytes = Kr>>3; +#endif + + //printf("segment Z %d k %d Kr %d BG %d C %d\n", *Zc,harq->K,Kr,BG,harq->C); + + for (r=0; rC; r++) { //d_tmp[r] = &harq->d[r][0]; //channel_input[r] = &harq->d[r][0]; #ifdef DEBUG_DLSCH_CODING - LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, impp->F); - LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,impp.n_segments); + LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, harq->F); + LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,harq->C); LOG_D(PHY,"input %d %d %d %d %d \n", harq->c[r][0], harq->c[r][1], harq->c[r][2],harq->c[r][3], harq->c[r][4]); - - for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++) { + for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++){ LOG_D(PHY,"%d ", harq->c[r][cnt]); } - LOG_D(PHY,"\n"); + #endif //ldpc_encoder_orig((unsigned char*)harq->c[r],harq->d[r],*Zc,Kb,Kr,BG,0); //ldpc_encoder_optim((unsigned char*)harq->c[r],(unsigned char*)&harq->d[r][0],*Zc,Kb,Kr,BG,NULL,NULL,NULL,NULL); } - + encoder_implemparams_t impp; + impp.n_segments=harq->C; impp.tprep = tprep; impp.tinput = tinput; impp.tparity = tparity; impp.toutput = toutput; - impp.harq=harq; - notifiedFIFO_t nf; - initNotifiedFIFO(&nf); - int nbJobs=0; - for(int j=0; j<(impp.n_segments/8+((impp.n_segments&7)==0 ? 0 : 1)); j++) { - notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(impp), j, &nf, ldpc8blocks); - encoder_implemparams_t* perJobImpp=(encoder_implemparams_t*)NotifiedFifoData(req); - *perJobImpp=impp; - perJobImpp->macro_num=j; - pushTpool(gNB->threadPool,req); - nbJobs++; + for(int j=0;j<(harq->C/8+1);j++) { + impp.macro_num=j; + nrLDPC_encoder(harq->c,harq->d,*Zc,Kb,Kr,harq->BG,&impp); } - while(nbJobs) { - notifiedFIFO_elt_t *req=pullTpool(&nf, gNB->threadPool); - delNotifiedFIFO_elt(req); - nbJobs--; + +#ifdef DEBUG_DLSCH_CODING + write_output("enc_input0.m","enc_in0",&harq->c[0][0],Kr_bytes,1,4); + write_output("enc_output0.m","enc0",&harq->d[0][0],(3*8*Kr_bytes)+12,1,4); +#endif + + F = harq->F; + + Kr = harq->K; + for (r=0; rC; r++) { + + if (F>0) { + for (int k=(Kr-F-2*(*Zc)); kd[r][k] = NR_NULL; + //if (k<(Kr-F+8)) + //printf("r %d filler bits [%d] = %d \n", r,k, harq->d[r][k]); + } + } + +#ifdef DEBUG_DLSCH_CODING + LOG_D(PHY,"rvidx in encoding = %d\n", rel15->rvIndex[0]); +#endif + + E = nr_get_E(G, harq->C, mod_order, rel15->nrOfLayers, r); + + //#ifdef DEBUG_DLSCH_CODING + LOG_D(NR_PHY,"Rate Matching, Code segment %d/%d (coded bits (G) %u, E %d, Filler bits %d, Filler offset %d mod_order %d, nb_rb %d)...\n", + r, + harq->C, + G, + E, + F, + Kr-F-2*(*Zc), + mod_order,nb_rb); + + // for tbslbrm calculation according to 5.4.2.1 of 38.212 + if (rel15->nrOfLayers < Nl) + Nl = rel15->nrOfLayers; + + Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl); + + start_meas(dlsch_rate_matching_stats); + if (nr_rate_matching_ldpc(Ilbrm, + Tbslbrm, + harq->BG, + *Zc, + harq->d[r], + harq->e+r_offset, + harq->C, + F, + Kr-F-2*(*Zc), + rel15->rvIndex[0], + E) == -1) + return -1; + + stop_meas(dlsch_rate_matching_stats); +#ifdef DEBUG_DLSCH_CODING + for (int i =0; i<16; i++) + printf("output ratematching e[%d]= %d r_offset %u\n", i,harq->e[i+r_offset], r_offset); +#endif + + start_meas(dlsch_interleaving_stats); + nr_interleaving_ldpc(E, + mod_order, + harq->e+r_offset, + harq->f+r_offset); + stop_meas(dlsch_interleaving_stats); + +#ifdef DEBUG_DLSCH_CODING + for (int i =0; i<16; i++) + printf("output interleaving f[%d]= %d r_offset %u\n", i,harq->f[i+r_offset], r_offset); + + if (r==harq->C-1) + write_output("enc_output.m","enc",harq->f,G,1,4); +#endif + + r_offset += E; } + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_OUT); + return 0; } diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c index 26b45eb9f7..3ba13d2f44 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c @@ -96,6 +96,11 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config, } } + +uint16_t get_SLIV(uint8_t S, uint8_t L) { + return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) ); +} + static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) { return ( (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A)|| (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C)? 0 : diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index c4b40ec4cc..1ce8c238cb 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -376,11 +376,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, len = (pilots==1)? ((config_type==NFAPI_NR_DMRS_TYPE1)?nb_rb*(12-6*dlsch0_harq->n_dmrs_cdm_groups): nb_rb*(12-4*dlsch0_harq->n_dmrs_cdm_groups)):(nb_rb*12); stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", - frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else - LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", + +#ifdef DEBUG_PDSCH_RX + LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif @@ -399,11 +397,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, nb_rb_pdsch); stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else - LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + +#ifdef DEBUG_PDSCH_RX + LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif + start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); if (first_symbol_flag==1) { if (beamforming_mode==0){ @@ -460,10 +458,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #endif stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else - LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + +#ifdef DEBUG_PDSCH_RX + LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); @@ -512,11 +509,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else - LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + +#ifdef DEBUG_PDSCH_RX + LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif + start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); if (frame_parms->nb_antennas_rx > 1) { @@ -571,11 +568,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else - LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + +#ifdef DEBUG_PDSCH_RX + LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif + start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); /* Store the valid DL RE's */ pdsch_vars[gNB_id]->dl_valid_re[symbol-1] = len; @@ -654,10 +651,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); -#if DISABLE_LOG_X - printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); -#else - LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + +#ifdef DEBUG_PDSCH_RX + LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif // Please keep it: useful for debugging diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c index 7c75884fa6..a064a91d87 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c @@ -947,7 +947,7 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h index 3cb002f9e1..0ab17c11e6 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h @@ -1286,8 +1286,8 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti); */ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL); -//int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -//int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); +int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); +int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); #ifndef modOrder @@ -1313,6 +1313,16 @@ uint8_t I_TBS2I_MCS(uint8_t I_TBS); uint8_t SE2I_TBS(float SE, uint8_t N_PRB, uint8_t symbPerRB); +/** \brief This function generates the sounding reference symbol (SRS) for the uplink according to 36.211 v8.6.0. If IFFT_FPGA is defined, the SRS is quantized to a QPSK sequence. + @param frame_parms LTE DL Frame Parameters + @param soundingrs_ul_config_dedicated Dynamic configuration from RRC during Connection Establishment + @param txdataF pointer to the frequency domain TX signal + @returns 0 on success*/ +int generate_srs(NR_DL_FRAME_PARMS *frame_parms, + SOUNDINGRS_UL_CONFIG_DEDICATED *soundingrs_ul_config_dedicated, + int *txdataF, + int16_t amp, + uint32_t subframe); /*! @@ -1342,6 +1352,12 @@ int32_t generate_drs_pusch(PHY_VARS_NR_UE *phy_vars_ue, uint32_t nb_rb, uint8_t ant); +/*! + \brief This function initializes the Group Hopping, Sequence Hopping and nPRS sequences for PUCCH/PUSCH according to 36.211 v8.6.0. It should be called after configuration of UE (reception of SIB2/3) and initial configuration of eNB (or after reconfiguration of cell-specific parameters). + @param frame_parms Pointer to a NR_DL_FRAME_PARMS structure (eNB or UE)*/ +void init_ul_hopping(NR_DL_FRAME_PARMS *frame_parms); + + /*! \brief This function implements the initialization of paging parameters for UE (See Section 7, 36.304).It must be called after setting IMSImod1024 during UE startup and after receiving SIB2 @param ue Pointer to UE context @@ -1406,6 +1422,8 @@ double sinr_eff_cqi_calc(PHY_VARS_NR_UE *phy_vars_ue, uint8_t sinr2cqi(double sinr,uint8_t trans_mode); +int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci); + int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm); void init_transport_channels(uint8_t); @@ -1495,11 +1513,18 @@ int get_nCCE_offset_l1(int *CCE_table, const unsigned short rnti, const unsigned char subframe); +uint16_t get_nCCE(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi); -//uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe); +uint16_t get_nquad(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi); + +uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe); uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe); +uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe); + +void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi); + void nr_pdcch_unscrambling(int16_t *z, uint16_t scrambling_RNTI, uint32_t length, @@ -1514,6 +1539,7 @@ void dlsch_unscrambling(NR_DL_FRAME_PARMS *frame_parms, uint8_t q, uint8_t Ns); +void init_ncs_cell(NR_DL_FRAME_PARMS *frame_parms,uint8_t ncs_cell[20][7]); void generate_pucch1x(int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, @@ -1561,7 +1587,7 @@ void init_ulsch_power_LUT(void); @param subframe subframe index to check @returns 0 on success */ -//int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe); +int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe); /*! \brief Generate PRACH waveform @@ -1627,6 +1653,8 @@ void init_scrambling_lut(void); @param frame_parms Pointer to frame parameters @returns 1 if subframe is for MBSFN */ +int is_pmch_subframe(frame_t frame, int subframe, NR_DL_FRAME_PARMS *frame_parms); + uint8_t is_not_pilot(uint8_t pilots, uint8_t re, uint8_t nushift, uint8_t use2ndpilots); uint8_t is_not_UEspecRS(int8_t lprime, uint8_t re, uint8_t nushift, uint8_t Ncp, uint8_t beamforming_mode); @@ -1663,7 +1691,8 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms, uint8_t n_ra_prboffset, uint8_t tdd_mapindex, uint16_t Nf); -#include + +uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c index 914523bc70..99dc2b658e 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c @@ -105,8 +105,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5]; int16_t **tx_layers; int32_t **txdataF; - int8_t Wf[2], Wt[2]; - int l_prime[2], delta; + int8_t Wf[2], Wt[2], l_prime[2], delta; uint8_t nb_dmrs_re_per_rb; int ap, i; int sample_offsetF, N_RE_prime; @@ -412,7 +411,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, if (is_dmrs == 1) { // if transform precoding is enabled if (pusch_pdu->transform_precoding == 0) { - + ((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15; ((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15; diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index ddec605253..cb929f1642 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -805,8 +805,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue, } #endif //0 -static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline)); -static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) { +inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline)); +inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) { uint32_t x1, x2, s=0; int i; uint8_t c; diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index fb4f9a0092..11b5112a6c 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -96,6 +96,20 @@ typedef struct { uint32_t subframe; /// MIMO mode for this DLSCH MIMO_mode_t mimo_mode; + /// Concatenated sequences + uint8_t *e; + /// LDPC-code outputs + uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS]; + /// Interleaver outputs + uint8_t *f; + /// Number of code segments + uint32_t C; + /// Number of bits in "small" code segments + uint32_t K; + /// Number of "Filler" bits + uint32_t F; + /// Encoder BG + uint8_t BG; /// LDPC lifting size uint32_t Z; } NR_DL_gNB_HARQ_t; @@ -854,9 +868,6 @@ typedef struct PHY_VARS_gNB_s { time_stats_t dlsch_encoding_stats; time_stats_t dlsch_modulation_stats; time_stats_t dlsch_scrambling_stats; - time_stats_t dlsch_resource_mapping_stats; - time_stats_t dlsch_layer_mapping_stats; - time_stats_t dlsch_precoding_stats; time_stats_t tinput; time_stats_t tprep; time_stats_t tparity; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 792667d510..1685e206ae 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -263,7 +263,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) { nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0,0); //dumpsig=1; } else { - LOG_D(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n", + LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n", gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot, rdata->harq_pid, pusch_pdu->pusch_data.new_data_indicator, ulsch_harq->status, ulsch_harq->round, @@ -358,11 +358,10 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs pusch_pdu->qam_mod_order, pusch_pdu->nrOfLayers); - LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, dmrs symbol positions %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n", + LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n", pusch_pdu->rb_size, number_symbols, nb_re_dmrs, - pusch_pdu->ul_dmrs_symb_pos, number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs pusch_pdu->qam_mod_order, pusch_pdu->nrOfLayers); diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 5007f19063..fb36b3ee86 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -1022,14 +1022,14 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch0->harq_processes[harq_pid]->TBS, dlsch0->harq_processes[harq_pid]->TBS / 8); - - - stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); - LOG_D(PHY, " --> Unscrambling for CW0 %5.3f\n", + +#ifdef NR_PDSCH_DEBUG + LOG_I(PHY, " --> Unscrambling for CW0 %5.3f\n", (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); - LOG_D(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n", + LOG_I(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); +#endif if(is_cw1_active) { // start ldpc decode for CW 1 @@ -1081,13 +1081,21 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, LOG_T(PHY,"CWW sequential dlsch decoding, ret1 = %d\n", ret1); } + stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); - stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); - +#if PHYSIM + printf(" --> Unscrambling for CW1 %5.3f\n", + (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); + printf("AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", + frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); +#else LOG_D(PHY, " --> Unscrambling for CW1 %5.3f\n", (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); +#endif + + LOG_D(PHY,"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); @@ -1396,6 +1404,7 @@ void *UE_thread_slot1_dl_processing(void *arg) { stop_meas(&ue->ue_front_end_per_slot_stat[proc->thread_id][1]); + LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_slot_rx,ue->ue_front_end_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0)); @@ -1486,6 +1495,7 @@ void *UE_thread_slot1_dl_processing(void *arg) { //printf("Set available LLR slot1 to 1 AbsSubframe %d.%d \n",frame_rx,nr_slot_rx); stop_meas(&ue->pdsch_procedures_per_slot_stat[proc->thread_id][1]); + LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,nr_slot_rx,ue->pdsch_procedures_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0)); if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) { @@ -1861,6 +1871,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, dlsch_parallel); stop_meas(&ue->dlsch_procedures_stat[proc->thread_id]); + LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0)); LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0)); @@ -1938,6 +1949,7 @@ if (nr_slot_rx==9) { } stop_meas(&ue->generic_stat); + LOG_D(PHY,"after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0)); #ifdef EMOS phy_procedures_emos_UE_RX(ue,slot,gNB_id); @@ -1947,6 +1959,7 @@ phy_procedures_emos_UE_RX(ue,slot,gNB_id); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT); stop_meas(&ue->phy_proc_rx[proc->thread_id]); + LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0)); //#endif //pdsch diff --git a/openair1/SIMULATION/NR_PHY/dlschsim.c b/openair1/SIMULATION/NR_PHY/dlschsim.c index ff07422c6b..1d9584b30b 100644 --- a/openair1/SIMULATION/NR_PHY/dlschsim.c +++ b/openair1/SIMULATION/NR_PHY/dlschsim.c @@ -118,8 +118,7 @@ int main(int argc, char **argv) uint8_t mcs_table = 0; double DS_TDL = .03; cpuf = get_cpu_freq_GHz(); - char gNBthreads[128]="n"; - + if (load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY) == 0) { exit_fun("[NR_DLSCHSIM] Error, configuration module init failed\n"); } @@ -127,7 +126,7 @@ int main(int argc, char **argv) //logInit(); randominit(0); - while ((c = getopt(argc, argv, "df:hpVg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:X:")) != -1) { + while ((c = getopt(argc, argv, "df:hpVg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:")) != -1) { switch (c) { /*case 'f': write_output_file = 1; @@ -293,11 +292,6 @@ int main(int argc, char **argv) nb_rb = atoi(optarg); break; - case 'X': - strncpy(gNBthreads, optarg, sizeof(gNBthreads)); - gNBthreads[sizeof(gNBthreads)-1]=0; - break; - /*case 'x': transmission_mode = atoi(optarg); break;*/ @@ -358,8 +352,6 @@ int main(int argc, char **argv) RC.gNB = (PHY_VARS_gNB **) malloc(sizeof(PHY_VARS_gNB *)); RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB)); gNB = RC.gNB[0]; - gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); - initTpool(gNBthreads, gNB->threadPool, true); //gNB_config = &gNB->gNB_config; frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH) frame_parms->nb_antennas_tx = n_tx; @@ -476,6 +468,7 @@ int main(int argc, char **argv) double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384); // [hna] 16 segments, 68*Zc short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384); short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384); + double errors_bit_uncoded = 0; //unsigned char *estimated_output; unsigned char *estimated_output_bit; unsigned char *test_input_bit; @@ -513,10 +506,8 @@ int main(int argc, char **argv) //printf("crc32: [0]->0x%08x\n",crc24c(test_input, 32)); // generate signal - unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32))); - bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); if (input_fd == NULL) { - nr_dlsch_encoding(gNB, test_input, frame, slot, dlsch, frame_parms,output,NULL,NULL,NULL,NULL,NULL,NULL,NULL); + nr_dlsch_encoding(gNB, test_input, frame, slot, dlsch, frame_parms,NULL,NULL,NULL,NULL,NULL,NULL,NULL); } for (SNR = snr0; SNR < snr1; SNR += snr_step) { @@ -524,6 +515,7 @@ int main(int argc, char **argv) n_false_positive = 0; for (trial = 0; trial < n_trials; trial++) { + errors_bit_uncoded = 0; for (i = 0; i < available_bits; i++) { #ifdef DEBUG_CODER if ((i&0xf)==0) @@ -532,12 +524,11 @@ int main(int argc, char **argv) //if (i<16) // printf("encoder output f[%d] = %d\n",i,dlsch->harq_processes[0]->f[i]); - - if (output[i] == 0) + if (dlsch->harq_process.f[i] == 0) modulated_input[i] = 1.0; ///sqrt(2); //QPSK else modulated_input[i] = -1.0; ///sqrt(2); - + //if (i<16) printf("modulated_input[%d] = %d\n",i,modulated_input[i]); //SNR =10; SNR_lin = pow(10, SNR / 10.0); @@ -555,14 +546,18 @@ int main(int argc, char **argv) i,modulated_input[i], i,channel_output_fixed[i]); */ - //Uncoded BER if (channel_output_fixed[i] < 0) channel_output_uncoded[i] = 1; //QPSK demod else channel_output_uncoded[i] = 0; + + if (channel_output_uncoded[i] != dlsch->harq_process.f[i]) + errors_bit_uncoded = errors_bit_uncoded + 1; } + //if (errors_bit_uncoded>10) + //printf("errors bits uncoded %f\n", errors_bit_uncoded); #ifdef DEBUG_CODER printf("\n"); exit(-1); diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index fa868a6896..50e21ac02b 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -277,7 +277,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, UE_info->CellGroup[0], sched_ctrl->active_bwp, NULL, - /* tda = */ 0, + /* tda = */ 2, dci_format, ps); @@ -369,7 +369,6 @@ int main(int argc, char **argv) uint8_t n_tx=1,n_rx=1; uint8_t round; uint8_t num_rounds = 4; - char gNBthreads[128]="n"; channel_desc_t *gNB2UE; //uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0; @@ -431,7 +430,9 @@ int main(int argc, char **argv) FILE *scg_fd=NULL; - while ((c = getopt (argc, argv, "f:hA:pf:g:in:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:d:e:m:w:T:U:qX:")) != -1) { + + while ((c = getopt (argc, argv, "f:hA:pf:g:in:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:D:e:m:w:T:U:q")) != -1) { + switch (c) { case 'f': scg_fd = fopen(optarg,"r"); @@ -634,12 +635,7 @@ int main(int argc, char **argv) dmrs_arg[i] = atoi(argv[optind++]); } break; - - case 'X': - strncpy(gNBthreads, optarg, sizeof(gNBthreads)); - gNBthreads[sizeof(gNBthreads)-1]=0; - break; - + default: case 'h': printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", @@ -675,8 +671,7 @@ int main(int argc, char **argv) printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2} DMRS ConfType{1:2}, e.g. -U 3 0 2 1 \n"); printf("-P Print DLSCH performances\n"); printf("-w Write txdata to binary file (one frame)\n"); - printf("-d number of dlsch threads, 0: no dlsch parallelization\n"); - printf("-X gNB thread pool configuration, n => no threads"); + printf("-D number of dlsch threads, 0: no dlsch parallelization\n"); exit (-1); break; } @@ -767,7 +762,7 @@ int main(int argc, char **argv) NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup)); prepare_scc(rrc.carrier.servingcellconfigcommon); uint64_t ssb_bitmap = 1; - fill_scc_sim(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); + fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); ssb_bitmap = 1;// Enable only first SSB with index ssb_indx=0 fix_scc(scc,ssb_bitmap); @@ -832,14 +827,6 @@ int main(int argc, char **argv) fs = 61.44e6; bw = 40e6; } - else if (mu == 1 && N_RB_DL == 133) { - fs = 61.44e6; - bw = 50e6; - } - else if (mu == 1 && N_RB_DL == 162) { - fs = 61.44e6; - bw = 60e6; - } else if (mu == 3 && N_RB_DL == 66) { fs = 122.88e6; bw = 100e6; @@ -979,7 +966,8 @@ int main(int argc, char **argv) snrRun = 0; gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); - initTpool(gNBthreads, gNB->threadPool, true); + char tp_param[] = "n"; + initTpool(tp_param, gNB->threadPool, true); gNB->resp_L1_tx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); initNotifiedFIFO(gNB->resp_L1_tx); // we create 2 threads for L1 tx processing @@ -1229,8 +1217,8 @@ int main(int argc, char **argv) UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1) n_errors++; - //NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id]; - //int16_t *UE_llr = pdsch_vars[0]->llr[0]; + NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id]; + int16_t *UE_llr = pdsch_vars[0]->llr[0]; TBS = UE_harq_process->TBS;//rel15->TBSize[0]; uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); @@ -1245,7 +1233,6 @@ int main(int argc, char **argv) printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) ); } - /* for (i = 0; i < available_bits; i++) { if(((gNB_dlsch->harq_process.f[i] == 0) && (UE_llr[i] <= 0)) || @@ -1259,7 +1246,6 @@ int main(int argc, char **argv) } } - */ for (i = 0; i < TBS; i++) { estimated_output_bit[i] = (UE_harq_process->b[i/8] & (1 << (i & 7))) >> (i & 7); @@ -1303,9 +1289,11 @@ int main(int argc, char **argv) printf("\n"); if (print_perf==1) { - printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d)\n", + printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))\n", 1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex, - msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3); + msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3, + msgDataTx->dlsch[0][0]->harq_process.K, + msgDataTx->dlsch[0][0]->harq_process.K/((msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3)>3824?22:10)); printDistribution(gNB->phy_proc_tx_0,table_tx,"PHY proc tx"); printStatIndent2(&gNB->dlsch_encoding_stats,"DLSCH encoding time"); printStatIndent3(&gNB->dlsch_segmentation_stats,"DLSCH segmentation time"); @@ -1317,9 +1305,6 @@ int main(int argc, char **argv) printStatIndent3(&gNB->dlsch_interleaving_stats, "DLSCH Interleaving time"); printStatIndent2(&gNB->dlsch_modulation_stats,"DLSCH modulation time"); printStatIndent2(&gNB->dlsch_scrambling_stats, "DLSCH scrambling time"); - printStatIndent2(&gNB->dlsch_layer_mapping_stats, "DLSCH Layer Mapping time"); - printStatIndent2(&gNB->dlsch_resource_mapping_stats, "DLSCH Resource Mapping time"); - printStatIndent2(&gNB->dlsch_precoding_stats,"DLSCH Layer Precoding time"); printf("\nUE RX function statistics (per %d us slot)\n",1000>>*scc->ssbSubcarrierSpacing); diff --git a/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h b/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h index 805913d055..8d4acd1af1 100644 --- a/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h +++ b/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h @@ -59,7 +59,167 @@ int oai_nfapi_rach_ind(nfapi_rach_indication_t *rach_ind) {return(0);} //NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);} int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0); } -void fill_scc_sim(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul); + +void fill_scc(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul) { + + *scc->physCellId=0; \ + // *scc->n_TimingAdvanceOffset=NR_ServingCellConfigCommon__n_TimingAdvanceOffset_n0; + *scc->ssb_periodicityServingCell=NR_ServingCellConfigCommon__ssb_periodicityServingCell_ms20; + scc->dmrs_TypeA_Position=NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; + *scc->ssbSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; + *scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=641032; + *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78; + scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=640000; + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; + + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL; + scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036; + scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=mu_dl;//NR_SubcarrierSpacing_kHz30; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0=0; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=40; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0=0; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=53; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0=0; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength=54; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->k0=-1; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength=54; + *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]=78; + *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA=-1; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_UL; + *scc->uplinkConfigCommon->frequencyInfoUL->p_Max=20; + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth=13036; + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing=mu_ul;//NR_SubcarrierSpacing_kHz30; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex=98; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM=NR_RACH_ConfigGeneric__msg1_FDM_one; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart=0; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig=13; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower=-118; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax=NR_RACH_ConfigGeneric__preambleTransMax_n10; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep=NR_RACH_ConfigGeneric__powerRampingStep_dB2; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow=NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer=NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64; + *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB=19; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2=6; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2=6; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=69; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2=6; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->k2=33; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength=55; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble=1; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant=-90; + scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping=NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither; + *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId=40; + *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal=-90; + scc->ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap; + *ssb_bitmap=0xff; + scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots=7; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols=6; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots=2; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols=4; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity=321; + + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSymbols=-1; + scc->ss_PBCH_BlockPower=20; + *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing=-1; +} + void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap); void prepare_scc(NR_ServingCellConfigCommon_t *scc); void prepare_scd(NR_ServingCellConfig_t *scd); diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c index 97c753d455..a7075eb218 100644 --- a/openair1/SIMULATION/NR_PHY/ulsim.c +++ b/openair1/SIMULATION/NR_PHY/ulsim.c @@ -707,7 +707,7 @@ int main(int argc, char **argv) NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup)); prepare_scc(rrc.carrier.servingcellconfigcommon); uint64_t ssb_bitmap; - fill_scc_sim(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); + fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); fix_scc(scc,ssb_bitmap); @@ -732,13 +732,17 @@ int main(int argc, char **argv) nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config; cfg->carrier_config.num_tx_ant.value = n_tx; cfg->carrier_config.num_rx_ant.value = n_rx; -// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01); + nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01); phy_init_nr_gNB(gNB,0,1); N_RB_DL = gNB->frame_parms.N_RB_DL; NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]; + //crcTableInit(); + + //nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_UL, mu, Nid_cell, SSB_positions); + //configure UE UE = malloc(sizeof(PHY_VARS_NR_UE)); diff --git a/openair2/COMMON/rrc_messages_types.h b/openair2/COMMON/rrc_messages_types.h index e1886b57ff..f61648d8b4 100644 --- a/openair2/COMMON/rrc_messages_types.h +++ b/openair2/COMMON/rrc_messages_types.h @@ -412,7 +412,7 @@ typedef struct NRRrcConfigurationReq_s { int sib1_tda; int pdsch_AntennaPorts; int pusch_AntennaPorts; - int minRXTXTIME; + int minRXTXTIMEpdsch; int do_CSIRS; int pusch_TargetSNRx10; int pucch_TargetSNRx10; diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h index 8a7ce64d91..70295b1c31 100644 --- a/openair2/GNB_APP/RRC_nr_paramsvalues.h +++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h @@ -58,6 +58,56 @@ #define GNB_CONFIG_STRING_INITIALDLBWPCONTROLRESOURCESETZERO "initialDLBWPcontrolResourceSetZero" #define GNB_CONFIG_STRING_INITIALDLBWPSEARCHSPACEZERO "initialDLBWPsearchSpaceZero" + +#define GNB_CONFIG_STRING_INITIALDLBWPK0_0 "initialDLBWPk0_0" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_0 "initialDLBWPmappingType_0" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0 "initialDLBWPstartSymbolAndLength_0" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_1 "initialDLBWPk0_1" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1 "initialDLBWPmappingType_1" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_1 "initialDLBWPstartSymbolAndLength_1" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_2 "initialDLBWPk0_2" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2 "initialDLBWPmappingType_2" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2 "initialDLBWPstartSymbolAndLength_2" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_3 "initialDLBWPk0_3" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_3 "initialDLBWPmappingType_3" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_3 "initialDLBWPstartSymbolAndLength_3" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_4 "initialDLBWPk0_4" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_4 "initialDLBWPmappingType_4" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_4 "initialDLBWPstartSymbolAndLength_4" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_5 "initialDLBWPk0_5" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_5 "initialDLBWPmappingType_5" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_5 "initialDLBWPstartSymbolAndLength_5" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_6 "initialDLBWPk0_6" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_6 "initialDLBWPmappingType_6" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_6 "initialDLBWPstartSymbolAndLength_6" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_7 "initialDLBWPk0_7" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_7 "initialDLBWPmappingType_7" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_7 "initialDLBWPstartSymbolAndLength_7" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_8 "initialDLBWPk0_8" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_8 "initialDLBWPmappingType_8" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_8 "initialDLBWPstartSymbolAndLength_8" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_9 "initialDLBWPk0_9" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_9 "initialDLBWPmappingType_9" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_9 "initialDLBWPstartSymbolAndLength_9" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_10 "initialDLBWPk0_10" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_10 "initialDLBWPmappingType_10" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_10 "initialDLBWPstartSymbolAndLength_10" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_11 "initialDLBWPk0_11" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_11 "initialDLBWPmappingType_11" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_11 "initialDLBWPstartSymbolAndLength_11" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_12 "initialDLBWPk0_12" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_12 "initialDLBWPmappingType_12" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_12 "initialDLBWPstartSymbolAndLength_12" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_13 "initialDLBWPk0_13" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_13 "initialDLBWPmappingType_13" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_13 "initialDLBWPstartSymbolAndLength_13" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_14 "initialDLBWPk0_14" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_14 "initialDLBWPmappingType_14" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_14 "initialDLBWPstartSymbolAndLength_14" +#define GNB_CONFIG_STRING_INITIALDLBWPK0_15 "initialDLBWPk0_15" +#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_15 "initialDLBWPmappingType_15" +#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_15 "initialDLBWPstartSymbolAndLength_15" + #define GNB_CONFIG_STRING_ULFREQUENCYBAND "ul_frequencyBand" #define GNB_CONFIG_STRING_ULABSOLUEFREQUENCYPOINTA "ul_absoluteFrequencyPointA" #define GNB_CONFIG_STRING_ULOFFSETTOCARRIER "ul_offstToCarrier" @@ -92,6 +142,54 @@ #define GNB_CONFIG_STRING_HOPPINGID "hoppingId" #define GNB_CONFIG_STRING_P0NOMINAL "p0_nominal" #define GNB_CONFIG_STRING_PUCCHRES "pucch_ResourceCommon" +#define GNB_CONFIG_STRING_INITIALULBWPK2_0 "initialULBWPk2_0" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_0 "initialULBWPmappingType_0" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_0 "initialULBWPstartSymbolAndLength_0" +#define GNB_CONFIG_STRING_INITIALULBWPK2_1 "initialULBWPk2_1" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_1 "initialULBWPmappingType_1" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_1 "initialULBWPstartSymbolAndLength_1" +#define GNB_CONFIG_STRING_INITIALULBWPK2_2 "initialULBWPk2_2" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_2 "initialULBWPmappingType_2" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_2 "initialULBWPstartSymbolAndLength_2" +#define GNB_CONFIG_STRING_INITIALULBWPK2_3 "initialULBWPk2_3" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_3 "initialULBWPmappingType_3" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_3 "initialULBWPstartSymbolAndLength_3" +#define GNB_CONFIG_STRING_INITIALULBWPK2_4 "initialULBWPk2_4" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_4 "initialULBWPmappingType_4" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_4 "initialULBWPstartSymbolAndLength_4" +#define GNB_CONFIG_STRING_INITIALULBWPK2_5 "initialULBWPk2_5" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_5 "initialULBWPmappingType_5" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_5 "initialULBWPstartSymbolAndLength_5" +#define GNB_CONFIG_STRING_INITIALULBWPK2_6 "initialULBWPk2_6" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_6 "initialULBWPmappingType_6" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_6 "initialULBWPstartSymbolAndLength_6" +#define GNB_CONFIG_STRING_INITIALULBWPK2_7 "initialULBWPk2_7" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_7 "initialULBWPmappingType_7" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_7 "initialULBWPstartSymbolAndLength_7" +#define GNB_CONFIG_STRING_INITIALULBWPK2_8 "initialULBWPk2_8" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_8 "initialULBWPmappingType_8" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_8 "initialULBWPstartSymbolAndLength_8" +#define GNB_CONFIG_STRING_INITIALULBWPK2_9 "initialULBWPk2_9" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_9 "initialULBWPmappingType_9" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_9 "initialULBWPstartSymbolAndLength_9" +#define GNB_CONFIG_STRING_INITIALULBWPK2_10 "initialULBWPk2_10" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_10 "initialULBWPmappingType_10" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_10 "initialULBWPstartSymbolAndLength_10" +#define GNB_CONFIG_STRING_INITIALULBWPK2_11 "initialULBWPk2_11" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_11 "initialULBWPmappingType_11" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_11 "initialULBWPstartSymbolAndLength_11" +#define GNB_CONFIG_STRING_INITIALULBWPK2_12 "initialULBWPk2_12" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_12 "initialULBWPmappingType_12" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_12 "initialULBWPstartSymbolAndLength_12" +#define GNB_CONFIG_STRING_INITIALULBWPK2_13 "initialULBWPk2_13" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_13 "initialULBWPmappingType_13" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_13 "initialULBWPstartSymbolAndLength_13" +#define GNB_CONFIG_STRING_INITIALULBWPK2_14 "initialULBWPk2_14" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_14 "initialULBWPmappingType_14" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_14 "initialULBWPstartSymbolAndLength_14" +#define GNB_CONFIG_STRING_INITIALULBWPK2_15 "initialULBWPk2_15" +#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_15 "initialULBWPmappingType_15" +#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_15 "initialULBWPstartSymbolAndLength_15" #define GNB_CONFIG_STRING_SSBPOSITIONSINBURSTPR "ssb_PositionsInBurst_PR" @@ -175,6 +273,54 @@ {GNB_CONFIG_STRING_INITIALDLBWPSUBCARRIERSPACING,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing,defint64val:NR_SubcarrierSpacing_kHz30,TYPE_INT64,0/*12*/},\ {GNB_CONFIG_STRING_INITIALDLBWPCONTROLRESOURCESETZERO,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero,defint64val:12,TYPE_INT64,0/*13*/},\ {GNB_CONFIG_STRING_INITIALDLBWPSEARCHSPACEZERO,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero,defint64val:0,TYPE_INT64,0/*14*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_0,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0,defint64val:-1,TYPE_INT64,0/*15*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType,defint64val:-1,TYPE_INT64,0/*16*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:-1,TYPE_INT64,0/*17*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_1,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0,defint64val:-1,TYPE_INT64,0/*18*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*19*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*20*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPK0_2,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0,defint64val:-1,TYPE_INT64,0/*21*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*22*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*23*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_3,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->k0,defint64val:-1,TYPE_INT64,0/*24*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_3,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*25*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_3,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*26*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_4,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->k0,defint64val:-1,TYPE_INT64,0/*27*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_4,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*28*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_4,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*29*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_5,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->k0,defint64val:-1,TYPE_INT64,0/*30*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_5,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*31*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_5,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*32*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_6,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->k0,defint64val:-1,TYPE_INT64,0/*33*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_6,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*34*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_6,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*35*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_7,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->k0,defint64val:-1,TYPE_INT64,0/*36*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_7,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*37*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_7,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*38*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_8,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->k0,defint64val:-1,TYPE_INT64,0/*39*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_8,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*40*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_8,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*41*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_9,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->k0,defint64val:-1,TYPE_INT64,0/*42*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_9,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*43*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_9,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*44*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_10,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->k0,defint64val:-1,TYPE_INT64,0/*45*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_10,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*46*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_10,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*47*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_11,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->k0,defint64val:-1,TYPE_INT64,0/*48*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_11,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*49*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_11,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*50*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPK0_12,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->k0,defint64val:-1,TYPE_INT64,0/*51*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_12,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*52*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_12,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*53*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_13,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->k0,defint64val:-1,TYPE_INT64,0/*54*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_13,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*55*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_13,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*56*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_14,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->k0,defint64val:-1,TYPE_INT64,0/*57*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_14,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*58*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_14,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*59*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPK0_15,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->k0,defint64val:-1,TYPE_INT64,0/*60*/}, \ +{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_15,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*61*/},\ +{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_15,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*62*/},\ {GNB_CONFIG_STRING_ULFREQUENCYBAND,NULL,0,i64ptr:scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],defint64val:-1,TYPE_INT64,0/*63*/},\ {GNB_CONFIG_STRING_ULABSOLUEFREQUENCYPOINTA,NULL,0,i64ptr:scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA,defint64val:-1,TYPE_INT64,0/*64*/},\ {GNB_CONFIG_STRING_ULOFFSETTOCARRIER,NULL,0,i64ptr:&scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier,defint64val:0,TYPE_INT64,0/*65*/},\ @@ -199,6 +345,54 @@ {GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139,defint64val:0,TYPE_INT64,0/*84*/},\ {GNB_CONFIG_STRING_RESTRICTEDSETCONFIG,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig,defintval:NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet,TYPE_INT64,0/*85*/}, \ {GNB_CONFIG_STRING_MSG3TRANSFPREC,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder,defintval:1,TYPE_INT64,0/*86*/}, \ +{GNB_CONFIG_STRING_INITIALULBWPK2_0,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2,defint64val:-1,TYPE_INT64,0/*87*/},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_0,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,/*88*/},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:55,TYPE_INT64,0/*89*/},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_1,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2,defint64val:-1,TYPE_INT64,0/*90*/}, \ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_1,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_2,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_3,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_3,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_3,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_4,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_4,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0 /*100*/}, \ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_4,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_5,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_5,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_5,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_6,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_6,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_6,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_7,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_7,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_7,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*110*/}, \ +{GNB_CONFIG_STRING_INITIALULBWPK2_8,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_8,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_8,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_9,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_9,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_9,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_10,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_10,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_10,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_11,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->k2,defint64val:-1,TYPE_INT64,0/*120*/}, \ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_11,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_11,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_12,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_12,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_12,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_13,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_13,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_13,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_14,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_14,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0 /*130*/}, \ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_14,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPK2_15,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->k2,defint64val:-1,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_15,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ +{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_15,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ {GNB_CONFIG_STRING_MSG3DELTAPREABMLE, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble,defint64val:1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_P0NOMINALWITHGRANT, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant,defint64val:1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_PUCCHGROUPHOPPING, NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping,defint64val:NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither,TYPE_INT64,0},\ diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index d069bfe2f4..9851d14b91 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -94,6 +94,8 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { NR_FreqBandIndicatorNR_t *dl_frequencyBandList,*ul_frequencyBandList; struct NR_SCS_SpecificCarrier *dl_scs_SpecificCarrierList,*ul_scs_SpecificCarrierList; + struct NR_PDSCH_TimeDomainResourceAllocation *bwp_dl_timedomainresourceallocation; + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_configcommontimedomainresourceallocation; // struct NR_RateMatchPattern *ratematchpattern; // NR_RateMatchPatternId_t *ratematchpatternid; // NR_TCI_StateId_t *TCI_StateId; @@ -141,6 +143,14 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->present = NR_SetupRelease_PDSCH_ConfigCommon_PR_setup; scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup = CALLOC(1,sizeof(struct NR_PDSCH_ConfigCommon)); scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList = CALLOC(1,sizeof(struct NR_PDSCH_TimeDomainResourceAllocationList)); + // + for (int i=0;ik0 = CALLOC(1,sizeof(long)); + *bwp_dl_timedomainresourceallocation->k0=0; + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + bwp_dl_timedomainresourceallocation); + } ul_frequencyBandList = CALLOC(1,sizeof(NR_FreqBandIndicatorNR_t)); scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList = CALLOC(1,sizeof(struct NR_MultiFrequencyBandListNR)); @@ -189,6 +199,12 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { ul_scs_SpecificCarrierList = CALLOC(1,sizeof(struct NR_SCS_SpecificCarrier)); ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list,ul_scs_SpecificCarrierList); + for (int i=0;ik2 = CALLOC(1,sizeof(long)); + *pusch_configcommontimedomainresourceallocation->k2=0; + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_configcommontimedomainresourceallocation); + } //ratematchpattern = CALLOC(1,sizeof(struct NR_RateMatchPattern)); //ratematchpattern->patternType.choice.bitmaps = CALLOC(1,sizeof(struct NR_RateMatchPattern__patternType__bitmaps)); //ratematchpattern->patternType.choice.bitmaps->resourceBlocks.buf = MALLOC(35); @@ -207,92 +223,6 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { } -void fill_scc_sim(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul) { - - *scc->physCellId=0; \ - // *scc->n_TimingAdvanceOffset=NR_ServingCellConfigCommon__n_TimingAdvanceOffset_n0; - *scc->ssb_periodicityServingCell=NR_ServingCellConfigCommon__ssb_periodicityServingCell_ms20; - scc->dmrs_TypeA_Position=NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; - *scc->ssbSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; - *scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=641032; - *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78; - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=640000; - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; - - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL; - scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036; - scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=mu_dl;//NR_SubcarrierSpacing_kHz30; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0; - struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation0 = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); - timedomainresourceallocation0->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - timedomainresourceallocation0->startSymbolAndLength=54; - ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, - timedomainresourceallocation0); - struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation1 = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); - timedomainresourceallocation1->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - timedomainresourceallocation1->startSymbolAndLength=57; - ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, - timedomainresourceallocation1); - *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]=78; - *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA=-1; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_UL; - *scc->uplinkConfigCommon->frequencyInfoUL->p_Max=20; - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth=13036; - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing=mu_ul;//NR_SubcarrierSpacing_kHz30; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex=98; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM=NR_RACH_ConfigGeneric__msg1_FDM_one; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart=0; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig=13; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower=-118; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax=NR_RACH_ConfigGeneric__preambleTransMax_n10; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep=NR_RACH_ConfigGeneric__powerRampingStep_dB2; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow=NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer=NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64; - *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB=19; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet; - struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation0 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); - pusch_timedomainresourceallocation0->k2 = CALLOC(1,sizeof(long)); - *pusch_timedomainresourceallocation0->k2=6; - pusch_timedomainresourceallocation0->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - pusch_timedomainresourceallocation0->startSymbolAndLength=55; - ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation0); - struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation1 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); - pusch_timedomainresourceallocation1->k2 = CALLOC(1,sizeof(long)); - *pusch_timedomainresourceallocation1->k2=6; - pusch_timedomainresourceallocation1->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - pusch_timedomainresourceallocation1->startSymbolAndLength=38; - ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation1); - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble=1; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant=-90; - scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping=NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither; - *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId=40; - *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal=-90; - scc->ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap; - *ssb_bitmap=0xff; - scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots=7; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols=6; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots=2; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols=4; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity=321; - - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSymbols=-1; - scc->ss_PBCH_BlockPower=20; - *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing=-1; -} - void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { @@ -343,9 +273,24 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { if (*scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder!=0) scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder = NULL; - // prepare DL Allocation lists - nr_rrc_config_dl_tda(scc); + // fix DL and UL Allocation lists + + for (int i=scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count-1;i>=0;i--) { + printf("Checking element %d : %ld\n",i,*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0); + if (*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0>32) { + printf("removing pdsch_TimeDomainAllocationList element %d\n",i); + free(scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0); + asn_sequence_del(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,i,1); + printf("List size now %d\n",scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count); + } + } + for (int i=scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count-1;i>=0;i--) { + if (*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2>32) { + free(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2); + asn_sequence_del(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,i,1); + } + } if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) { free(scc->tdd_UL_DL_ConfigurationCommon->pattern2); scc->tdd_UL_DL_ConfigurationCommon->pattern2=NULL; @@ -1162,9 +1107,11 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr; printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr; - printf("minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr); - NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIME = *GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr; + printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); + NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr; + printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); + NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; diff --git a/openair2/GNB_APP/gnb_paramdef.h b/openair2/GNB_APP/gnb_paramdef.h index 730b6b85b6..0c3d971569 100644 --- a/openair2/GNB_APP/gnb_paramdef.h +++ b/openair2/GNB_APP/gnb_paramdef.h @@ -119,7 +119,7 @@ typedef enum { #define GNB_CONFIG_STRING_SIB1TDA "sib1_tda" #define GNB_CONFIG_STRING_DOCSIRS "do_CSIRS" #define GNB_CONFIG_STRING_NRCELLID "nr_cellid" -#define GNB_CONFIG_STRING_MINRXTXTIME "min_rxtxtime" +#define GNB_CONFIG_STRING_MINRXTXTIMEPDSCH "min_rxtxtime_pdsch" #define GNB_CONFIG_STRING_ULPRBBLACKLIST "ul_prbblacklist" @@ -148,7 +148,7 @@ typedef enum { {GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \ -{GNB_CONFIG_STRING_MINRXTXTIME, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \ +{GNB_CONFIG_STRING_MINRXTXTIMEPDSCH, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_ULPRBBLACKLIST, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0} \ } @@ -172,7 +172,7 @@ typedef enum { #define GNB_SIB1_TDA_IDX 17 #define GNB_DO_CSIRS_IDX 18 #define GNB_NRCELLID_IDX 19 -#define GNB_MINRXTXTIME_IDX 20 +#define GNB_MINRXTXTIMEPDSCH_IDX 20 #define GNB_ULPRBBLACKLIST_IDX 21 #define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD} diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 764c92ecb7..f67a3e1fa5 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -44,9 +44,46 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int nrofUplinkSlots, int nrofUplinkSymbols) { int slot_number = 0; - int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period); + int nb_periods_per_frame; int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<tdd_table.tdd_period) { + case 0: + nb_periods_per_frame = 20; // 10ms/0p5ms + break; + + case 1: + nb_periods_per_frame = 16; // 10ms/0p625ms + break; + + case 2: + nb_periods_per_frame = 10; // 10ms/1ms + break; + + case 3: + nb_periods_per_frame = 8; // 10ms/1p25ms + break; + + case 4: + nb_periods_per_frame = 5; // 10ms/2ms + break; + + case 5: + nb_periods_per_frame = 4; // 10ms/2p5ms + break; + + case 6: + nb_periods_per_frame = 2; // 10ms/5ms + break; + + case 7: + nb_periods_per_frame = 1; // 10ms/10ms + break; + + default: + AssertFatal(1==0,"Undefined tdd period %d\n", cfg->tdd_table.tdd_period); + } + int nb_slots_per_period = ((1<tdd_table.tdd_period_in_slots = nb_slots_per_period; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 2f4ceb48ec..a5f6e4a7d1 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -944,10 +944,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr return -1; } - if(rnti != ra->ra_rnti && rnti != SI_RNTI) - AssertFatal(1+dci->pdsch_to_harq_feedback_timing_indicator.val>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d).\n", - 1+dci->pdsch_to_harq_feedback_timing_indicator.val,DURATION_RX_TO_TX); - // set the harq status at MAC for feedback set_harq_status(mac,dci->pucch_resource_indicator, dci->harq_pid, @@ -1236,7 +1232,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr uint8_t feedback_ti = ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; - AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d). Min feedback time set in config file (min_rxtxtime).\n", + AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d)\n", feedback_ti,DURATION_RX_TO_TX); // set the harq status at MAC for feedback @@ -3164,10 +3160,10 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits)-1); + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3; // Not supported yet - skip for now // Frequency hopping flag – 1 bit diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 3d45877979..c142af13ba 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -129,7 +129,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { } AssertFatal(k2 >= DURATION_RX_TO_TX, - "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n", + "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n", k2,DURATION_RX_TO_TX); LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 2705b85b8c..25aeea70a6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -870,6 +870,9 @@ void nr_get_Msg3alloc(module_id_t module_id, int mu = ubwp ? ubwp->bwp_Common->genericParameters.subcarrierSpacing : scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; + int StartSymbolIndex = 0; + int NrOfSymbols = 0; + int startSymbolAndLength = 0; int temp_slot = 0; ra->Msg3_tda_id = 16; // initialization to a value above limit @@ -878,29 +881,20 @@ void nr_get_Msg3alloc(module_id_t module_id, scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; uint8_t k2 = 0; - lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); - if (frame_type == TDD) { - int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); - int nb_slots_per_period = ((1<list.count; i++) { + for (int i=0; ilist.count; i++) { + startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); + // we want to transmit in the uplink symbols of mixed slot + if (NrOfSymbols == scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols) { k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2; - // we want to transmit in the uplink symbols of mixed slot - if ((k2 + DELTA[mu])%nb_slots_per_period == 0) { - temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 - ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; - if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) { - ra->Msg3_tda_id = i; - break; - } + temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 + ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; + if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) { + ra->Msg3_tda_id = i; + break; } } } - else { - ra->Msg3_tda_id = 0; - k2 = *pusch_TimeDomainAllocationList->list.array[0]->k2; - temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 - ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; - } AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n"); @@ -921,7 +915,7 @@ void nr_get_Msg3alloc(module_id_t module_id, tdd_beam_association[num_tdd_period] = ra->beam_id; } - LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id); + LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex); uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE]; @@ -978,7 +972,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->bwp_size = bwp_size; pusch_pdu->subcarrier_spacing = scs; pusch_pdu->cyclic_prefix = 0; - pusch_pdu->mcs_index = 1; + pusch_pdu->mcs_index = 0; pusch_pdu->mcs_table = 0; pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); @@ -1015,14 +1009,11 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->pusch_data.harq_process_id = 0; pusch_pdu->pusch_data.new_data_indicator = 1; pusch_pdu->pusch_data.num_cb = 0; - int num_dmrs_symb = 0; - for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++) - num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, pusch_pdu->target_code_rate, pusch_pdu->rb_size, pusch_pdu->nr_of_symbols, - num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol + 12, // nb dmrs set for no data in dmrs symbol 0, //nb_rb_oh 0, // to verify tb scaling pusch_pdu->nrOfLayers)>>3; @@ -1083,7 +1074,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t fh = ubwp->bwp_Dedicated->pusch_Config->choice.setup->frequencyHopping ? 1 : 0; } - LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", + LOG_D(NR_MAC, "Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", frameP, slotP, ra->Msg3_frame, @@ -1114,12 +1105,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) { - //TODO time domain assignment for msg2 needs to be improved - uint8_t time_domain_assignment; - if(cc->frame_type == TDD) - time_domain_assignment = 1; - else - time_domain_assignment = 0; + uint8_t time_domain_assignment = 1; uint8_t mcsIndex = 0; int rbStart = 0; int rbSize = 8; @@ -1259,8 +1245,6 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type) dmrsConfigType = 1; - NR_PDSCH_Config_t *pdsch_config = bwp && bwp->bwp_Dedicated && bwp->bwp_Dedicated->pdsch_Config ? bwp->bwp_Dedicated->pdsch_Config->choice.setup : NULL; - pdsch_pdu_rel15->pduBitmap = 0; pdsch_pdu_rel15->rnti = ra->RA_rnti; pdsch_pdu_rel15->pduIndex = pduindex; @@ -1289,7 +1273,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra pdsch_pdu_rel15->VRBtoPRBMapping = 0; pdsch_pdu_rel15->StartSymbolIndex = startSymbolIndex; pdsch_pdu_rel15->NrOfSymbols = nrOfSymbols; - pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, + pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 7b7b5c771b..33cb2b1b1d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -351,7 +351,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc, void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc, const NR_BWP_Uplink_t *ubwp, - const NR_BWP_UplinkDedicated_t *ubwpd, + const NR_BWP_UplinkDedicated_t *ubwpd, long dci_format, int tda, uint8_t num_dmrs_cdm_grps_no_data, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index c68b16b553..313dd6236e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -104,6 +104,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub /* check that TDA index 1 fits into UL slot and does not overlap with PUCCH */ const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + AssertFatal(tdaList->list.count >= 3, "need to have at least three TDAs for UL slots\n"); const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_UL = tdaList->list.array[0]; const int k2 = get_K2(scc, (NR_BWP_Uplink_t*)ubwp,0, mu); int start, len; @@ -116,28 +117,27 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub // get largest time domain allocation (TDA) for UL slot and UL in mixed slot int tdaMi = -1; - if(tdaList->list.count > 1) { - const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; - AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), - "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", - k2, - get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); - SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); - const uint16_t symb_tda_mi = ((1 << len) - 1) << start; - // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check - // whether TDA is entirely within mixed slot, UL. Note that here we assume - // that the PUCCH is scheduled in every slot, and on all RBs (which is - // mostly not true, this is a simplification) - if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { - tdaMi = 1; - } else { - LOG_E(NR_MAC, - "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", - symb_pucch, - symb_ulMixed, - symb_tda_mi); - } + const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; + AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), + "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", + k2, + get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); + SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); + const uint16_t symb_tda_mi = ((1 << len) - 1) << start; + // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check + // whether TDA is entirely within mixed slot, UL. Note that here we assume + // that the PUCCH is scheduled in every slot, and on all RBs (which is + // mostly not true, this is a simplification) + if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { + tdaMi = 1; + } else { + LOG_E(NR_MAC, + "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", + symb_pucch, + symb_ulMixed, + symb_tda_mi); } + const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id])); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index 5e5de9a8e1..547c5da00c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -64,7 +64,7 @@ void *nrmac_stats_thread(void *arg) { fseek(fd,0,SEEK_SET); } fclose(fd); - return NULL; + return (void *)0; } void clear_mac_stats(gNB_MAC_INST *gNB) { diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index bdd1cf5261..ff6923429e 100755 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -1185,9 +1185,9 @@ void fill_initial_SpCellConfig(rnti_t rnti, long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - AssertFatal(carrier->minRXTXTIME >=2 && carrier->minRXTXTIME <7, - "check minRXTXTIME %d\n",carrier->minRXTXTIME); - *delay[i] = (i+carrier->minRXTXTIME); + AssertFatal(carrier->minRXTXTIMEpdsch >=2 && carrier->minRXTXTIMEpdsch <7, + "check minRXTXTIMEpdsch %d\n",carrier->minRXTXTIMEpdsch); + *delay[i] = (i+carrier->minRXTXTIMEpdsch); ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c index 6b7f9a21b9..dedd4cf839 100644 --- a/openair2/RRC/NR/nr_rrc_config.c +++ b/openair2/RRC/NR/nr_rrc_config.c @@ -29,79 +29,96 @@ */ #include "nr_rrc_config.h" -#include "common/utils/nr/nr_common.h" -void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc){ - - lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); - - // setting default TDA for DL with - struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); - timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,13); // basic slot configuration starting in symbol 1 til the end of the slot - ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, - timedomainresourceallocation); - - if(frame_type==TDD) { - // TDD - if(scc->tdd_UL_DL_ConfigurationCommon) { - int dl_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols; - if(dl_symb > 1) { - timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); - timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,dl_symb-1); // mixed slot configuration starting in symbol 1 til the end of the dl allocation - ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, - timedomainresourceallocation); - } - } - } +void rrc_config_rlc_bearer(uint8_t Mod_id, + int CC_id, + rlc_bearer_config_t *rlc_config + ){ + rlc_config->LogicalChannelIdentity[CC_id] = 0; + rlc_config->servedRadioBearer_present[CC_id] = 0; + rlc_config->srb_Identity[CC_id] = 0; + rlc_config->drb_Identity[CC_id] = 0; + rlc_config->reestablishRLC[CC_id] = 0; + rlc_config->rlc_Config_present[CC_id] = 0; + rlc_config->ul_AM_sn_FieldLength[CC_id] = 0; + rlc_config->t_PollRetransmit[CC_id] = 0; + rlc_config->pollPDU[CC_id] = 0; + rlc_config->pollByte[CC_id] = 0; + rlc_config->maxRetxThreshold[CC_id] = 0; + rlc_config->dl_AM_sn_FieldLength[CC_id] = 0; + rlc_config->dl_AM_t_Reassembly[CC_id] = 0; + rlc_config->t_StatusProhibit[CC_id] = 0; + rlc_config->ul_UM_sn_FieldLength[CC_id] = 0; + rlc_config->dl_UM_sn_FieldLength[CC_id] = 0; + rlc_config->dl_UM_t_Reassembly[CC_id] = 0; + rlc_config->priority[CC_id] = 0; + rlc_config->prioritisedBitRate[CC_id] = 0; + rlc_config->bucketSizeDuration[CC_id] = 0; + rlc_config->allowedServingCells[CC_id] = 0; + rlc_config->subcarrierspacing[CC_id] = 0; + rlc_config->maxPUSCH_Duration[CC_id] = 0; + rlc_config->configuredGrantType1Allowed[CC_id] = 0; + rlc_config->logicalChannelGroup[CC_id] = 0; + rlc_config->schedulingRequestID[CC_id] = 0; + rlc_config->logicalChannelSR_Mask[CC_id] = 0; + rlc_config->logicalChannelSR_DelayTimerApplied[CC_id] = 0; } - -void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){ - - //TODO change to accomodate for SRS - - int temp_min_delay = 6; // k2 = 2 or 3 won'r work as well as higher values - int k2 = (min_fb_delayuplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; - lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); - - struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); - pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); - *pusch_timedomainresourceallocation->k2 = k2; - pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(0,13); // basic slot configuration starting in symbol 0 til the last but one symbol - ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); - - if(frame_type==TDD) { - // TDD - if(scc->tdd_UL_DL_ConfigurationCommon) { - int ul_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols; - pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); - pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); - *pusch_timedomainresourceallocation->k2 = k2; - pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one - ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); - - // for msg3 in the mixed slot - int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); - int nb_slots_per_period = ((1<k2 = CALLOC(1,sizeof(long)); - *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu]; - if(*pusch_timedomainresourceallocation_msg3->k2 < min_fb_delay) - *pusch_timedomainresourceallocation_msg3->k2 += nb_slots_per_period; - AssertFatal(*pusch_timedomainresourceallocation_msg3->k2<33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n", - *pusch_timedomainresourceallocation_msg3->k2); - pusch_timedomainresourceallocation_msg3->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one - ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation_msg3); - } - } - +void rrc_config_mac_cellgroup(uint8_t Mod_id, + int CC_id, + mac_cellgroup_t *mac_cellgroup_config + ){ + mac_cellgroup_config->DRX_Config_PR[CC_id] = 0; + mac_cellgroup_config->drx_onDurationTimer_PR[CC_id] = 0; + mac_cellgroup_config->subMilliSeconds[CC_id] = 0; + mac_cellgroup_config->milliSeconds[CC_id] = 0; + mac_cellgroup_config->drx_InactivityTimer[CC_id] = 0; + mac_cellgroup_config->drx_HARQ_RTT_TimerDL[CC_id] = 0; + mac_cellgroup_config->drx_HARQ_RTT_TimerUL[CC_id] = 0; + mac_cellgroup_config->drx_RetransmissionTimerDL[CC_id] = 0; + mac_cellgroup_config->drx_RetransmissionTimerUL[CC_id] = 0; + mac_cellgroup_config->drx_LongCycleStartOffset_PR[CC_id] = 0; + mac_cellgroup_config->drx_LongCycleStartOffset[CC_id] = 0; + mac_cellgroup_config->drx_ShortCycle[CC_id] = 0; + mac_cellgroup_config->drx_ShortCycleTimer[CC_id] = 0; + mac_cellgroup_config->drx_SlotOffset[CC_id] = 0; + mac_cellgroup_config->schedulingRequestId[CC_id] = 0; + mac_cellgroup_config->sr_ProhibitTimer[CC_id] = 0; + mac_cellgroup_config->sr_TransMax[CC_id] = 0; + mac_cellgroup_config->periodicBSR_Timer[CC_id] = 0; + mac_cellgroup_config->retxBSR_Timer[CC_id] = 0; + mac_cellgroup_config->logicalChannelSR_DelayTimer[CC_id] = 0; + mac_cellgroup_config->tag_Id[CC_id] = 0; + mac_cellgroup_config->timeAlignmentTimer[CC_id] = 0; + mac_cellgroup_config->PHR_Config_PR[CC_id] = 0; + mac_cellgroup_config->phr_PeriodicTimer[CC_id] = 0; + mac_cellgroup_config->phr_ProhibitTimer[CC_id] = 0; + mac_cellgroup_config->phr_Tx_PowerFactorChange[CC_id] = 0; + mac_cellgroup_config->multiplePHR[CC_id] = 0; + mac_cellgroup_config->phr_Type2SpCell[CC_id] = 0; + mac_cellgroup_config->phr_Type2OtherCell[CC_id] = 0; + mac_cellgroup_config->phr_ModeOtherCG[CC_id] = 0; + mac_cellgroup_config->skipUplinkTxDynamic[CC_id] = 0; } +void rrc_config_physicalcellgroup(uint8_t Mod_id, + int CC_id, + physicalcellgroup_t *physicalcellgroup_config + ){ + physicalcellgroup_config->harq_ACK_SpatialBundlingPUCCH[CC_id] = 0; + physicalcellgroup_config->harq_ACK_SpatialBundlingPUSCH[CC_id] = 0; + physicalcellgroup_config->p_NR[CC_id] = 0; + physicalcellgroup_config->pdsch_HARQ_ACK_Codebook[CC_id] = 0; + physicalcellgroup_config->tpc_SRS_RNTI[CC_id] = 0; + physicalcellgroup_config->tpc_PUCCH_RNTI[CC_id] = 0; + physicalcellgroup_config->tpc_PUSCH_RNTI[CC_id] = 0; + physicalcellgroup_config->sp_CSI_RNTI[CC_id] = 0; + physicalcellgroup_config->RNTI_Value[CC_id] = 0; +} + +void rrc_config_rachdedicated(uint8_t Mod_id, + int CC_id, + physicalcellgroup_t *physicalcellgroup_config + ){ + +} diff --git a/openair2/RRC/NR/nr_rrc_config.h b/openair2/RRC/NR/nr_rrc_config.h index 192fee754e..e19d94b341 100644 --- a/openair2/RRC/NR/nr_rrc_config.h +++ b/openair2/RRC/NR/nr_rrc_config.h @@ -111,8 +111,29 @@ typedef struct physicalcellgroup_s{ long RNTI_Value[MAX_NUM_CCs]; }physicalcellgroup_t; -void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc); -void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay); +typedef struct rach_dedicated_s{ + + +}rach_dedicated_t; +void rrc_config_servingcellconfigcommon(uint8_t Mod_id, + int CC_id, + gNB_RrcConfigurationReq *common_configuration + ); + +void rrc_config_rlc_bearer(uint8_t Mod_id, + int CC_id, + rlc_bearer_config_t *rlc_config + ); + +void rrc_config_mac_cellgroup(uint8_t Mod_id, + int CC_id, + mac_cellgroup_t *mac_cellgroup_config + ); + +void rrc_config_physicalcellgroup(uint8_t Mod_id, + int CC_id, + physicalcellgroup_t *physicalcellgroup_config + ); #endif diff --git a/openair2/RRC/NR/nr_rrc_defs.h b/openair2/RRC/NR/nr_rrc_defs.h index d71393bc2d..ad31e8cac7 100644 --- a/openair2/RRC/NR/nr_rrc_defs.h +++ b/openair2/RRC/NR/nr_rrc_defs.h @@ -447,7 +447,7 @@ typedef struct { int sib1_tda; int pdsch_AntennaPorts; int pusch_AntennaPorts; - int minRXTXTIME; + int minRXTXTIMEpdsch; int do_CSIRS; NR_BCCH_DL_SCH_Message_t *siblock1; NR_ServingCellConfigCommon_t *servingcellconfigcommon; diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 7f7353f9af..34e570070d 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -136,6 +136,80 @@ void openair_nr_rrc_on(const protocol_ctxt_t *const ctxt_pP) { ///---------------------------------------------------------------------------------------------------------------/// ///---------------------------------------------------------------------------------------------------------------/// +void rrc_gNB_process_SgNBAdditionRequest( + const protocol_ctxt_t *const ctxt_pP, + rrc_gNB_ue_context_t *ue_context_pP +) { + rrc_gNB_generate_SgNBAdditionRequestAcknowledge(ctxt_pP,ue_context_pP); +} + +void rrc_gNB_generate_SgNBAdditionRequestAcknowledge( + const protocol_ctxt_t *const ctxt_pP, + rrc_gNB_ue_context_t *const ue_context_pP) { + //uint8_t size; + //uint8_t buffer[100]; + //int CC_id = ue_context_pP->ue_context.primaryCC_id; + //OCTET_STRING_t *secondaryCellGroup; + NR_CellGroupConfig_t *cellGroupconfig; + struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_BearerToAddModList; + struct NR_MAC_CellGroupConfig *mac_CellGroupConfig; + struct NR_PhysicalCellGroupConfig *physicalCellGroupConfig; + struct NR_SpCellConfig *spCellConfig; + //struct NR_CellGroupConfig__sCellToAddModList *sCellToAddModList; + cellGroupconfig = CALLOC(1,sizeof(NR_CellGroupConfig_t)); + cellGroupconfig->rlc_BearerToAddModList = CALLOC(1,sizeof(struct NR_CellGroupConfig__rlc_BearerToAddModList)); + cellGroupconfig->mac_CellGroupConfig = CALLOC(1,sizeof(struct NR_MAC_CellGroupConfig)); + cellGroupconfig->physicalCellGroupConfig = CALLOC(1,sizeof(struct NR_PhysicalCellGroupConfig)); + cellGroupconfig->spCellConfig = CALLOC(1,sizeof(struct NR_SpCellConfig)); + //cellGroupconfig->sCellToAddModList = CALLOC(1,sizeof(struct NR_CellGroupConfig__sCellToAddModList)); + rlc_BearerToAddModList = cellGroupconfig->rlc_BearerToAddModList; + mac_CellGroupConfig = cellGroupconfig->mac_CellGroupConfig; + physicalCellGroupConfig = cellGroupconfig->physicalCellGroupConfig; + spCellConfig = cellGroupconfig->spCellConfig; + //sCellToAddModList = cellGroupconfig->sCellToAddModList; + rlc_bearer_config_t *rlc_config; + rlc_config = CALLOC(1,sizeof(rlc_bearer_config_t)); + //Fill rlc_bearer config value + rrc_config_rlc_bearer(ctxt_pP->module_id, + ue_context_pP->ue_context.primaryCC_id, + rlc_config + ); + //Fill rlc_bearer config to structure + do_RLC_BEARER(ctxt_pP->module_id, + ue_context_pP->ue_context.primaryCC_id, + rlc_BearerToAddModList, + rlc_config); + mac_cellgroup_t *mac_cellgroup_config; + mac_cellgroup_config = CALLOC(1,sizeof(mac_cellgroup_t)); + //Fill mac_cellgroup_config config value + rrc_config_mac_cellgroup(ctxt_pP->module_id, + ue_context_pP->ue_context.primaryCC_id, + mac_cellgroup_config + ); + //Fill mac_cellgroup config to structure + do_MAC_CELLGROUP(ctxt_pP->module_id, + ue_context_pP->ue_context.primaryCC_id, + mac_CellGroupConfig, + mac_cellgroup_config); + physicalcellgroup_t *physicalcellgroup_config; + physicalcellgroup_config = CALLOC(1,sizeof(physicalcellgroup_t)); + //Fill physicalcellgroup_config config value + rrc_config_physicalcellgroup(ctxt_pP->module_id, + ue_context_pP->ue_context.primaryCC_id, + physicalcellgroup_config + ); + //Fill physicalcellgroup config to structure + do_PHYSICALCELLGROUP(ctxt_pP->module_id, + ue_context_pP->ue_context.primaryCC_id, + physicalCellGroupConfig, + physicalcellgroup_config); + do_SpCellConfig(RC.nrrrc[ctxt_pP->module_id], + spCellConfig); +} + +///---------------------------------------------------------------------------------------------------------------/// +///---------------------------------------------------------------------------------------------------------------/// + static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration) { LOG_D(RRC,"%s()\n\n\n\n",__FUNCTION__); if (NODE_IS_DU(rrc->node_type) || NODE_IS_MONOLITHIC(rrc->node_type)) { @@ -256,10 +330,9 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu rrc->carrier.ssb_SubcarrierOffset = configuration->ssb_SubcarrierOffset; rrc->carrier.pdsch_AntennaPorts = configuration->pdsch_AntennaPorts; rrc->carrier.pusch_AntennaPorts = configuration->pusch_AntennaPorts; - rrc->carrier.minRXTXTIME = configuration->minRXTXTIME; + rrc->carrier.minRXTXTIMEpdsch = configuration->minRXTXTIMEpdsch; rrc->carrier.sib1_tda = configuration->sib1_tda; rrc->carrier.do_CSIRS = configuration->do_CSIRS; - nr_rrc_config_ul_tda(configuration->scc,configuration->minRXTXTIME); /// System Information INIT pthread_mutex_init(&rrc->cell_info_mutex,NULL); rrc->cell_info_configured = 0; diff --git a/openair2/RRC/NR/rrc_gNB_nsa.c b/openair2/RRC/NR/rrc_gNB_nsa.c index 3311779235..2104d5cdd7 100644 --- a/openair2/RRC/NR/rrc_gNB_nsa.c +++ b/openair2/RRC/NR/rrc_gNB_nsa.c @@ -241,7 +241,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, - carrier->minRXTXTIME, + carrier->minRXTXTIMEpdsch, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); @@ -251,7 +251,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, - carrier->minRXTXTIME, + carrier->minRXTXTIMEpdsch, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index 30604cd015..4b8fd77dc5 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -55,7 +55,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco int scg_id, int servCellIndex, int dl_antenna_ports, - int minRXTXTIME, + int minRXTXTIMEpdsch, int do_csirs, int initial_csi_index, int uid) { @@ -483,10 +483,10 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco NR_PDSCH_TimeDomainResourceAllocation_t *pdschi; for (int i=0;idownlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;i++) { pdschi= calloc(1,sizeof(*pdschi)); - if(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0){ - pdschi->k0 = calloc(1,sizeof(*pdschi->k0)); - *pdschi->k0 = *servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0; - } + AssertFatal(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0!=NULL,"element %d is null\n",i); + + pdschi->k0 = calloc(1,sizeof(*pdschi->k0)); + *pdschi->k0 = *servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0; pdschi->mappingType = servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType; pdschi->startSymbolAndLength = servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,pdschi); @@ -946,7 +946,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - *delay[i] = i+minRXTXTIME; + *delay[i] = i+minRXTXTIMEpdsch; ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } pucch_Config->spatialRelationInfoToAddModList = calloc(1,sizeof(*pucch_Config->spatialRelationInfoToAddModList)); @@ -1349,7 +1349,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon NR_RRCReconfiguration_IEs_t *reconfig, NR_CellGroupConfig_t *secondaryCellGroup, int dl_antenna_ports, - int minRXTXTIME, + int minRXTXTIMEpdsch, int do_csirs, int initial_csi_index, int uid) { @@ -1365,7 +1365,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon 1, 1, dl_antenna_ports, - minRXTXTIME, + minRXTXTIMEpdsch, do_csirs, initial_csi_index, uid); diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf index c6a4a90a14..b260eaa58d 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf @@ -55,6 +55,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -111,6 +120,19 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; #p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf index fd9399f89e..0306fe5d0b 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_3 = 0; #for mixed slot + initialDLBWPmappingType_3 = 0; + initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,20 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 4; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf index 59e71a6225..c14ad17b42 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 4; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf index 3fc81c0d6c..ff0fdd96bb 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot (but is not used here) + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,19 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot (not used here) + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf index a40a93c789..937790d4ac 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 4; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf index 3860aba935..c9a95d59e8 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -109,6 +118,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf index 7c527e07c8..524407c4de 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -109,6 +118,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf index a171f2aae0..d191b67988 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf index 4f8c785baa..2dfa329346 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf index 012f46401e..7f0829e40a 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot (but not used here) + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 63; # this is SS=7 L=5 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 91; # this is SS=7 L=7 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf index b6b9252560..6248afab2f 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_3 = 0; #for mixed slot + initialDLBWPmappingType_3 = 0; + initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,20 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf index 0817d7373e..6f28cd36c1 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf index fd4c23cfdb..30194647b8 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; #12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; # used for (full) DL slot + initialDLBWPmappingType_0 = 0; # 0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; # this is SS=1,L=13 + + initialDLBWPk0_1 = 0; # used for DL part mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; # this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for (full) UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for UL part mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf index 965408332c..fcbd3c0f02 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf @@ -54,6 +54,16 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 + #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +118,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf index e36748a3a9..63123b8201 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf index 7b2d369919..217ff76376 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf index dbf4f58348..a1acfc313b 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf @@ -54,6 +54,16 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_3 = 0; #for mixed slot + initialDLBWPmappingType_3 = 0; + initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 + #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +118,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf index 6d23726a78..540dddad21 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf @@ -54,6 +54,16 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_3 = 0; #for mixed slot + initialDLBWPmappingType_3 = 0; + initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 + #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +118,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf index c3fa56f15e..edc5eaa0d4 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf @@ -54,6 +54,16 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_3 = 0; #for mixed slot + initialDLBWPmappingType_3 = 0; + initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 + #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +118,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf index 15aa368fdf..362a280ccb 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf index 1583e07ca1..e541607559 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf @@ -54,6 +54,29 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_1 = 53; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 54; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +131,22 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 55; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf index 8dfcfb2b88..b1c78bc978 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf index d01b0947c0..96f2909031 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf @@ -55,7 +55,28 @@ gNBs = initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_1 = 53; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 54; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=1,L=4 //5 (4 is for 43, 5 is for 57) + initialDLBWPstartSymbolAndLength_3 = 57; //43; //57; #uplinkConfigCommon #frequencyInfoUL ul_frequencyBand = 78; @@ -109,6 +130,21 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=13 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 2; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf index 198ad8471c..f51f59ae30 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf @@ -54,6 +54,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -108,6 +117,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf index 2f4839fd3b..59e507ed3e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf @@ -56,6 +56,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -110,6 +119,18 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf index 7f9e4d2d44..05e441d396 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf @@ -81,6 +81,29 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 53; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_1 = 81; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 54; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -135,6 +158,22 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=2 L=12 + initialULBWPstartSymbolAndLength_0 = 53; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf index ab4713f8b5..3bd884b602 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf @@ -69,6 +69,29 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_1 = 53; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 54; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -123,6 +146,21 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 55; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index 9238ea1809..de6bafc9f7 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -73,6 +73,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -127,6 +136,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf index 86318d80e2..c4b06c1139 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf @@ -74,6 +74,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -128,6 +137,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 2; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index bbdd8b9c0f..c7531f39ba 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -74,6 +74,15 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -128,6 +137,19 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf index e9577ee265..a0d25053b6 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf @@ -70,6 +70,29 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_1 = 53; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 54; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -124,6 +147,22 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; + initialULBWPmappingType_0 = 1 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 55; + + initialULBWPk2_1 = 6; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; From 799e52745f1eafeb647be826a71e7d748355d381 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Fri, 24 Dec 2021 13:47:47 +0000 Subject: [PATCH 32/67] Adjust sync based on PSS improvements --- executables/nr-ue.c | 3 --- openair1/PHY/NR_UE_TRANSPORT/pss_nr.c | 15 ++++++++++++--- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 6 +----- 3 files changed, 13 insertions(+), 11 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index c90a5119cd..702c214d9e 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -642,9 +642,6 @@ void *UE_thread(void *arg) { readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms); writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms); } else { - //UE->rx_offset_diff = computeSamplesShift(UE); - - readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms) - UE->rx_offset_diff; writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms)- UE->rx_offset_diff; diff --git a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c index 4ee5884afd..6865a636d5 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c @@ -981,6 +981,7 @@ int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off) { int **rxdata = ue->common_vars.rxdata; NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; uint8_t Nid2 = GET_NID2(frame_parms->Nid_cell); + int peak_position_ref = ((frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples)<<1) + frame_parms->nb_prefix_samples0; int maxval=0; for (int i=0;i<2*(frame_parms->ofdm_symbol_size);i++) { @@ -996,8 +997,8 @@ int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off) { int peak_position = 0; int64_t result = 0; int64_t avg=0; - int start = 2*(frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples) + frame_parms->nb_prefix_samples0 - 200; - int length = 2*frame_parms->ofdm_symbol_size + 200; + int start = peak_position_ref - (frame_parms->ofdm_symbol_size>>3); + int length = frame_parms->ofdm_symbol_size + (frame_parms->ofdm_symbol_size>>3); memset(pss_corr_ue[Nid2],0,(start+length)*sizeof(int64_t)); for (int n=start; n < start+length; n+=4) { // for (int ar=0; arnb_antennas_rx; ar++) { @@ -1019,7 +1020,15 @@ int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off) { return 0; } - int peak_position_diff = peak_position - ( ((frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples)<<1) + frame_parms->nb_prefix_samples0); + int peak_position_diff = peak_position_ref - peak_position; + + ue->rx_offset_diff = 0; + if(peak_position_diff != 0) { + ue->rx_offset_diff = peak_position_diff>>3; + if (ue->rx_offset_diff == 0) { + ue->rx_offset_diff = peak_position_diff > 0 ? 1 : -1; + } + } // Fractional frequency offset computation according to Cross-correlation Synchronization Algorithm Using PSS // Shoujun Huang, Yongtao Su, Ying He and Shan Tang, "Joint time and frequency offset estimation in LTE downlink," diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index fb36b3ee86..732d975be4 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -1648,7 +1648,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, if ((ue->decode_MIB == 1) && slot_pbch) { - int peak_position_diff = nr_adjust_pss_synch(ue, (int *)&ue->common_vars.freq_offset); + nr_adjust_pss_synch(ue, (int *)&ue->common_vars.freq_offset); LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); nr_ue_pbch_procedures(gNB_id, ue, proc, 0); @@ -1664,10 +1664,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, 16384); }*/ - //ue->rx_offset = peak_position_diff; - - ue->rx_offset_diff = -peak_position_diff; - LOG_D(PHY, "Doing N0 measurements in %s\n", __FUNCTION__); nr_ue_rrc_measurements(ue, proc, nr_slot_rx); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PBCH, VCD_FUNCTION_OUT); From e1d88d6fc5147c0c42d2511e334a87266ccf452b Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Fri, 24 Dec 2021 13:49:56 +0000 Subject: [PATCH 33/67] Change log level --- openair1/PHY/NR_UE_TRANSPORT/pss_nr.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c index 6865a636d5..3bf12c0bab 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c @@ -1058,13 +1058,7 @@ int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off) { // Computing absolute value of frequency offset *f_off = ffo_est*frame_parms->subcarrier_spacing; - /*nr_rf_card_config_freq(&openair0_cfg[ue->rf_map.card], openair0_cfg->tx_freq[0], openair0_cfg->rx_freq[0], ue->common_vars.freq_offset); - - if (ue->mode != loop_through_memory) { - ue->rfdevice.trx_set_freq_func(&ue->rfdevice,&openair0_cfg[0],0); - }*/ - - LOG_I(NR_PHY,"nr_adjust_pss_synch: peak_position %d, peak_position_diff %d, peak_value %d dB, avg %d dB, ffo %lf\n", + LOG_D(NR_PHY,"nr_adjust_pss_synch: peak_position %d, peak_position_diff %d, peak_value %d dB, avg %d dB, ffo %lf\n", peak_position, peak_position_diff, dB_fixed64(peak_value),dB_fixed64(avg),ffo_est); return peak_position_diff; From b4c78a9c5b8439379d385cb325ab0fd5e65a2739 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 28 Dec 2021 11:05:52 +0100 Subject: [PATCH 34/67] fix compilation issues after merge --- openair2/GNB_APP/gnb_config.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 -- openair2/RRC/NR/rrc_gNB.c | 8 ++++---- openair2/RRC/NR/rrc_gNB_nsa.c | 4 ++-- 4 files changed, 7 insertions(+), 9 deletions(-) diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 84b3e4159a..8a1a22412f 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -2050,7 +2050,7 @@ void configure_gnb_du_mac(int inst) { rrc->configuration.pdsch_AntennaPorts, rrc->configuration.pusch_AntennaPorts, rrc->configuration.sib1_tda, - rrc->configuration.minRXTXTIMEpdsch, + rrc->configuration.minRXTXTIME, rrc->configuration.scc, NULL, 0, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 4f889910c1..25ede7a906 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -902,9 +902,7 @@ void nr_get_Msg3alloc(module_id_t module_id, const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; const int n_slots_frame = nr_slots_per_frame[mu]; - const int nrofUplinkSymbols = (frame_type==TDD) ? tdd->nrofUplinkSymbols : 11; // TODO change in favor of harmonization branch uint8_t k2 = 0; - lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); if (frame_type == TDD) { int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); int nb_slots_per_period = ((1<carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, - rrc->carrier.minRXTXTIMEpdsch, + rrc->carrier.minRXTXTIME, (NR_ServingCellConfigCommon_t *)rrc->carrier.servingcellconfigcommon, &rrc->carrier.mib, 0, @@ -318,7 +318,7 @@ void apply_macrlc_config(gNB_RRC_INST *rrc, rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, - rrc->carrier.minRXTXTIMEpdsch, + rrc->carrier.minRXTXTIME, NULL, NULL, 0, @@ -512,7 +512,7 @@ rrc_gNB_generate_RRCSetup_for_RRCReestablishmentRequest( rrc_instance_p->carrier.pdsch_AntennaPorts, rrc_instance_p->carrier.pusch_AntennaPorts, rrc_instance_p->carrier.sib1_tda, - rrc_instance_p->carrier.minRXTXTIMEpdsch, + rrc_instance_p->carrier.minRXTXTIME, (NR_ServingCellConfigCommon_t *)rrc_instance_p->carrier.servingcellconfigcommon, &rrc_instance_p->carrier.mib, 0, @@ -1278,7 +1278,7 @@ rrc_gNB_process_RRCReconfigurationComplete( rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, - rrc->carrier.minRXTXTIMEpdsch, + rrc->carrier.minRXTXTIME, NULL, NULL, 0, diff --git a/openair2/RRC/NR/rrc_gNB_nsa.c b/openair2/RRC/NR/rrc_gNB_nsa.c index 3b00404a21..c671ceebae 100644 --- a/openair2/RRC/NR/rrc_gNB_nsa.c +++ b/openair2/RRC/NR/rrc_gNB_nsa.c @@ -352,7 +352,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, - rrc->carrier.minRXTXTIMEpdsch, + rrc->carrier.minRXTXTIME, rrc->carrier.servingcellconfigcommon, &rrc->carrier.mib, 1, // add_ue flag @@ -364,7 +364,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ rrc->carrier.pdsch_AntennaPorts, rrc->carrier.pusch_AntennaPorts, rrc->carrier.sib1_tda, - rrc->carrier.minRXTXTIMEpdsch, + rrc->carrier.minRXTXTIME, NULL, NULL, 1, // add_ue flag From f76aac65829c16e0583a2d00705771e4f98c7520 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 30 Dec 2021 10:27:02 +0100 Subject: [PATCH 35/67] bugfix in setting ue tdd settings --- ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf | 2 +- openair2/LAYER2/NR_MAC_UE/config_ue.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf index ff05aa6e65..a2b4d86dfc 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -11,7 +11,7 @@ gNBs = # cell_type = "CELL_MACRO_GNB"; gNB_name = "gNB-OAI"; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; // Tracking area code, 0x0000 and 0xfffe are reserved values tracking_area_code = 1; diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index c9e761202e..bcb31b7592 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -47,9 +47,8 @@ void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int nrofUplinkSlots = tdd_config->pattern1.nrofUplinkSlots; int nrofUplinkSymbols = tdd_config->pattern1.nrofUplinkSymbols; int slot_number = 0; - int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period); + int nb_periods_per_frame = get_nb_periods_per_frame(tdd_config->pattern1.dl_UL_TransmissionPeriodicity); int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<tdd_table.tdd_period_in_slots = nb_slots_per_period; From 1be69de2e6ccde6b98cd29f5ac7d9a6917ad8308 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Mon, 3 Jan 2022 15:37:39 +0000 Subject: [PATCH 36/67] Code cleanup --- openair1/PHY/NR_REFSIG/pss_nr.h | 2 +- openair1/PHY/NR_UE_TRANSPORT/pss_nr.c | 34 ++------------------- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 2 +- 3 files changed, 5 insertions(+), 33 deletions(-) diff --git a/openair1/PHY/NR_REFSIG/pss_nr.h b/openair1/PHY/NR_REFSIG/pss_nr.h index e2dd0e456b..3b480d7fab 100644 --- a/openair1/PHY/NR_REFSIG/pss_nr.h +++ b/openair1/PHY/NR_REFSIG/pss_nr.h @@ -141,7 +141,7 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain int *eNB_id, int *f_off); -int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off); +int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue); #endif #undef EXTERN diff --git a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c index 3bf12c0bab..8ff0795871 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c @@ -976,7 +976,7 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain return(peak_position); } -int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off) { +int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue) { int **rxdata = ue->common_vars.rxdata; NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; @@ -1030,36 +1030,8 @@ int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue, int *f_off) { } } - // Fractional frequency offset computation according to Cross-correlation Synchronization Algorithm Using PSS - // Shoujun Huang, Yongtao Su, Ying He and Shan Tang, "Joint time and frequency offset estimation in LTE downlink," - // 7th International Conference on Communications and Networking in China, 2012. - - // Computing cross-correlation at peak on half the symbol size for first half of data - int64_t result1 = dot_product64((short*)primary_synchro_time_nr[Nid2], - (short*) &(rxdata[0][peak_position]), - frame_parms->ofdm_symbol_size>>1, - shift); - - // Computing cross-correlation at peak on half the symbol size for data shifted by half symbol size - // as it is real and complex it is necessary to shift by a value equal to symbol size to obtain such shift - int64_t result2 = dot_product64((short*)primary_synchro_time_nr[Nid2]+(frame_parms->ofdm_symbol_size), - (short*) &(rxdata[0][peak_position])+frame_parms->ofdm_symbol_size, - frame_parms->ofdm_symbol_size>>1, - shift); - - int64_t re1 = ((int*) &result1)[0]; - int64_t re2 = ((int*) &result2)[0]; - int64_t im1 = ((int*) &result1)[1]; - int64_t im2 = ((int*) &result2)[1]; - - // Estimation of fractional frequency offset: angle[(result1)'*(result2)]/pi - double ffo_est = atan2(re1*im2-re2*im1,re1*re2+im1*im2)/M_PI; - - // Computing absolute value of frequency offset - *f_off = ffo_est*frame_parms->subcarrier_spacing; - - LOG_D(NR_PHY,"nr_adjust_pss_synch: peak_position %d, peak_position_diff %d, peak_value %d dB, avg %d dB, ffo %lf\n", - peak_position, peak_position_diff, dB_fixed64(peak_value),dB_fixed64(avg),ffo_est); + LOG_D(NR_PHY,"nr_adjust_pss_synch: peak_position %d, peak_position_diff %d, peak_value %d dB, avg %d dB\n", + peak_position, peak_position_diff, dB_fixed64(peak_value),dB_fixed64(avg)); return peak_position_diff; } diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 732d975be4..0b543da275 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -1648,7 +1648,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, if ((ue->decode_MIB == 1) && slot_pbch) { - nr_adjust_pss_synch(ue, (int *)&ue->common_vars.freq_offset); + nr_adjust_pss_synch(ue); LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); nr_ue_pbch_procedures(gNB_id, ue, proc, 0); From 8a428d734ebaf8dbbf4435e158b96e3557053089 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Tue, 4 Jan 2022 11:52:16 +0000 Subject: [PATCH 37/67] Fix nr_pbchsim to avoid multiple ffo compensations for each trial on input samples --- openair1/SIMULATION/NR_PHY/pbchsim.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/pbchsim.c b/openair1/SIMULATION/NR_PHY/pbchsim.c index 1169b8ecd8..a5c6222fe5 100644 --- a/openair1/SIMULATION/NR_PHY/pbchsim.c +++ b/openair1/SIMULATION/NR_PHY/pbchsim.c @@ -655,13 +655,6 @@ int main(int argc, char **argv) frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples); printf("txlev %d (%f)\n",txlev,10*log10(txlev));*/ - - for (i=0; inb_antennas_tx; aa++) { - r_re[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)]); - r_im[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)+1]); - } - } for (SNR=snr0; SNRnb_antennas_tx; aa++) { + r_re[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)]); + r_im[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)+1]); + } + } + // multipath channel //multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0); @@ -697,13 +698,11 @@ int main(int argc, char **argv) 0.0, // IQ imbalance (dB), 0.0); // IQ phase imbalance (rad) - for (i=0; inb_antennas_rx; aa++) { - - ((short*) UE->common_vars.rxdata[aa])[2*i] = (short) ((r_re[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0))); - ((short*) UE->common_vars.rxdata[aa])[2*i+1] = (short) ((r_im[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0))); - } + for (aa=0; aanb_antennas_rx; aa++) { + ((short*) UE->common_vars.rxdata[aa])[2*i] = (short) ((r_re[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0))); + ((short*) UE->common_vars.rxdata[aa])[2*i+1] = (short) ((r_im[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0))); + } } if (n_trials==1) { From d4f408062623901d67e02d60be3c82c5de2bb608 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Wed, 5 Jan 2022 14:00:09 +0000 Subject: [PATCH 38/67] Revert "Revert "Merge remote-tracking branch 'origin/develop' into ue-phy-sync-improvements"" This reverts commit 29268d0a66c1a88a0058de066ce5968e9d8bfe3d. --- ci-scripts/Jenkinsfile-trig-nsa | 11 +- ci-scripts/checkCodingFormattingRules.sh | 4 +- ci-scripts/conf_files/benetel-5g.conf | 22 - .../enb.band38.lte_2x2.100PRB.usrpn310.conf | 2 +- .../enb.band38.nsa_2x2.100PRB.usrpn310.conf | 2 +- .../gNB_SA_n78_106PRB.2x2_usrpn310.conf | 29 - .../gNB_SA_n78_133PRB.2x2_usrpn310.conf | 29 - .../gnb.band261.tm1.32PRB.usrpn300.conf | 26 +- .../gnb.band66.tm1.106PRB.usrpn300.conf | 22 +- .../gnb.band78.nsa_2x2.106PRB.usrpn310.conf | 21 - ...gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf | 29 - .../gnb.band78.sa.fr1.106PRB.usrpn310.conf | 659 +++++++++--------- .../gnb.band78.sa.fr1.162PRB.usrpn310.conf | 316 +++++++++ .../gnb.band78.tm1.106PRB.usrpn300.conf | 24 +- .../gnb.band78.tm1.fr1.106PRB.usrpb210.conf | 21 - .../gnb.band78.tm1.fr1.106PRB.usrpn310.conf | 28 - ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml | 2 +- .../fr1_nsa_2x2_quectel_attach_detach.xml | 2 +- ci-scripts/xml_files/fr1_sa_oaiue_n310.xml | 6 +- ci-scripts/xml_files/fr1_sa_oaiue_x300.xml | 123 ++++ .../xml_files/fr1_sa_quectel_162prb.xml | 129 ++++ .../fr1_sa_quectel_stages_162prb.xml | 166 +++++ cmake_targets/CMakeLists.txt | 10 +- common/utils/nr/nr_common.c | 54 +- common/utils/nr/nr_common.h | 11 +- common/utils/threadPool/Makefile | 14 +- common/utils/threadPool/thread-pool.c | 45 +- common/utils/threadPool/thread-pool.h | 5 +- doc/testing_gnb_w_cots_ue_resources/gnb.conf | 37 - executables/nr-gnb.c | 10 +- executables/nr-ue.c | 2 +- openair1/PHY/CODING/crc.h | 543 +++++++++++++++ openair1/PHY/CODING/crc_byte.c | 86 ++- openair1/PHY/CODING/crcext.h | 89 +++ openair1/PHY/CODING/nrLDPC_defs.h | 37 +- .../nrLDPC_encoder/ldpc_encode_parity_check.c | 15 +- .../PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c | 2 - .../nrLDPC_encoder/ldpc_encoder_optim.c | 25 +- .../nrLDPC_encoder/ldpc_encoder_optim8seg.c | 18 +- .../ldpc_encoder_optim8segmulti.c | 94 ++- openair1/PHY/CODING/types.h | 98 +++ openair1/PHY/INIT/nr_init_ue.c | 2 +- openair1/PHY/INIT/nr_parms.c | 1 - openair1/PHY/LTE_REFSIG/lte_refsig.h | 3 +- openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c | 75 -- openair1/PHY/LTE_TRANSPORT/lte_mcs.c | 22 +- openair1/PHY/LTE_TRANSPORT/pcfich.c | 2 +- openair1/PHY/LTE_TRANSPORT/pucch.c | 2 +- .../LTE_TRANSPORT/transport_common_proto.h | 2 +- openair1/PHY/LTE_TRANSPORT/transport_proto.h | 46 +- openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c | 2 +- .../PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c | 54 +- .../LTE_UE_TRANSPORT/dlsch_llr_computation.c | 6 +- openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c | 4 +- .../PHY/LTE_UE_TRANSPORT/transport_proto_ue.h | 2 +- openair1/PHY/NR_TRANSPORT/nr_dlsch.c | 209 ++++-- openair1/PHY/NR_TRANSPORT/nr_dlsch.h | 3 +- openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c | 389 +++++------ openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c | 5 - .../NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 46 +- .../nr_dlsch_llr_computation.c | 2 +- .../NR_UE_TRANSPORT/nr_transport_proto_ue.h | 39 +- openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c | 5 +- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c | 4 +- openair1/PHY/defs_gNB.h | 17 +- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 5 +- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 27 +- openair1/SIMULATION/NR_PHY/dlschsim.c | 29 +- openair1/SIMULATION/NR_PHY/dlsim.c | 45 +- openair1/SIMULATION/NR_PHY/nr_unitary_defs.h | 162 +---- openair1/SIMULATION/NR_PHY/ulsim.c | 8 +- openair2/COMMON/rrc_messages_types.h | 2 +- openair2/GNB_APP/RRC_nr_paramsvalues.h | 194 ------ openair2/GNB_APP/gnb_config.c | 127 +++- openair2/GNB_APP/gnb_paramdef.h | 6 +- openair2/LAYER2/NR_MAC_UE/config_ue.c | 39 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 10 +- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 54 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 42 +- openair2/LAYER2/NR_MAC_gNB/main.c | 2 +- openair2/RRC/NR/MESSAGES/asn1_msg.c | 6 +- openair2/RRC/NR/nr_rrc_config.c | 159 ++--- openair2/RRC/NR/nr_rrc_config.h | 25 +- openair2/RRC/NR/nr_rrc_defs.h | 2 +- openair2/RRC/NR/rrc_gNB.c | 77 +- openair2/RRC/NR/rrc_gNB_nsa.c | 4 +- openair2/RRC/NR/rrc_gNB_reconfig.c | 16 +- .../GENERIC-LTE-EPC/CONF/benetel-5g.conf | 22 - .../CONF/gnb.band257.tm1.32PRB.usrpn300.conf | 23 - .../CONF/gnb.band257.tm1.32PRB.usrpx300.conf | 21 - .../CONF/gnb.band257.tm1.66PRB.usrpn300.conf | 22 - .../CONF/gnb.band261.tm1.32PRB.usrpn300.conf | 21 - .../CONF/gnb.band66.tm1.106PRB.usrpn300.conf | 21 - .../CONF/gnb.band66.tm1.106PRB.usrpx300.conf | 21 - .../gnb.band78.106PRB.30kHz,usrpb2x0.conf | 21 - .../CONF/gnb.band78.106PRB.slave.conf | 21 - .../CONF/gnb.band78.slave.conf | 21 - .../gnb.band78.tm1.106PRB.PTRS.usrpx300.conf | 23 - .../CONF/gnb.band78.tm1.106PRB.usrpb210.conf | 21 - .../CONF/gnb.band78.tm1.106PRB.usrpn300.conf | 22 - .../CONF/gnb.band78.tm1.106PRB.usrpx300.conf | 23 - .../CONF/gnb.band78.tm1.217PRB.usrpn300.conf | 21 - .../CONF/gnb.band78.tm1.217PRB.usrpx300.conf | 21 - .../CONF/gnb.band78.tm1.24PRB.usrpb210.conf | 23 - .../CONF/gnb.band78.tm1.24PRB.usrpn300.conf | 23 - .../CONF/gnb.band78.tm1.24PRB.usrpx300.conf | 23 - .../CONF/gnb.band78.tm1.273PRB.usrpn300.conf | 21 - .../CONF/rcc.band78.tm1.106PRB.nfapi.conf | 39 -- .../GENERIC-LTE-EPC/CONF/testing_gnb.conf | 21 - .../CONF/testing_gnb_24PRB.conf | 36 - .../CONF/testing_gnb_n310.conf | 21 - .../CONF/testing_gnb_nsa_n310.conf | 21 - .../PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf | 39 -- ...b.band78.tm1.106PRB.usrpn300.gtp-itti.conf | 38 - .../gnb.sa.band41.fr1.106PRB.usrpb210.conf | 22 - ...gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf | 22 - .../gnb.sa.band78.fr1.106PRB.usrpb210.conf | 22 - ...b.sa.band78.fr1.106PRB.usrpb210.sabox.conf | 39 -- 120 files changed, 2814 insertions(+), 2796 deletions(-) create mode 100644 ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf create mode 100644 ci-scripts/xml_files/fr1_sa_oaiue_x300.xml create mode 100644 ci-scripts/xml_files/fr1_sa_quectel_162prb.xml create mode 100644 ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml create mode 100644 openair1/PHY/CODING/crc.h create mode 100644 openair1/PHY/CODING/crcext.h create mode 100644 openair1/PHY/CODING/types.h delete mode 100644 openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c diff --git a/ci-scripts/Jenkinsfile-trig-nsa b/ci-scripts/Jenkinsfile-trig-nsa index 4a56270e90..7b4238d678 100644 --- a/ci-scripts/Jenkinsfile-trig-nsa +++ b/ci-scripts/Jenkinsfile-trig-nsa @@ -88,7 +88,15 @@ pipeline { // booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) //] //calling OAIUE N310 - build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [ + //build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [ + // string(name: 'eNB_MR', value: String.valueOf(MR)), + // string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)), + // string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)), + // string(name: 'eNB_TargetBranch', value: String.valueOf(TARGET_BRANCH)), + // booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) + //] + //calling OAIUE N310-X300 + build job: "RAN-SA-OAIUE-N310-X300-CN5G", wait : true, propagate : false, parameters: [ string(name: 'eNB_MR', value: String.valueOf(MR)), string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)), string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)), @@ -96,7 +104,6 @@ pipeline { booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) ] - } } } diff --git a/ci-scripts/checkCodingFormattingRules.sh b/ci-scripts/checkCodingFormattingRules.sh index 45cf08aa9a..a805f765df 100755 --- a/ci-scripts/checkCodingFormattingRules.sh +++ b/ci-scripts/checkCodingFormattingRules.sh @@ -77,7 +77,7 @@ then IS_NFAPI=`echo $FILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true` IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FILE || true` IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FILE || true` - IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true` + IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true` if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ] then if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ] @@ -198,7 +198,7 @@ do IS_NFAPI=`echo $FULLFILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true` IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FULLFILE || true` IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FULLFILE || true` - IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true` + IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true` if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ] then if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ] diff --git a/ci-scripts/conf_files/benetel-5g.conf b/ci-scripts/conf_files/benetel-5g.conf index 47898aad15..79b2f7f877 100644 --- a/ci-scripts/conf_files/benetel-5g.conf +++ b/ci-scripts/conf_files/benetel-5g.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -119,19 +110,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; #p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf index d2e91fb872..758bb44879 100644 --- a/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf @@ -237,7 +237,7 @@ RUs = ( max_pdschReferenceSignalPower = -27; max_rxgain = 75; eNB_instances = [0]; - sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2"; + sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2"; } ); diff --git a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf index 6c8d5ba6f0..d1d32e2b58 100644 --- a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf @@ -237,7 +237,7 @@ RUs = ( max_pdschReferenceSignalPower = -27; max_rxgain = 75; eNB_instances = [0]; - sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2"; + sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2"; } ); diff --git a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf index 9bf3136690..77693d5f72 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf @@ -89,19 +89,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -156,22 +143,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf index dfbbdf659d..c9b369eaff 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf @@ -86,19 +86,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 10; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -153,22 +140,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf index e93177e7cc..4338c00b36 100644 --- a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; servingCellConfigCommon = ( { @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,21 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 14; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf index 850cf9a60c..1c2133bebe 100644 --- a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf @@ -24,6 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime = 6; servingCellConfigCommon = ( { @@ -54,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +110,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf index c8dc1477b0..b0a757c9d0 100644 --- a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf index e8be5a6ef0..16456f939c 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf @@ -90,19 +90,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -157,22 +144,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf index f00a343089..ff05aa6e65 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -1,343 +1,316 @@ -Active_gNBs = ( "gNB-OAI"); -# Asn1_verbosity, choice in: none, info, annoying -Asn1_verbosity = "none"; - -gNBs = -( - { - ////////// Identification parameters: - gNB_CU_ID = 0xe00; - -# cell_type = "CELL_MACRO_GNB"; - - gNB_name = "gNB-OAI"; - min_rxtxtime_pdsch = 6; - - // Tracking area code, 0x0000 and 0xfffe are reserved values - tracking_area_code = 1; - - plmn_list = ({ - mcc = 208; - mnc = 97; - mnc_length = 2; - snssaiList = ( - { - sst = 1; - sd = 0x010203; // 0 false, else true - }, - { - sst = 1; - sd = 0x112233; // 0 false, else true - } - ); - }); - - nr_cellid = 12345678L - -# tr_s_preference = "local_mac" - - ////////// Physical parameters: - - ssb_SubcarrierOffset = 0; - pdsch_AntennaPorts = 1; - pusch_AntennaPorts = 1; - #pusch_TargetSNRx10 = 200; - #pucch_TargetSNRx10 = 200; - ul_prbblacklist = "51,52,53,54" - - pdcch_ConfigSIB1 = ( - { - controlResourceSetZero = 11; - searchSpaceZero = 0; - } - ); - - servingCellConfigCommon = ( - { - #spCellConfigCommon - - physCellId = 0; - -# downlinkConfigCommon - #frequencyInfoDL - # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 - #absoluteFrequencySSB = 620640; - # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 - absoluteFrequencySSB = 621312; - # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 - #absoluteFrequencySSB = 634080; - # this is 3600.48 MHz - #absoluteFrequencySSB = 640032; - #dl_frequencyBand = 78; - # this is 3301.68 MHz - #dl_absoluteFrequencyPointA = 620112; - # this is 3300.60 MHz - dl_absoluteFrequencyPointA = 620040; - # this is 3502.56 MHz - #dl_absoluteFrequencyPointA = 633552; - # this is 3600.48 MHz - #dl_absoluteFrequencyPointA = 640032; - #scs-SpecificCarrierList - dl_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - dl_subcarrierSpacing = 1; - dl_carrierBandwidth = 106; - #initialDownlinkBWP - #genericParameters - # this is RBstart=0,L=106 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialDLBWPsubcarrierSpacing = 1; - #pdcch-ConfigCommon - initialDLBWPcontrolResourceSetZero = 11; - initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; - - #uplinkConfigCommon - #frequencyInfoUL - ul_frequencyBand = 78; - #scs-SpecificCarrierList - ul_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - ul_subcarrierSpacing = 1; - ul_carrierBandwidth = 106; - pMax = 20; - #initialUplinkBWP - #genericParameters - initialULBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialULBWPsubcarrierSpacing = 1; - #rach-ConfigCommon - #rach-ConfigGeneric - prach_ConfigurationIndex = 98; -#prach_msg1_FDM -#0 = one, 1=two, 2=four, 3=eight - prach_msg1_FDM = 0; - prach_msg1_FrequencyStart = 0; - zeroCorrelationZoneConfig = 12; - preambleReceivedTargetPower = -104; -#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) - preambleTransMax = 6; -#powerRampingStep -# 0=dB0,1=dB2,2=dB4,3=dB6 - powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; -#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR -#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen - ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; -#oneHalf (0..15) 4,8,12,16,...60,64 - ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; -#ra_ContentionResolutionTimer -#(0..7) 8,16,24,32,40,48,56,64 - ra_ContentionResolutionTimer = 7; - rsrp_ThresholdSSB = 19; -#prach-RootSequenceIndex_PR -#1 = 839, 2 = 139 - prach_RootSequenceIndex_PR = 2; - prach_RootSequenceIndex = 1; - # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex - # - msg1_SubcarrierSpacing = 1, -# restrictedSetConfig -# 0=unrestricted, 1=restricted type A, 2=restricted type B - restrictedSetConfig = 0, - - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - - msg3_DeltaPreamble = 1; - p0_NominalWithGrant =-90; - -# pucch-ConfigCommon setup : -# pucchGroupHopping -# 0 = neither, 1= group hopping, 2=sequence hopping - pucchGroupHopping = 0; - hoppingId = 40; - p0_nominal = -90; -# ssb_PositionsInBurs_BitmapPR -# 1=short, 2=medium, 3=long - ssb_PositionsInBurst_PR = 2; - ssb_PositionsInBurst_Bitmap = 1; - -# ssb_periodicityServingCell -# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 - ssb_periodicityServingCell = 2; - -# dmrs_TypeA_position -# 0 = pos2, 1 = pos3 - dmrs_TypeA_Position = 0; - -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - subcarrierSpacing = 1; - - - #tdd-UL-DL-ConfigurationCommon -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - referenceSubcarrierSpacing = 1; - # pattern1 - # dl_UL_TransmissionPeriodicity - # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; - nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; - - ssPBCH_BlockPower = -25; - } - - ); - - - # ------- SCTP definitions - SCTP : - { - # Number of streams to use in input/output - SCTP_INSTREAMS = 2; - SCTP_OUTSTREAMS = 2; - }; - - ////////// AMF parameters: - amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; - ipv6 = "192:168:30::17"; - active = "yes"; - preference = "ipv4"; - } - ); - - NETWORK_INTERFACES : - { - - GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; - GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; - GNB_INTERFACE_NAME_FOR_NGU = "em1"; - GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; - GNB_PORT_FOR_S1U = 2152; # Spec 2152 - }; - - } -); - -MACRLCs = ( - { - num_cc = 1; - tr_s_preference = "local_L1"; - tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 200; - pucch_TargetSNRx10 = 200; - ulsch_max_frame_inactivity = 1; - } -); - -L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 2; - prach_dtx_threshold = 120; -# pucch0_dtx_threshold = 150; - } -); - -RUs = ( - { - local_rf = "yes" - nb_tx = 1 - nb_rx = 1 - att_tx = 0 - att_rx = 0; - bands = [78]; - max_pdschReferenceSignalPower = -27; - max_rxgain = 75; - eNB_instances = [0]; - ##beamforming 1x2 matrix: 1 layer x 2 antennas - bf_weights = [0x00007fff, 0x0000]; - ##beamforming 1x4 matrix: 1 layer x 4 antennas - #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; - ## beamforming 2x2 matrix: - # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; - ## beamforming 4x4 matrix: - #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; - sf_extension = 0 - sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" - } -); - -THREAD_STRUCT = ( - { - #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" - parallel_config = "PARALLEL_SINGLE_THREAD"; - #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" - worker_config = "WORKER_ENABLE"; - } -); - -security = { - # preferred ciphering algorithms - # the first one of the list that an UE supports in chosen - # valid values: nea0, nea1, nea2, nea3 - ciphering_algorithms = ( "nea0" ); - - # preferred integrity algorithms - # the first one of the list that an UE supports in chosen - # valid values: nia0, nia1, nia2, nia3 - integrity_algorithms = ( "nia2", "nia0" ); - - # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter - # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' - drb_ciphering = "yes"; - drb_integrity = "no"; -}; - - log_config : - { - global_log_level ="info"; - global_log_verbosity ="medium"; - hw_log_level ="info"; - hw_log_verbosity ="medium"; - phy_log_level ="info"; - phy_log_verbosity ="medium"; - mac_log_level ="info"; - mac_log_verbosity ="high"; - rlc_log_level ="info"; - rlc_log_verbosity ="medium"; - pdcp_log_level ="info"; - pdcp_log_verbosity ="medium"; - rrc_log_level ="info"; - rrc_log_verbosity ="medium"; - f1ap_log_level ="debug"; - f1ap_log_verbosity ="medium"; - }; +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_CU_ID = 0xe00; + +# cell_type = "CELL_MACRO_GNB"; + + gNB_name = "gNB-OAI"; + min_rxtxtime_pdsch = 6; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + + plmn_list = ({ + mcc = 208; + mnc = 97; + mnc_length = 2; + snssaiList = ( + { + sst = 1; + sd = 0x010203; // 0 false, else true + }, + { + sst = 1; + sd = 0x112233; // 0 false, else true + } + ); + }); + + nr_cellid = 12345678L + +# tr_s_preference = "local_mac" + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 1; + #pusch_TargetSNRx10 = 200; + #pucch_TargetSNRx10 = 200; + ul_prbblacklist = "51,52,53,54" + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 + #absoluteFrequencySSB = 620640; + # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 + absoluteFrequencySSB = 621312; + # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 + #absoluteFrequencySSB = 634080; + # this is 3600.48 MHz + #absoluteFrequencySSB = 640032; + #dl_frequencyBand = 78; + # this is 3301.68 MHz + #dl_absoluteFrequencyPointA = 620112; + # this is 3300.60 MHz + dl_absoluteFrequencyPointA = 620040; + # this is 3502.56 MHz + #dl_absoluteFrequencyPointA = 633552; + # this is 3600.48 MHz + #dl_absoluteFrequencyPointA = 640032; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=0,L=106 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 0; + + + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 12; + preambleReceivedTargetPower = -104; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = -25; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + ////////// AMF parameters: + amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + NETWORK_INTERFACES : + { + + GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; + GNB_INTERFACE_NAME_FOR_NGU = "em1"; + GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + ulsch_max_frame_inactivity = 1; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + pusch_proc_threads = 4; + prach_dtx_threshold = 120; +# pucch0_dtx_threshold = 150; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 0 + att_rx = 0; + bands = [78]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + eNB_instances = [0]; + ##beamforming 1x2 matrix: 1 layer x 2 antennas + bf_weights = [0x00007fff, 0x0000]; + ##beamforming 1x4 matrix: 1 layer x 4 antennas + #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; + ## beamforming 2x2 matrix: + # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; + ## beamforming 4x4 matrix: + #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; + sf_extension = 0 + sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; + }; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf new file mode 100644 index 0000000000..ff05aa6e65 --- /dev/null +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf @@ -0,0 +1,316 @@ +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_CU_ID = 0xe00; + +# cell_type = "CELL_MACRO_GNB"; + + gNB_name = "gNB-OAI"; + min_rxtxtime_pdsch = 6; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + + plmn_list = ({ + mcc = 208; + mnc = 97; + mnc_length = 2; + snssaiList = ( + { + sst = 1; + sd = 0x010203; // 0 false, else true + }, + { + sst = 1; + sd = 0x112233; // 0 false, else true + } + ); + }); + + nr_cellid = 12345678L + +# tr_s_preference = "local_mac" + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 1; + #pusch_TargetSNRx10 = 200; + #pucch_TargetSNRx10 = 200; + ul_prbblacklist = "51,52,53,54" + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 + #absoluteFrequencySSB = 620640; + # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 + absoluteFrequencySSB = 621312; + # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 + #absoluteFrequencySSB = 634080; + # this is 3600.48 MHz + #absoluteFrequencySSB = 640032; + #dl_frequencyBand = 78; + # this is 3301.68 MHz + #dl_absoluteFrequencyPointA = 620112; + # this is 3300.60 MHz + dl_absoluteFrequencyPointA = 620040; + # this is 3502.56 MHz + #dl_absoluteFrequencyPointA = 633552; + # this is 3600.48 MHz + #dl_absoluteFrequencyPointA = 640032; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=0,L=106 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 0; + + + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 12; + preambleReceivedTargetPower = -104; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = -25; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + ////////// AMF parameters: + amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + NETWORK_INTERFACES : + { + + GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; + GNB_INTERFACE_NAME_FOR_NGU = "em1"; + GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + ulsch_max_frame_inactivity = 1; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + pusch_proc_threads = 4; + prach_dtx_threshold = 120; +# pucch0_dtx_threshold = 150; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 0 + att_rx = 0; + bands = [78]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + eNB_instances = [0]; + ##beamforming 1x2 matrix: 1 layer x 2 antennas + bf_weights = [0x00007fff, 0x0000]; + ##beamforming 1x4 matrix: 1 layer x 4 antennas + #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; + ## beamforming 2x2 matrix: + # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; + ## beamforming 4x4 matrix: + #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; + sf_extension = 0 + sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; + }; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf index 4200300c50..6ade355053 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; servingCellConfigCommon = ( { @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +109,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 38; # this is SS=10 L=3 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf index 015d9ee0d0..b7a04b1f36 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf @@ -52,15 +52,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -115,18 +106,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf index e6bbbf2d41..299a19cc4e 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf @@ -53,19 +53,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0;#for DL slot - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0;#for mixed slot - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -120,21 +107,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml index 86af12b53e..2516af9429 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab1 NSA 2x2 Ping DL UL with QUECTEL tasks - 5 + 1 030000 040000 diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml index 2d17ff38e2..52cf1ec6e8 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab2 NSA 2x2 Attach-Detach with QUECTEL tasks - 5 + 1 031000 041000 diff --git a/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml b/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml index 28eee1e224..cd79e49f2c 100644 --- a/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml +++ b/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml @@ -22,7 +22,7 @@ --> TEST-SA-FR1-Tab1 - SA Ping DL UL with OAI NR UE + SA Ping DL UL with OAI NR UE (N310) tasks 1 @@ -40,9 +40,9 @@ Initialize_OAI_UE - Initialize OAI UE + Initialize OAI UE (N310) nr - --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation + --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation diff --git a/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml b/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml new file mode 100644 index 0000000000..d527737b3c --- /dev/null +++ b/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml @@ -0,0 +1,123 @@ + + + TEST-SA-FR1-Tab2 + SA Ping DL UL with OAI NR UE (X300) + tasks + 1 + + 040000 + 000002 + 010000 + 000002 + 050000 + 050001 + 000001 + 010002 + 080000 + + + + + Initialize_OAI_UE + Initialize OAI UE (X300) + nr + --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "addr=192.168.60.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation + + + + Terminate_OAI_UE + Terminate OAI UE + + + + + Initialize_eNB + Initialize gNB + -O ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf --sa --usrp-tx-thread-config 1 + 0 + 0 + nr + yes + yes + 192.168.18.240 + + + + IdleSleep + Sleep + 5 + + + + IdleSleep + Sleep + 20 + + + + + Ping + Ping from CN to UE: 20pings in 20sec + -c 20 + 5 + + + + Ping + Ping from CN to UE: 100pings in 20sec + -c 100 -i 0.2 + 5 + + + + Iperf + iperf (DL/60Mbps/UDP)(60 sec)(single-ue profile) + -u -b 60M -t 60 + DL + nrmodule2_quectel + 5 + single-ue + + + + Iperf + iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile) + -u -b 3M -t 60 + UL + nrmodule2_quectel + 5 + single-ue + + + + + Terminate_eNB + Terminate gNB + 0 + 0 + nr + + + + diff --git a/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml b/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml new file mode 100644 index 0000000000..2088678707 --- /dev/null +++ b/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml @@ -0,0 +1,129 @@ + + + TEST-SA-FR1-Tab3 + SA Ping DL UL with QUECTEL + tasks + 1 + + 040000 + 000002 + 010000 + 000001 + 050000 + 050001 + 070000 + 070001 + 000001 + 010002 + 080000 + + + + + Initialize_UE + Initialize Quectel + nrmodule2_quectel + yes + + + + + Terminate_UE + Terminate Quectel + nrmodule2_quectel + + + + + Initialize_eNB + Initialize gNB + -O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 + 0 + 0 + nr + yes + yes + 192.168.18.240 + + + + IdleSleep + Sleep + 5 + + + + IdleSleep + Sleep + 20 + + + + + Ping + Ping: 20pings in 20sec + nrmodule2_quectel + -c 20 + 5 + + + + Ping + Ping: 100pings in 20sec + nrmodule2_quectel + -c 100 -i 0,2 + 5 + + + + Iperf + iperf (DL/140Mbps/UDP)(60 sec)(single-ue profile) + -u -b 140M -t 60 + DL + nrmodule2_quectel + 5 + single-ue + + + + Iperf + iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile) + -u -b 3M -t 60 + UL + nrmodule2_quectel + 5 + single-ue + + + + + Terminate_eNB + Terminate gNB + 0 + 0 + nr + + + + diff --git a/ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml b/ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml new file mode 100644 index 0000000000..4b2400a4ac --- /dev/null +++ b/ci-scripts/xml_files/fr1_sa_quectel_stages_162prb.xml @@ -0,0 +1,166 @@ + + + TEST-SA-FR1-Tab4 + SA Staged DL with QUECTEL + tasks + 1 + + 040000 + 000002 + 010000 + 000001 + 050000 + 000001 + 070000 + 000001 + 070001 + 000001 + 070002 + 000001 + 070003 + 000001 + 070004 + 000001 + 070005 + 000001 + 010002 + 080000 + + + + + Initialize_UE + Initialize Quectel + nrmodule2_quectel + yes + + + + + Terminate_UE + Terminate Quectel + nrmodule2_quectel + + + + + Initialize_eNB + Initialize gNB + -O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 + 0 + 0 + nr + yes + yes + 192.168.18.240 + + + + IdleSleep + Sleep + 5 + + + + IdleSleep + Sleep + 20 + + + + + Ping + Ping: 20pings in 20sec + nrmodule2_quectel + -c 20 + 5 + + + + + Iperf + iperf (DL/10Mbps/UDP)(30 sec)(single-ue profile) + -u -b 10M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/20Mbps/UDP)(30 sec)(single-ue profile) + -u -b 20M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/40Mbps/UDP)(30 sec)(single-ue profile) + -u -b 40M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/60Mbps/UDP)(30 sec)(single-ue profile) + -u -b 60M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/90Mbps/UDP)(30 sec)(single-ue profile) + -u -b 90M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/140Mbps/UDP)(30 sec)(single-ue profile) + -u -b 140M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + + + Terminate_eNB + Terminate gNB + 0 + 0 + nr + + + + diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 329ed7bb3d..f513ac0563 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1,4 +1,4 @@ -#/* +#/* # * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more # * contributor license agreements. See the NOTICE file distributed with # * this work for additional information regarding copyright ownership. @@ -308,7 +308,7 @@ else (CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7l") set(COMPILATION_AVX2 "False") endif() if (CPUINFO MATCHES "sse4_1") - set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1") + set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1 -mpclmul") endif() if (CPUINFO MATCHES "ssse3") set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -mssse3") @@ -889,7 +889,7 @@ set(HWLIB_BENETEL_4G_SOURCE ) add_library(benetel_4g MODULE ${HWLIB_BENETEL_4G_SOURCE} ) -set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") +set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive") TARGET_LINK_LIBRARIES(benetel_4g ${DPDK_LIBS}) @@ -907,7 +907,7 @@ set(HWLIB_BENETEL_5G_SOURCE ) add_library(benetel_5g MODULE ${HWLIB_BENETEL_5G_SOURCE} ) -set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") +set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive") TARGET_LINK_LIBRARIES(benetel_5g ${DPDK_LIBS}) @@ -993,7 +993,6 @@ add_boolean_option(TRACE_RLC_AM_HOLE False "TRACE for RLC AM, TO BE CHANGE add_boolean_option(TRACE_RLC_AM_PDU False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_RESEGMENT False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_RX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") -add_boolean_option(TRACE_RLC_AM_RX_DECODE False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_TX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_TX_STATUS False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_STATUS_CREATION False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") @@ -1572,7 +1571,6 @@ set(PHY_SRC_COMMON ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch_common.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dlsch_scrambling.c - ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_gold_generic.c ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/srs_modulation.c ${OPENAIR1_DIR}/PHY/MODULATION/ofdm_mod.c ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_time.c diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index a704a66c76..0de24bcf6d 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -257,6 +257,48 @@ void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { *n_rb = 6*count; } +int get_nb_periods_per_frame(uint8_t tdd_period) { + + int nb_periods_per_frame; + switch(tdd_period) { + case 0: + nb_periods_per_frame = 20; // 10ms/0p5ms + break; + + case 1: + nb_periods_per_frame = 16; // 10ms/0p625ms + break; + + case 2: + nb_periods_per_frame = 10; // 10ms/1ms + break; + + case 3: + nb_periods_per_frame = 8; // 10ms/1p25ms + break; + + case 4: + nb_periods_per_frame = 5; // 10ms/2ms + break; + + case 5: + nb_periods_per_frame = 4; // 10ms/2p5ms + break; + + case 6: + nb_periods_per_frame = 2; // 10ms/5ms + break; + + case 7: + nb_periods_per_frame = 1; // 10ms/10ms + break; + + default: + AssertFatal(1==0,"Undefined tdd period %d\n", tdd_period); + } + return nb_periods_per_frame; +} + int get_dmrs_port(int nl, uint16_t dmrs_ports) { @@ -276,14 +318,6 @@ int get_dmrs_port(int nl, uint16_t dmrs_ports) { return p; } -int get_num_dmrs(uint16_t dmrs_mask ) { - - int num_dmrs=0; - - for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1); - return(num_dmrs); -} - lte_frame_type_t get_frame_type(uint16_t current_band, uint8_t scs_index) { lte_frame_type_t current_type; @@ -472,6 +506,10 @@ int get_subband_size(int NPRB,int size) { } +int get_SLIV(uint8_t S, uint8_t L) { + return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) ); +} + void SLIV2SL(int SLIV,int *S,int *L) { int SLIVdiv14 = SLIV/14; diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index d9f2b0c03a..44a6e05577 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -50,9 +50,17 @@ typedef struct nr_bandentry_s { extern const size_t nr_bandtable_size; extern nr_bandentry_t nr_bandtable[]; +static inline int get_num_dmrs(uint16_t dmrs_mask ) { + int num_dmrs=0; + + for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1); + return(num_dmrs); +} + + +int get_SLIV(uint8_t S, uint8_t L); void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset); -int get_num_dmrs(uint16_t dmrs_mask); uint16_t config_bandwidth(int mu, int nb_rb, int nr_band); int get_nr_table_idx(int nr_bandP, uint8_t scs_index); int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index); @@ -71,6 +79,7 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx); int get_subband_size(int NPRB,int size); void SLIV2SL(int SLIV,int *S,int *L); int get_dmrs_port(int nl, uint16_t dmrs_ports); +int get_nb_periods_per_frame(uint8_t tdd_period); #define CEILIDIV(a,b) ((a+b-1)/b) #define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1)) diff --git a/common/utils/threadPool/Makefile b/common/utils/threadPool/Makefile index 6b28eb2ba8..729f9dd0e2 100644 --- a/common/utils/threadPool/Makefile +++ b/common/utils/threadPool/Makefile @@ -1,13 +1,3 @@ -all: -measurement_display thread-pool-test - -measurement_display: -measurement_display.c thread-pool.h -gcc measurement_display.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -lpthread -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o -measurement_display - -thread-pool-test: -thread-pool.c thread-pool.h -gcc -g thread-pool.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -I $ {OPENAIR_DIR}/openair2/COMMON $ {OPENAIR_DIR}/common/utils/LOG/log.c $ {OPENAIR_DIR}/common/config/config_userapi.c -$ {OPENAIR_DIR}/common/config/config_load_configmodule.c $ {OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o thread-pool-test +thread-pool-test: thread-pool.c thread-pool.h + gcc -g -O3 thread-pool.c -I ${OPENAIR_DIR}/nfapi/open-nFAPI/nfapi/public_inc -I ${OPENAIR_DIR}/ -I ${OPENAIR_DIR}/common/utils/ -I. ${OPENAIR_DIR}/common/utils/backtrace.c -I ${OPENAIR_DIR}/openair2/COMMON ${OPENAIR_DIR}/common/utils/system.c ${OPENAIR_DIR}/common/utils/LOG/log.c ${OPENAIR_DIR}/common/config/config_userapi.c ${OPENAIR_DIR}/common/config/config_load_configmodule.c ${OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -DMAX_NUM_CCs=1 -I../LOG -I../../utils/T -o thread-pool-test diff --git a/common/utils/threadPool/thread-pool.c b/common/utils/threadPool/thread-pool.c index 77729ae7a7..fff09528a8 100644 --- a/common/utils/threadPool/thread-pool.c +++ b/common/utils/threadPool/thread-pool.c @@ -155,21 +155,24 @@ void initNamedTpool(char *params,tpool_t *pool, bool performanceMeas, char *name } #ifdef TEST_THREAD_POOL +volatile int oai_exit=0; void exit_function(const char *file, const char *function, const int line, const char *s) { } struct testData { int id; + int sleepTime; char txt[30]; }; void processing(void *arg) { struct testData *in=(struct testData *)arg; - printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); + //printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); sprintf(in->txt,"Done by %ld, job %d", pthread_self(), in->id); - usleep(rand()%100); - printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); + in->sleepTime=rand()%1000; + usleep(in->sleepTime); + //printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); } int main() { @@ -208,11 +211,43 @@ int main() { } while(tmp); tpool_t pool; - char params[]="1,2,3,u"; + char params[]="1,2,3,4,5"; initTpool(params,&pool, true); notifiedFIFO_t worker_back; initNotifiedFIFO(&worker_back); + sleep(1); + int cumulProcessTime=0, cumulTime=0; + struct timespec st,end; + clock_gettime(CLOCK_MONOTONIC, &st); + int nb_jobs=4; + for (int i=0; i <1000 ; i++) { + int parall=nb_jobs; + for (int j=0; j id=i; + pushTpool(&pool, work); + } + int sleepmax=0; + while (parall) { + tmp=pullTpool(&worker_back,&pool); + if (tmp) { + parall--; + struct testData *dd=NotifiedFifoData(tmp); + if (dd->sleepTime > sleepmax) + sleepmax=dd->sleepTime; + delNotifiedFIFO_elt(tmp); + } + } + cumulProcessTime+=sleepmax; + } + clock_gettime(CLOCK_MONOTONIC, &end); + long long dur=(end.tv_sec-st.tv_sec)*1000*1000+(end.tv_nsec-st.tv_nsec)/1000; + printf("In µs, Total time per group of %d job:%lld, work time per job %d, overhead per job %lld\n", + nb_jobs, dur/1000, cumulProcessTime/1000, (dur-cumulProcessTime)/(1000*nb_jobs)); + + /* for (int i=0; i <1000 ; i++) { notifiedFIFO_elt_t *work=newNotifiedFIFO_elt(sizeof(struct testData), i, &worker_back, processing); struct testData *x=(struct testData *)NotifiedFifoData(work); @@ -232,7 +267,7 @@ int main() { abortTpool(&pool,510); } while(tmp); - + */ return 0; } #endif diff --git a/common/utils/threadPool/thread-pool.h b/common/utils/threadPool/thread-pool.h index a32b7c3859..1839b42f39 100644 --- a/common/utils/threadPool/thread-pool.h +++ b/common/utils/threadPool/thread-pool.h @@ -31,6 +31,7 @@ #include #include #include +//#include #ifdef DEBUG #define THREADINIT PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP @@ -50,7 +51,7 @@ AssertFatal(ret==0,"ret=%d\n",ret);} #define condbroadcast(signal) {int ret=pthread_cond_broadcast(&signal); \ AssertFatal(ret==0,"ret=%d\n",ret);} -#define condsignal(signal) {int ret=pthread_cond_broadcast(&signal); \ +#define condsignal(signal) {int ret=pthread_cond_signal(&signal); \ AssertFatal(ret==0,"ret=%d\n",ret);} #define tpool_nbthreads(tpool) (tpool.nbThreads) typedef struct notifiedFIFO_elt_s { @@ -130,7 +131,7 @@ static inline void pushNotifiedFIFO_nothreadSafe(notifiedFIFO_t *nf, notifiedFIF static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg) { mutexlock(nf->lockF); pushNotifiedFIFO_nothreadSafe(nf,msg); - condbroadcast(nf->notifF); + condsignal(nf->notifF); mutexunlock(nf->lockF); } diff --git a/doc/testing_gnb_w_cots_ue_resources/gnb.conf b/doc/testing_gnb_w_cots_ue_resources/gnb.conf index 97935f92ee..aae22a92ba 100755 --- a/doc/testing_gnb_w_cots_ue_resources/gnb.conf +++ b/doc/testing_gnb_w_cots_ue_resources/gnb.conf @@ -53,29 +53,7 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=4 //5 (4 is for 43, 5 is for 57) - initialDLBWPstartSymbolAndLength_3 = 57; //43; //57; #uplinkConfigCommon #frequencyInfoUL ul_frequencyBand = 78; @@ -129,21 +107,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/executables/nr-gnb.c b/executables/nr-gnb.c index e9fc06ce4a..dc8960846f 100644 --- a/executables/nr-gnb.c +++ b/executables/nr-gnb.c @@ -401,15 +401,15 @@ void init_gNB_Tpool(int inst) { LOG_I(PHY,"Number of threads requested in config file: %d, Number of threads available on this machine: %d\n",gNB->pusch_proc_threads,numCPU); int threadCnt = min(numCPU, gNB->pusch_proc_threads); if (threadCnt < 2) LOG_E(PHY,"Number of threads for gNB should be more than 1. Allocated only %d\n",threadCnt); - char ul_pool[80]; - sprintf(ul_pool,"-1"); + char pool[80]; + sprintf(pool,"-1"); int s_offset = 0; for (int icpu=1; icputhreadPool, false); + if (getenv("noThreads")) strcpy(pool, "n"); + initTpool(pool, gNB->threadPool, false); // ULSCH decoder result FIFO gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); initNotifiedFIFO(gNB->respDecode); diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 702c214d9e..6694635e26 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -783,7 +783,7 @@ void init_NR_UE_threads(int nb_inst) { /* HACK: this function is needed to compile the UE * fix it somehow */ -int8_t find_dlsch(uint16_t rnti, +int find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB, find_type_t type) { diff --git a/openair1/PHY/CODING/crc.h b/openair1/PHY/CODING/crc.h new file mode 100644 index 0000000000..d6474eae9b --- /dev/null +++ b/openair1/PHY/CODING/crc.h @@ -0,0 +1,543 @@ +/******************************************************************************* + Copyright (c) 2009-2018, Intel Corporation + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE + FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*******************************************************************************/ + +/** + * Header file for module with CRC computation methods + * + * PCLMULQDQ implementation is based on work by: + * Erdinc Ozturk + * Vinodh Gopal + * James Guilford + * + * "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction" + * URL: http://download.intel.com/design/intarch/papers/323102.pdf + */ + +#ifndef __CRC_H__ +#define __CRC_H__ + +#include + +#include "crcext.h" +#include "types.h" +#include +#include + +/** + * PCLMULQDQ CRC computation context structure + */ +struct crc_pclmulqdq_ctx { + /** + * K1 = reminder X^128 / P(X) : 0-63 + * K2 = reminder X^192 / P(X) : 64-127 + */ + uint64_t k1; + uint64_t k2; + + /** + * K3 = reminder X^64 / P(X) : 0-63 + * q = quotient X^64 / P(X) : 64-127 + */ + uint64_t k3; + uint64_t q; + + /** + * p = polynomial / P(X) : 0-63 + * res = reserved : 64-127 + */ + uint64_t p; + uint64_t res; +}; + +/** + * Functions and prototypes + */ + +/** + * @brief Initializes look-up-table (LUT) for given 8 bit polynomial + * + * @param poly CRC polynomial + * @param lut pointer to look-up-table to be initialized + */ +void crc8_init_lut(const uint8_t poly, uint8_t *lut); + +/** + * @brief Calculates 8 bit CRC using LUT method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param lut 256x8bits look-up-table pointer + * + * @return New CRC value + */ +__forceinline +uint8_t crc8_calc_lut(const uint8_t *data, + uint32_t data_len, + uint8_t crc, + const uint8_t *lut) +{ + if (unlikely(data == NULL || lut == NULL)) + return crc; + + while (data_len--) + crc = lut[*data++ ^ crc]; + + return crc; +} + +/** + * @brief Initializes look-up-table (LUT) for given 16 bit polynomial + * + * @param poly CRC polynomial + * @param lut pointer to 256x16bits look-up-table to be initialized + */ +void crc16_init_lut(const uint16_t poly, uint16_t *lut); + +/** + * @brief Calculates 16 bit CRC using LUT method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param lut 256x16bits look-up-table pointer + * + * @return New CRC value + */ +__forceinline +uint16_t crc16_calc_lut(const uint8_t *data, + uint32_t data_len, + uint16_t crc, + const uint16_t *lut) +{ + if (unlikely(data == NULL || lut == NULL)) + return crc; + + while (data_len--) + crc = lut[(crc >> 8) ^ *data++] ^ (crc << 8); + + return crc; +} + +/** + * @brief Initializes look-up-table (LUT) for given 32 bit polynomial + * + * @param poly CRC polynomial + * @param lut pointer to 256x32bits look-up-table to be initialized + */ +void crc32_init_lut(const uint32_t poly, uint32_t *lut); + +/** + * @brief Calculates 32 bit CRC using LUT method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param lut 256x32bits look-up-table pointer + * + * @return New CRC value + */ +__forceinline +uint32_t crc32_calc_lut(const uint8_t *data, + uint32_t data_len, + uint32_t crc, + const uint32_t *lut) +{ + if (unlikely(data == NULL || lut == NULL)) + return crc; + + while (data_len--) + crc = lut[(crc >> 24) ^ *data++] ^ (crc << 8); + + return crc; +} + +/** + * @brief Initializes look up tables for slice-By-2 method. + * + * @param poly CRC polynomial + * @param slice1 slice-by-2 look-up-table 1 + * @param slice2 slice-by-2 look-up-table 2 + * + * @return New CRC value + */ +void crc16_init_slice2(const uint16_t poly, + uint16_t *slice1, + uint16_t *slice2); + +/** + * @brief Calculates 16 bit CRC using Slice-By-2 method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param slice1 256x16bits slice look-up-table 1 + * @param slice2 256x16bits slice look-up-table 2 + * + * @return New CRC value + */ +__forceinline +uint16_t crc16_calc_slice2(const uint8_t *data, + uint32_t data_len, + uint16_t crc, + const uint16_t *slice1, + const uint16_t *slice2) +{ + uint_fast32_t i; + + if (unlikely(data == NULL)) + return crc; + + if (unlikely(slice1 == NULL || slice2 == NULL)) + return crc; + + crc = bswap2(crc); + for (i = (data_len & (~1)), data += (data_len & (~1)); i != 0; + i -= sizeof(uint16_t)) { + crc ^= (*((const uint16_t *)(data - i))); + crc = slice2[(uint8_t)crc] ^ slice1[(uint8_t)(crc >> 8)]; + } + crc = bswap2(crc); + if (data_len & 1) + crc = (crc << 8) ^ bswap2(slice1[(crc >> 8) ^ *data]); + + return crc; +} + +/** + * @brief Initializes look up tables for slice-By-4 method. + * + * @param poly CRC polynomial + * @param slice1 256x32bits slice look-up-table 1 + * @param slice2 256x32bits slice look-up-table 2 + * @param slice3 256x32bits slice look-up-table 3 + * @param slice4 256x32bits slice look-up-table 4 + * + * @return New CRC value + */ +void crc32_init_slice4(const uint32_t poly, + uint32_t *slice1, uint32_t *slice2, + uint32_t *slice3, uint32_t *slice4); + +/** + * @brief Calculates 32 bit CRC using Slice-By-4 method. + * + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param crc CRC initial value + * @param slice1 256x32bits slice look-up-table 1 + * @param slice2 256x32bits slice look-up-table 2 + * @param slice3 256x32bits slice look-up-table 3 + * @param slice4 256x32bits slice look-up-table 4 + * + * @return New CRC value + */ +__forceinline +uint32_t crc32_calc_slice4(const uint8_t *data, + uint32_t data_len, uint32_t crc, + const uint32_t *slice1, const uint32_t *slice2, + const uint32_t *slice3, const uint32_t *slice4) +{ + uint_fast32_t i; + + if (unlikely(data == NULL)) + return crc; + + if (unlikely(slice1 == NULL || slice2 == NULL || + slice3 == NULL || slice4 == NULL)) + return crc; + + crc = bswap4(crc); + for (i = data_len & (~3), data += (data_len & (~3)); i != 0; + i -= sizeof(uint32_t)) { + crc ^= (*((const uint32_t *)(data - i))); + crc = slice4[(uint8_t)(crc)] ^ + slice3[(uint8_t)(crc >> 8)] ^ + slice2[(uint8_t)(crc >> 16)] ^ + slice1[(uint8_t)(crc >> 24)]; + } + crc = bswap4(crc); + for (i = data_len & 3, data += (data_len & 3); i != 0; i--) + crc = (crc << 8) ^ + bswap4(slice1[(crc >> 24) ^ *(data - i)]); + + return crc; +} + +/** + * @brief Performs one folding round + * + * Logically function operates as follows: + * DATA = READ_NEXT_16BYTES(); + * F1 = LSB8(FOLD) + * F2 = MSB8(FOLD) + * T1 = CLMUL( F1, K1 ) + * T2 = CLMUL( F2, K2 ) + * FOLD = XOR( T1, T2, DATA ) + * + * @param data_block 16 byte data block + * @param k1_k2 k1 and k2 constanst enclosed in XMM register + * @param fold running 16 byte folded data + * + * @return New 16 byte folded data + */ +__forceinline +__m128i crc32_folding_round(const __m128i data_block, + const __m128i k1_k2, + const __m128i fold) +{ + __m128i tmp = _mm_clmulepi64_si128(fold, k1_k2, 0x11); + + return _mm_xor_si128(_mm_clmulepi64_si128(fold, k1_k2, 0x00), + _mm_xor_si128(data_block, tmp)); +} + +/** + * @brief Performs Barret's reduction from 128 bits to 64 bits + * + * @param data128 128 bits data to be reduced + * @param k3_q k3 and Q constants enclosed in XMM register + * + * @return data reduced to 64 bits + */ +__forceinline +__m128i crc32_reduce_128_to_64(__m128i data128, const __m128i k3_q) +{ + __m128i tmp; + + tmp = _mm_xor_si128(_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */), + data128); + + data128 = _mm_xor_si128(_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */), + data128); + + return _mm_srli_si128(_mm_slli_si128(data128, 8), 8); +} + +/** + * @brief Performs Barret's reduction from 64 bits to 32 bits + * + * @param data64 64 bits data to be reduced + * @param k3_q k3 and Q constants enclosed in XMM register + * @param p_res P constant enclosed in XMM register + * + * @return data reduced to 32 bits + */ +__forceinline +uint32_t +crc32_reduce_64_to_32(__m128i fold, const __m128i k3_q, const __m128i p_res) +{ + __m128i temp; + + temp = _mm_clmulepi64_si128(_mm_srli_si128(fold, 4), + k3_q, 0x10 /* Q */); + temp = _mm_srli_si128(_mm_xor_si128(temp, fold), 4); + temp = _mm_clmulepi64_si128(temp, p_res, 0 /* P */); + return _mm_extract_epi32(_mm_xor_si128(temp, fold), 0); +} + +/** + * @brief Calculates 32 bit CRC for given \a data block by applying folding and + * reduction methods. + * + * Algorithm operates on 32 bit CRCs so polynomials and initial values may + * need to be promoted to 32 bits where required. + * + * @param crc initial CRC value (32 bit value) + * @param data pointer to data block + * @param data_len length of \a data block in bytes + * @param params pointer to PCLMULQDQ CRC calculation context + * + * @return CRC for given \a data block (32 bits wide). + */ +__forceinline +uint32_t +crc32_calc_pclmulqdq(const uint8_t *data, + uint32_t data_len, uint32_t crc, + const struct crc_pclmulqdq_ctx *params) +{ + __m128i temp, fold, k, swap; + uint32_t n; + + if (unlikely(data == NULL || data_len == 0 || params == NULL)) + return crc; + +#ifdef __KERNEL__ + /** + * Preserve FPU context + */ + kernel_fpu_begin(); +#endif + + /** + * Add 4 bytes to data block size + * This is to secure the following: + * CRC32 = M(X)^32 mod P(X) + * M(X) - message to compute CRC on + * P(X) - CRC polynomial + */ + data_len += 4; + + /** + * Load first 16 data bytes in \a fold and + * set \a swap BE<->LE 16 byte conversion variable + */ + fold = _mm_loadu_si128((__m128i *)data); + swap = crc_xmm_be_le_swap128; + + /** + * ------------------------------------------------- + * Folding all data into single 16 byte data block + * Assumes: \a fold holds first 16 bytes of data + */ + + if (unlikely(data_len <= 16)) { + /** + * Data block fits into 16 byte block + * - adjust data block + * - 4 least significant bytes need to be zero + */ + fold = _mm_shuffle_epi8(fold, swap); + fold = _mm_slli_si128(xmm_shift_right(fold, 20 - data_len), 4); + + /** + * Apply CRC init value + */ + temp = _mm_insert_epi32(_mm_setzero_si128(), bswap4(crc), 0); + temp = xmm_shift_left(temp, data_len - 4); + fold = _mm_xor_si128(fold, temp); + } else { + /** + * There are 2x16 data blocks or more + */ + __m128i next_data; + + /** + * n = number of bytes required to align \a data_len + * to multiple of 16 + */ + n = ((~data_len) + 1) & 15; + + /** + * Apply CRC initial value and + * get \a fold to BE format + */ + fold = _mm_xor_si128(fold, + _mm_insert_epi32(_mm_setzero_si128(), + crc, 0)); + fold = _mm_shuffle_epi8(fold, swap); + + /** + * Load next 16 bytes of data and + * adjust \a fold & \a next_data as follows: + * + * CONCAT(fold,next_data) >> (n*8) + */ + next_data = _mm_loadu_si128((__m128i *)&data[16]); + next_data = _mm_shuffle_epi8(next_data, swap); + next_data = _mm_or_si128(xmm_shift_right(next_data, n), + xmm_shift_left(fold, 16 - n)); + fold = xmm_shift_right(fold, n); + + if (unlikely(data_len <= 32)) + /** + * In such unlikely case clear 4 least significant bytes + */ + next_data = + _mm_slli_si128(_mm_srli_si128(next_data, 4), 4); + + /** + * Do the initial folding round on 2 first 16 byte chunks + */ + k = _mm_load_si128((__m128i *)(¶ms->k1)); + fold = crc32_folding_round(next_data, k, fold); + + if (likely(data_len > 32)) { + /** + * \a data_block needs to be at least 48 bytes long + * in order to get here + */ + __m128i new_data; + + /** + * Main folding loop + * - n is adjusted to point to next 16 data block + * to read + * (16+16) = 2x16; represents 2 first data blocks + * processed above + * (- n) is the number of zero bytes padded to + * the message in order to align it to 16 bytes + * - the last 16 bytes is processed separately + */ + for (n = 16 + 16 - n; n < (data_len - 16); n += 16) { + new_data = _mm_loadu_si128((__m128i *)&data[n]); + new_data = _mm_shuffle_epi8(new_data, swap); + fold = crc32_folding_round(new_data, k, fold); + } + + /** + * The last folding round works always on 12 bytes + * (12 bytes of data and 4 zero bytes) + * Read from offset -4 is to avoid one + * shift right operation. + */ + new_data = _mm_loadu_si128((__m128i *)&data[n - 4]); + new_data = _mm_shuffle_epi8(new_data, swap); + new_data = _mm_slli_si128(new_data, 4); + fold = crc32_folding_round(new_data, k, fold); + } /* if (data_len > 32) */ + } + + /** + * ------------------------------------------------- + * Reduction 128 -> 32 + * Assumes: \a fold holds 128bit folded data + */ + + /** + * REDUCTION 128 -> 64 + */ + k = _mm_load_si128((__m128i *)(¶ms->k3)); + fold = crc32_reduce_128_to_64(fold, k); + + /** + * REDUCTION 64 -> 32 + */ + n = crc32_reduce_64_to_32(fold, k, + _mm_load_si128((__m128i *)(¶ms->p))); + +#ifdef __KERNEL__ + /** + * - restore FPU context + */ + kernel_fpu_end(); +#endif + + return n; +} + +#endif /* __CRC_H__ */ diff --git a/openair1/PHY/CODING/crc_byte.c b/openair1/PHY/CODING/crc_byte.c index 287cbcd1f4..d1c3917c2c 100644 --- a/openair1/PHY/CODING/crc_byte.c +++ b/openair1/PHY/CODING/crc_byte.c @@ -30,10 +30,17 @@ Modified in June, 2001, to include the length non multiple of 8 */ +#ifndef __SSE4_1__ +#define USE_INTEL_CRC 0 +#else +#define USE_INTEL_CRC __SSE4_1__ +#endif #include "coding_defs.h" #include "assertions.h" - +#if USE_INTEL_CRC +#include "crc.h" +#endif /*ref 36-212 v8.6.0 , pp 8-9 */ /* the highest degree is set by default */ @@ -94,6 +101,28 @@ static unsigned short crc11Table[256]; static unsigned char crc8Table[256]; static unsigned char crc6Table[256]; +#if USE_INTEL_CRC +static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = { + 0x64e4d700, /**< k1 */ + 0x2c8c9d00, /**< k2 */ + 0xd9fe8c00, /**< k3 */ + 0xf845fe24, /**< q */ + 0x864cfb00, /**< p */ + 0ULL /**< res */ +}; +__m128i crc_xmm_be_le_swap128; + +DECLARE_ALIGNED(const uint8_t crc_xmm_shift_tab[48], 16) = { + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff +}; + +#endif + void crcTableInit (void) { unsigned char c = 0; @@ -108,23 +137,29 @@ void crcTableInit (void) crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24); crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24); } while (++c); +#if USE_INTEL_CRC + crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b, + 0x04050607, 0x00010203); + +#endif } /********************************************************* -Byte by byte implementations, +Byte by byte LUT implementations, assuming initial byte is 0 padded (in MSB) if necessary - +can use SIMD optimized Intel CRC for LTE/NR 24a/24b variants *********************************************************/ + unsigned int crc24a (unsigned char * inptr, int bitlen) { + int octetlen = bitlen / 8; /* Change in octets */ - int octetlen, resbit; - unsigned int crc = 0; - octetlen = bitlen / 8; /* Change in octets */ - resbit = (bitlen % 8); - + if ( bitlen % 8 || !USE_INTEL_CRC ) { + unsigned int crc = 0; + int resbit= (bitlen % 8); + while (octetlen-- > 0) { // printf("crc24a: in %x => crc %x\n",crc,*inptr); crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)]; @@ -132,17 +167,35 @@ unsigned int crc24a (unsigned char * inptr, if (resbit > 0) crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]; - return crc; + } + #if USE_INTEL_CRC + else { + return crc32_calc_pclmulqdq(inptr, octetlen, 0, + <e_crc24a_pclmulqdq); + } + #endif + } +#if USE_INTEL_CRC +static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = { + 0x80140500, /**< k1 */ + 0x42000100, /**< k2 */ + 0x90042100, /**< k3 */ + 0xffff83ff, /**< q */ + 0x80006300, /**< p */ + 0ULL /**< res */ +}; +#endif unsigned int crc24b (unsigned char * inptr, - int bitlen) + int bitlen) { - int octetlen, resbit; + int octetlen = bitlen / 8; /* Change in octets */ + + if ( bitlen % 8 || !USE_INTEL_CRC ) { unsigned int crc = 0; - octetlen = bitlen / 8; /* Change in octets */ - resbit = (bitlen % 8); + int resbit = (bitlen % 8); while (octetlen-- > 0) { // printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]); @@ -153,6 +206,13 @@ unsigned int crc24b (unsigned char * inptr, crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]; return crc; + } +#if USE_INTEL_CRC + else { + return crc32_calc_pclmulqdq(inptr, octetlen, 0, + <e_crc24b_pclmulqdq); + } +#endif } unsigned int crc24c (unsigned char * inptr, diff --git a/openair1/PHY/CODING/crcext.h b/openair1/PHY/CODING/crcext.h new file mode 100644 index 0000000000..f441f25e50 --- /dev/null +++ b/openair1/PHY/CODING/crcext.h @@ -0,0 +1,89 @@ +/******************************************************************************* + Copyright (c) 2009-2018, Intel Corporation + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE + FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*******************************************************************************/ + +/** + * Header file with CRC external definitions + * + */ + +#ifndef __CRCEXT_H__ +#define __CRCEXT_H__ + +#include +#include "types.h" +/** + * Flag indicating availability of PCLMULQDQ instruction + * Only valid after running CRCInit() function. + */ +extern int pclmulqdq_available; + +/** + * Flag indicating availability of PCLMULQDQ instruction + * Only valid after running CRCInit() function. + */ +extern __m128i crc_xmm_be_le_swap128; +extern const uint8_t crc_xmm_shift_tab[48]; + +/** + * @brief Shifts right 128 bit register by specified number of bytes + * + * @param reg 128 bit value + * @param num number of bytes to shift right \a reg by (0-16) + * + * @return \a reg >> (\a num * 8) + */ +__forceinline +__m128i xmm_shift_right(__m128i reg, const unsigned int num) +{ + const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 + num); + + return _mm_shuffle_epi8(reg, _mm_loadu_si128(p)); +} + +/** + * @brief Shifts left 128 bit register by specified number of bytes + * + * @param reg 128 bit value + * @param num number of bytes to shift left \a reg by (0-16) + * + * @return \a reg << (\a num * 8) + */ +__forceinline +__m128i xmm_shift_left(__m128i reg, const unsigned int num) +{ + const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 - num); + + return _mm_shuffle_epi8(reg, _mm_loadu_si128(p)); +} + +/** + * @brief Initializes CRC module. + * @note It is mandatory to run it before using any of CRC API's. + */ +extern void CRCInit(void); + +#endif /* __CRCEXT_H__ */ diff --git a/openair1/PHY/CODING/nrLDPC_defs.h b/openair1/PHY/CODING/nrLDPC_defs.h index 321ecaab7d..0d7ff9ef9f 100644 --- a/openair1/PHY/CODING/nrLDPC_defs.h +++ b/openair1/PHY/CODING/nrLDPC_defs.h @@ -22,6 +22,7 @@ // encoder interface #ifndef __NRLDPC_DEFS__H__ #define __NRLDPC_DEFS__H__ +#include #include "openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h" /** \brief LDPC encoder @@ -36,17 +37,31 @@ \param 9-12 time_stats_t *tinput,*tprep, *tparity,*toutput */ typedef struct { - int n_segments; // optim8seg - unsigned int macro_num; // optim8segmulti - unsigned char gen_code; //orig - time_stats_t *tinput; - time_stats_t *tprep; - time_stats_t *tparity; - time_stats_t *toutput; -}encoder_implemparams_t; + unsigned int n_segments; // optim8seg + unsigned int macro_num; // optim8segmulti + unsigned char gen_code; //orig + time_stats_t *tinput; + time_stats_t *tprep; + time_stats_t *tparity; + time_stats_t *toutput; + int Kr; + uint32_t Kb; + uint32_t *Zc; + void *harq; + /// Encoder BG + uint8_t BG; + /// Interleaver outputs + unsigned char *output; + /// Number of bits in "small" code segments + uint32_t K; + /// Number of "Filler" bits + uint32_t F; + /// LDPC-code outputs + uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS]; +} encoder_implemparams_t; #define INIT0_LDPCIMPLEMPARAMS {0,0,0,NULL,NULL,NULL,NULL} -typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out); -typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t*); +typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params *p_decParams, int8_t *p_llr, int8_t *p_out); +typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t *); //============================================================================================================================ // decoder interface /** @@ -56,5 +71,5 @@ typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,sho \param p_llrOut Output vector \param p_profiler LDPC profiler statistics */ -typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params* , int8_t*, int8_t* , t_nrLDPC_procBuf* , t_nrLDPC_time_stats* ); +typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params *, int8_t *, int8_t *, t_nrLDPC_procBuf *, t_nrLDPC_time_stats * ); #endif diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c index 738fd49b7d..69d2ac4972 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c @@ -38,8 +38,6 @@ #include "common/utils/LOG/log.h" -//#define DEBUG_LDPC - #include "ldpc384_byte.c" #include "ldpc352_byte.c" #include "ldpc320_byte.c" @@ -73,9 +71,18 @@ -static inline void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb) +static void encode_parity_check_part_optim(uint8_t *cc,uint8_t *d, short BG,short Zc,short Kb, int simd_size, int ncols) { - + unsigned char c[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c + + for (int i1=0; i1 < ncols; i1++) { + memcpy(&c[2*i1*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char)); + memcpy(&c[(2*i1+1)*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char)); + } + for (int i1=1;i1tinput != NULL) start_meas(impp->tinput); - for (i=0; i>(i&7)))>>(7-(i&7)); //printf("c(%d,%d)=%d\n",j,i,temp); } @@ -108,24 +103,10 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); - for (i1=0; i1 < ncols; i1++) - { - memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - } - for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); + encode_parity_check_part_optim(c, d, BG, Zc, Kb,simd_size, ncols); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c index a974e86e27..6fa9c5ff53 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c @@ -38,7 +38,6 @@ #include "common/utils/LOG/log.h" #include "PHY/TOOLS/time_meas.h" #include "openair1/PHY/CODING/nrLDPC_defs.h" -//#define DEBUG_LDPC #include "ldpc_encode_parity_check.c" #include "ldpc_generate_coefficient.c" @@ -102,7 +101,6 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size - unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c // calculate number of punctured bits no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc; @@ -151,24 +149,10 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); - for (i1=0; i1 < ncols; i1++) - { - memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - } - for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); + encode_parity_check_part_optim(c, d, BG, Zc, Kb, simd_size, ncols); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c index b21f875b32..15d4481eb6 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c @@ -39,17 +39,17 @@ #include "PHY/TOOLS/time_meas.h" #include "openair1/PHY/CODING/nrLDPC_defs.h" -//#define DEBUG_LDPC - #include "ldpc_encode_parity_check.c" #include "ldpc_generate_coefficient.c" -int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp) +int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp) { + //set_log(PHY, 4); + - short nrows=0,ncols=0; - int i,i1,j,rate=3; + int nrows=0,ncols=0; + int rate=3; int no_punctured_columns,removed_bit; //Table of possible lifting sizes char temp; @@ -95,8 +95,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc } #ifdef DEBUG_LDPC - LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,n_segments); - LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",test_input[0][0],test_input[0][1],test_input[0][2],test_input[0][3]); + LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,impp->n_segments); + LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",input[0][0],input[0][1],input[0][2],input[0][3]); #endif AssertFatal(Zc>0,"no valid Zc found for block length %d\n",block_length); @@ -104,10 +104,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((Zc&31) > 0) simd_size = 16; else simd_size = 32; - unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size - unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size - - unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c + unsigned char cc[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size + unsigned char dd[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size // calculate number of punctured bits no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc; @@ -115,8 +113,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc //printf("%d\n",no_punctured_columns); //printf("%d\n",removed_bit); // unpack input - memset(c,0,sizeof(unsigned char) * ncols * Zc); - memset(d,0,sizeof(unsigned char) * nrows * Zc); + memset(cc,0,sizeof(unsigned char) * ncols * Zc); + memset(dd,0,sizeof(unsigned char) * nrows * Zc); if(impp->tinput != NULL) start_meas(impp->tinput); #if 0 @@ -124,29 +122,29 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc //for (j=0; j>(i&7); + temp = (input[j][i/8]&(1<<(i&7)))>>(i&7); //printf("c(%d,%d)=%d\n",j,i,temp); c[i] |= (temp << (j-macro_segment)); } } #else #ifdef __AVX2__ - for (i=0; i>5; i++) { - c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]); + for (int i=0; i>5; i++) { + c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]); //for (j=1; j>5)<<5;i>5)<<5;i>(i&7)))>>(7-(i&7)); + temp = (input[j][i/8]&(128>>(i&7)))>>(7-(i&7)); //printf("c(%d,%d)=%d\n",j,i,temp); - c[i] |= (temp << (j-macro_segment)); + cc[i] |= (temp << (j-macro_segment)); } } #else @@ -159,28 +157,14 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); - for (i1=0; i1 < ncols; i1++) - { - memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - } - for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); + encode_parity_check_part_optim(cc, dd, BG, Zc, Kb, simd_size, ncols); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { - if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) { + if (encode_parity_check_part_orig(cc, dd, BG, Zc, Kb, block_length)!=0) { printf("Problem with encoder\n"); return(-1); } @@ -188,8 +172,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if(impp->toutput != NULL) start_meas(impp->toutput); // information part and puncture columns /* - memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); - memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); + memcpy(&output[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); + memcpy(&output[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); */ #ifdef __AVX2__ if ((((2*Zc)&31) == 0) && (((block_length-(2*Zc))&31) == 0)) { @@ -197,34 +181,34 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc //AssertFatal(((block_length-(2*Zc))&31) == 0,"block_length-(2*Zc) needs to be a multiple of 32 for now\n"); uint32_t l1 = (block_length-(2*Zc))>>5; uint32_t l2 = ((nrows-no_punctured_columns) * Zc-removed_bit)>>5; - __m256i *c256p = (__m256i *)&c[2*Zc]; - __m256i *d256p = (__m256i *)&d[0]; + __m256i *c256p = (__m256i *)&cc[2*Zc]; + __m256i *d256p = (__m256i *)&dd[0]; // if (((block_length-(2*Zc))&31)>0) l1++; - for (i=0;i0) l2++; - for (i1=0;i1>(j-macro_segment))&1; - for (i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++) + for (int j=macro_segment; j < macro_segment_end; j++) + output[j][i] = (cc[2*Zc+i]>>(j-macro_segment))&1; + for (int i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++) //for (j=0; j>(j-macro_segment))&1; + for (int j=macro_segment; j < macro_segment_end; j++) + output[j][block_length-2*Zc+i] = (dd[i]>>(j-macro_segment))&1; } #else diff --git a/openair1/PHY/CODING/types.h b/openair1/PHY/CODING/types.h new file mode 100644 index 0000000000..2bc7739e36 --- /dev/null +++ b/openair1/PHY/CODING/types.h @@ -0,0 +1,98 @@ +/******************************************************************************* + Copyright (c) 2009-2018, Intel Corporation + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE + FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*******************************************************************************/ + +/* Common data types, macros and functions used across the CRC library */ + +#ifndef CRC_TYPES_H_ +#define CRC_TYPES_H_ + +#ifdef __KERNEL__ +#include +#include +typedef uint32_t uint_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint8_t uint_fast8_t; +#else +#include +#include +#endif + +/* Declare variable at address aligned to a boundary */ +#define DECLARE_ALIGNED(_declaration, _boundary) \ + _declaration __attribute__((aligned(_boundary))) + +/* Macro to make function to be always inlined */ +#ifndef DEBUG +#define __forceinline \ + static inline __attribute__((always_inline)) +#else +#define __forceinline \ + static +#endif + +/* Likely & unliekly hints for the compiler */ +#define likely(x) __builtin_expect(!!(x), 1) +#define unlikely(x) __builtin_expect(!!(x), 0) + +/* Macro to get dimension of an array */ +#ifndef DIM +#define DIM(x) (sizeof(x)/sizeof(x[0])) +#endif + +/** + * Common functions + */ + +/** + * @brief Swaps bytes in 16 bit word + * + * @param val 16 bit data value + * + * @return byte swapped value + */ +__forceinline uint16_t bswap2(const uint16_t val) +{ + return (uint16_t) ((val >> 8) | (val << 8)); +} + +/** + * @brief Swaps bytes in 32 bit word + * ABCD -> DCBA + * + * @param val 32 bit data value + * + * @return byte swapped value + */ +__forceinline uint32_t bswap4(const uint32_t val) +{ + return ((val >> 24) | /**< A*/ + ((val & 0xff0000) >> 8) | /**< B*/ + ((val & 0xff00) << 8) | /**< C*/ + (val << 24)); /**< D*/ +} + +#endif /* CRC_TYPES_H_ */ diff --git a/openair1/PHY/INIT/nr_init_ue.c b/openair1/PHY/INIT/nr_init_ue.c index b60e77e814..f664a03ba0 100644 --- a/openair1/PHY/INIT/nr_init_ue.c +++ b/openair1/PHY/INIT/nr_init_ue.c @@ -458,7 +458,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ue->decode_SIB = 1; init_nr_prach_tables(839); - + init_symbol_rotation(fp); return 0; } diff --git a/openair1/PHY/INIT/nr_parms.c b/openair1/PHY/INIT/nr_parms.c index 42d4a30e3b..347155ed3b 100644 --- a/openair1/PHY/INIT/nr_parms.c +++ b/openair1/PHY/INIT/nr_parms.c @@ -209,7 +209,6 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp) return samp_count; } - uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp) { uint32_t slot_idx = 0; diff --git a/openair1/PHY/LTE_REFSIG/lte_refsig.h b/openair1/PHY/LTE_REFSIG/lte_refsig.h index 84a2676082..9d3bae503b 100644 --- a/openair1/PHY/LTE_REFSIG/lte_refsig.h +++ b/openair1/PHY/LTE_REFSIG/lte_refsig.h @@ -36,8 +36,7 @@ \param reset resets the generator \return 32 bits of the gold sequence */ -uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); - +#include /*!\brief This function generates the LTE Gold sequence (36-211, Sec 7.2), specifically for DL reference signals. @param frame_parms LTE DL Frame parameters diff --git a/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c b/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c deleted file mode 100644 index a23f8db4f2..0000000000 --- a/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. - * The OpenAirInterface Software Alliance licenses this file to You under - * the OAI Public License, Version 1.1 (the "License"); you may not use this file - * except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.openairinterface.org/?page_id=698 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - *------------------------------------------------------------------------------- - * For more information about the OpenAirInterface (OAI) Software Alliance: - * contact@openairinterface.org - */ - -#include "PHY/types.h" - -/** - \brief Gold Sequence Generation defined in 3x.211 - \param x1 x1 shift register - \param x2 x2 shift register / cinit if reset is set - \param reset Reset flag / reinitialize the generator - \return c 32 bits of gold output -*/ -extern inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset) -{ - int32_t n; - - // 3GPP 3x.211 - // Nc = 1600 - // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 - // x1(n+31) = [x1(n+3) + x1(n)]mod2 - // x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2 - if (reset) - { - // Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30 - // x1(31) = [x1(3) + x1(0)]mod2 = 1 - *x1 = 1 + (1U<<31); - // Init value for x2: cinit = sum_{i=0}^30 x2*2^i - // x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2 - // = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2 - *x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31); - - // x1 and x2 contain bits n = 0,1,...,31 - - // Nc = 1600 bits are skipped at the beginning - // i.e., 1600 / 32 = 50 32bit words - - for (n = 1; n < 50; n++) - { - // Compute x1(0),...,x1(27) - *x1 = (*x1>>1) ^ (*x1>>4); - // Compute x1(28),..,x1(31) and xor - *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); - // Compute x2(0),...,x2(27) - *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); - // Compute x2(28),..,x2(31) and xor - *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); - } - } - - *x1 = (*x1>>1) ^ (*x1>>4); - *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); - *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); - *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); - - // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 - return(*x1^*x2); -} diff --git a/openair1/PHY/LTE_TRANSPORT/lte_mcs.c b/openair1/PHY/LTE_TRANSPORT/lte_mcs.c index 6144b978bf..38914506ee 100644 --- a/openair1/PHY/LTE_TRANSPORT/lte_mcs.c +++ b/openair1/PHY/LTE_TRANSPORT/lte_mcs.c @@ -147,10 +147,10 @@ uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb) { } } -int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) { +int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) { int rb,re_pbch_sss=0; int rb_alloc_ind,nsymb; - nsymb = (frame_parms->Ncp==NORMAL) ? 14 : 12; + nsymb = (Ncp==NORMAL) ? 14 : 12; // printf("adjust_G2 : symbol %d, subframe %d\n",symbol,subframe); if ((subframe!=0) && (subframe!=5) && (subframe!=6)) // if not PBCH/SSS or SSS @@ -158,12 +158,12 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o //first half of slot and TDD (no adjustments in first slot except for subframe 6 - PSS) if ((symbol<(nsymb>>1))&& - (frame_parms->frame_type == TDD)&& + (frame_type == TDD)&& (subframe!=6)) return(0); // after PBCH - if (frame_parms->frame_type==TDD) { //TDD + if (frame_type==TDD) { //TDD if ((symbol>((nsymb>>1)+3)) && (symbol!=(nsymb-1))) ///SSS return(0); @@ -185,9 +185,9 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o return(0); } - if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL - for (rb=((frame_parms->N_RB_DL>>1)-3); - rb<=((frame_parms->N_RB_DL>>1)+3); + if ((N_RB_DL&1) == 1) { // ODD N_RB_DL + for (rb=((N_RB_DL>>1)-3); + rb<=((N_RB_DL>>1)+3); rb++) { if (rb < 32) rb_alloc_ind = (rb_alloc[0]>>rb) & 1; @@ -201,16 +201,16 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o rb_alloc_ind = 0; if (rb_alloc_ind==1) { - if ((rb==(frame_parms->N_RB_DL>>1)-3) || - (rb==((frame_parms->N_RB_DL>>1)+3))) { + if ((rb==(N_RB_DL>>1)-3) || + (rb==((N_RB_DL>>1)+3))) { re_pbch_sss += 6; } else re_pbch_sss += 12; } } } else { - for (rb=((frame_parms->N_RB_DL>>1)-3); - rb<((frame_parms->N_RB_DL>>1)+3); + for (rb=((N_RB_DL>>1)-3); + rb<((N_RB_DL>>1)+3); rb++) { if (rb < 32) rb_alloc_ind = (rb_alloc[0]>>rb) & 1; diff --git a/openair1/PHY/LTE_TRANSPORT/pcfich.c b/openair1/PHY/LTE_TRANSPORT/pcfich.c index 3646732ce3..0ba63019a1 100644 --- a/openair1/PHY/LTE_TRANSPORT/pcfich.c +++ b/openair1/PHY/LTE_TRANSPORT/pcfich.c @@ -44,7 +44,7 @@ void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms, { uint32_t i; uint8_t reset; - uint32_t x1, x2, s=0; + uint32_t x1=0, x2, s=0; reset = 1; // x1 is set in lte_gold_generic diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index 3270066448..998edf235f 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -895,7 +895,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, int frame, uint8_t subframe, uint8_t pucch1_thres, - uint8_t br_flag + int br_flag ) //----------------------------------------------------------------------------- { diff --git a/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h b/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h index 622f37b3bc..af8e63c3ed 100644 --- a/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h +++ b/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h @@ -101,7 +101,7 @@ int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint int get_G_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode); int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); +int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); #ifndef modOrder diff --git a/openair1/PHY/LTE_TRANSPORT/transport_proto.h b/openair1/PHY/LTE_TRANSPORT/transport_proto.h index 19af50056c..1fbd1266d7 100644 --- a/openair1/PHY/LTE_TRANSPORT/transport_proto.h +++ b/openair1/PHY/LTE_TRANSPORT/transport_proto.h @@ -700,7 +700,51 @@ int find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type); int find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type); -uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); +static inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset) +{ + int32_t n; + + // 3GPP 3x.211 + // Nc = 1600 + // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 + // x1(n+31) = [x1(n+3) + x1(n)]mod2 + // x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2 + if (reset) + { + // Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30 + // x1(31) = [x1(3) + x1(0)]mod2 = 1 + *x1 = 1 + (1U<<31); + // Init value for x2: cinit = sum_{i=0}^30 x2*2^i + // x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2 + // = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2 + *x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31); + + // x1 and x2 contain bits n = 0,1,...,31 + + // Nc = 1600 bits are skipped at the beginning + // i.e., 1600 / 32 = 50 32bit words + + for (n = 1; n < 50; n++) + { + // Compute x1(0),...,x1(27) + *x1 = (*x1>>1) ^ (*x1>>4); + // Compute x1(28),..,x1(31) and xor + *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); + // Compute x2(0),...,x2(27) + *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); + // Compute x2(28),..,x2(31) and xor + *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); + } + } + + *x1 = (*x1>>1) ^ (*x1>>4); + *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); + *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); + *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); + + // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 + return(*x1^*x2); +} /**@}*/ diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c index 4f65edd6d5..efde277203 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c @@ -1293,7 +1293,7 @@ void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms, } granted_re = nb_rb_alloc * (12-crs_re); - pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol); + pbch_pss_sss_re = adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol); pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12); data_re = granted_re - pbch_pss_sss_re; llr_offset = data_re * dlsch0_harq->Qm * 2; diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c index 91de5386ae..6afd028099 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c @@ -837,7 +837,7 @@ int rx_pdsch(PHY_VARS_UE *ue, symbol, first_symbol_flag, nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } else if (codeword_TB0 == -1) { dlsch_qpsk_llr(frame_parms, @@ -846,7 +846,7 @@ int rx_pdsch(PHY_VARS_UE *ue, symbol, first_symbol_flag, nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { if (dlsch1_harq->Qm == 2) { @@ -856,7 +856,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -866,7 +866,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -877,7 +877,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -888,7 +888,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -899,7 +899,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -910,7 +910,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } @@ -925,7 +925,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[0], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128, beamforming_mode); } else if (codeword_TB0 == -1) { @@ -934,7 +934,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[1], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream, beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { @@ -946,7 +946,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -957,7 +957,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -969,7 +969,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -981,7 +981,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -993,7 +993,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1005,7 +1005,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } @@ -1021,7 +1021,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } else if (codeword_TB0 == -1) { @@ -1031,7 +1031,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { @@ -1043,7 +1043,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1054,7 +1054,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -1066,7 +1066,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1078,7 +1078,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -1090,7 +1090,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, (int16_t *)pllr_symbol_cw0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol]); if (rx_type==rx_IC_dual_stream) { @@ -1102,7 +1102,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], (int16_t *)pllr_symbol_cw1, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol]); } } @@ -1124,7 +1124,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->rxdataF_comp0, (int16_t *)pllr_symbol_cw0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } @@ -1137,7 +1137,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[0], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128, beamforming_mode); } @@ -1152,7 +1152,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c index 4c74377ef6..43f3b5451f 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c @@ -746,7 +746,7 @@ int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms, amp_tmp=amp_tmp<<1; // to compensate for >> 1 shift in modulation - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,2,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL ,&rb_alloc,2,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { if (frame_parms->nb_antenna_ports_eNB!=1) @@ -981,7 +981,7 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,4,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,4,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp=0x1fff;//dlsch0->sqrt_rho_b; already taken into account @@ -1281,7 +1281,7 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account diff --git a/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c index 1f9fb86f80..9427ec3a5b 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c @@ -336,8 +336,8 @@ void generate_pucch1x(int32_t **txdataF, -inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline)); -inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) { +static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline)); +static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) { uint32_t x1, x2, s=0; int i; diff --git a/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h b/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h index 7ab795cae9..c5d096ceb7 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h +++ b/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h @@ -1303,7 +1303,7 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL); int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode); int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); + #ifndef modOrder diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c index fa1b6c955b..9bbc61d4b6 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c @@ -180,13 +180,15 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, /// CRC, coding, interleaving and rate matching AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n"); + unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32))); + bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); start_meas(dlsch_encoding_stats); - if (nr_dlsch_encoding(gNB, - harq->pdu, frame, slot, dlsch, frame_parms,tinput,tprep,tparity,toutput, - dlsch_rate_matching_stats, - dlsch_interleaving_stats, - dlsch_segmentation_stats) == -1) - return; + nr_dlsch_encoding(gNB, + harq->pdu, frame, slot, dlsch, frame_parms, output, + tinput,tprep,tparity,toutput, + dlsch_rate_matching_stats, + dlsch_interleaving_stats, + dlsch_segmentation_stats); stop_meas(dlsch_encoding_stats); #ifdef DEBUG_DLSCH printf("PDSCH encoding:\nPayload:\n"); @@ -198,7 +200,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, printf("\nEncoded payload:\n"); for (int i=0; i>3; i++) { for (int j=0; j<8; j++) - printf("%d", harq->f[(i<<3)+j]); + printf("%d", output[(i<<3)+j]); printf("\t"); } printf("\n"); @@ -211,7 +213,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, for (int q=0; qNrOfCodewords; q++) memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t)); for (int q=0; qNrOfCodewords; q++) - nr_pdsch_codeword_scrambling_optim(harq->f, + nr_pdsch_codeword_scrambling_optim(output, encoded_length, q, rel15->dataScramblingId, @@ -248,7 +250,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } #endif - + start_meas(&gNB->dlsch_layer_mapping_stats); /// Layer mapping nr_layer_mapping(mod_symbs, rel15->nrOfLayers, @@ -266,6 +268,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } #endif + stop_meas(&gNB->dlsch_layer_mapping_stats); /// Resource mapping // Non interleaved VRB to PRB mapping @@ -279,7 +282,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n", start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers); #endif - + start_meas(&gNB->dlsch_resource_mapping_stats); for (int ap=0; apnrOfLayers; ap++) { // DMRS params for this ap @@ -321,20 +324,13 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, dmrs_idx = (rel15->rbStart+rel15->BWPStart)*4; } } - } - - // Update l_prime in the case of double DMRS config - if ((dmrs_symbol_map & (1 << l))){ //DMRS time occasion if (l==(l_overline+1)) //take into account the double DMRS symbols l_prime = 1; else if (l>(l_overline+1)) {//new DMRS pair l_overline = l; l_prime = 0; } - } - - /// DMRS QPSK modulation - if (rel15->dlDmrsSymbPos & (1 << l)) { + /// DMRS QPSK modulation nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated #ifdef DEBUG_DLSCH @@ -355,73 +351,143 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, ptrs_symbol = is_ptrs_symbol(l,dlPtrsSymPos); if(ptrs_symbol) { /* PTRS QPSK Modulation for each OFDM symbol in a slot */ + printf("Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs); nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs); } } uint16_t k = start_sc; - // Loop Over SCs: - for (int i=0; irbSize*NR_NB_SC_PER_RB; i++) { - /* check if cuurent RE is PTRS RE*/ - is_ptrs_re=0; - /* check for PTRS symbol and set flag for PTRS RE */ - if(ptrs_symbol){ - is_ptrs_re = is_ptrs_subcarrier(k, - rel15->rnti, - ap, - rel15->dmrsConfigType, - rel15->PTRSFreqDensity, - rel15->rbSize, - rel15->PTRSReOffset, - start_sc, - frame_parms->ofdm_symbol_size); - } + if (ptrs_symbol || dmrs_symbol_map & (1 << l)) { - /* Map DMRS Symbol */ - if ( ( dmrs_symbol_map & (1 << l) ) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; + // Loop Over SCs: + for (int i=0; irbSize*NR_NB_SC_PER_RB; i++) { + /* check if cuurent RE is PTRS RE*/ + is_ptrs_re = 0; + if (ptrs_symbol) + is_ptrs_re = is_ptrs_subcarrier(k, + rel15->rnti, + ap, + rel15->dmrsConfigType, + rel15->PTRSFreqDensity, + rel15->rbSize, + rel15->PTRSReOffset, + start_sc, + frame_parms->ofdm_symbol_size); + /* Map DMRS Symbol */ + if ( (dmrs_symbol_map & (1 << l)) && + (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", - dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", + dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); #endif - dmrs_idx++; - k_prime++; - k_prime&=1; - n+=(k_prime)?0:1; - } - /* Map PTRS Symbol */ - else if(is_ptrs_re){ - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15; + dmrs_idx++; + k_prime++; + k_prime&=1; + n+=(k_prime)?0:1; + } + else if(is_ptrs_re){ + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", - ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d, mod_ptrs: %d %d\n", + ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)],mod_ptrs[ptrs_idx<<1],mod_ptrs[(ptrs_idx<<1)+1]); #endif - ptrs_idx++; - } + ptrs_idx++; + } /* Map DATA Symbol */ - else if( (!(dmrs_symbol_map & (1 << l))) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15; + else if( ptrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", - m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", + m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); #endif - m++; + m++; + } + /* mute RE */ + else { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; + } + if (++k >= frame_parms->ofdm_symbol_size) + k -= frame_parms->ofdm_symbol_size; + } //RE loop + } + else { // no PTRS or DMRS in this symbol + // Loop Over SCs: + int upper_limit=rel15->rbSize*NR_NB_SC_PER_RB; + int remaining_re = 0; + if (start_sc + upper_limit > frame_parms->ofdm_symbol_size) { + remaining_re = upper_limit + start_sc - frame_parms->ofdm_symbol_size; + upper_limit = frame_parms->ofdm_symbol_size - start_sc; + } + // fix the alignment issues later, use 64-bit SIMD below instead of 128. + if (0/*(frame_parms->N_RB_DL&1)==0*/) { + __m128i *txF=(__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)]; + + __m128i *txl = (__m128i*)&tx_layers[ap][m<<1]; + __m128i amp128=_mm_set1_epi16(amp); + for (int i=0; i<(upper_limit>>2); i++) { + txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); + } //RE loop, first part + m+=upper_limit; + if (remaining_re > 0) { + txF = (__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)]; + txl = (__m128i*)&tx_layers[ap][m<<1]; + for (int i=0; i<(remaining_re>>2); i++) { + txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); + } + } } - /* mute RE */ else { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; - } - if (++k >= frame_parms->ofdm_symbol_size) - k -= frame_parms->ofdm_symbol_size; - } //RE loop + __m64 *txF=(__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)]; + + __m64 *txl = (__m64*)&tx_layers[ap][m<<1]; + __m64 amp64=_mm_set1_pi16(amp); + for (int i=0; i<(upper_limit>>1); i++) { + + txF[i] = _mm_mulhrs_pi16(amp64,txl[i]); +#ifdef DEBUG_DLSCH_MAPPING + if ((i&1) > 0) + printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", + m, l, start_sc+(i>>1), txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1 + (2*txdataF_offset)]); +#endif + /* handle this, mute RE */ + /*else { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; + }*/ + } //RE loop, first part + m+=upper_limit; + if (remaining_re > 0) { + txF = (__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)]; + txl = (__m64*)&tx_layers[ap][m<<1]; + for (int i=0; i<(remaining_re>>1); i++) { + txF[i] = _mm_mulhrs_pi16(amp64,txl[i]); +#ifdef DEBUG_DLSCH_MAPPING + if ((i&1) > 0) + printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", + m, l, i>>1, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1 + (2*txdataF_offset)]); +#endif + /* handle this, mute RE */ + /*else { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; + }*/ + } //RE loop, second part + } // + m+=remaining_re; + } // N_RB_DL even + } // no DMRS/PTRS in symbol } // symbol loop }// layer loop + stop_meas(&gNB->dlsch_resource_mapping_stats); ///Layer Precoding and Antenna port mapping // tx_layers 1-8 are mapped on antenna ports 1000-1007 @@ -430,7 +496,9 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, // pmi = prgs_list[rbidx/prg_size].pm_idx, rbidx =0,...,rbSize-1 // The Precoding matrix: // The Codebook Type I and Type II are not supported yet. - // We adopt the precoding matrices of PUSCH for 4 layers. + // We`adopt the precoding matrices of PUSCH for 4 layers. + start_meas(&gNB->dlsch_precoding_stats); + for (int ap=0; apnb_antennas_tx; ap++) { for (int l=rel15->StartSymbolIndex; lStartSymbolIndex+rel15->NrOfSymbols; l++) { @@ -505,6 +573,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } // symbol loop }// port loop + stop_meas(&gNB->dlsch_precoding_stats); dlsch->slot_tx[slot]=0; // TODO: handle precoding diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h index 181c2ab273..77db12672f 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h @@ -43,8 +43,6 @@ void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB); -uint16_t get_SLIV(uint8_t S, uint8_t L); - uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position); void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type); @@ -85,6 +83,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, uint8_t slot, NR_gNB_DLSCH_t *dlsch, NR_DL_FRAME_PARMS* frame_parms, + unsigned char * output, time_stats_t *tinput, time_stats_t *tprep, time_stats_t *tparity, diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c index 0bcd1e3e51..5620018b73 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c @@ -50,70 +50,47 @@ //#define DEBUG_DLSCH_FREE 1 -void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) -{ +void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) { int r; - NR_gNB_DLSCH_t *dlsch = *dlschptr; - uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated - if (dlsch) { + if (dlsch) { if (N_RB != 273) { a_segments = a_segments*N_RB; a_segments = a_segments/273 +1; } - + #ifdef DEBUG_DLSCH_FREE LOG_D(PHY,"Freeing dlsch %p\n",dlsch); #endif NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; + if (harq->b) { free16(harq->b, a_segments * 1056); harq->b = NULL; #ifdef DEBUG_DLSCH_FREE LOG_D(PHY, "Freeing harq->b (%p)\n", harq->b); #endif - - if (harq->e) { - free16(harq->e, 14 * N_RB * 12 * 8); - harq->e = NULL; + } + #ifdef DEBUG_DLSCH_FREE - printf("Freeing dlsch process %d e (%p)\n", i, harq->e); + LOG_D(PHY, "Freeing dlsch process %d c (%p)\n", i, harq->c); #endif - } - - if (harq->f) { - free16(harq->f, 14 * N_RB * 12 * 8); - harq->f = NULL; + + for (r = 0; r < a_segments; r++) { #ifdef DEBUG_DLSCH_FREE - printf("Freeing dlsch process %d f (%p)\n", i, harq->f); + LOG_D(PHY, "Freeing dlsch process %d c[%d] (%p)\n", i, r, harq->c[r]); #endif - } - -#ifdef DEBUG_DLSCH_FREE - LOG_D(PHY, "Freeing dlsch process %d c (%p)\n", i, harq->c); -#endif - - for (r = 0; r < a_segments; r++) { -#ifdef DEBUG_DLSCH_FREE - LOG_D(PHY, "Freeing dlsch process %d c[%d] (%p)\n", i, r, harq->c[r]); -#endif - - if (harq->c[r]) { - free16(harq->c[r], 1056); - harq->c[r] = NULL; - } - if (harq->d[r]) { - free16(harq->d[r], 3 * 8448); - harq->d[r] = NULL; - } + + if (harq->c[r]) { + free16(harq->c[r], 1056); + harq->c[r] = NULL; } } + free16(dlsch, sizeof(NR_gNB_DLSCH_t)); + *dlschptr = NULL; } - - free16(dlsch, sizeof(NR_gNB_DLSCH_t)); - *dlschptr = NULL; } NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, @@ -121,8 +98,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, unsigned char Mdlharq, uint32_t Nsoft, uint8_t abstraction_flag, - uint16_t N_RB) -{ + uint16_t N_RB) { unsigned char i,r,aa,layer; int re; uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated @@ -133,10 +109,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, } uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment - NR_gNB_DLSCH_t *dlsch = malloc16(sizeof(NR_gNB_DLSCH_t)); AssertFatal(dlsch, "cannot allocate dlsch\n"); - bzero(dlsch,sizeof(NR_gNB_DLSCH_t)); dlsch->Kmimo = Kmimo; dlsch->Mdlharq = Mdlharq; @@ -144,11 +118,12 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, dlsch->Nsoft = Nsoft; for (layer=0; layerue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*)); + dlsch->ue_spec_bf_weights[layer] = (int32_t **)malloc16(64*sizeof(int32_t *)); for (aa=0; aa<64; aa++) { dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t)); - for (re=0;reue_spec_bf_weights[layer][aa][re] = 0x00007fff; } } @@ -160,7 +135,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, for (int q=0; qmod_symbs[q] = (int32_t *)malloc16(NR_MAX_PDSCH_ENCODED_LENGTH*sizeof(int32_t)); - dlsch->calib_dl_ch_estimates = (int32_t**)malloc16(64*sizeof(int32_t*)); + dlsch->calib_dl_ch_estimates = (int32_t **)malloc16(64*sizeof(int32_t *)); + for (aa=0; aa<64; aa++) { dlsch->calib_dl_ch_estimates[aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t)); } @@ -172,7 +148,6 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; bzero(harq, sizeof(NR_DL_gNB_HARQ_t)); - harq->b = malloc16(dlsch_bytes); AssertFatal(harq->b, "cannot allocate memory for harq->b\n"); harq->pdu = malloc16(dlsch_bytes); @@ -188,71 +163,33 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, // In section 5.3.2 in 38.212, the for loop is up to N + 2*Zc (maximum size of N is 66*Zc, therefore 68*Zc) harq->c[r] = malloc16(8448); AssertFatal(harq->c[r], "cannot allocate harq->c[%d]\n", r); - harq->d[r] = malloc16(68 * 384); - AssertFatal(harq->d[r], "cannot allocate harq->d[%d]\n", r); // max size for coded output bzero(harq->c[r], 8448); - bzero(harq->d[r], (3 * 8448)); } - harq->e = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - AssertFatal(harq->e, "cannot allocate harq->e\n"); - bzero(harq->e, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - harq->f = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - AssertFatal(harq->f, "cannot allocate harq->f\n"); - bzero(harq->f, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - return(dlsch); } -void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch) -{ - - unsigned char Mdlharq; - unsigned char i,j,r; - +void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch) { AssertFatal(dlsch!=NULL,"dlsch is null\n"); - Mdlharq = dlsch->Mdlharq; + unsigned char Mdlharq = dlsch->Mdlharq; dlsch->rnti = 0; dlsch->active = 0; - NR_DL_gNB_HARQ_t *harq=&dlsch->harq_process; - - for (i=0; i<10; i++) { + for (int i=0; i<10; i++) { dlsch->harq_ids[0][i] = Mdlharq; dlsch->harq_ids[1][i] = Mdlharq; } - for (i=0; id[r]) - harq->d[r][j] = NR_NULL; - } } -int nr_dlsch_encoding(PHY_VARS_gNB *gNB, - unsigned char *a, - int frame, - uint8_t slot, - NR_gNB_DLSCH_t *dlsch, - NR_DL_FRAME_PARMS* frame_parms, - time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput, - time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats, - time_stats_t *dlsch_segmentation_stats) -{ - - unsigned int G; - unsigned int crc=1; - NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; +void ldpc8blocks( void *p) { + encoder_implemparams_t *impp=(encoder_implemparams_t *) p; + NR_DL_gNB_HARQ_t *harq = (NR_DL_gNB_HARQ_t *)impp->harq; + uint16_t Kr= impp->K; nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15; + uint8_t mod_order = rel15->qamModOrder[0]; uint16_t nb_rb = rel15->rbSize; uint8_t nb_symb_sch = rel15->NrOfSymbols; - uint32_t A, Kb, F=0; - uint32_t *Zc = &dlsch->harq_process.Z; - uint8_t mod_order = rel15->qamModOrder[0]; - uint16_t Kr=0,r; - uint32_t r_offset=0; - uint32_t E; - uint8_t Ilbrm = 1; - uint32_t Tbslbrm = 950984; //max tbs + uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); + uint32_t A = rel15->TBSize[0]<<3; uint8_t nb_re_dmrs; if (rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1) @@ -260,24 +197,115 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, else nb_re_dmrs = 4*rel15->numDmrsCdmGrpsNoData; - uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); - uint16_t R=rel15->targetCodeRate[0]; + unsigned int G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15->nrOfLayers); + LOG_D(PHY,"dlsch coding A %d Kr %d G %d (nb_rb %d, nb_symb_sch %d, nb_re_dmrs %d, length_dmrs %d, mod_order %d)\n", + A,impp->K,G, nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs,(int)mod_order); + // nrLDPC_encoder output is in "d" + // let's make this interface happy! + uint8_t tmp[8][68 * 384]__attribute__((aligned(32))); + for (int rr=impp->macro_num*8, i=0; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++,i++ ) + impp->d[rr]=tmp[i]; + nrLDPC_encoder(harq->c,impp->d,*impp->Zc, impp->Kb,Kr,impp->BG,impp); + // Compute where to place in output buffer that is concatenation of all segments + uint32_t r_offset=0; + for (int i=0; i < impp->macro_num*8; i++ ) + r_offset+=nr_get_E(G, impp->n_segments, mod_order, rel15->nrOfLayers, i); + for (int rr=impp->macro_num*8; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++ ) { + if (impp->F>0) { + // writing into positions d[r][k-2Zc] as in clause 5.3.2 step 2) in 38.212 + memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], impp->F, NR_NULL); + } + +#ifdef DEBUG_DLSCH_CODING + LOG_D(PHY,"rvidx in encoding = %d\n", rel15->rvIndex[0]); +#endif + uint32_t E = nr_get_E(G, impp->n_segments, mod_order, rel15->nrOfLayers, rr); + //#ifdef DEBUG_DLSCH_CODING + LOG_D(NR_PHY,"Rate Matching, Code segment %d/%d (coded bits (G) %u, E %d, Filler bits %d, Filler offset %d mod_order %d, nb_rb %d)...\n", + rr, + impp->n_segments, + G, + E, + impp->F, + Kr-impp->F-2*(*impp->Zc), + mod_order,nb_rb); + // for tbslbrm calculation according to 5.4.2.1 of 38.212 + uint8_t Nl = 4; + + if (rel15->nrOfLayers < Nl) + Nl = rel15->nrOfLayers; + + uint32_t Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl); + uint8_t Ilbrm = 1; + + uint8_t e[E]; + bzero (e, E); + nr_rate_matching_ldpc(Ilbrm, + Tbslbrm, + impp->BG, + *impp->Zc, + impp->d[rr], + e, + impp->n_segments, + impp->F, + Kr-impp->F-2*(*impp->Zc), + rel15->rvIndex[0], + E); +#ifdef DEBUG_DLSCH_CODING + + for (int i =0; i<16; i++) + printf("output ratematching e[%d]= %d r_offset %u\n", i,harq->e[i+r_offset], r_offset); + +#endif + nr_interleaving_ldpc(E, + mod_order, + e, + impp->output+r_offset); +#ifdef DEBUG_DLSCH_CODING + + for (int i =0; i<16; i++) + printf("output interleaving f[%d]= %d r_offset %u\n", i,impp->output[i+r_offset], r_offset); + + if (r==impp->n_segments-1) + write_output("enc_output.m","enc",impp->output,G,1,4); + +#endif + r_offset += E; + } +} + +int nr_dlsch_encoding(PHY_VARS_gNB *gNB, + unsigned char *a, + int frame, + uint8_t slot, + NR_gNB_DLSCH_t *dlsch, + NR_DL_FRAME_PARMS *frame_parms, + unsigned char * output, + time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput, + time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats, + time_stats_t *dlsch_segmentation_stats) { + encoder_implemparams_t impp; + impp.output=output; + unsigned int crc=1; + NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15; + impp.Zc = &dlsch->harq_process.Z; float Coderate = 0.0; - uint8_t Nl = 4; - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_IN); + uint32_t A = rel15->TBSize[0]<<3; - A = rel15->TBSize[0]<<3; if ( dlsch->rnti != SI_RNTI ) - trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, dlsch->rnti, frame, slot,0, 0); + trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, dlsch->rnti, frame, slot,0, 0); NR_gNB_SCH_STATS_t *stats=NULL; int first_free=-1; - for (int i=0;idlsch_stats[i].rnti == 0 && first_free == -1) { first_free = i; stats=&gNB->dlsch_stats[i]; } + if (gNB->dlsch_stats[i].rnti == dlsch->rnti) { stats=&gNB->dlsch_stats[i]; break; @@ -290,181 +318,94 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, stats->current_RI = rel15->nrOfLayers; stats->current_Qm = rel15->qamModOrder[0]; } - G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15->nrOfLayers); - - LOG_D(PHY,"dlsch coding A %d G %d (nb_rb %d, nb_symb_sch %d, nb_re_dmrs %d, length_dmrs %d, mod_order %d)\n", - A,G, nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs,(int)mod_order); if (A > 3824) { // Add 24-bit crc (polynomial A) to payload crc = crc24a(a,A)>>8; - a[A>>3] = ((uint8_t*)&crc)[2]; - a[1+(A>>3)] = ((uint8_t*)&crc)[1]; - a[2+(A>>3)] = ((uint8_t*)&crc)[0]; + a[A>>3] = ((uint8_t *)&crc)[2]; + a[1+(A>>3)] = ((uint8_t *)&crc)[1]; + a[2+(A>>3)] = ((uint8_t *)&crc)[0]; //printf("CRC %x (A %d)\n",crc,A); //printf("a0 %d a1 %d a2 %d\n", a[A>>3], a[1+(A>>3)], a[2+(A>>3)]); - harq->B = A+24; // harq->b = a; - AssertFatal((A / 8) + 4 <= MAX_NR_DLSCH_PAYLOAD_BYTES, "A %d is too big (A/8+4 = %d > %d)\n", A, (A / 8) + 4, MAX_NR_DLSCH_PAYLOAD_BYTES); - memcpy(harq->b, a, (A / 8) + 4); // why is this +4 if the CRC is only 3 bytes? - } - else { + } else { // Add 16-bit crc (polynomial A) to payload crc = crc16(a,A)>>16; - a[A>>3] = ((uint8_t*)&crc)[1]; - a[1+(A>>3)] = ((uint8_t*)&crc)[0]; + a[A>>3] = ((uint8_t *)&crc)[1]; + a[1+(A>>3)] = ((uint8_t *)&crc)[0]; //printf("CRC %x (A %d)\n",crc,A); //printf("a0 %d a1 %d \n", a[A>>3], a[1+(A>>3)]); - harq->B = A+16; // harq->b = a; - AssertFatal((A / 8) + 3 <= MAX_NR_DLSCH_PAYLOAD_BYTES, "A %d is too big (A/8+3 = %d > %d)\n", A, (A / 8) + 3, MAX_NR_DLSCH_PAYLOAD_BYTES); - memcpy(harq->b, a, (A / 8) + 3); // using 3 bytes to mimic the case of 24 bit crc } - if (R<1000) - Coderate = (float) R /(float) 1024; + + if (rel15->targetCodeRate[0]<1000) + Coderate = (float)rel15->targetCodeRate[0] /(float) 1024; else // to scale for mcs 20 and 26 in table 5.1.3.1-2 which are decimal and input 2* in nr_tbs_tools - Coderate = (float) R /(float) 2048; + Coderate = (float)rel15->targetCodeRate[0] /(float) 2048; if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25) - harq->BG = 2; + impp.BG = 2; else - harq->BG = 1; + impp.BG = 1; start_meas(dlsch_segmentation_stats); - Kb = nr_segmentation(harq->b, harq->c, harq->B, &harq->C, &harq->K, Zc, &harq->F, harq->BG); + impp.Kb = nr_segmentation(harq->b, harq->c, harq->B, &impp.n_segments, &impp.K, impp.Zc, &impp.F, impp.BG); stop_meas(dlsch_segmentation_stats); - F = harq->F; - Kr = harq->K; -#ifdef DEBUG_DLSCH_CODING - uint16_t Kr_bytes; - Kr_bytes = Kr>>3; -#endif - - //printf("segment Z %d k %d Kr %d BG %d C %d\n", *Zc,harq->K,Kr,BG,harq->C); - - for (r=0; rC; r++) { + for (int r=0; rd[r][0]; //channel_input[r] = &harq->d[r][0]; #ifdef DEBUG_DLSCH_CODING - LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, harq->F); - LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,harq->C); + LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, impp->F); + LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,impp.n_segments); LOG_D(PHY,"input %d %d %d %d %d \n", harq->c[r][0], harq->c[r][1], harq->c[r][2],harq->c[r][3], harq->c[r][4]); - for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++){ + + for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++) { LOG_D(PHY,"%d ", harq->c[r][cnt]); } - LOG_D(PHY,"\n"); + LOG_D(PHY,"\n"); #endif //ldpc_encoder_orig((unsigned char*)harq->c[r],harq->d[r],*Zc,Kb,Kr,BG,0); //ldpc_encoder_optim((unsigned char*)harq->c[r],(unsigned char*)&harq->d[r][0],*Zc,Kb,Kr,BG,NULL,NULL,NULL,NULL); } - encoder_implemparams_t impp; - impp.n_segments=harq->C; + impp.tprep = tprep; impp.tinput = tinput; impp.tparity = tparity; impp.toutput = toutput; - for(int j=0;j<(harq->C/8+1);j++) { - impp.macro_num=j; - nrLDPC_encoder(harq->c,harq->d,*Zc,Kb,Kr,harq->BG,&impp); + impp.harq=harq; + notifiedFIFO_t nf; + initNotifiedFIFO(&nf); + int nbJobs=0; + for(int j=0; j<(impp.n_segments/8+((impp.n_segments&7)==0 ? 0 : 1)); j++) { + notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(impp), j, &nf, ldpc8blocks); + encoder_implemparams_t* perJobImpp=(encoder_implemparams_t*)NotifiedFifoData(req); + *perJobImpp=impp; + perJobImpp->macro_num=j; + pushTpool(gNB->threadPool,req); + nbJobs++; } - -#ifdef DEBUG_DLSCH_CODING - write_output("enc_input0.m","enc_in0",&harq->c[0][0],Kr_bytes,1,4); - write_output("enc_output0.m","enc0",&harq->d[0][0],(3*8*Kr_bytes)+12,1,4); -#endif - - F = harq->F; - - Kr = harq->K; - for (r=0; rC; r++) { - - if (F>0) { - for (int k=(Kr-F-2*(*Zc)); kd[r][k] = NR_NULL; - //if (k<(Kr-F+8)) - //printf("r %d filler bits [%d] = %d \n", r,k, harq->d[r][k]); - } - } - -#ifdef DEBUG_DLSCH_CODING - LOG_D(PHY,"rvidx in encoding = %d\n", rel15->rvIndex[0]); -#endif - - E = nr_get_E(G, harq->C, mod_order, rel15->nrOfLayers, r); - - //#ifdef DEBUG_DLSCH_CODING - LOG_D(NR_PHY,"Rate Matching, Code segment %d/%d (coded bits (G) %u, E %d, Filler bits %d, Filler offset %d mod_order %d, nb_rb %d)...\n", - r, - harq->C, - G, - E, - F, - Kr-F-2*(*Zc), - mod_order,nb_rb); - - // for tbslbrm calculation according to 5.4.2.1 of 38.212 - if (rel15->nrOfLayers < Nl) - Nl = rel15->nrOfLayers; - - Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl); - - start_meas(dlsch_rate_matching_stats); - if (nr_rate_matching_ldpc(Ilbrm, - Tbslbrm, - harq->BG, - *Zc, - harq->d[r], - harq->e+r_offset, - harq->C, - F, - Kr-F-2*(*Zc), - rel15->rvIndex[0], - E) == -1) - return -1; - - stop_meas(dlsch_rate_matching_stats); -#ifdef DEBUG_DLSCH_CODING - for (int i =0; i<16; i++) - printf("output ratematching e[%d]= %d r_offset %u\n", i,harq->e[i+r_offset], r_offset); -#endif - - start_meas(dlsch_interleaving_stats); - nr_interleaving_ldpc(E, - mod_order, - harq->e+r_offset, - harq->f+r_offset); - stop_meas(dlsch_interleaving_stats); - -#ifdef DEBUG_DLSCH_CODING - for (int i =0; i<16; i++) - printf("output interleaving f[%d]= %d r_offset %u\n", i,harq->f[i+r_offset], r_offset); - - if (r==harq->C-1) - write_output("enc_output.m","enc",harq->f,G,1,4); -#endif - - r_offset += E; + while(nbJobs) { + notifiedFIFO_elt_t *req=pullTpool(&nf, gNB->threadPool); + delNotifiedFIFO_elt(req); + nbJobs--; } - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_OUT); - return 0; } diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c index 3ba13d2f44..26b45eb9f7 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c @@ -96,11 +96,6 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config, } } - -uint16_t get_SLIV(uint8_t S, uint8_t L) { - return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) ); -} - static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) { return ( (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A)|| (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C)? 0 : diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index 1ce8c238cb..c4b40ec4cc 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -376,9 +376,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, len = (pilots==1)? ((config_type==NFAPI_NR_DMRS_TYPE1)?nb_rb*(12-6*dlsch0_harq->n_dmrs_cdm_groups): nb_rb*(12-4*dlsch0_harq->n_dmrs_cdm_groups)):(nb_rb*12); stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); - -#ifdef DEBUG_PDSCH_RX - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", +#if DISABLE_LOG_X + printf("[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", + frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#else + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif @@ -397,11 +399,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, nb_rb_pdsch); stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); - -#ifdef DEBUG_PDSCH_RX - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#if DISABLE_LOG_X + printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#else + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif - start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); if (first_symbol_flag==1) { if (beamforming_mode==0){ @@ -458,9 +460,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #endif stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); - -#ifdef DEBUG_PDSCH_RX - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#if DISABLE_LOG_X + printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#else + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); @@ -509,11 +512,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); - -#ifdef DEBUG_PDSCH_RX - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#if DISABLE_LOG_X + printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#else + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif - start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); if (frame_parms->nb_antennas_rx > 1) { @@ -568,11 +571,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); - -#ifdef DEBUG_PDSCH_RX - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#if DISABLE_LOG_X + printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#else + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif - start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); /* Store the valid DL RE's */ pdsch_vars[gNB_id]->dl_valid_re[symbol-1] = len; @@ -651,9 +654,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]); - -#ifdef DEBUG_PDSCH_RX - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#if DISABLE_LOG_X + printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); +#else + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif // Please keep it: useful for debugging diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c index a064a91d87..7c75884fa6 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c @@ -947,7 +947,7 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h index 0ab17c11e6..3cb002f9e1 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h @@ -1286,8 +1286,8 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti); */ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL); -int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); +//int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); +//int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); #ifndef modOrder @@ -1313,16 +1313,6 @@ uint8_t I_TBS2I_MCS(uint8_t I_TBS); uint8_t SE2I_TBS(float SE, uint8_t N_PRB, uint8_t symbPerRB); -/** \brief This function generates the sounding reference symbol (SRS) for the uplink according to 36.211 v8.6.0. If IFFT_FPGA is defined, the SRS is quantized to a QPSK sequence. - @param frame_parms LTE DL Frame Parameters - @param soundingrs_ul_config_dedicated Dynamic configuration from RRC during Connection Establishment - @param txdataF pointer to the frequency domain TX signal - @returns 0 on success*/ -int generate_srs(NR_DL_FRAME_PARMS *frame_parms, - SOUNDINGRS_UL_CONFIG_DEDICATED *soundingrs_ul_config_dedicated, - int *txdataF, - int16_t amp, - uint32_t subframe); /*! @@ -1352,12 +1342,6 @@ int32_t generate_drs_pusch(PHY_VARS_NR_UE *phy_vars_ue, uint32_t nb_rb, uint8_t ant); -/*! - \brief This function initializes the Group Hopping, Sequence Hopping and nPRS sequences for PUCCH/PUSCH according to 36.211 v8.6.0. It should be called after configuration of UE (reception of SIB2/3) and initial configuration of eNB (or after reconfiguration of cell-specific parameters). - @param frame_parms Pointer to a NR_DL_FRAME_PARMS structure (eNB or UE)*/ -void init_ul_hopping(NR_DL_FRAME_PARMS *frame_parms); - - /*! \brief This function implements the initialization of paging parameters for UE (See Section 7, 36.304).It must be called after setting IMSImod1024 during UE startup and after receiving SIB2 @param ue Pointer to UE context @@ -1422,8 +1406,6 @@ double sinr_eff_cqi_calc(PHY_VARS_NR_UE *phy_vars_ue, uint8_t sinr2cqi(double sinr,uint8_t trans_mode); -int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci); - int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm); void init_transport_channels(uint8_t); @@ -1513,18 +1495,11 @@ int get_nCCE_offset_l1(int *CCE_table, const unsigned short rnti, const unsigned char subframe); -uint16_t get_nCCE(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi); -uint16_t get_nquad(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi); - -uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe); +//uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe); uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe); -uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe); - -void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi); - void nr_pdcch_unscrambling(int16_t *z, uint16_t scrambling_RNTI, uint32_t length, @@ -1539,7 +1514,6 @@ void dlsch_unscrambling(NR_DL_FRAME_PARMS *frame_parms, uint8_t q, uint8_t Ns); -void init_ncs_cell(NR_DL_FRAME_PARMS *frame_parms,uint8_t ncs_cell[20][7]); void generate_pucch1x(int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, @@ -1587,7 +1561,7 @@ void init_ulsch_power_LUT(void); @param subframe subframe index to check @returns 0 on success */ -int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe); +//int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe); /*! \brief Generate PRACH waveform @@ -1653,8 +1627,6 @@ void init_scrambling_lut(void); @param frame_parms Pointer to frame parameters @returns 1 if subframe is for MBSFN */ -int is_pmch_subframe(frame_t frame, int subframe, NR_DL_FRAME_PARMS *frame_parms); - uint8_t is_not_pilot(uint8_t pilots, uint8_t re, uint8_t nushift, uint8_t use2ndpilots); uint8_t is_not_UEspecRS(int8_t lprime, uint8_t re, uint8_t nushift, uint8_t Ncp, uint8_t beamforming_mode); @@ -1691,8 +1663,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms, uint8_t n_ra_prboffset, uint8_t tdd_mapindex, uint16_t Nf); - -uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); +#include uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c index 99dc2b658e..914523bc70 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c @@ -105,7 +105,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5]; int16_t **tx_layers; int32_t **txdataF; - int8_t Wf[2], Wt[2], l_prime[2], delta; + int8_t Wf[2], Wt[2]; + int l_prime[2], delta; uint8_t nb_dmrs_re_per_rb; int ap, i; int sample_offsetF, N_RE_prime; @@ -411,7 +412,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, if (is_dmrs == 1) { // if transform precoding is enabled if (pusch_pdu->transform_precoding == 0) { - + ((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15; ((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15; diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index cb929f1642..ddec605253 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -805,8 +805,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue, } #endif //0 -inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline)); -inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) { +static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline)); +static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) { uint32_t x1, x2, s=0; int i; uint8_t c; diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index 11b5112a6c..fb4f9a0092 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -96,20 +96,6 @@ typedef struct { uint32_t subframe; /// MIMO mode for this DLSCH MIMO_mode_t mimo_mode; - /// Concatenated sequences - uint8_t *e; - /// LDPC-code outputs - uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS]; - /// Interleaver outputs - uint8_t *f; - /// Number of code segments - uint32_t C; - /// Number of bits in "small" code segments - uint32_t K; - /// Number of "Filler" bits - uint32_t F; - /// Encoder BG - uint8_t BG; /// LDPC lifting size uint32_t Z; } NR_DL_gNB_HARQ_t; @@ -868,6 +854,9 @@ typedef struct PHY_VARS_gNB_s { time_stats_t dlsch_encoding_stats; time_stats_t dlsch_modulation_stats; time_stats_t dlsch_scrambling_stats; + time_stats_t dlsch_resource_mapping_stats; + time_stats_t dlsch_layer_mapping_stats; + time_stats_t dlsch_precoding_stats; time_stats_t tinput; time_stats_t tprep; time_stats_t tparity; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 1685e206ae..792667d510 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -263,7 +263,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) { nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0,0); //dumpsig=1; } else { - LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n", + LOG_D(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n", gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot, rdata->harq_pid, pusch_pdu->pusch_data.new_data_indicator, ulsch_harq->status, ulsch_harq->round, @@ -358,10 +358,11 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs pusch_pdu->qam_mod_order, pusch_pdu->nrOfLayers); - LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n", + LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, dmrs symbol positions %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n", pusch_pdu->rb_size, number_symbols, nb_re_dmrs, + pusch_pdu->ul_dmrs_symb_pos, number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs pusch_pdu->qam_mod_order, pusch_pdu->nrOfLayers); diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 0b543da275..20b6e67aa9 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -1022,14 +1022,14 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch0->harq_processes[harq_pid]->TBS, dlsch0->harq_processes[harq_pid]->TBS / 8); - stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); -#ifdef NR_PDSCH_DEBUG - LOG_I(PHY, " --> Unscrambling for CW0 %5.3f\n", + + + stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); + LOG_D(PHY, " --> Unscrambling for CW0 %5.3f\n", (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); - LOG_I(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n", + LOG_D(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); -#endif if(is_cw1_active) { // start ldpc decode for CW 1 @@ -1081,21 +1081,13 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, LOG_T(PHY,"CWW sequential dlsch decoding, ret1 = %d\n", ret1); } - stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); -#if PHYSIM - printf(" --> Unscrambling for CW1 %5.3f\n", - (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); - printf("AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", - frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); -#else + stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); + LOG_D(PHY, " --> Unscrambling for CW1 %5.3f\n", (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); -#endif - - LOG_D(PHY,"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); @@ -1404,7 +1396,6 @@ void *UE_thread_slot1_dl_processing(void *arg) { stop_meas(&ue->ue_front_end_per_slot_stat[proc->thread_id][1]); - LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_slot_rx,ue->ue_front_end_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0)); @@ -1495,7 +1486,6 @@ void *UE_thread_slot1_dl_processing(void *arg) { //printf("Set available LLR slot1 to 1 AbsSubframe %d.%d \n",frame_rx,nr_slot_rx); stop_meas(&ue->pdsch_procedures_per_slot_stat[proc->thread_id][1]); - LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,nr_slot_rx,ue->pdsch_procedures_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0)); if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) { @@ -1867,7 +1857,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, dlsch_parallel); stop_meas(&ue->dlsch_procedures_stat[proc->thread_id]); - LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0)); LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0)); @@ -1945,7 +1934,6 @@ if (nr_slot_rx==9) { } stop_meas(&ue->generic_stat); - LOG_D(PHY,"after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0)); #ifdef EMOS phy_procedures_emos_UE_RX(ue,slot,gNB_id); @@ -1955,7 +1943,6 @@ phy_procedures_emos_UE_RX(ue,slot,gNB_id); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT); stop_meas(&ue->phy_proc_rx[proc->thread_id]); - LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0)); //#endif //pdsch diff --git a/openair1/SIMULATION/NR_PHY/dlschsim.c b/openair1/SIMULATION/NR_PHY/dlschsim.c index 1d9584b30b..ff07422c6b 100644 --- a/openair1/SIMULATION/NR_PHY/dlschsim.c +++ b/openair1/SIMULATION/NR_PHY/dlschsim.c @@ -118,7 +118,8 @@ int main(int argc, char **argv) uint8_t mcs_table = 0; double DS_TDL = .03; cpuf = get_cpu_freq_GHz(); - + char gNBthreads[128]="n"; + if (load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY) == 0) { exit_fun("[NR_DLSCHSIM] Error, configuration module init failed\n"); } @@ -126,7 +127,7 @@ int main(int argc, char **argv) //logInit(); randominit(0); - while ((c = getopt(argc, argv, "df:hpVg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:")) != -1) { + while ((c = getopt(argc, argv, "df:hpVg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:X:")) != -1) { switch (c) { /*case 'f': write_output_file = 1; @@ -292,6 +293,11 @@ int main(int argc, char **argv) nb_rb = atoi(optarg); break; + case 'X': + strncpy(gNBthreads, optarg, sizeof(gNBthreads)); + gNBthreads[sizeof(gNBthreads)-1]=0; + break; + /*case 'x': transmission_mode = atoi(optarg); break;*/ @@ -352,6 +358,8 @@ int main(int argc, char **argv) RC.gNB = (PHY_VARS_gNB **) malloc(sizeof(PHY_VARS_gNB *)); RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB)); gNB = RC.gNB[0]; + gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); + initTpool(gNBthreads, gNB->threadPool, true); //gNB_config = &gNB->gNB_config; frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH) frame_parms->nb_antennas_tx = n_tx; @@ -468,7 +476,6 @@ int main(int argc, char **argv) double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384); // [hna] 16 segments, 68*Zc short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384); short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384); - double errors_bit_uncoded = 0; //unsigned char *estimated_output; unsigned char *estimated_output_bit; unsigned char *test_input_bit; @@ -506,8 +513,10 @@ int main(int argc, char **argv) //printf("crc32: [0]->0x%08x\n",crc24c(test_input, 32)); // generate signal + unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32))); + bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); if (input_fd == NULL) { - nr_dlsch_encoding(gNB, test_input, frame, slot, dlsch, frame_parms,NULL,NULL,NULL,NULL,NULL,NULL,NULL); + nr_dlsch_encoding(gNB, test_input, frame, slot, dlsch, frame_parms,output,NULL,NULL,NULL,NULL,NULL,NULL,NULL); } for (SNR = snr0; SNR < snr1; SNR += snr_step) { @@ -515,7 +524,6 @@ int main(int argc, char **argv) n_false_positive = 0; for (trial = 0; trial < n_trials; trial++) { - errors_bit_uncoded = 0; for (i = 0; i < available_bits; i++) { #ifdef DEBUG_CODER if ((i&0xf)==0) @@ -524,11 +532,12 @@ int main(int argc, char **argv) //if (i<16) // printf("encoder output f[%d] = %d\n",i,dlsch->harq_processes[0]->f[i]); - if (dlsch->harq_process.f[i] == 0) + + if (output[i] == 0) modulated_input[i] = 1.0; ///sqrt(2); //QPSK else modulated_input[i] = -1.0; ///sqrt(2); - + //if (i<16) printf("modulated_input[%d] = %d\n",i,modulated_input[i]); //SNR =10; SNR_lin = pow(10, SNR / 10.0); @@ -546,18 +555,14 @@ int main(int argc, char **argv) i,modulated_input[i], i,channel_output_fixed[i]); */ + //Uncoded BER if (channel_output_fixed[i] < 0) channel_output_uncoded[i] = 1; //QPSK demod else channel_output_uncoded[i] = 0; - - if (channel_output_uncoded[i] != dlsch->harq_process.f[i]) - errors_bit_uncoded = errors_bit_uncoded + 1; } - //if (errors_bit_uncoded>10) - //printf("errors bits uncoded %f\n", errors_bit_uncoded); #ifdef DEBUG_CODER printf("\n"); exit(-1); diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 50e21ac02b..fa868a6896 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -277,7 +277,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, UE_info->CellGroup[0], sched_ctrl->active_bwp, NULL, - /* tda = */ 2, + /* tda = */ 0, dci_format, ps); @@ -369,6 +369,7 @@ int main(int argc, char **argv) uint8_t n_tx=1,n_rx=1; uint8_t round; uint8_t num_rounds = 4; + char gNBthreads[128]="n"; channel_desc_t *gNB2UE; //uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0; @@ -430,9 +431,7 @@ int main(int argc, char **argv) FILE *scg_fd=NULL; - - while ((c = getopt (argc, argv, "f:hA:pf:g:in:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:D:e:m:w:T:U:q")) != -1) { - + while ((c = getopt (argc, argv, "f:hA:pf:g:in:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:d:e:m:w:T:U:qX:")) != -1) { switch (c) { case 'f': scg_fd = fopen(optarg,"r"); @@ -635,7 +634,12 @@ int main(int argc, char **argv) dmrs_arg[i] = atoi(argv[optind++]); } break; - + + case 'X': + strncpy(gNBthreads, optarg, sizeof(gNBthreads)); + gNBthreads[sizeof(gNBthreads)-1]=0; + break; + default: case 'h': printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", @@ -671,7 +675,8 @@ int main(int argc, char **argv) printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2} DMRS ConfType{1:2}, e.g. -U 3 0 2 1 \n"); printf("-P Print DLSCH performances\n"); printf("-w Write txdata to binary file (one frame)\n"); - printf("-D number of dlsch threads, 0: no dlsch parallelization\n"); + printf("-d number of dlsch threads, 0: no dlsch parallelization\n"); + printf("-X gNB thread pool configuration, n => no threads"); exit (-1); break; } @@ -762,7 +767,7 @@ int main(int argc, char **argv) NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup)); prepare_scc(rrc.carrier.servingcellconfigcommon); uint64_t ssb_bitmap = 1; - fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); + fill_scc_sim(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); ssb_bitmap = 1;// Enable only first SSB with index ssb_indx=0 fix_scc(scc,ssb_bitmap); @@ -827,6 +832,14 @@ int main(int argc, char **argv) fs = 61.44e6; bw = 40e6; } + else if (mu == 1 && N_RB_DL == 133) { + fs = 61.44e6; + bw = 50e6; + } + else if (mu == 1 && N_RB_DL == 162) { + fs = 61.44e6; + bw = 60e6; + } else if (mu == 3 && N_RB_DL == 66) { fs = 122.88e6; bw = 100e6; @@ -966,8 +979,7 @@ int main(int argc, char **argv) snrRun = 0; gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); - char tp_param[] = "n"; - initTpool(tp_param, gNB->threadPool, true); + initTpool(gNBthreads, gNB->threadPool, true); gNB->resp_L1_tx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); initNotifiedFIFO(gNB->resp_L1_tx); // we create 2 threads for L1 tx processing @@ -1217,8 +1229,8 @@ int main(int argc, char **argv) UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1) n_errors++; - NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id]; - int16_t *UE_llr = pdsch_vars[0]->llr[0]; + //NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id]; + //int16_t *UE_llr = pdsch_vars[0]->llr[0]; TBS = UE_harq_process->TBS;//rel15->TBSize[0]; uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); @@ -1233,6 +1245,7 @@ int main(int argc, char **argv) printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) ); } + /* for (i = 0; i < available_bits; i++) { if(((gNB_dlsch->harq_process.f[i] == 0) && (UE_llr[i] <= 0)) || @@ -1246,6 +1259,7 @@ int main(int argc, char **argv) } } + */ for (i = 0; i < TBS; i++) { estimated_output_bit[i] = (UE_harq_process->b[i/8] & (1 << (i & 7))) >> (i & 7); @@ -1289,11 +1303,9 @@ int main(int argc, char **argv) printf("\n"); if (print_perf==1) { - printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))\n", + printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d)\n", 1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex, - msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3, - msgDataTx->dlsch[0][0]->harq_process.K, - msgDataTx->dlsch[0][0]->harq_process.K/((msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3)>3824?22:10)); + msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3); printDistribution(gNB->phy_proc_tx_0,table_tx,"PHY proc tx"); printStatIndent2(&gNB->dlsch_encoding_stats,"DLSCH encoding time"); printStatIndent3(&gNB->dlsch_segmentation_stats,"DLSCH segmentation time"); @@ -1305,6 +1317,9 @@ int main(int argc, char **argv) printStatIndent3(&gNB->dlsch_interleaving_stats, "DLSCH Interleaving time"); printStatIndent2(&gNB->dlsch_modulation_stats,"DLSCH modulation time"); printStatIndent2(&gNB->dlsch_scrambling_stats, "DLSCH scrambling time"); + printStatIndent2(&gNB->dlsch_layer_mapping_stats, "DLSCH Layer Mapping time"); + printStatIndent2(&gNB->dlsch_resource_mapping_stats, "DLSCH Resource Mapping time"); + printStatIndent2(&gNB->dlsch_precoding_stats,"DLSCH Layer Precoding time"); printf("\nUE RX function statistics (per %d us slot)\n",1000>>*scc->ssbSubcarrierSpacing); diff --git a/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h b/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h index 8d4acd1af1..805913d055 100644 --- a/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h +++ b/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h @@ -59,167 +59,7 @@ int oai_nfapi_rach_ind(nfapi_rach_indication_t *rach_ind) {return(0);} //NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);} int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0); } - -void fill_scc(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul) { - - *scc->physCellId=0; \ - // *scc->n_TimingAdvanceOffset=NR_ServingCellConfigCommon__n_TimingAdvanceOffset_n0; - *scc->ssb_periodicityServingCell=NR_ServingCellConfigCommon__ssb_periodicityServingCell_ms20; - scc->dmrs_TypeA_Position=NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; - *scc->ssbSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; - *scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=641032; - *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78; - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=640000; - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; - - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL; - scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036; - scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=mu_dl;//NR_SubcarrierSpacing_kHz30; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0=0; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=40; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0=0; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=53; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0=0; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength=54; - *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]=78; - *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA=-1; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_UL; - *scc->uplinkConfigCommon->frequencyInfoUL->p_Max=20; - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth=13036; - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing=mu_ul;//NR_SubcarrierSpacing_kHz30; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex=98; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM=NR_RACH_ConfigGeneric__msg1_FDM_one; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart=0; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig=13; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower=-118; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax=NR_RACH_ConfigGeneric__preambleTransMax_n10; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep=NR_RACH_ConfigGeneric__powerRampingStep_dB2; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow=NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer=NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64; - *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB=19; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2=6; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2=6; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=69; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2=6; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble=1; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant=-90; - scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping=NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither; - *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId=40; - *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal=-90; - scc->ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap; - *ssb_bitmap=0xff; - scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots=7; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols=6; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots=2; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols=4; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity=321; - - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSymbols=-1; - scc->ss_PBCH_BlockPower=20; - *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing=-1; -} - +void fill_scc_sim(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul); void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap); void prepare_scc(NR_ServingCellConfigCommon_t *scc); void prepare_scd(NR_ServingCellConfig_t *scd); diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c index a7075eb218..97c753d455 100644 --- a/openair1/SIMULATION/NR_PHY/ulsim.c +++ b/openair1/SIMULATION/NR_PHY/ulsim.c @@ -707,7 +707,7 @@ int main(int argc, char **argv) NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup)); prepare_scc(rrc.carrier.servingcellconfigcommon); uint64_t ssb_bitmap; - fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); + fill_scc_sim(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); fix_scc(scc,ssb_bitmap); @@ -732,17 +732,13 @@ int main(int argc, char **argv) nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config; cfg->carrier_config.num_tx_ant.value = n_tx; cfg->carrier_config.num_rx_ant.value = n_rx; - nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01); +// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01); phy_init_nr_gNB(gNB,0,1); N_RB_DL = gNB->frame_parms.N_RB_DL; NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]; - //crcTableInit(); - - //nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_UL, mu, Nid_cell, SSB_positions); - //configure UE UE = malloc(sizeof(PHY_VARS_NR_UE)); diff --git a/openair2/COMMON/rrc_messages_types.h b/openair2/COMMON/rrc_messages_types.h index f61648d8b4..e1886b57ff 100644 --- a/openair2/COMMON/rrc_messages_types.h +++ b/openair2/COMMON/rrc_messages_types.h @@ -412,7 +412,7 @@ typedef struct NRRrcConfigurationReq_s { int sib1_tda; int pdsch_AntennaPorts; int pusch_AntennaPorts; - int minRXTXTIMEpdsch; + int minRXTXTIME; int do_CSIRS; int pusch_TargetSNRx10; int pucch_TargetSNRx10; diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h index 70295b1c31..8a7ce64d91 100644 --- a/openair2/GNB_APP/RRC_nr_paramsvalues.h +++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h @@ -58,56 +58,6 @@ #define GNB_CONFIG_STRING_INITIALDLBWPCONTROLRESOURCESETZERO "initialDLBWPcontrolResourceSetZero" #define GNB_CONFIG_STRING_INITIALDLBWPSEARCHSPACEZERO "initialDLBWPsearchSpaceZero" - -#define GNB_CONFIG_STRING_INITIALDLBWPK0_0 "initialDLBWPk0_0" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_0 "initialDLBWPmappingType_0" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0 "initialDLBWPstartSymbolAndLength_0" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_1 "initialDLBWPk0_1" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1 "initialDLBWPmappingType_1" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_1 "initialDLBWPstartSymbolAndLength_1" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_2 "initialDLBWPk0_2" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2 "initialDLBWPmappingType_2" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2 "initialDLBWPstartSymbolAndLength_2" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_3 "initialDLBWPk0_3" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_3 "initialDLBWPmappingType_3" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_3 "initialDLBWPstartSymbolAndLength_3" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_4 "initialDLBWPk0_4" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_4 "initialDLBWPmappingType_4" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_4 "initialDLBWPstartSymbolAndLength_4" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_5 "initialDLBWPk0_5" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_5 "initialDLBWPmappingType_5" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_5 "initialDLBWPstartSymbolAndLength_5" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_6 "initialDLBWPk0_6" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_6 "initialDLBWPmappingType_6" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_6 "initialDLBWPstartSymbolAndLength_6" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_7 "initialDLBWPk0_7" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_7 "initialDLBWPmappingType_7" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_7 "initialDLBWPstartSymbolAndLength_7" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_8 "initialDLBWPk0_8" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_8 "initialDLBWPmappingType_8" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_8 "initialDLBWPstartSymbolAndLength_8" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_9 "initialDLBWPk0_9" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_9 "initialDLBWPmappingType_9" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_9 "initialDLBWPstartSymbolAndLength_9" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_10 "initialDLBWPk0_10" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_10 "initialDLBWPmappingType_10" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_10 "initialDLBWPstartSymbolAndLength_10" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_11 "initialDLBWPk0_11" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_11 "initialDLBWPmappingType_11" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_11 "initialDLBWPstartSymbolAndLength_11" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_12 "initialDLBWPk0_12" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_12 "initialDLBWPmappingType_12" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_12 "initialDLBWPstartSymbolAndLength_12" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_13 "initialDLBWPk0_13" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_13 "initialDLBWPmappingType_13" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_13 "initialDLBWPstartSymbolAndLength_13" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_14 "initialDLBWPk0_14" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_14 "initialDLBWPmappingType_14" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_14 "initialDLBWPstartSymbolAndLength_14" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_15 "initialDLBWPk0_15" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_15 "initialDLBWPmappingType_15" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_15 "initialDLBWPstartSymbolAndLength_15" - #define GNB_CONFIG_STRING_ULFREQUENCYBAND "ul_frequencyBand" #define GNB_CONFIG_STRING_ULABSOLUEFREQUENCYPOINTA "ul_absoluteFrequencyPointA" #define GNB_CONFIG_STRING_ULOFFSETTOCARRIER "ul_offstToCarrier" @@ -142,54 +92,6 @@ #define GNB_CONFIG_STRING_HOPPINGID "hoppingId" #define GNB_CONFIG_STRING_P0NOMINAL "p0_nominal" #define GNB_CONFIG_STRING_PUCCHRES "pucch_ResourceCommon" -#define GNB_CONFIG_STRING_INITIALULBWPK2_0 "initialULBWPk2_0" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_0 "initialULBWPmappingType_0" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_0 "initialULBWPstartSymbolAndLength_0" -#define GNB_CONFIG_STRING_INITIALULBWPK2_1 "initialULBWPk2_1" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_1 "initialULBWPmappingType_1" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_1 "initialULBWPstartSymbolAndLength_1" -#define GNB_CONFIG_STRING_INITIALULBWPK2_2 "initialULBWPk2_2" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_2 "initialULBWPmappingType_2" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_2 "initialULBWPstartSymbolAndLength_2" -#define GNB_CONFIG_STRING_INITIALULBWPK2_3 "initialULBWPk2_3" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_3 "initialULBWPmappingType_3" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_3 "initialULBWPstartSymbolAndLength_3" -#define GNB_CONFIG_STRING_INITIALULBWPK2_4 "initialULBWPk2_4" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_4 "initialULBWPmappingType_4" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_4 "initialULBWPstartSymbolAndLength_4" -#define GNB_CONFIG_STRING_INITIALULBWPK2_5 "initialULBWPk2_5" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_5 "initialULBWPmappingType_5" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_5 "initialULBWPstartSymbolAndLength_5" -#define GNB_CONFIG_STRING_INITIALULBWPK2_6 "initialULBWPk2_6" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_6 "initialULBWPmappingType_6" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_6 "initialULBWPstartSymbolAndLength_6" -#define GNB_CONFIG_STRING_INITIALULBWPK2_7 "initialULBWPk2_7" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_7 "initialULBWPmappingType_7" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_7 "initialULBWPstartSymbolAndLength_7" -#define GNB_CONFIG_STRING_INITIALULBWPK2_8 "initialULBWPk2_8" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_8 "initialULBWPmappingType_8" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_8 "initialULBWPstartSymbolAndLength_8" -#define GNB_CONFIG_STRING_INITIALULBWPK2_9 "initialULBWPk2_9" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_9 "initialULBWPmappingType_9" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_9 "initialULBWPstartSymbolAndLength_9" -#define GNB_CONFIG_STRING_INITIALULBWPK2_10 "initialULBWPk2_10" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_10 "initialULBWPmappingType_10" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_10 "initialULBWPstartSymbolAndLength_10" -#define GNB_CONFIG_STRING_INITIALULBWPK2_11 "initialULBWPk2_11" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_11 "initialULBWPmappingType_11" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_11 "initialULBWPstartSymbolAndLength_11" -#define GNB_CONFIG_STRING_INITIALULBWPK2_12 "initialULBWPk2_12" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_12 "initialULBWPmappingType_12" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_12 "initialULBWPstartSymbolAndLength_12" -#define GNB_CONFIG_STRING_INITIALULBWPK2_13 "initialULBWPk2_13" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_13 "initialULBWPmappingType_13" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_13 "initialULBWPstartSymbolAndLength_13" -#define GNB_CONFIG_STRING_INITIALULBWPK2_14 "initialULBWPk2_14" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_14 "initialULBWPmappingType_14" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_14 "initialULBWPstartSymbolAndLength_14" -#define GNB_CONFIG_STRING_INITIALULBWPK2_15 "initialULBWPk2_15" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_15 "initialULBWPmappingType_15" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_15 "initialULBWPstartSymbolAndLength_15" #define GNB_CONFIG_STRING_SSBPOSITIONSINBURSTPR "ssb_PositionsInBurst_PR" @@ -273,54 +175,6 @@ {GNB_CONFIG_STRING_INITIALDLBWPSUBCARRIERSPACING,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing,defint64val:NR_SubcarrierSpacing_kHz30,TYPE_INT64,0/*12*/},\ {GNB_CONFIG_STRING_INITIALDLBWPCONTROLRESOURCESETZERO,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero,defint64val:12,TYPE_INT64,0/*13*/},\ {GNB_CONFIG_STRING_INITIALDLBWPSEARCHSPACEZERO,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero,defint64val:0,TYPE_INT64,0/*14*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_0,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0,defint64val:-1,TYPE_INT64,0/*15*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType,defint64val:-1,TYPE_INT64,0/*16*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:-1,TYPE_INT64,0/*17*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_1,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0,defint64val:-1,TYPE_INT64,0/*18*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*19*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*20*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPK0_2,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0,defint64val:-1,TYPE_INT64,0/*21*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*22*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*23*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_3,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->k0,defint64val:-1,TYPE_INT64,0/*24*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_3,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*25*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_3,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*26*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_4,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->k0,defint64val:-1,TYPE_INT64,0/*27*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_4,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*28*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_4,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*29*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_5,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->k0,defint64val:-1,TYPE_INT64,0/*30*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_5,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*31*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_5,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*32*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_6,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->k0,defint64val:-1,TYPE_INT64,0/*33*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_6,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*34*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_6,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*35*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_7,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->k0,defint64val:-1,TYPE_INT64,0/*36*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_7,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*37*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_7,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*38*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_8,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->k0,defint64val:-1,TYPE_INT64,0/*39*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_8,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*40*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_8,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*41*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_9,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->k0,defint64val:-1,TYPE_INT64,0/*42*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_9,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*43*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_9,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*44*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_10,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->k0,defint64val:-1,TYPE_INT64,0/*45*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_10,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*46*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_10,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*47*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_11,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->k0,defint64val:-1,TYPE_INT64,0/*48*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_11,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*49*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_11,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*50*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPK0_12,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->k0,defint64val:-1,TYPE_INT64,0/*51*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_12,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*52*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_12,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*53*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_13,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->k0,defint64val:-1,TYPE_INT64,0/*54*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_13,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*55*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_13,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*56*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_14,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->k0,defint64val:-1,TYPE_INT64,0/*57*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_14,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*58*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_14,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*59*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_15,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->k0,defint64val:-1,TYPE_INT64,0/*60*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_15,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*61*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_15,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*62*/},\ {GNB_CONFIG_STRING_ULFREQUENCYBAND,NULL,0,i64ptr:scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],defint64val:-1,TYPE_INT64,0/*63*/},\ {GNB_CONFIG_STRING_ULABSOLUEFREQUENCYPOINTA,NULL,0,i64ptr:scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA,defint64val:-1,TYPE_INT64,0/*64*/},\ {GNB_CONFIG_STRING_ULOFFSETTOCARRIER,NULL,0,i64ptr:&scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier,defint64val:0,TYPE_INT64,0/*65*/},\ @@ -345,54 +199,6 @@ {GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139,defint64val:0,TYPE_INT64,0/*84*/},\ {GNB_CONFIG_STRING_RESTRICTEDSETCONFIG,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig,defintval:NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet,TYPE_INT64,0/*85*/}, \ {GNB_CONFIG_STRING_MSG3TRANSFPREC,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder,defintval:1,TYPE_INT64,0/*86*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPK2_0,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2,defint64val:-1,TYPE_INT64,0/*87*/},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_0,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,/*88*/},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:55,TYPE_INT64,0/*89*/},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_1,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2,defint64val:-1,TYPE_INT64,0/*90*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_1,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_2,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_3,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_3,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_3,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_4,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_4,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0 /*100*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_4,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_5,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_5,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_5,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_6,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_6,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_6,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_7,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_7,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_7,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*110*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPK2_8,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_8,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_8,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_9,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_9,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_9,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_10,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_10,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_10,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_11,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->k2,defint64val:-1,TYPE_INT64,0/*120*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_11,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_11,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_12,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_12,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_12,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_13,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_13,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_13,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_14,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_14,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0 /*130*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_14,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_15,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_15,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_15,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ {GNB_CONFIG_STRING_MSG3DELTAPREABMLE, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble,defint64val:1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_P0NOMINALWITHGRANT, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant,defint64val:1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_PUCCHGROUPHOPPING, NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping,defint64val:NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither,TYPE_INT64,0},\ diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 9851d14b91..d069bfe2f4 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -94,8 +94,6 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { NR_FreqBandIndicatorNR_t *dl_frequencyBandList,*ul_frequencyBandList; struct NR_SCS_SpecificCarrier *dl_scs_SpecificCarrierList,*ul_scs_SpecificCarrierList; - struct NR_PDSCH_TimeDomainResourceAllocation *bwp_dl_timedomainresourceallocation; - struct NR_PUSCH_TimeDomainResourceAllocation *pusch_configcommontimedomainresourceallocation; // struct NR_RateMatchPattern *ratematchpattern; // NR_RateMatchPatternId_t *ratematchpatternid; // NR_TCI_StateId_t *TCI_StateId; @@ -143,14 +141,6 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->present = NR_SetupRelease_PDSCH_ConfigCommon_PR_setup; scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup = CALLOC(1,sizeof(struct NR_PDSCH_ConfigCommon)); scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList = CALLOC(1,sizeof(struct NR_PDSCH_TimeDomainResourceAllocationList)); - // - for (int i=0;ik0 = CALLOC(1,sizeof(long)); - *bwp_dl_timedomainresourceallocation->k0=0; - ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, - bwp_dl_timedomainresourceallocation); - } ul_frequencyBandList = CALLOC(1,sizeof(NR_FreqBandIndicatorNR_t)); scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList = CALLOC(1,sizeof(struct NR_MultiFrequencyBandListNR)); @@ -199,12 +189,6 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { ul_scs_SpecificCarrierList = CALLOC(1,sizeof(struct NR_SCS_SpecificCarrier)); ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list,ul_scs_SpecificCarrierList); - for (int i=0;ik2 = CALLOC(1,sizeof(long)); - *pusch_configcommontimedomainresourceallocation->k2=0; - ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_configcommontimedomainresourceallocation); - } //ratematchpattern = CALLOC(1,sizeof(struct NR_RateMatchPattern)); //ratematchpattern->patternType.choice.bitmaps = CALLOC(1,sizeof(struct NR_RateMatchPattern__patternType__bitmaps)); //ratematchpattern->patternType.choice.bitmaps->resourceBlocks.buf = MALLOC(35); @@ -223,6 +207,92 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { } +void fill_scc_sim(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul) { + + *scc->physCellId=0; \ + // *scc->n_TimingAdvanceOffset=NR_ServingCellConfigCommon__n_TimingAdvanceOffset_n0; + *scc->ssb_periodicityServingCell=NR_ServingCellConfigCommon__ssb_periodicityServingCell_ms20; + scc->dmrs_TypeA_Position=NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; + *scc->ssbSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; + *scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=641032; + *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78; + scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=640000; + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; + + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL; + scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036; + scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=mu_dl;//NR_SubcarrierSpacing_kHz30; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0; + struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation0 = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation0->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation0->startSymbolAndLength=54; + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation0); + struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation1 = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation1->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation1->startSymbolAndLength=57; + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation1); + *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]=78; + *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA=-1; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_UL; + *scc->uplinkConfigCommon->frequencyInfoUL->p_Max=20; + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth=13036; + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing=mu_ul;//NR_SubcarrierSpacing_kHz30; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex=98; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM=NR_RACH_ConfigGeneric__msg1_FDM_one; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart=0; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig=13; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower=-118; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax=NR_RACH_ConfigGeneric__preambleTransMax_n10; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep=NR_RACH_ConfigGeneric__powerRampingStep_dB2; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow=NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer=NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64; + *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB=19; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet; + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation0 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation0->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation0->k2=6; + pusch_timedomainresourceallocation0->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation0->startSymbolAndLength=55; + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation0); + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation1 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation1->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation1->k2=6; + pusch_timedomainresourceallocation1->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation1->startSymbolAndLength=38; + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation1); + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble=1; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant=-90; + scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping=NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither; + *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId=40; + *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal=-90; + scc->ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap; + *ssb_bitmap=0xff; + scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots=7; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols=6; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots=2; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols=4; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity=321; + + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSymbols=-1; + scc->ss_PBCH_BlockPower=20; + *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing=-1; +} + void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { @@ -273,24 +343,9 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { if (*scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder!=0) scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder = NULL; - // fix DL and UL Allocation lists - - for (int i=scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count-1;i>=0;i--) { - printf("Checking element %d : %ld\n",i,*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0); - if (*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0>32) { - printf("removing pdsch_TimeDomainAllocationList element %d\n",i); - free(scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0); - asn_sequence_del(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,i,1); - printf("List size now %d\n",scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count); - } - } + // prepare DL Allocation lists + nr_rrc_config_dl_tda(scc); - for (int i=scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count-1;i>=0;i--) { - if (*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2>32) { - free(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2); - asn_sequence_del(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,i,1); - } - } if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) { free(scc->tdd_UL_DL_ConfigurationCommon->pattern2); scc->tdd_UL_DL_ConfigurationCommon->pattern2=NULL; @@ -1107,11 +1162,9 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr; printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr; - printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); - NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; + printf("minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr); + NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIME = *GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr; - printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); - NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; diff --git a/openair2/GNB_APP/gnb_paramdef.h b/openair2/GNB_APP/gnb_paramdef.h index 0c3d971569..730b6b85b6 100644 --- a/openair2/GNB_APP/gnb_paramdef.h +++ b/openair2/GNB_APP/gnb_paramdef.h @@ -119,7 +119,7 @@ typedef enum { #define GNB_CONFIG_STRING_SIB1TDA "sib1_tda" #define GNB_CONFIG_STRING_DOCSIRS "do_CSIRS" #define GNB_CONFIG_STRING_NRCELLID "nr_cellid" -#define GNB_CONFIG_STRING_MINRXTXTIMEPDSCH "min_rxtxtime_pdsch" +#define GNB_CONFIG_STRING_MINRXTXTIME "min_rxtxtime" #define GNB_CONFIG_STRING_ULPRBBLACKLIST "ul_prbblacklist" @@ -148,7 +148,7 @@ typedef enum { {GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \ -{GNB_CONFIG_STRING_MINRXTXTIMEPDSCH, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \ +{GNB_CONFIG_STRING_MINRXTXTIME, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_ULPRBBLACKLIST, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0} \ } @@ -172,7 +172,7 @@ typedef enum { #define GNB_SIB1_TDA_IDX 17 #define GNB_DO_CSIRS_IDX 18 #define GNB_NRCELLID_IDX 19 -#define GNB_MINRXTXTIMEPDSCH_IDX 20 +#define GNB_MINRXTXTIME_IDX 20 #define GNB_ULPRBBLACKLIST_IDX 21 #define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD} diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index f67a3e1fa5..764c92ecb7 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -44,46 +44,9 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int nrofUplinkSlots, int nrofUplinkSymbols) { int slot_number = 0; - int nb_periods_per_frame; + int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period); int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<tdd_table.tdd_period) { - case 0: - nb_periods_per_frame = 20; // 10ms/0p5ms - break; - - case 1: - nb_periods_per_frame = 16; // 10ms/0p625ms - break; - - case 2: - nb_periods_per_frame = 10; // 10ms/1ms - break; - - case 3: - nb_periods_per_frame = 8; // 10ms/1p25ms - break; - - case 4: - nb_periods_per_frame = 5; // 10ms/2ms - break; - - case 5: - nb_periods_per_frame = 4; // 10ms/2p5ms - break; - - case 6: - nb_periods_per_frame = 2; // 10ms/5ms - break; - - case 7: - nb_periods_per_frame = 1; // 10ms/10ms - break; - - default: - AssertFatal(1==0,"Undefined tdd period %d\n", cfg->tdd_table.tdd_period); - } - int nb_slots_per_period = ((1<tdd_table.tdd_period_in_slots = nb_slots_per_period; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index a5f6e4a7d1..2f4ceb48ec 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -944,6 +944,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr return -1; } + if(rnti != ra->ra_rnti && rnti != SI_RNTI) + AssertFatal(1+dci->pdsch_to_harq_feedback_timing_indicator.val>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d).\n", + 1+dci->pdsch_to_harq_feedback_timing_indicator.val,DURATION_RX_TO_TX); + // set the harq status at MAC for feedback set_harq_status(mac,dci->pucch_resource_indicator, dci->harq_pid, @@ -1232,7 +1236,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr uint8_t feedback_ti = ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; - AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d)\n", + AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d). Min feedback time set in config file (min_rxtxtime).\n", feedback_ti,DURATION_RX_TO_TX); // set the harq status at MAC for feedback @@ -3160,10 +3164,10 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits)-1); // Not supported yet - skip for now // Frequency hopping flag – 1 bit diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index c142af13ba..3d45877979 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -129,7 +129,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { } AssertFatal(k2 >= DURATION_RX_TO_TX, - "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n", + "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n", k2,DURATION_RX_TO_TX); LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 25aeea70a6..2705b85b8c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -870,9 +870,6 @@ void nr_get_Msg3alloc(module_id_t module_id, int mu = ubwp ? ubwp->bwp_Common->genericParameters.subcarrierSpacing : scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; - int StartSymbolIndex = 0; - int NrOfSymbols = 0; - int startSymbolAndLength = 0; int temp_slot = 0; ra->Msg3_tda_id = 16; // initialization to a value above limit @@ -881,20 +878,29 @@ void nr_get_Msg3alloc(module_id_t module_id, scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; uint8_t k2 = 0; - for (int i=0; ilist.count; i++) { - startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; - SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); - // we want to transmit in the uplink symbols of mixed slot - if (NrOfSymbols == scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols) { + lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); + if (frame_type == TDD) { + int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); + int nb_slots_per_period = ((1<list.count; i++) { k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2; - temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 - ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; - if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) { - ra->Msg3_tda_id = i; - break; + // we want to transmit in the uplink symbols of mixed slot + if ((k2 + DELTA[mu])%nb_slots_per_period == 0) { + temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 + ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; + if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) { + ra->Msg3_tda_id = i; + break; + } } } } + else { + ra->Msg3_tda_id = 0; + k2 = *pusch_TimeDomainAllocationList->list.array[0]->k2; + temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 + ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; + } AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n"); @@ -915,7 +921,7 @@ void nr_get_Msg3alloc(module_id_t module_id, tdd_beam_association[num_tdd_period] = ra->beam_id; } - LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex); + LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id); uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE]; @@ -972,7 +978,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->bwp_size = bwp_size; pusch_pdu->subcarrier_spacing = scs; pusch_pdu->cyclic_prefix = 0; - pusch_pdu->mcs_index = 0; + pusch_pdu->mcs_index = 1; pusch_pdu->mcs_table = 0; pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); @@ -1009,11 +1015,14 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->pusch_data.harq_process_id = 0; pusch_pdu->pusch_data.new_data_indicator = 1; pusch_pdu->pusch_data.num_cb = 0; + int num_dmrs_symb = 0; + for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++) + num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, pusch_pdu->target_code_rate, pusch_pdu->rb_size, pusch_pdu->nr_of_symbols, - 12, // nb dmrs set for no data in dmrs symbol + num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol 0, //nb_rb_oh 0, // to verify tb scaling pusch_pdu->nrOfLayers)>>3; @@ -1074,7 +1083,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t fh = ubwp->bwp_Dedicated->pusch_Config->choice.setup->frequencyHopping ? 1 : 0; } - LOG_D(NR_MAC, "Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", + LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", frameP, slotP, ra->Msg3_frame, @@ -1105,7 +1114,12 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) { - uint8_t time_domain_assignment = 1; + //TODO time domain assignment for msg2 needs to be improved + uint8_t time_domain_assignment; + if(cc->frame_type == TDD) + time_domain_assignment = 1; + else + time_domain_assignment = 0; uint8_t mcsIndex = 0; int rbStart = 0; int rbSize = 8; @@ -1245,6 +1259,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type) dmrsConfigType = 1; + NR_PDSCH_Config_t *pdsch_config = bwp && bwp->bwp_Dedicated && bwp->bwp_Dedicated->pdsch_Config ? bwp->bwp_Dedicated->pdsch_Config->choice.setup : NULL; + pdsch_pdu_rel15->pduBitmap = 0; pdsch_pdu_rel15->rnti = ra->RA_rnti; pdsch_pdu_rel15->pduIndex = pduindex; @@ -1273,7 +1289,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra pdsch_pdu_rel15->VRBtoPRBMapping = 0; pdsch_pdu_rel15->StartSymbolIndex = startSymbolIndex; pdsch_pdu_rel15->NrOfSymbols = nrOfSymbols; - pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, + pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 33cb2b1b1d..7b7b5c771b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -351,7 +351,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc, void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc, const NR_BWP_Uplink_t *ubwp, - const NR_BWP_UplinkDedicated_t *ubwpd, + const NR_BWP_UplinkDedicated_t *ubwpd, long dci_format, int tda, uint8_t num_dmrs_cdm_grps_no_data, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 313dd6236e..c68b16b553 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -104,7 +104,6 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub /* check that TDA index 1 fits into UL slot and does not overlap with PUCCH */ const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - AssertFatal(tdaList->list.count >= 3, "need to have at least three TDAs for UL slots\n"); const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_UL = tdaList->list.array[0]; const int k2 = get_K2(scc, (NR_BWP_Uplink_t*)ubwp,0, mu); int start, len; @@ -117,27 +116,28 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub // get largest time domain allocation (TDA) for UL slot and UL in mixed slot int tdaMi = -1; - const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; - AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), - "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", - k2, - get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); - SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); - const uint16_t symb_tda_mi = ((1 << len) - 1) << start; - // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check - // whether TDA is entirely within mixed slot, UL. Note that here we assume - // that the PUCCH is scheduled in every slot, and on all RBs (which is - // mostly not true, this is a simplification) - if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { - tdaMi = 1; - } else { - LOG_E(NR_MAC, - "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", - symb_pucch, - symb_ulMixed, - symb_tda_mi); + if(tdaList->list.count > 1) { + const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; + AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), + "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", + k2, + get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); + SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); + const uint16_t symb_tda_mi = ((1 << len) - 1) << start; + // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check + // whether TDA is entirely within mixed slot, UL. Note that here we assume + // that the PUCCH is scheduled in every slot, and on all RBs (which is + // mostly not true, this is a simplification) + if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { + tdaMi = 1; + } else { + LOG_E(NR_MAC, + "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", + symb_pucch, + symb_ulMixed, + symb_tda_mi); + } } - const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id])); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index 547c5da00c..5e5de9a8e1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -64,7 +64,7 @@ void *nrmac_stats_thread(void *arg) { fseek(fd,0,SEEK_SET); } fclose(fd); - return (void *)0; + return NULL; } void clear_mac_stats(gNB_MAC_INST *gNB) { diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index ff6923429e..bdd1cf5261 100755 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -1185,9 +1185,9 @@ void fill_initial_SpCellConfig(rnti_t rnti, long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - AssertFatal(carrier->minRXTXTIMEpdsch >=2 && carrier->minRXTXTIMEpdsch <7, - "check minRXTXTIMEpdsch %d\n",carrier->minRXTXTIMEpdsch); - *delay[i] = (i+carrier->minRXTXTIMEpdsch); + AssertFatal(carrier->minRXTXTIME >=2 && carrier->minRXTXTIME <7, + "check minRXTXTIME %d\n",carrier->minRXTXTIME); + *delay[i] = (i+carrier->minRXTXTIME); ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c index dedd4cf839..6b7f9a21b9 100644 --- a/openair2/RRC/NR/nr_rrc_config.c +++ b/openair2/RRC/NR/nr_rrc_config.c @@ -29,96 +29,79 @@ */ #include "nr_rrc_config.h" +#include "common/utils/nr/nr_common.h" -void rrc_config_rlc_bearer(uint8_t Mod_id, - int CC_id, - rlc_bearer_config_t *rlc_config - ){ - rlc_config->LogicalChannelIdentity[CC_id] = 0; - rlc_config->servedRadioBearer_present[CC_id] = 0; - rlc_config->srb_Identity[CC_id] = 0; - rlc_config->drb_Identity[CC_id] = 0; - rlc_config->reestablishRLC[CC_id] = 0; - rlc_config->rlc_Config_present[CC_id] = 0; - rlc_config->ul_AM_sn_FieldLength[CC_id] = 0; - rlc_config->t_PollRetransmit[CC_id] = 0; - rlc_config->pollPDU[CC_id] = 0; - rlc_config->pollByte[CC_id] = 0; - rlc_config->maxRetxThreshold[CC_id] = 0; - rlc_config->dl_AM_sn_FieldLength[CC_id] = 0; - rlc_config->dl_AM_t_Reassembly[CC_id] = 0; - rlc_config->t_StatusProhibit[CC_id] = 0; - rlc_config->ul_UM_sn_FieldLength[CC_id] = 0; - rlc_config->dl_UM_sn_FieldLength[CC_id] = 0; - rlc_config->dl_UM_t_Reassembly[CC_id] = 0; - rlc_config->priority[CC_id] = 0; - rlc_config->prioritisedBitRate[CC_id] = 0; - rlc_config->bucketSizeDuration[CC_id] = 0; - rlc_config->allowedServingCells[CC_id] = 0; - rlc_config->subcarrierspacing[CC_id] = 0; - rlc_config->maxPUSCH_Duration[CC_id] = 0; - rlc_config->configuredGrantType1Allowed[CC_id] = 0; - rlc_config->logicalChannelGroup[CC_id] = 0; - rlc_config->schedulingRequestID[CC_id] = 0; - rlc_config->logicalChannelSR_Mask[CC_id] = 0; - rlc_config->logicalChannelSR_DelayTimerApplied[CC_id] = 0; +void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc){ + + lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); + + // setting default TDA for DL with + struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,13); // basic slot configuration starting in symbol 1 til the end of the slot + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation); + + if(frame_type==TDD) { + // TDD + if(scc->tdd_UL_DL_ConfigurationCommon) { + int dl_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols; + if(dl_symb > 1) { + timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,dl_symb-1); // mixed slot configuration starting in symbol 1 til the end of the dl allocation + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation); + } + } + } } -void rrc_config_mac_cellgroup(uint8_t Mod_id, - int CC_id, - mac_cellgroup_t *mac_cellgroup_config - ){ - mac_cellgroup_config->DRX_Config_PR[CC_id] = 0; - mac_cellgroup_config->drx_onDurationTimer_PR[CC_id] = 0; - mac_cellgroup_config->subMilliSeconds[CC_id] = 0; - mac_cellgroup_config->milliSeconds[CC_id] = 0; - mac_cellgroup_config->drx_InactivityTimer[CC_id] = 0; - mac_cellgroup_config->drx_HARQ_RTT_TimerDL[CC_id] = 0; - mac_cellgroup_config->drx_HARQ_RTT_TimerUL[CC_id] = 0; - mac_cellgroup_config->drx_RetransmissionTimerDL[CC_id] = 0; - mac_cellgroup_config->drx_RetransmissionTimerUL[CC_id] = 0; - mac_cellgroup_config->drx_LongCycleStartOffset_PR[CC_id] = 0; - mac_cellgroup_config->drx_LongCycleStartOffset[CC_id] = 0; - mac_cellgroup_config->drx_ShortCycle[CC_id] = 0; - mac_cellgroup_config->drx_ShortCycleTimer[CC_id] = 0; - mac_cellgroup_config->drx_SlotOffset[CC_id] = 0; - mac_cellgroup_config->schedulingRequestId[CC_id] = 0; - mac_cellgroup_config->sr_ProhibitTimer[CC_id] = 0; - mac_cellgroup_config->sr_TransMax[CC_id] = 0; - mac_cellgroup_config->periodicBSR_Timer[CC_id] = 0; - mac_cellgroup_config->retxBSR_Timer[CC_id] = 0; - mac_cellgroup_config->logicalChannelSR_DelayTimer[CC_id] = 0; - mac_cellgroup_config->tag_Id[CC_id] = 0; - mac_cellgroup_config->timeAlignmentTimer[CC_id] = 0; - mac_cellgroup_config->PHR_Config_PR[CC_id] = 0; - mac_cellgroup_config->phr_PeriodicTimer[CC_id] = 0; - mac_cellgroup_config->phr_ProhibitTimer[CC_id] = 0; - mac_cellgroup_config->phr_Tx_PowerFactorChange[CC_id] = 0; - mac_cellgroup_config->multiplePHR[CC_id] = 0; - mac_cellgroup_config->phr_Type2SpCell[CC_id] = 0; - mac_cellgroup_config->phr_Type2OtherCell[CC_id] = 0; - mac_cellgroup_config->phr_ModeOtherCG[CC_id] = 0; - mac_cellgroup_config->skipUplinkTxDynamic[CC_id] = 0; + +void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){ + + //TODO change to accomodate for SRS + + int temp_min_delay = 6; // k2 = 2 or 3 won'r work as well as higher values + int k2 = (min_fb_delayuplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; + lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); + + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation->k2 = k2; + pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(0,13); // basic slot configuration starting in symbol 0 til the last but one symbol + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); + + if(frame_type==TDD) { + // TDD + if(scc->tdd_UL_DL_ConfigurationCommon) { + int ul_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols; + pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation->k2 = k2; + pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); + + // for msg3 in the mixed slot + int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); + int nb_slots_per_period = ((1<k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu]; + if(*pusch_timedomainresourceallocation_msg3->k2 < min_fb_delay) + *pusch_timedomainresourceallocation_msg3->k2 += nb_slots_per_period; + AssertFatal(*pusch_timedomainresourceallocation_msg3->k2<33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n", + *pusch_timedomainresourceallocation_msg3->k2); + pusch_timedomainresourceallocation_msg3->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation_msg3); + } + } + } -void rrc_config_physicalcellgroup(uint8_t Mod_id, - int CC_id, - physicalcellgroup_t *physicalcellgroup_config - ){ - physicalcellgroup_config->harq_ACK_SpatialBundlingPUCCH[CC_id] = 0; - physicalcellgroup_config->harq_ACK_SpatialBundlingPUSCH[CC_id] = 0; - physicalcellgroup_config->p_NR[CC_id] = 0; - physicalcellgroup_config->pdsch_HARQ_ACK_Codebook[CC_id] = 0; - physicalcellgroup_config->tpc_SRS_RNTI[CC_id] = 0; - physicalcellgroup_config->tpc_PUCCH_RNTI[CC_id] = 0; - physicalcellgroup_config->tpc_PUSCH_RNTI[CC_id] = 0; - physicalcellgroup_config->sp_CSI_RNTI[CC_id] = 0; - physicalcellgroup_config->RNTI_Value[CC_id] = 0; -} - -void rrc_config_rachdedicated(uint8_t Mod_id, - int CC_id, - physicalcellgroup_t *physicalcellgroup_config - ){ - -} diff --git a/openair2/RRC/NR/nr_rrc_config.h b/openair2/RRC/NR/nr_rrc_config.h index e19d94b341..192fee754e 100644 --- a/openair2/RRC/NR/nr_rrc_config.h +++ b/openair2/RRC/NR/nr_rrc_config.h @@ -111,29 +111,8 @@ typedef struct physicalcellgroup_s{ long RNTI_Value[MAX_NUM_CCs]; }physicalcellgroup_t; -typedef struct rach_dedicated_s{ - - -}rach_dedicated_t; +void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc); +void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay); -void rrc_config_servingcellconfigcommon(uint8_t Mod_id, - int CC_id, - gNB_RrcConfigurationReq *common_configuration - ); - -void rrc_config_rlc_bearer(uint8_t Mod_id, - int CC_id, - rlc_bearer_config_t *rlc_config - ); - -void rrc_config_mac_cellgroup(uint8_t Mod_id, - int CC_id, - mac_cellgroup_t *mac_cellgroup_config - ); - -void rrc_config_physicalcellgroup(uint8_t Mod_id, - int CC_id, - physicalcellgroup_t *physicalcellgroup_config - ); #endif diff --git a/openair2/RRC/NR/nr_rrc_defs.h b/openair2/RRC/NR/nr_rrc_defs.h index ad31e8cac7..d71393bc2d 100644 --- a/openair2/RRC/NR/nr_rrc_defs.h +++ b/openair2/RRC/NR/nr_rrc_defs.h @@ -447,7 +447,7 @@ typedef struct { int sib1_tda; int pdsch_AntennaPorts; int pusch_AntennaPorts; - int minRXTXTIMEpdsch; + int minRXTXTIME; int do_CSIRS; NR_BCCH_DL_SCH_Message_t *siblock1; NR_ServingCellConfigCommon_t *servingcellconfigcommon; diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 34e570070d..7f7353f9af 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -136,80 +136,6 @@ void openair_nr_rrc_on(const protocol_ctxt_t *const ctxt_pP) { ///---------------------------------------------------------------------------------------------------------------/// ///---------------------------------------------------------------------------------------------------------------/// -void rrc_gNB_process_SgNBAdditionRequest( - const protocol_ctxt_t *const ctxt_pP, - rrc_gNB_ue_context_t *ue_context_pP -) { - rrc_gNB_generate_SgNBAdditionRequestAcknowledge(ctxt_pP,ue_context_pP); -} - -void rrc_gNB_generate_SgNBAdditionRequestAcknowledge( - const protocol_ctxt_t *const ctxt_pP, - rrc_gNB_ue_context_t *const ue_context_pP) { - //uint8_t size; - //uint8_t buffer[100]; - //int CC_id = ue_context_pP->ue_context.primaryCC_id; - //OCTET_STRING_t *secondaryCellGroup; - NR_CellGroupConfig_t *cellGroupconfig; - struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_BearerToAddModList; - struct NR_MAC_CellGroupConfig *mac_CellGroupConfig; - struct NR_PhysicalCellGroupConfig *physicalCellGroupConfig; - struct NR_SpCellConfig *spCellConfig; - //struct NR_CellGroupConfig__sCellToAddModList *sCellToAddModList; - cellGroupconfig = CALLOC(1,sizeof(NR_CellGroupConfig_t)); - cellGroupconfig->rlc_BearerToAddModList = CALLOC(1,sizeof(struct NR_CellGroupConfig__rlc_BearerToAddModList)); - cellGroupconfig->mac_CellGroupConfig = CALLOC(1,sizeof(struct NR_MAC_CellGroupConfig)); - cellGroupconfig->physicalCellGroupConfig = CALLOC(1,sizeof(struct NR_PhysicalCellGroupConfig)); - cellGroupconfig->spCellConfig = CALLOC(1,sizeof(struct NR_SpCellConfig)); - //cellGroupconfig->sCellToAddModList = CALLOC(1,sizeof(struct NR_CellGroupConfig__sCellToAddModList)); - rlc_BearerToAddModList = cellGroupconfig->rlc_BearerToAddModList; - mac_CellGroupConfig = cellGroupconfig->mac_CellGroupConfig; - physicalCellGroupConfig = cellGroupconfig->physicalCellGroupConfig; - spCellConfig = cellGroupconfig->spCellConfig; - //sCellToAddModList = cellGroupconfig->sCellToAddModList; - rlc_bearer_config_t *rlc_config; - rlc_config = CALLOC(1,sizeof(rlc_bearer_config_t)); - //Fill rlc_bearer config value - rrc_config_rlc_bearer(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - rlc_config - ); - //Fill rlc_bearer config to structure - do_RLC_BEARER(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - rlc_BearerToAddModList, - rlc_config); - mac_cellgroup_t *mac_cellgroup_config; - mac_cellgroup_config = CALLOC(1,sizeof(mac_cellgroup_t)); - //Fill mac_cellgroup_config config value - rrc_config_mac_cellgroup(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - mac_cellgroup_config - ); - //Fill mac_cellgroup config to structure - do_MAC_CELLGROUP(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - mac_CellGroupConfig, - mac_cellgroup_config); - physicalcellgroup_t *physicalcellgroup_config; - physicalcellgroup_config = CALLOC(1,sizeof(physicalcellgroup_t)); - //Fill physicalcellgroup_config config value - rrc_config_physicalcellgroup(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - physicalcellgroup_config - ); - //Fill physicalcellgroup config to structure - do_PHYSICALCELLGROUP(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - physicalCellGroupConfig, - physicalcellgroup_config); - do_SpCellConfig(RC.nrrrc[ctxt_pP->module_id], - spCellConfig); -} - -///---------------------------------------------------------------------------------------------------------------/// -///---------------------------------------------------------------------------------------------------------------/// - static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration) { LOG_D(RRC,"%s()\n\n\n\n",__FUNCTION__); if (NODE_IS_DU(rrc->node_type) || NODE_IS_MONOLITHIC(rrc->node_type)) { @@ -330,9 +256,10 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu rrc->carrier.ssb_SubcarrierOffset = configuration->ssb_SubcarrierOffset; rrc->carrier.pdsch_AntennaPorts = configuration->pdsch_AntennaPorts; rrc->carrier.pusch_AntennaPorts = configuration->pusch_AntennaPorts; - rrc->carrier.minRXTXTIMEpdsch = configuration->minRXTXTIMEpdsch; + rrc->carrier.minRXTXTIME = configuration->minRXTXTIME; rrc->carrier.sib1_tda = configuration->sib1_tda; rrc->carrier.do_CSIRS = configuration->do_CSIRS; + nr_rrc_config_ul_tda(configuration->scc,configuration->minRXTXTIME); /// System Information INIT pthread_mutex_init(&rrc->cell_info_mutex,NULL); rrc->cell_info_configured = 0; diff --git a/openair2/RRC/NR/rrc_gNB_nsa.c b/openair2/RRC/NR/rrc_gNB_nsa.c index 2104d5cdd7..3311779235 100644 --- a/openair2/RRC/NR/rrc_gNB_nsa.c +++ b/openair2/RRC/NR/rrc_gNB_nsa.c @@ -241,7 +241,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, - carrier->minRXTXTIMEpdsch, + carrier->minRXTXTIME, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); @@ -251,7 +251,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, - carrier->minRXTXTIMEpdsch, + carrier->minRXTXTIME, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index 4b8fd77dc5..30604cd015 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -55,7 +55,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco int scg_id, int servCellIndex, int dl_antenna_ports, - int minRXTXTIMEpdsch, + int minRXTXTIME, int do_csirs, int initial_csi_index, int uid) { @@ -483,10 +483,10 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco NR_PDSCH_TimeDomainResourceAllocation_t *pdschi; for (int i=0;idownlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;i++) { pdschi= calloc(1,sizeof(*pdschi)); - AssertFatal(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0!=NULL,"element %d is null\n",i); - - pdschi->k0 = calloc(1,sizeof(*pdschi->k0)); - *pdschi->k0 = *servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0; + if(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0){ + pdschi->k0 = calloc(1,sizeof(*pdschi->k0)); + *pdschi->k0 = *servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0; + } pdschi->mappingType = servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType; pdschi->startSymbolAndLength = servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,pdschi); @@ -946,7 +946,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - *delay[i] = i+minRXTXTIMEpdsch; + *delay[i] = i+minRXTXTIME; ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } pucch_Config->spatialRelationInfoToAddModList = calloc(1,sizeof(*pucch_Config->spatialRelationInfoToAddModList)); @@ -1349,7 +1349,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon NR_RRCReconfiguration_IEs_t *reconfig, NR_CellGroupConfig_t *secondaryCellGroup, int dl_antenna_ports, - int minRXTXTIMEpdsch, + int minRXTXTIME, int do_csirs, int initial_csi_index, int uid) { @@ -1365,7 +1365,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon 1, 1, dl_antenna_ports, - minRXTXTIMEpdsch, + minRXTXTIME, do_csirs, initial_csi_index, uid); diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf index b260eaa58d..c6a4a90a14 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -120,19 +111,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; #p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf index 0306fe5d0b..fd9399f89e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,20 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 4; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf index c14ad17b42..59e71a6225 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 4; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf index ff0fdd96bb..3fc81c0d6c 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot (but is not used here) - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,19 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot (not used here) - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf index 937790d4ac..a40a93c789 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 4; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf index c9a95d59e8..3860aba935 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf index 524407c4de..7c527e07c8 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf index d191b67988..a171f2aae0 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf index 2dfa329346..4f8c785baa 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf index 7f0829e40a..012f46401e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot (but not used here) - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 63; # this is SS=7 L=5 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 91; # this is SS=7 L=7 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf index 6248afab2f..b6b9252560 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,20 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf index 6f28cd36c1..0817d7373e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf index 30194647b8..fd4c23cfdb 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; #12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; # used for (full) DL slot - initialDLBWPmappingType_0 = 0; # 0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; # this is SS=1,L=13 - - initialDLBWPk0_1 = 0; # used for DL part mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; # this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for (full) UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for UL part mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf index fcbd3c0f02..965408332c 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf index 63123b8201..e36748a3a9 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf index 217ff76376..7b2d369919 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf index a1acfc313b..dbf4f58348 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf index 540dddad21..6d23726a78 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf index edc5eaa0d4..c3fa56f15e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf index 362a280ccb..15aa368fdf 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf index e541607559..1583e07ca1 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf @@ -54,29 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -131,22 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf index b1c78bc978..8dfcfb2b88 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf index 96f2909031..d01b0947c0 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf @@ -55,28 +55,7 @@ gNBs = initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=4 //5 (4 is for 43, 5 is for 57) - initialDLBWPstartSymbolAndLength_3 = 57; //43; //57; #uplinkConfigCommon #frequencyInfoUL ul_frequencyBand = 78; @@ -130,21 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf index f51f59ae30..198ad8471c 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf index 59e507ed3e..2f4839fd3b 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf @@ -56,15 +56,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -119,18 +110,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf index 05e441d396..7f9e4d2d44 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf @@ -81,29 +81,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 53; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 81; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -158,22 +135,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=12 - initialULBWPstartSymbolAndLength_0 = 53; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf index 3bd884b602..ab4713f8b5 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf @@ -69,29 +69,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -146,21 +123,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index de6bafc9f7..9238ea1809 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -73,15 +73,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -136,19 +127,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf index c4b06c1139..86318d80e2 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf @@ -74,15 +74,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -137,19 +128,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index c7531f39ba..bbdd8b9c0f 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -74,15 +74,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -137,19 +128,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf index a0d25053b6..e9577ee265 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf @@ -70,29 +70,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -147,22 +124,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; From ddfd22d0fda91ed1e84f149e2c15510c1650e955 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Wed, 5 Jan 2022 14:10:12 +0000 Subject: [PATCH 39/67] Fix memset input parameters --- openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c index 5620018b73..afd1fc6e0d 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c @@ -213,7 +213,7 @@ void ldpc8blocks( void *p) { for (int rr=impp->macro_num*8; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++ ) { if (impp->F>0) { // writing into positions d[r][k-2Zc] as in clause 5.3.2 step 2) in 38.212 - memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], impp->F, NR_NULL); + memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], NR_NULL, impp->F); } #ifdef DEBUG_DLSCH_CODING From d1db83caabdb7d6eb8bc78779588f4e3b7b6f041 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Wed, 5 Jan 2022 14:12:20 +0000 Subject: [PATCH 40/67] Rename min_rxtxtime in config files after merge --- ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf | 2 +- ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf | 2 +- .../CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf | 2 +- .../GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf index ff05aa6e65..a2b4d86dfc 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -11,7 +11,7 @@ gNBs = # cell_type = "CELL_MACRO_GNB"; gNB_name = "gNB-OAI"; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; // Tracking area code, 0x0000 and 0xfffe are reserved values tracking_area_code = 1; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf index ff05aa6e65..a2b4d86dfc 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.usrpn310.conf @@ -11,7 +11,7 @@ gNBs = # cell_type = "CELL_MACRO_GNB"; gNB_name = "gNB-OAI"; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; // Tracking area code, 0x0000 and 0xfffe are reserved values tracking_area_code = 1; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf index 86318d80e2..6cb7ca5270 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf @@ -35,7 +35,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 2; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; ul_prbblacklist = "51,52,53,54" pdcch_ConfigSIB1 = ( diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index bbdd8b9c0f..bf68970100 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -35,7 +35,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; sib1_tda = 0; pdcch_ConfigSIB1 = ( From b6b79d555eb44a7dd7df86ebff3b95d88831c3aa Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 6 Jan 2022 10:49:00 +0100 Subject: [PATCH 41/67] Clean up nr_pbchsim program options --- openair1/SIMULATION/NR_PHY/pbchsim.c | 164 +++++++++++++-------------- 1 file changed, 82 insertions(+), 82 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/pbchsim.c b/openair1/SIMULATION/NR_PHY/pbchsim.c index a5c6222fe5..60866b5089 100644 --- a/openair1/SIMULATION/NR_PHY/pbchsim.c +++ b/openair1/SIMULATION/NR_PHY/pbchsim.c @@ -211,7 +211,7 @@ int main(int argc, char **argv) randominit(0); - while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:o:s:S:t:x:y:z:M:N:F:GR:dP:IL:m:")) != -1) { + while ((c = getopt (argc, argv, "F:g:hIL:m:M:n:N:o:P:R:s:S:x:y:z:")) != -1) { switch (c) { /*case 'f': write_output_file=1; @@ -228,6 +228,14 @@ int main(int argc, char **argv) frame_type = 1; break;*/ + case 'F': + input_fd = fopen(optarg,"r"); + if (input_fd==NULL) { + printf("Problem with filename %s. Exiting.\n", optarg); + exit(-1); + } + break; + case 'g': switch((char)*optarg) { case 'A': @@ -265,18 +273,42 @@ int main(int argc, char **argv) break; - /*case 'i': + /* + case 'i': interf1=atoi(optarg); break; + */ + case 'I': + run_initial_sync=1; + target_error_rate=0.1; + break; + + /* case 'j': interf2=atoi(optarg); break;*/ + case 'L': + loglvl = atoi(optarg); + break; + + case 'm': + mu = atoi(optarg); + break; + + case 'M': + SSB_positions = atoi(optarg); + break; + case 'n': n_trials = atoi(optarg); break; + case 'N': + Nid_cell = atoi(optarg); + break; + case 'o': cfo = atof(optarg); #ifdef DEBUG_NR_PBCHSIM @@ -284,6 +316,30 @@ int main(int argc, char **argv) #endif break; + /*case 'p': + extended_prefix_flag=1; + break;*/ + + case 'P': + pbch_phase = atoi(optarg); + if (pbch_phase>3) + printf("Illegal PBCH phase (0-3) got %d\n",pbch_phase); + break; + + /* + case 'r': + ricean_factor = pow(10,-.1*atof(optarg)); + if (ricean_factor>1) { + printf("Ricean factor must be between 0 and 1\n"); + exit(-1); + } + break; + */ + + case 'R': + N_RB_DL = atoi(optarg); + break; + case 's': snr0 = atof(optarg); #ifdef DEBUG_NR_PBCHSIM @@ -304,19 +360,7 @@ int main(int argc, char **argv) Td= atof(optarg); break; */ - /*case 'p': - extended_prefix_flag=1; - break;*/ - /* - case 'r': - ricean_factor = pow(10,-.1*atof(optarg)); - if (ricean_factor>1) { - printf("Ricean factor must be between 0 and 1\n"); - exit(-1); - } - break; - */ case 'x': transmission_mode=atoi(optarg); @@ -329,94 +373,50 @@ int main(int argc, char **argv) case 'y': n_tx=atoi(optarg); - if ((n_tx==0) || (n_tx>2)) { - printf("Unsupported number of TX antennas %d. Exiting.\n", n_tx); + printf("Unsupported number of TX antennas %d. Exiting.\n", n_tx); exit(-1); } - break; case 'z': n_rx=atoi(optarg); - if ((n_rx==0) || (n_rx>2)) { - printf("Unsupported number of RX antennas %d. Exiting.\n", n_rx); + printf("Unsupported number of RX antennas %d. Exiting.\n", n_rx); exit(-1); } - - break; - - case 'M': - SSB_positions = atoi(optarg); - break; - - case 'N': - Nid_cell = atoi(optarg); - break; - - case 'R': - N_RB_DL = atoi(optarg); - break; - - case 'F': - input_fd = fopen(optarg,"r"); - - if (input_fd==NULL) { - printf("Problem with filename %s. Exiting.\n", optarg); - exit(-1); - } - - break; - - case 'P': - pbch_phase = atoi(optarg); - - if (pbch_phase>3) - printf("Illegal PBCH phase (0-3) got %d\n",pbch_phase); - - break; - - case 'I': - run_initial_sync=1; - target_error_rate=0.1; - break; - - case 'L': - loglvl = atoi(optarg); - break; - - case 'm': - mu = atoi(optarg); break; default: case 'h': - printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", + printf("%s -F input_filename -g channel_mod -h(elp) -I(nitial sync) -L log_lvl -n n_frames -M SSBs -n frames -N cell_id -o FO -P phase -R RBs -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant\n", argv[0]); - printf("-h This message\n"); - //printf("-p Use extended prefix mode\n"); + //printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n"); + //printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n"); //printf("-d Use TDD\n"); - printf("-n Number of frames to simulate\n"); - printf("-m Numerology index\n"); - printf("-s Starting SNR, runs from SNR0 to SNR0 + 5 dB. If n_frames is 1 then just SNR is simulated\n"); - printf("-S Ending SNR, runs from SNR0 to SNR1\n"); - printf("-t Delay spread for multipath channel\n"); + //printf("-f Output filename (.txt format) for Pe/SNR results\n"); + printf("-F Input filename (.txt format) for RX conformance testing\n"); printf("-g [A,B,C,D,E,F,G] Use 3GPP SCM (A,B,C,D) or 36-101 (E-EPA,F-EVA,G-ETU) models (ignores delay spread and Ricean factor)\n"); + printf("-h This message\n"); + //printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n"); + printf("-I run initial sync with target error rate 0.1\n"); + //printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n"); + printf("-L set the log level (-1 disable, 0 error, 1 warning, 2 info, 3 debug, 4 trace)\n"); + printf("-m Numerology index\n"); + printf("-M Multiple SSB positions in burst\n"); + printf("-n Number of frames to simulate\n"); + printf("-N Nid_cell\n"); + printf("-o Carrier frequency offset in Hz\n"); + //printf("-O oversampling factor (1,2,4,8,16)\n"); + //printf("-p Use extended prefix mode\n"); + printf("-P PBCH phase, allowed values 0-3\n"); + printf("-R N_RB_DL\n"); + printf("-s Starting SNR, runs from SNR0 to SNR0 + 10 dB if not -S given. If -n 1, then just SNR is simulated\n"); + printf("-S Ending SNR, runs from SNR0 to SNR1\n"); + //printf("-t Delay spread for multipath channel\n"); printf("-x Transmission mode (1,2,6 for the moment)\n"); printf("-y Number of TX antennas used in eNB\n"); printf("-z Number of RX antennas used in UE\n"); - //printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n"); - //printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n"); - printf("-o Carrier frequency offset in Hz\n"); - printf("-M Multiple SSB positions in burst\n"); - printf("-N Nid_cell\n"); - printf("-R N_RB_DL\n"); - printf("-O oversampling factor (1,2,4,8,16)\n"); - printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n"); - //printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n"); - //printf("-f Output filename (.txt format) for Pe/SNR results\n"); - printf("-F Input filename (.txt format) for RX conformance testing\n"); exit (-1); break; } From 513eebee1e69bc0cc9c7cbba58b1cbd8a6e9a5e0 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 6 Jan 2022 10:53:22 +0100 Subject: [PATCH 42/67] Add nr_pbchsim option to select random number seed --- openair1/SIMULATION/NR_PHY/pbchsim.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/pbchsim.c b/openair1/SIMULATION/NR_PHY/pbchsim.c index 60866b5089..3a769a3cfb 100644 --- a/openair1/SIMULATION/NR_PHY/pbchsim.c +++ b/openair1/SIMULATION/NR_PHY/pbchsim.c @@ -203,15 +203,15 @@ int main(int argc, char **argv) float target_error_rate = 0.01; + int seed = 0; + cpuf = get_cpu_freq_GHz(); if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) { exit_fun("[NR_PBCHSIM] Error, configuration module init failed\n"); } - randominit(0); - - while ((c = getopt (argc, argv, "F:g:hIL:m:M:n:N:o:P:R:s:S:x:y:z:")) != -1) { + while ((c = getopt (argc, argv, "F:g:hIL:m:M:n:N:o:P:r:R:s:S:x:y:z:")) != -1) { switch (c) { /*case 'f': write_output_file=1; @@ -336,6 +336,10 @@ int main(int argc, char **argv) break; */ + case 'r': + seed = atoi(optarg); + break; + case 'R': N_RB_DL = atoi(optarg); break; @@ -389,7 +393,7 @@ int main(int argc, char **argv) default: case 'h': - printf("%s -F input_filename -g channel_mod -h(elp) -I(nitial sync) -L log_lvl -n n_frames -M SSBs -n frames -N cell_id -o FO -P phase -R RBs -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant\n", + printf("%s -F input_filename -g channel_mod -h(elp) -I(nitial sync) -L log_lvl -n n_frames -M SSBs -n frames -N cell_id -o FO -P phase -r seed -R RBs -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant\n", argv[0]); //printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n"); //printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n"); @@ -410,6 +414,7 @@ int main(int argc, char **argv) //printf("-O oversampling factor (1,2,4,8,16)\n"); //printf("-p Use extended prefix mode\n"); printf("-P PBCH phase, allowed values 0-3\n"); + printf("-r set the random number generator seed (default: 0 = current time)\n"); printf("-R N_RB_DL\n"); printf("-s Starting SNR, runs from SNR0 to SNR0 + 10 dB if not -S given. If -n 1, then just SNR is simulated\n"); printf("-S Ending SNR, runs from SNR0 to SNR1\n"); @@ -422,6 +427,8 @@ int main(int argc, char **argv) } } + randominit(seed); + logInit(); set_glog(loglvl); T_stdout = 1; From 56714b2c8224b139e25af1457e7abeb59ad72694 Mon Sep 17 00:00:00 2001 From: rmagueta Date: Fri, 24 Dec 2021 12:24:35 +0000 Subject: [PATCH 43/67] Fix warnings after merge with develop --- openair1/PHY/INIT/nr_init_ue.c | 11 +---------- openair1/PHY/LTE_UE_TRANSPORT/pcfich_ue.c | 11 +++++------ .../CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf | 9 ++++++--- 3 files changed, 12 insertions(+), 19 deletions(-) diff --git a/openair1/PHY/INIT/nr_init_ue.c b/openair1/PHY/INIT/nr_init_ue.c index f664a03ba0..fd5cc962b1 100644 --- a/openair1/PHY/INIT/nr_init_ue.c +++ b/openair1/PHY/INIT/nr_init_ue.c @@ -20,23 +20,14 @@ */ #include "phy_init.h" -#include "SCHED_UE/sched_UE.h" #include "PHY/phy_extern_nr_ue.h" -//#include "SIMULATION/TOOLS/sim.h" -/*#include "RadioResourceConfigCommonSIB.h" -#include "RadioResourceConfigDedicated.h" -#include "TDD-Config.h" -#include "MBSFN-SubframeConfigList.h"*/ #include "openair1/PHY/defs_RU.h" #include "openair1/PHY/impl_defs_nr.h" #include "common/utils/LOG/vcd_signal_dumper.h" #include "assertions.h" -#include +#include "PHY/MODULATION/nr_modulation.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" -//#include "PHY/LTE_REFSIG/lte_refsig.h" -#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h" -#include "PHY/INIT/phy_init.h" #include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_REFSIG/ul_ref_seq_nr.h" #include "PHY/NR_REFSIG/refsig_defs_ue.h" diff --git a/openair1/PHY/LTE_UE_TRANSPORT/pcfich_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/pcfich_ue.c index 82bb0a2659..66ed4593d8 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/pcfich_ue.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/pcfich_ue.c @@ -44,15 +44,14 @@ void pcfich_unscrambling(LTE_DL_FRAME_PARMS *frame_parms, int16_t *d) { - uint32_t i; - uint8_t reset; - uint32_t x1, x2, s=0; + uint8_t reset = 1; + uint32_t x1 = 0; + uint32_t s = 0; - reset = 1; // x1 is set in lte_gold_generic - x2 = ((((2*frame_parms->Nid_cell)+1)*(1+subframe))<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.7.1 + uint32_t x2 = ((((2*frame_parms->Nid_cell)+1)*(1+subframe))<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.7.1 - for (i=0; i<32; i++) { + for (uint32_t i=0; i<32; i++) { if ((i&0x1f)==0) { s = lte_gold_generic(&x1, &x2, reset); //printf("lte_gold[%d]=%x\n",i,s); diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index 9238ea1809..ef96df2995 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -35,6 +35,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime = 6; sib1_tda = 0; pdcch_ConfigSIB1 = ( @@ -66,7 +67,7 @@ gNBs = #initialDownlinkBWP #genericParameters # this is RBstart=27,L=48 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 12952; # 6366 12925 12956 28875 12952 + initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875 12952 # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialDLBWPsubcarrierSpacing = 1; @@ -86,7 +87,7 @@ gNBs = pMax = 20; #initialUplinkBWP #genericParameters - initialULBWPlocationAndBandwidth = 12952; + initialULBWPlocationAndBandwidth = 28875; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialULBWPsubcarrierSpacing = 1; @@ -218,7 +219,7 @@ L1s = ( { num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + pusch_proc_threads = 4; prach_dtx_threshold = 120; pucch0_dtx_threshold = 150; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 @@ -296,5 +297,7 @@ log_config : rrc_log_verbosity ="medium"; ngap_log_level ="debug"; ngap_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; }; From b8daf747bd8d234c04c0ca0a6999057df5acbd9f Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Thu, 6 Jan 2022 14:39:31 +0000 Subject: [PATCH 44/67] Increase nr_pbchsim test requirements to pass in CI --- cmake_targets/autotests/test_case_list.xml | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml index 3472b14efc..09207555ba 100755 --- a/cmake_targets/autotests/test_case_list.xml +++ b/cmake_targets/autotests/test_case_list.xml @@ -1069,12 +1069,13 @@ $OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15 - -s0 -S1 -n1000 -R106 - -s0 -S1 -n10 -I -R106 - -s0 -S1 -n1000 -R217 - -s0 -S1 -n10 -I -R217 - -s0 -S1 -n1000 -R273 - -s0 -S1 -n10 -I -R273 + -s-11 -S-8 -n10 -R106 + -s-11 -S-8 -n10 -o8000 -I -R106 + -s-11 -S-8 -n10 -R217 + -s-11 -S-8 -n10 -o8000 -I -R217 + -s-11 -S-8 -n10 -R273 + -s-11 -S-8 -n10 -o8000 -I -R273 + nr_pbchsim.test1 nr_pbchsim.test2 nr_pbchsim.test3 nr_pbchsim.test4 nr_pbchsim.test5 nr_pbchsim.test6 PBCH test OK segmentation fault|assertion|exiting|fatal From 395c211e6def48e4605653f80559754ebefc4a62 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Thu, 6 Jan 2022 16:18:55 +0000 Subject: [PATCH 45/67] Fix indentation --- cmake_targets/autotests/test_case_list.xml | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml index 09207555ba..6450b64298 100755 --- a/cmake_targets/autotests/test_case_list.xml +++ b/cmake_targets/autotests/test_case_list.xml @@ -1069,13 +1069,12 @@ $OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15 - -s-11 -S-8 -n10 -R106 - -s-11 -S-8 -n10 -o8000 -I -R106 - -s-11 -S-8 -n10 -R217 - -s-11 -S-8 -n10 -o8000 -I -R217 - -s-11 -S-8 -n10 -R273 - -s-11 -S-8 -n10 -o8000 -I -R273 - + -s-11 -S-8 -n10 -R106 + -s-11 -S-8 -n10 -o8000 -I -R106 + -s-11 -S-8 -n10 -R217 + -s-11 -S-8 -n10 -o8000 -I -R217 + -s-11 -S-8 -n10 -R273 + -s-11 -S-8 -n10 -o8000 -I -R273 nr_pbchsim.test1 nr_pbchsim.test2 nr_pbchsim.test3 nr_pbchsim.test4 nr_pbchsim.test5 nr_pbchsim.test6 PBCH test OK segmentation fault|assertion|exiting|fatal From ef298dc36c940723ee36b12b6dec4cc50fc12247 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Fri, 7 Jan 2022 18:02:24 +0000 Subject: [PATCH 46/67] Add ffo compensation based on SSS --- openair1/PHY/NR_REFSIG/sss_nr.h | 2 +- .../PHY/NR_UE_TRANSPORT/nr_initial_sync.c | 29 ++++++++++++++++++- openair1/PHY/NR_UE_TRANSPORT/sss_nr.c | 16 +++++++++- 3 files changed, 44 insertions(+), 3 deletions(-) diff --git a/openair1/PHY/NR_REFSIG/sss_nr.h b/openair1/PHY/NR_REFSIG/sss_nr.h index e413400097..03610ae30f 100644 --- a/openair1/PHY/NR_REFSIG/sss_nr.h +++ b/openair1/PHY/NR_REFSIG/sss_nr.h @@ -96,7 +96,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue, int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR], int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR]); -int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max); +int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max, int *freq_offset_sss); #undef INIT_VARIABLES_SSS_NR_H #undef EXTERN diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c index dcb8035e8a..0bcdfa68db 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c @@ -295,7 +295,34 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, LOG_I(PHY,"Calling sss detection (normal CP)\n"); #endif - rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp); + int freq_offset_sss = 0; + rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp, &freq_offset_sss); + + accumulated_freq_offset += freq_offset_sss; + + // digital compensation of FFO for SSB symbols + if (ue->UE_fo_compensation){ + double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time + double off_angle = -2*M_PI*s_time*freq_offset_sss; // offset rotation angle compensation per sample + + // In SA we need to perform frequency offset correction until the end of buffer because we need to decode SIB1 + // and we do not know yet in which slot it goes. + + // start for offset correction + int start = sa ? is*fp->samples_per_frame : is*fp->samples_per_frame + ue->ssb_offset; + + // loop over samples + int end = sa ? n_frames*fp->samples_per_frame-1 : start + NR_N_SYMBOLS_SSB*(fp->ofdm_symbol_size + fp->nb_prefix_samples); + + for(int n=start; nnb_antennas_rx; ar++) { + re = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n]); + im = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n+1]); + ((short *)ue->common_vars.rxdata[ar])[2*n] = (short)(round(re*cos(n*off_angle) - im*sin(n*off_angle))); + ((short *)ue->common_vars.rxdata[ar])[2*n+1] = (short)(round(re*sin(n*off_angle) + im*cos(n*off_angle))); + } + } + } nr_gold_pbch(ue); ret = nr_pbch_detection(proc, ue, 1); // start pbch detection at first symbol after pss diff --git a/openair1/PHY/NR_UE_TRANSPORT/sss_nr.c b/openair1/PHY/NR_UE_TRANSPORT/sss_nr.c index 9339f3974d..dc73fe0add 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/sss_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/sss_nr.c @@ -420,7 +420,7 @@ int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue, * *********************************************************************/ -int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max) +int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max, int *freq_offset_sss) { uint8_t i; int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR]; @@ -558,5 +558,19 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, } //#endif + int re = 0; + int im = 0; + d = (int16_t *)&d_sss[Nid2][Nid1]; + for(i = 0; isubcarrier_spacing); + + double ffo_pss = ((double)ue->common_vars.freq_offset)/frame_parms->subcarrier_spacing; + LOG_I(NR_PHY, "ffo_pss %f (%i Hz), ffo_sss %f (%i Hz), ffo_pss+ffo_sss %f (%i Hz)\n", + ffo_pss, (int)(ffo_pss*frame_parms->subcarrier_spacing), ffo_sss, *freq_offset_sss, ffo_pss+ffo_sss, (int)((ffo_pss+ffo_sss)*frame_parms->subcarrier_spacing)); + return(0); } From f6c735f5605c7f913f7bb81e8877b4dc5e1a0449 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Fri, 7 Jan 2022 18:54:31 +0000 Subject: [PATCH 47/67] Revert to timing adjustment based on cyclic prefix and improves it --- executables/nr-ue.c | 25 ++------ openair1/PHY/NR_REFSIG/pss_nr.h | 2 - .../PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c | 6 -- openair1/PHY/NR_UE_TRANSPORT/pss_nr.c | 59 ------------------- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 6 +- 5 files changed, 7 insertions(+), 91 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 6694635e26..db3c1c9ac1 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -456,26 +456,10 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) { } int computeSamplesShift(PHY_VARS_NR_UE *UE) { - - // compute TO compensation that should be applied for this frame - if ( UE->rx_offset < UE->frame_parms.samples_per_frame/2 && - UE->rx_offset > 0 ) { - LOG_I(PHY,"!!!adjusting -1 samples!!! rx_offset == %d\n", UE->rx_offset); - UE->rx_offset = 0; // reset so that it is not applied falsely in case of SSB being only in every second frame - UE->max_pos_fil = 0; // reset IIR filter when sample shift is applied - return -1 ; - } - - if ( UE->rx_offset > UE->frame_parms.samples_per_frame/2 && - UE->rx_offset < UE->frame_parms.samples_per_frame ) { - int rx_offset = UE->rx_offset - UE->frame_parms.samples_per_frame; - LOG_I(PHY,"!!!adjusting +1 samples!!! rx_offset == %d\n", rx_offset); - UE->rx_offset = 0; // reset so that it is not applied falsely in case of SSB being only in every second frame - UE->max_pos_fil = 0; // reset IIR filter when sample shift is applied - return 1; - } - - return 0; + int samples_shift = -(UE->rx_offset>>1); + UE->rx_offset = 0; // reset so that it is not applied falsely in case of SSB being only in every second frame + UE->max_pos_fil = 0; // reset IIR filter when sample shift is applied + return samples_shift; } static inline int get_firstSymSamp(uint16_t slot, NR_DL_FRAME_PARMS *fp) { @@ -642,6 +626,7 @@ void *UE_thread(void *arg) { readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms); writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms); } else { + UE->rx_offset_diff = computeSamplesShift(UE); readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms) - UE->rx_offset_diff; writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms)- UE->rx_offset_diff; diff --git a/openair1/PHY/NR_REFSIG/pss_nr.h b/openair1/PHY/NR_REFSIG/pss_nr.h index 3b480d7fab..b32d48a2e9 100644 --- a/openair1/PHY/NR_REFSIG/pss_nr.h +++ b/openair1/PHY/NR_REFSIG/pss_nr.h @@ -141,8 +141,6 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain int *eNB_id, int *f_off); -int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue); - #endif #undef EXTERN diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c b/openair1/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c index 19d4bf5079..15f3abad79 100644 --- a/openair1/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c +++ b/openair1/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c @@ -115,12 +115,6 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, } } - if (ue->rx_offset < 0) - ue->rx_offset += frame_parms->samples_per_frame; - - if (ue->rx_offset >= frame_parms->samples_per_frame) - ue->rx_offset -= frame_parms->samples_per_frame; - #ifdef DEBUG_PHY LOG_D(PHY,"AbsSubframe %d: diff = %i, rx_offset (final) = %i : clear = %d, max_pos = %d, max_pos_fil = %d, max_val = %d, sync_pos %d\n", subframe, diff --git a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c index 8ff0795871..4fc11d5fc6 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c @@ -976,62 +976,3 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain return(peak_position); } -int nr_adjust_pss_synch(PHY_VARS_NR_UE *ue) { - - int **rxdata = ue->common_vars.rxdata; - NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; - uint8_t Nid2 = GET_NID2(frame_parms->Nid_cell); - int peak_position_ref = ((frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples)<<1) + frame_parms->nb_prefix_samples0; - - int maxval=0; - for (int i=0;i<2*(frame_parms->ofdm_symbol_size);i++) { - maxval = max(maxval,primary_synchro_time_nr[Nid2][i]); - maxval = max(maxval,-primary_synchro_time_nr[Nid2][i]); - } - int shift = log2_approx(maxval); - - /* Search pss in the received buffer each 4 samples which ensures a memory alignment on 128 bits (32 bits x 4 ) */ - /* This is required by SIMD (single instruction Multiple Data) Extensions of Intel processors. */ - /* Correlation computation is based on a dot product which is realized thank to SIMS extensions */ - int64_t peak_value = 0; - int peak_position = 0; - int64_t result = 0; - int64_t avg=0; - int start = peak_position_ref - (frame_parms->ofdm_symbol_size>>3); - int length = frame_parms->ofdm_symbol_size + (frame_parms->ofdm_symbol_size>>3); - memset(pss_corr_ue[Nid2],0,(start+length)*sizeof(int64_t)); - for (int n=start; n < start+length; n+=4) { // - for (int ar=0; arnb_antennas_rx; ar++) { - result = dot_product64((short*)primary_synchro_time_nr[Nid2], - (short*) &(rxdata[ar][n]), - frame_parms->ofdm_symbol_size, - shift); - pss_corr_ue[Nid2][n] += abs64(result); - } - avg+=pss_corr_ue[Nid2][n]; - if (pss_corr_ue[Nid2][n] > peak_value) { - peak_value = pss_corr_ue[Nid2][n]; - peak_position = n; - } - } - - avg/=(length/4); - if (peak_value < 5*avg) { - return 0; - } - - int peak_position_diff = peak_position_ref - peak_position; - - ue->rx_offset_diff = 0; - if(peak_position_diff != 0) { - ue->rx_offset_diff = peak_position_diff>>3; - if (ue->rx_offset_diff == 0) { - ue->rx_offset_diff = peak_position_diff > 0 ? 1 : -1; - } - } - - LOG_D(NR_PHY,"nr_adjust_pss_synch: peak_position %d, peak_position_diff %d, peak_value %d dB, avg %d dB\n", - peak_position, peak_position_diff, dB_fixed64(peak_value),dB_fixed64(avg)); - - return peak_position_diff; -} diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 20b6e67aa9..a948dffce8 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -1638,12 +1638,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, if ((ue->decode_MIB == 1) && slot_pbch) { - nr_adjust_pss_synch(ue); - LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); nr_ue_pbch_procedures(gNB_id, ue, proc, 0); - /* if (ue->no_timing_correction==0) { + if (ue->no_timing_correction==0) { LOG_D(PHY,"start adjust sync slot = %d no timing %d\n", nr_slot_rx, ue->no_timing_correction); nr_adjust_synch_ue(fp, ue, @@ -1652,7 +1650,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, nr_slot_rx, 0, 16384); - }*/ + } LOG_D(PHY, "Doing N0 measurements in %s\n", __FUNCTION__); nr_ue_rrc_measurements(ue, proc, nr_slot_rx); From 2c289c45d11eb8636ac9349f98c744d0e6c6fe7a Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Mon, 10 Jan 2022 12:18:25 +0100 Subject: [PATCH 48/67] Minor fixes after code review --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 16 ++++++++-------- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 +- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 7e0609f554..24b983aba5 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -42,14 +42,14 @@ void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu, NR_TDD_UL_DL_ConfigCommon_t *tdd_config) { - int nrofDownlinkSlots = tdd_config->pattern1.nrofDownlinkSlots; - int nrofDownlinkSymbols = tdd_config->pattern1.nrofDownlinkSymbols; - int nrofUplinkSlots = tdd_config->pattern1.nrofUplinkSlots; - int nrofUplinkSymbols = tdd_config->pattern1.nrofUplinkSymbols; + const int nrofDownlinkSlots = tdd_config->pattern1.nrofDownlinkSlots; + const int nrofDownlinkSymbols = tdd_config->pattern1.nrofDownlinkSymbols; + const int nrofUplinkSlots = tdd_config->pattern1.nrofUplinkSlots; + const int nrofUplinkSymbols = tdd_config->pattern1.nrofUplinkSymbols; int slot_number = 0; - int nb_periods_per_frame = get_nb_periods_per_frame(tdd_config->pattern1.dl_UL_TransmissionPeriodicity); - int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<pattern1.dl_UL_TransmissionPeriodicity); + const int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<tdd_table.tdd_period_in_slots = nb_slots_per_period; if ( (nrofDownlinkSymbols + nrofUplinkSymbols) == 0 ) @@ -105,7 +105,7 @@ void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, } } - LOG_I(NR_MAC, "TDD has been properly configurated\n"); + LOG_I(NR_MAC, "TDD has been properly configured\n"); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 75b018c901..28e1fd67c5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -422,7 +422,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, } else{ if(frame_type == TDD) - AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + AssertFatal(frame_type == FDD, "Dynamic TDD not handled yet\n"); } From 1efef96e64d4577538ca0e1a7a7548b81dd5d152 Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Mon, 10 Jan 2022 14:28:17 +0100 Subject: [PATCH 49/67] Using ASN_STRUCT_FREE instead of free --- openair2/GNB_APP/gnb_config.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index f97b2061c6..c6eab03ebd 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -348,7 +348,7 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { lte_frame_type_t frame_type = get_frame_type((int)*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); if (frame_type == FDD) { - free(scc->tdd_UL_DL_ConfigurationCommon); + ASN_STRUCT_FREE(asn_DEF_NR_TDD_UL_DL_ConfigCommon, scc->tdd_UL_DL_ConfigurationCommon); scc->tdd_UL_DL_ConfigurationCommon = NULL; } else { // TDD if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) { From ef6c93b8425db7b527954cd3fa2fc1c4f7d303fa Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Mon, 10 Jan 2022 14:29:21 +0100 Subject: [PATCH 50/67] Updating IF configuration description in RUNMODE file --- doc/RUNMODEM.md | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/doc/RUNMODEM.md b/doc/RUNMODEM.md index 057be0d6cf..7a4dbefa3d 100644 --- a/doc/RUNMODEM.md +++ b/doc/RUNMODEM.md @@ -179,15 +179,15 @@ With the RF simulator (on the same machine): ## IF setup with OAI -The `if_freq` and `if_freq_off` options can be used to set (via command line) custom downlink and uplink FR1 arbitrary frequencies for the IF equipment both. +OAI is also compatible with Intermediate Frequency (IF) equipment. This allows to use RF front-end that with arbitrary frequencies bands that do not comply with the standardised 3GPP NR bands. -In the same way, the following parameters must be configured in the RUs section of the gNB configuration file: +To configure the IF frequencies it is necessary to use two command-line options at UE side: +- `if_freq`, downlink frequency in Hz +- `if_freq_off`, uplink frequency offset in Hz -`if_freq` - -`if_offset` - -The values must be given in Hz. +Accordingly, the following parameters must be configured in the RUs section of the gNB configuration file: +- `if_freq` +- `if_offset` ### Run OAI with custom DL/UL arbitrary frequencies From 0e0b7a34f79966d46bc614041528fd12de42862a Mon Sep 17 00:00:00 2001 From: Guido Casati Date: Mon, 10 Jan 2022 15:07:12 +0100 Subject: [PATCH 51/67] Restored check on pattern1.ext1 --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 24b983aba5..3b10167e03 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -105,6 +105,13 @@ void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, } } + if (tdd_config->pattern1.ext1 == NULL) { + cfg->tdd_table.tdd_period = tdd_config->pattern1.dl_UL_TransmissionPeriodicity; + } else { + AssertFatal(tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, "scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n"); + cfg->tdd_table.tdd_period = *tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; + } + LOG_I(NR_MAC, "TDD has been properly configured\n"); } From 52b05b8fe0860cd47806afb6a9a777b86e52b084 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 10 Jan 2022 16:20:05 +0100 Subject: [PATCH 52/67] review changes --- openair2/GNB_APP/gnb_config.c | 12 ++++++------ openair2/LAYER2/NR_MAC_gNB/config.c | 18 ++++++++---------- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 7 +++---- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 7 +++---- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 7 +++---- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 7 +++---- 6 files changed, 26 insertions(+), 32 deletions(-) diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index f97b2061c6..50acd69994 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -1160,17 +1160,17 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { (NRRRC_CONFIGURATION_REQ (msg_p).mnc_digit_length[l] == 3),"BAD MNC DIGIT LENGTH %d", NRRRC_CONFIGURATION_REQ (msg_p).mnc_digit_length[l]); } - printf("SSB SCO %d\n",*GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr); + LOG_I(RRC,"SSB SCO %d\n",*GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = *GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr; - printf("pdsch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr); + LOG_I(RRC,"pdsch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr; - printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr); + LOG_I(RRC,"pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr; - printf("minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr); + LOG_I(RRC,"minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIME = *GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr; - printf("SIB1 TDA %d\n",*GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr); + LOG_I(RRC,"SIB1 TDA %d\n",*GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr; - printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr); + LOG_I(RRC,"Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; NRRRC_CONFIGURATION_REQ (msg_p).scd = scd; diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 0c397187b5..e9fdcf1647 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -445,13 +445,12 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, RC.nrmac[Mod_idP]->UL_tti_req_ahead[0] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t)); AssertFatal(RC.nrmac[Mod_idP]->UL_tti_req_ahead[0], "could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n"); - /* fill in slot/frame numbers: slot is fixed, frame will be updated by - * scheduler */ - uint16_t sf_ahead = (uint16_t) ceil((float)6/(0x01<<(*scc->ssbSubcarrierSpacing))); - uint16_t sl_ahead = sf_ahead * (0x01<<(*scc->ssbSubcarrierSpacing)); + /* fill in slot/frame numbers: slot is fixed, frame will be updated by scheduler + extern sf_ahead is initialized in ru_thread but that function is not executed yet here*/ + const uint16_t sf_ahead = (uint16_t) ceil((float)6/(0x01<<(*scc->ssbSubcarrierSpacing))); + const uint16_t sl_ahead = sf_ahead * (0x01<<(*scc->ssbSubcarrierSpacing)); /* consider that scheduler runs sl_ahead: the first sl_ahead slots are - * already "in the past" and thus we put frame 1 instead of 0! Note that - * extern variable sl_ahead is not initialized yet, so computing it above */ + * already "in the past" and thus we put frame 1 instead of 0!*/ for (int i = 0; i < n; ++i) { nfapi_nr_ul_tti_request_t *req = &RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][i]; req->SFN = i < (sl_ahead-1); @@ -501,10 +500,9 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0); nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); } - else{ - if(RC.nrmac[Mod_idP]->common_channels[0].frame_type == TDD) - AssertFatal(1==0,"Dynamic TDD not handled yet\n"); - } + else + // if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration + AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD,"Dynamic TDD not handled yet\n"); for (int slot = 0; slot < n; ++slot) { /* FIXME: it seems there is a problem with slot 0/10/slots right after UL: diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 75b018c901..39fd4671cb 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -487,10 +487,9 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, // go to previous slot if the current scheduled slot is beyond the response window // and if the slot is not among the PDCCH monitored ones (38.213 10.1) - while ((*msg2_frame>frame_limit) || - ((*msg2_frame==frame_limit) && - (*msg2_slot>slot_limit)) || - ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) { + while (*msg2_frame > frame_limit + || (*msg2_frame == frame_limit && *msg2_slot > slot_limit) + || ((*msg2_frame * nr_slots_per_frame[mu] + *msg2_slot - monitoring_offset) % monitoring_slot_period != 0)) { if(!tdd || ((*msg2_slot%tdd_period_slot) > 0)) { if (*msg2_slot==0) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 7a495865d3..f11c1bf899 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -75,10 +75,9 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); } - else{ - if(frame_type == TDD) - AssertFatal(1==0,"Dynamic TDD not handled yet\n"); - } + else + // if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration + AssertFatal(nrmac->common_channels->frame_type == FDD,"Dynamic TDD not handled yet\n"); int target_ss; if (bwp) { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 231f505564..8066e79e2f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1200,10 +1200,9 @@ int nr_acknack_scheduling(int mod_id, first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period); first_ul_slot_period = tdd->nrofDownlinkSlots; } - else{ - if(RC.nrmac[mod_id]->common_channels[CC_id].frame_type == TDD) - AssertFatal(1==0,"Dynamic TDD not handled yet\n"); - } + else + // if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration + AssertFatal(RC.nrmac[mod_id]->common_channels[CC_id].frame_type == FDD,"Dynamic TDD not handled yet\n"); NR_sched_pucch_t *csi_pucch; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 61fa42bbd9..3c600e69c9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -74,10 +74,9 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); } - else{ - if(frame_type == TDD) - AssertFatal(1==0,"Dynamic TDD not handled yet\n"); - } + else + // if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration + AssertFatal(nrmac->common_channels->frame_type == FDD,"Dynamic TDD not handled yet\n"); const struct NR_PUCCH_Config__resourceToAddModList *resList = ubwp->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList; // for the moment, just block any symbol that might hold a PUCCH, regardless From eb56a40d1193fb87381246831fef13abef8ef0f6 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 13 Jan 2022 17:43:53 +0100 Subject: [PATCH 53/67] bugfix in msg2 frame and slot re-selection --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 1d93e8ea8d..43e5c944bc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -405,7 +405,6 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, // preferentially we schedule the msg2 in the mixed slot or in the last dl slot // if they are allowed by search space configuration - uint8_t mu = *scc->ssbSubcarrierSpacing; uint8_t response_window = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow; uint8_t slot_window; @@ -491,10 +490,16 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, || (*msg2_frame == frame_limit && *msg2_slot > slot_limit) || ((*msg2_frame * nr_slots_per_frame[mu] + *msg2_slot - monitoring_offset) % monitoring_slot_period != 0)) { - if(!tdd || ((*msg2_slot%tdd_period_slot) > 0)) { - if (*msg2_slot==0) - (*msg2_frame)--; - (*msg2_slot)--; + if((frame_type == FDD) || ((*msg2_slot%tdd_period_slot) > 0)) { + if (*msg2_slot==0) { + if(*msg2_frame != 0) + (*msg2_frame)--; + else + *msg2_frame = 1023; + *msg2_slot = nr_slots_per_frame[mu] - 1; + } + else + (*msg2_slot)--; } else AssertFatal(1==0,"No available DL slot to schedule msg2 has been found"); From 86096894a0f2943b8fc0d3dbdb7494f16cf92a29 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Thu, 20 Jan 2022 11:53:17 +0000 Subject: [PATCH 54/67] Fix build warning after merge with develop --- openair2/RRC/LTE/MESSAGES/asn1_msg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/RRC/LTE/MESSAGES/asn1_msg.c b/openair2/RRC/LTE/MESSAGES/asn1_msg.c index b1f2e6d9b3..b069591316 100644 --- a/openair2/RRC/LTE/MESSAGES/asn1_msg.c +++ b/openair2/RRC/LTE/MESSAGES/asn1_msg.c @@ -4293,7 +4293,7 @@ ssize_t do_nrMeasurementReport(uint8_t *buffer, LTE_MeasResultListEUTRA_t *measResultListEUTRA2=&measResultNeighCells->choice.measResultListEUTRA; asn1cSequenceAdd(measResultListEUTRA2->list, struct LTE_MeasResultEUTRA, measresulteutra_list); measresulteutra_list->physCellId = phy_id; - asn1cCalloc(measresulteutra_list->cgi_Info, measresult_cgi2); + //asn1cCalloc(measresulteutra_list->cgi_Info, measresult_cgi2); //measresult_cgi2->cellGlobalId= {0}; //measresult_cgi2->trackingAreaCode= {0}; struct LTE_MeasResultEUTRA__measResult* measResult= &measresulteutra_list->measResult; From 34409bacc0dc12d65e7d92b5f88e6a1e66c438ef Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Fri, 21 Jan 2022 10:52:39 +0000 Subject: [PATCH 55/67] Address review comments --- executables/nr-ue.c | 3 +++ openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c | 3 ++- .../CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf | 4 ++-- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index ed1a7d262d..cd78449574 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -843,6 +843,9 @@ int computeSamplesShift(PHY_VARS_NR_UE *UE) { int samples_shift = -(UE->rx_offset>>1); UE->rx_offset = 0; // reset so that it is not applied falsely in case of SSB being only in every second frame UE->max_pos_fil = 0; // reset IIR filter when sample shift is applied + if (samples_shift != 0) { + LOG_I(NR_PHY,"Adjusting frame in time by %i samples\n", samples_shift); + } return samples_shift; } diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c index d10fe67726..6acafe4653 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c @@ -247,11 +247,12 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, LOG_I(PHY,"sync_pos %d ssb_offset %d \n",sync_pos,ue->ssb_offset); #endif + accumulated_freq_offset += ue->common_vars.freq_offset; + // digital compensation of FFO for SSB symbols if (ue->UE_fo_compensation){ double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time double off_angle = -2*M_PI*s_time*(ue->common_vars.freq_offset); // offset rotation angle compensation per sample - accumulated_freq_offset += ue->common_vars.freq_offset; // In SA we need to perform frequency offset correction until the end of buffer because we need to decode SIB1 // and we do not know yet in which slot it goes. diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index ef96df2995..c8fc2ba761 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -53,7 +53,7 @@ gNBs = # downlinkConfigCommon #frequencyInfoDL - # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) + # this is 2574.270 MHz + 53 PRBs@30kHz SCS (same as initial BWP) absoluteFrequencySSB = 518670; dl_frequencyBand = 41; # this is 3600 MHz @@ -66,7 +66,7 @@ gNBs = dl_carrierBandwidth = 106; #initialDownlinkBWP #genericParameters - # this is RBstart=27,L=48 (275*(L-1))+RBstart + # this is RBstart=0,L=106 (275*(L-1))+RBstart initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875 12952 # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 From 284734ba86ee3eecdfc93ca3c8e428f337fc59ac Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 1 Feb 2022 08:39:25 +0100 Subject: [PATCH 56/67] Add 5G FDD RFsim test --- .../gnb.sa.band66.fr1.106PRB.usrpn300.conf | 299 ++++++++++++++++++ .../xml_files/container_5g_fdd_rfsim.xml | 116 +++++++ .../xml_files/container_5g_fdd_rfsim_down.xml | 38 +++ .../5g_fdd_rfsimulator/amf-healthcheck.sh | 57 ++++ .../5g_fdd_rfsimulator/docker-compose.yaml | 298 +++++++++++++++++ .../5g_fdd_rfsimulator/mysql-healthcheck.sh | 46 +++ .../5g_fdd_rfsimulator/nrf-healthcheck.sh | 20 ++ .../5g_fdd_rfsimulator/oai-smf.conf | 133 ++++++++ .../yaml_files/5g_fdd_rfsimulator/oai_db.sql | 217 +++++++++++++ .../5g_fdd_rfsimulator/smf-healthcheck.sh | 21 ++ .../5g_fdd_rfsimulator/spgwu-healthcheck.sh | 28 ++ docker/scripts/gnb_entrypoint.sh | 1 + docker/scripts/gnb_parameters.yaml | 30 ++ 13 files changed, 1304 insertions(+) create mode 100644 ci-scripts/conf_files/gnb.sa.band66.fr1.106PRB.usrpn300.conf create mode 100644 ci-scripts/xml_files/container_5g_fdd_rfsim.xml create mode 100644 ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml create mode 100755 ci-scripts/yaml_files/5g_fdd_rfsimulator/amf-healthcheck.sh create mode 100644 ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml create mode 100755 ci-scripts/yaml_files/5g_fdd_rfsimulator/mysql-healthcheck.sh create mode 100755 ci-scripts/yaml_files/5g_fdd_rfsimulator/nrf-healthcheck.sh create mode 100644 ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf create mode 100755 ci-scripts/yaml_files/5g_fdd_rfsimulator/oai_db.sql create mode 100755 ci-scripts/yaml_files/5g_fdd_rfsimulator/smf-healthcheck.sh create mode 100755 ci-scripts/yaml_files/5g_fdd_rfsimulator/spgwu-healthcheck.sh diff --git a/ci-scripts/conf_files/gnb.sa.band66.fr1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.sa.band66.fr1.106PRB.usrpn300.conf new file mode 100644 index 0000000000..21bdb4e9d2 --- /dev/null +++ b/ci-scripts/conf_files/gnb.sa.band66.fr1.106PRB.usrpn300.conf @@ -0,0 +1,299 @@ +Active_gNBs = ( "gNB-Eurecom-5GNRBox"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + gNB_name = "gNB-Eurecom-5GNRBox"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ({ + mcc = 208; + mnc = 95; + mnc_length = 2; + snssaiList = ( + { + sst = 1; + sd = 0x1; // 0 false, else true + }, + { + sst = 2; + sd = 2; // 0 false, else true + } + ); + + }); + + nr_cellid = 12345678L; + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 1; + min_rxtxtime = 6; + sib1_tda = 0; + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 12; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) + absoluteFrequencySSB = 433096; + dl_frequencyBand = 66; + # this is 3600 MHz + dl_absoluteFrequencyPointA = 430000; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=27,L=48 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 13475; # 6366 12925 12956 28875 12952 +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 12; + initialDLBWPsearchSpaceZero = 0; + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 66; + ul_absoluteFrequencyPointA = 350000; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 13475; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 13; + preambleReceivedTargetPower = -118; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = -25; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// MME parameters: + amf_ip_address = ( { ipv4 = "192.168.70.132"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + + NETWORK_INTERFACES : + { + GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24"; + GNB_INTERFACE_NAME_FOR_NGU = "demo-oai"; + GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + ulsch_max_slots_inactivity = 100; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + pusch_proc_threads = 8; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 0 + att_rx = 0; + bands = [7]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + eNB_instances = [0]; + #beamforming 1x4 matrix: + bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000]; + clock_src = "internal"; + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +rfsimulator : +{ + serveraddr = "server"; + serverport = "4043"; + options = (); #("saviq"); or/and "chanmod" + modelname = "AWGN"; + IQfile = "/tmp/rfsimulator.iqs"; +}; + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + ngap_log_level ="debug"; + ngap_log_verbosity ="medium"; + }; + diff --git a/ci-scripts/xml_files/container_5g_fdd_rfsim.xml b/ci-scripts/xml_files/container_5g_fdd_rfsim.xml new file mode 100644 index 0000000000..44be29cca4 --- /dev/null +++ b/ci-scripts/xml_files/container_5g_fdd_rfsim.xml @@ -0,0 +1,116 @@ + + + rfsim-5gnr + Testing 5G NR RF sim - Monolithic gNB + wrench + 4 + + 100011 + 000010 + 000011 + 000012 + 000013 + 020011 + 020012 + 100011 + + + + + + DeployGenObject + Deploy MySql Database + yaml_files/5g_fdd_rfsimulator + mysql + 1 + + + + DeployGenObject + Deploy OAI 5G CoreNetwork + yaml_files/5g_fdd_rfsimulator + oai-nrf oai-amf oai-smf oai-spgwu oai-ext-dn + 6 + + + + DeployGenObject + Deploy OAI 5G gNB RF sim SA + yaml_files/5g_fdd_rfsimulator + oai-gnb + 7 + + + + DeployGenObject + Deploy OAI 5G NR-UE RF sim SA + yaml_files/5g_fdd_rfsimulator + oai-nr-ue + 8 + + + + PingFromContainer + Ping ext-dn from NR-UE + rfsim5g-oai-nr-ue + -I oaitun_ue1 -c 20 192.168.72.135 + 5 + + + + PingFromContainer + Ping NR-UE from ext-dn + rfsim5g-oai-ext-dn + -c 20 12.1.1.2 + 5 + + + + IperfFromContainer + Iperf UDP Downlink + rfsim5g-oai-nr-ue + rfsim5g-oai-ext-dn + -B 12.1.1.2 -u -i 1 -s + -c 12.1.1.2 -u -i 1 -t 30 -b 3M + + + + IperfFromContainer + Iperf UDP Uplink + rfsim5g-oai-ext-dn + rfsim5g-oai-nr-ue + -u -i 1 -s + -B 12.1.1.2 -c 192.168.72.135 -u -i 1 -t 30 -b 1M + + + + UndeployGenObject + Undeploy all OAI 5G stack + yaml_files/5g_fdd_rfsimulator + + + diff --git a/ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml b/ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml new file mode 100644 index 0000000000..c9e9a99d7b --- /dev/null +++ b/ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml @@ -0,0 +1,38 @@ + + + rfsim-5gnr-down + CleanUp 5G RF - Monolithic gNB + trash + + 100012 + + + + + UndeployGenObject + Undeploy all OAI 5G stack + yaml_files/5g_fdd_rfsimulator + + + diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/amf-healthcheck.sh b/ci-scripts/yaml_files/5g_fdd_rfsimulator/amf-healthcheck.sh new file mode 100755 index 0000000000..8bfdee2aac --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/amf-healthcheck.sh @@ -0,0 +1,57 @@ +#!/bin/bash +set -eo pipefail + +STATUS=0 +AMF_PORT_FOR_NGAP=38412 +AMF_PORT_FOR_N11_HTTP=80 +AMF_IP_NGAP_INTERFACE=$(ifconfig $AMF_INTERFACE_NAME_FOR_NGAP | grep inet | awk {'print $2'}) +AMF_IP_N11_INTERFACE=$(ifconfig $AMF_INTERFACE_NAME_FOR_N11 | grep inet | awk {'print $2'}) +N2_PORT_STATUS=$(netstat -Snpl | grep -o "$AMF_IP_NGAP_INTERFACE:$AMF_PORT_FOR_NGAP") +N11_PORT_STATUS=$(netstat -tnpl | grep -o "$AMF_IP_N11_INTERFACE:$AMF_PORT_FOR_N11_HTTP") +#Check if entrypoint properly configured the conf file and no parameter is unset (optional) +NB_UNREPLACED_AT=`cat /openair-amf/etc/*.conf | grep -v contact@openairinterface.org | grep -c @ || true` + +if [ $NB_UNREPLACED_AT -ne 0 ]; then + STATUS=1 + echo "Healthcheck error: configuration file is not configured properly" +fi + +if [[ -z $N2_PORT_STATUS ]]; then + STATUS=1 + echo "Healthcheck error: N2 SCTP port $AMF_PORT_FOR_NGAP is not listening" +fi + +if [[ -z $N11_PORT_STATUS ]]; then + STATUS=1 + echo "Healthcheck error: N11/SBI TCP/HTTP port $AMF_PORT_FOR_N11_HTTP is not listening" +fi + +#host="${MYSQL_SERVER}" +#user="${MYSQL_USER:-root}" +#export MYSQL_PWD="${MYSQL_PASS}" + +#args=( +# -h"$host" +# -u"$user" +# --silent +#) + +#if ! command -v mysql &> /dev/null; then +# echo "Installing mysql command" +# apt update +# apt-get -y install mysql-client +#else +# if select="$(echo 'SELECT 1' | mysql "${args[@]}")" && [ "$select" = '1' ]; then +# database_check=$(mysql -h$host -u$user -D oai_db --silent -e "SELECT * FROM users;") +# if [[ -z $database_check ]]; then +# echo "Healthcheck error: oai_db not populated" +# STATUS=1 +# fi +# STATUS=0 +# else +# echo "Healthcheck error: Mysql port inactive" +# STATUS=1 +# fi +#fi + +exit $STATUS diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml b/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml new file mode 100644 index 0000000000..bf75828ed1 --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml @@ -0,0 +1,298 @@ +version: '3.8' +services: + oai-nrf: + container_name: "rfsim5g-oai-nrf" + image: oai-nrf:latest + environment: + - NRF_INTERFACE_NAME_FOR_SBI=eth0 + - NRF_INTERFACE_PORT_FOR_SBI=80 + - NRF_INTERFACE_HTTP2_PORT_FOR_SBI=9090 + - NRF_API_VERSION=v1 + - INSTANCE=0 + - PID_DIRECTORY=/var/run + networks: + public_net: + ipv4_address: 192.168.71.130 + volumes: + - ./nrf-healthcheck.sh:/openair-nrf/bin/nrf-healthcheck.sh + healthcheck: + test: /bin/bash -c "/openair-nrf/bin/nrf-healthcheck.sh" + interval: 10s + timeout: 5s + retries: 5 + mysql: + container_name: "rfsim5g-mysql" + image: mysql:5.7 + volumes: + - ./oai_db.sql:/docker-entrypoint-initdb.d/oai_db.sql + - ./mysql-healthcheck.sh:/tmp/mysql-healthcheck.sh + environment: + - TZ=Europe/Paris + - MYSQL_DATABASE=oai_db + - MYSQL_USER=test + - MYSQL_PASSWORD=test + - MYSQL_ROOT_PASSWORD=linux + healthcheck: + test: /bin/bash -c "/tmp/mysql-healthcheck.sh" + interval: 10s + timeout: 5s + retries: 5 + networks: + public_net: + ipv4_address: 192.168.71.131 + oai-amf: + container_name: "rfsim5g-oai-amf" + image: oai-amf:latest + environment: + - TZ=Europe/paris + - INSTANCE=0 + - PID_DIRECTORY=/var/run + - MCC=208 + - MNC=99 + - REGION_ID=128 + - AMF_SET_ID=1 + - SERVED_GUAMI_MCC_0=208 + - SERVED_GUAMI_MNC_0=99 + - SERVED_GUAMI_REGION_ID_0=128 + - SERVED_GUAMI_AMF_SET_ID_0=1 + - SERVED_GUAMI_MCC_1=460 + - SERVED_GUAMI_MNC_1=11 + - SERVED_GUAMI_REGION_ID_1=10 + - SERVED_GUAMI_AMF_SET_ID_1=1 + - PLMN_SUPPORT_MCC=208 + - PLMN_SUPPORT_MNC=99 + - PLMN_SUPPORT_TAC=0x0001 + - SST_0=1 + - SD_0=1 + - SST_1=1 + - SD_1=12 + - AMF_INTERFACE_NAME_FOR_NGAP=eth0 + - AMF_INTERFACE_NAME_FOR_N11=eth0 + - SMF_INSTANCE_ID_0=1 + - SMF_FQDN_0=oai-smf + - SMF_IPV4_ADDR_0=0.0.0.0 + - SMF_HTTP_VERSION_0=v1 + - SELECTED_0=true + - SMF_INSTANCE_ID_1=2 + - SMF_FQDN_1=oai-smf + - SMF_IPV4_ADDR_1=0.0.0.0 + - SMF_HTTP_VERSION_1=v1 + - SELECTED_1=false + - MYSQL_SERVER=192.168.71.131 + - MYSQL_USER=root + - MYSQL_PASS=linux + - MYSQL_DB=oai_db + - OPERATOR_KEY=c42449363bbad02b66d16bc975d77cc1 + - NRF_IPV4_ADDRESS=192.168.71.130 + - NRF_PORT=80 + - NF_REGISTRATION=yes + - SMF_SELECTION=yes + - USE_FQDN_DNS=yes + - NRF_API_VERSION=v1 + - NRF_FQDN=oai-nrf + - EXTERNAL_AUSF=no + - AUSF_IPV4_ADDRESS=0.0.0.0 + - AUSF_PORT=80 + - AUSF_API_VERSION=v1 + - AUSF_FQDN=localhost + depends_on: + - oai-nrf + - mysql + volumes: + - ./amf-healthcheck.sh:/openair-amf/bin/amf-healthcheck.sh + healthcheck: + test: /bin/bash -c "/openair-amf/bin/amf-healthcheck.sh" + interval: 10s + timeout: 15s + retries: 5 + networks: + public_net: + ipv4_address: 192.168.71.132 + oai-smf: + container_name: "rfsim5g-oai-smf" + image: oai-smf:latest + entrypoint: /bin/bash -c "/openair-smf/bin/oai_smf -c /openair-smf/bin/oai-smf.conf -o" + environment: + - TZ=Europe/Paris + - INSTANCE=0 + - PID_DIRECTORY=/var/run + - SMF_INTERFACE_NAME_FOR_N4=eth0 + - SMF_INTERFACE_NAME_FOR_SBI=eth0 + - SMF_INTERFACE_PORT_FOR_SBI=80 + - SMF_INTERFACE_HTTP2_PORT_FOR_SBI=9090 + - SMF_API_VERSION=v1 + - DEFAULT_DNS_IPV4_ADDRESS=192.168.18.129 + - DEFAULT_DNS_SEC_IPV4_ADDRESS=4.4.4.4 + - AMF_IPV4_ADDRESS=0.0.0.0 + - AMF_PORT=80 + - AMF_API_VERSION=v1 + - AMF_FQDN=oai-amf + - UDM_IPV4_ADDRESS=127.0.0.1 + - UDM_PORT=80 + - UDM_API_VERSION=v1 + - UDM_FQDN=localhost + - UPF_IPV4_ADDRESS=192.168.71.134 + - UPF_FQDN_0=oai-spgwu + - NRF_IPV4_ADDRESS=192.168.71.130 + - NRF_PORT=80 + - NRF_API_VERSION=v1 + - NRF_FQDN=oai-nrf + - REGISTER_NRF=yes + - DISCOVER_UPF=yes + - USE_FQDN_DNS=yes + depends_on: + - oai-nrf + - oai-amf + volumes: + - ./smf-healthcheck.sh:/openair-smf/bin/smf-healthcheck.sh + - ./oai-smf.conf:/openair-smf/bin/oai-smf.conf + healthcheck: + test: /bin/bash -c "/openair-smf/bin/smf-healthcheck.sh" + interval: 10s + timeout: 5s + retries: 5 + networks: + public_net: + ipv4_address: 192.168.71.133 + oai-spgwu: + container_name: "rfsim5g-oai-spgwu" + image: oai-spgwu-tiny:latest + environment: + - TZ=Europe/Paris + - PID_DIRECTORY=/var/run + - SGW_INTERFACE_NAME_FOR_S1U_S12_S4_UP=eth0 + - SGW_INTERFACE_NAME_FOR_SX=eth0 + - PGW_INTERFACE_NAME_FOR_SGI=eth0 + - NETWORK_UE_NAT_OPTION=yes + - NETWORK_UE_IP=12.1.1.0/24 + - SPGWC0_IP_ADDRESS=192.168.71.133 + - BYPASS_UL_PFCP_RULES=no + - MCC=208 + - MNC=99 + - MNC03=099 + - TAC=1 + - GTP_EXTENSION_HEADER_PRESENT=yes + - GW_ID=1 + - REALM=openairinterface.org + - ENABLE_5G_FEATURES=yes + - REGISTER_NRF=yes + - USE_FQDN_NRF=yes + - UPF_FQDN_5G=oai-spgwu + - NRF_IPV4_ADDRESS=192.168.71.130 + - NRF_PORT=80 + - NRF_API_VERSION=v1 + - NRF_FQDN=oai-nrf + - NSSAI_SST_0=1 + - NSSAI_SD_0=1 + - DNN_0=oai + depends_on: + - oai-nrf + - oai-smf + cap_add: + - NET_ADMIN + - SYS_ADMIN + cap_drop: + - ALL + privileged: true + volumes: + - ./spgwu-healthcheck.sh:/openair-spgwu-tiny/bin/spgwu-healthcheck.sh + healthcheck: + test: /bin/bash -c "/openair-spgwu-tiny/bin/spgwu-healthcheck.sh" + interval: 10s + timeout: 5s + retries: 5 + networks: + public_net: + ipv4_address: 192.168.71.134 + traffic_net: + ipv4_address: 192.168.72.134 + oai-ext-dn: + image: ubuntu:bionic + privileged: true + container_name: rfsim5g-oai-ext-dn + entrypoint: /bin/bash -c \ + "apt update; apt install -y procps iptables iproute2 iperf iputils-ping;"\ + "iptables -t nat -A POSTROUTING -o eth0 -j MASQUERADE;"\ + "ip route add 12.1.1.0/24 via 192.168.72.134 dev eth0; sleep infinity" + depends_on: + - oai-spgwu + networks: + traffic_net: + ipv4_address: 192.168.72.135 + healthcheck: + test: /bin/bash -c "ping -c 2 192.168.72.134" + interval: 10s + timeout: 5s + retries: 5 + oai-gnb: + image: oai-gnb:develop + privileged: true + container_name: rfsim5g-oai-gnb + environment: + RFSIMULATOR: server + USE_SA_FDD_MONO: 'yes' + GNB_NAME: gnb-rfsim + TAC: 1 + MCC: '208' + MNC: '99' + MNC_LENGTH: 2 + NSSAI_SST: 1 + NSSAI_SD0: 1 + NSSAI_SD1: 112233 + AMF_IP_ADDRESS: 192.168.71.132 + GNB_NGA_IF_NAME: eth0 + GNB_NGA_IP_ADDRESS: 192.168.71.136 + GNB_NGU_IF_NAME: eth0 + GNB_NGU_IP_ADDRESS: 192.168.71.136 + USE_ADDITIONAL_OPTIONS: --sa -E --rfsim --log_config.global_log_options level,nocolor,time + depends_on: + - oai-ext-dn + networks: + public_net: + ipv4_address: 192.168.71.136 + healthcheck: + test: /bin/bash -c "pgrep nr-softmodem" + interval: 10s + timeout: 5s + retries: 5 + oai-nr-ue: + image: oai-nr-ue:develop + privileged: true + container_name: rfsim5g-oai-nr-ue + environment: + RFSIMULATOR: 192.168.71.136 + FULL_IMSI: '208990100001100' + FULL_KEY: 'fec86ba6eb707ed08905757b1bb44b8f' + OPC: 'C42449363BBAD02B66D16BC975D77CC1' + DNN: oai + NSSAI_SST: 1 + NSSAI_SD: 1 + USE_ADDITIONAL_OPTIONS: -E --sa --rfsim -r 106 --numerology 1 --band 66 -C 2169080000 --CO -400000000 -s 396 --nokrnmod --log_config.global_log_options level,nocolor,time + depends_on: + - oai-gnb + networks: + public_net: + ipv4_address: 192.168.71.137 + healthcheck: + test: /bin/bash -c "pgrep nr-uesoftmodem" + interval: 10s + timeout: 5s + retries: 5 + +networks: + public_net: + driver: bridge + name: rfsim5g-oai-public-net + ipam: + config: + - subnet: 192.168.71.128/26 + driver_opts: + com.docker.network.bridge.name: "rfsim5g-public" + traffic_net: + driver: bridge + name: rfsim5g-oai-traffic-net + ipam: + config: + - subnet: 192.168.72.128/26 + driver_opts: + com.docker.network.bridge.name: "rfsim5g-traffic" diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/mysql-healthcheck.sh b/ci-scripts/yaml_files/5g_fdd_rfsimulator/mysql-healthcheck.sh new file mode 100755 index 0000000000..c92efb9f00 --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/mysql-healthcheck.sh @@ -0,0 +1,46 @@ +#!/bin/bash +set -eo pipefail + +if [ "$MYSQL_ROOT_PASSWORD" ] && [ -z "$MYSQL_USER" ] && [ -z "$MYSQL_PASSWORD" ]; then + echo >&2 'Healthcheck error: cannot determine root password (and MYSQL_USER and MYSQL_PASSWORD were not set)' + exit 0 +fi + +host="$(hostname --ip-address || echo '127.0.0.1')" +user="${MYSQL_USER:-root}" +export MYSQL_PWD="${MYSQL_PASSWORD:-$MYSQL_ROOT_PASSWORD}" + +args=( + # force mysql to not use the local "mysqld.sock" (test "external" connectivity) + -h"$host" + -u"$user" + --silent +) + +STATUS=0 +if command -v mysqladmin &> /dev/null; then + if mysqladmin "${args[@]}" ping > /dev/null; then + database_check=$(mysql -u$user -D oai_db --silent -e "SELECT * FROM users;") + if [[ -z $database_check ]]; then + echo "Healthcheck error: oai_db not populated" + STATUS=1 + fi + STATUS=0 + else + echo "Healthcheck error: Mysql port inactive" + STATUS=1 + fi +else + if select="$(echo 'SELECT 1' | mysql "${args[@]}")" && [ "$select" = '1' ]; then + database_check=$(mysql -u$user -D oai_db --silent -e "SELECT * FROM users;") + if [[ -z $database_check ]]; then + echo "Healthcheck error: oai_db not populated" + STATUS=1 + fi + STATUS=0 + else + echo "Healthcheck error: Mysql port inactive" + STATUS=1 + fi +fi +exit $STATUS diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/nrf-healthcheck.sh b/ci-scripts/yaml_files/5g_fdd_rfsimulator/nrf-healthcheck.sh new file mode 100755 index 0000000000..3479c092e8 --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/nrf-healthcheck.sh @@ -0,0 +1,20 @@ +#!/bin/bash +set -eo pipefail + +STATUS=0 +NRF_IP_SBI_INTERFACE=$(ifconfig $NRF_INTERFACE_NAME_FOR_SBI | grep inet | awk {'print $2'}) +NRF_SBI_PORT_STATUS=$(netstat -tnpl | grep -o "$NRF_IP_SBI_INTERFACE:$NRF_INTERFACE_PORT_FOR_SBI") +#Check if entrypoint properly configured the conf file and no parameter is unset(optional) +NB_UNREPLACED_AT=`cat /openair-nrf/etc/*.conf | grep -v contact@openairinterface.org | grep -c @ || true` + +if [ $NB_UNREPLACED_AT -ne 0 ]; then + STATUS=1 + echo "Healthcheck error: UNHEALTHY configuration file is not configured properly" +fi + +if [[ -z $NRF_SBI_PORT_STATUS ]]; then + STATUS=1 + echo "Healthcheck error: UNHEALTHY SBI TCP/HTTP port $NRF_INTERFACE_PORT_FOR_SBI is not listening." +fi + +exit $STATUS \ No newline at end of file diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf b/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf new file mode 100644 index 0000000000..0c83ab8be9 --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf @@ -0,0 +1,133 @@ +################################################################################ +# Licensed to the OpenAirInterface (OAI) Software Alliance under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. +# The OpenAirInterface Software Alliance licenses this file to You under +# the OAI Public License, Version 1.1 (the "License"); you may not use this file +# except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.openairinterface.org/?page_id=698 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +#------------------------------------------------------------------------------- +# For more information about the OpenAirInterface (OAI) Software Alliance: +# contact@openairinterface.org +################################################################################ + +SMF = +{ + FQDN = "oai-smf-svc"; + INSTANCE = 0; # 0 is the default + PID_DIRECTORY = "/var/run"; # /var/run is the default + + INTERFACES : + { + N4 : + { + # SMF binded interface for N4 communication (UPF) + INTERFACE_NAME = "eth0"; # YOUR NETWORK CONFIG HERE + IPV4_ADDRESS = "read"; + }; + + SBI : + { + # SMF binded interface for SBI interface (e.g., communication with AMF, UDM) + INTERFACE_NAME = "eth0"; # YOUR NETWORK CONFIG HERE + IPV4_ADDRESS = "read"; + PORT = 80; # YOUR NETWORK CONFIG HERE (default: 80) + HTTP2_PORT = 9090; # YOUR NETWORK CONFIG HERE + API_VERSION = "v1"; # YOUR SMF API VERSION CONFIG HERE + }; + + }; + + + # Pool of UE assigned IP addresses + # Do not make IP pools overlap + # first IPv4 address X.Y.Z.1 is reserved for GTP network device on UPF + IP_ADDRESS_POOL : + { + IPV4_LIST = ( + {RANGE = "12.1.1.2 - 12.1.1.128";}, # STRING, IPv4 RANGE IP_start - IP_end, YOUR NETWORK CONFIG HERE. + {RANGE = "12.1.1.129 - 12.1.1.224";}, # STRING, IPv4 RANGE IP_start - IP_end, YOUR NETWORK CONFIG HERE. + {RANGE = "10.10.10.2 - 10.10.10.253";} # STRING, IPv4 RANGE IP_start - IP_end, YOUR NETWORK CONFIG HERE. + + ); + IPV6_LIST = ( + {PREFIX = "2001:1:2::/64";}, # STRING, IPv6 prefix, YOUR NETWORK CONFIG HERE. + {PREFIX = "3001:1:2::/64";}, # STRING, IPv6 prefix, YOUR NETWORK CONFIG HERE. + {PREFIX = "4001:1:2::/64";} # STRING, IPv6 prefix, YOUR NETWORK CONFIG HERE. + ); + }; + + DNN_LIST = ( + # IPV4_POOL, IPV6_POOL are index in IPV4_LIST, IPV6_LIST, PDU_SESSION_TYPE choice in {IPv4, IPv6, IPv4v6} + {DNN_NI = "default"; PDU_SESSION_TYPE = "IPv4"; IPV4_POOL = 2; IPV6_POOL = -1}, + {DNN_NI = "carrier.com"; PDU_SESSION_TYPE = "IPv4"; IPV4_POOL = 1; IPV6_POOL = -1}, + {DNN_NI = "oai"; PDU_SESSION_TYPE = "IPv4"; IPV4_POOL = 0; IPV6_POOL = -1} + ); + + # DNS address communicated to UEs + DEFAULT_DNS_IPV4_ADDRESS = "192.168.18.129"; # YOUR DNS CONFIG HERE + DEFAULT_DNS_SEC_IPV4_ADDRESS = "192.168.18.129"; # YOUR DNS CONFIG HERE + DEFAULT_DNS_IPV6_ADDRESS = "2001:4860:4860::8888"; # YOUR DNS CONFIG HERE + DEFAULT_DNS_SEC_IPV6_ADDRESS = "2001:4860:4860::8844"; # YOUR DNS CONFIG HERE + + SUPPORT_FEATURES: + { + # STRING, {"yes", "no"}, + REGISTER_NRF = "yes"; # Set to yes if SMF resgisters to an NRF + DISCOVER_UPF = "yes"; # Set to yes to enable UPF discovery and selection + FORCE_PUSH_PROTOCOL_CONFIGURATION_OPTIONS = "no"; # Non standard feature, normally should be set to "no", + # but you may need to set to yes for UE that do not explicitly request a PDN address through NAS signalling + USE_LOCAL_SUBSCRIPTION_INFO = "yes"; # Set to yes if SMF uses local subscription information instead of from an UDM + USE_FQDN_DNS = "yes"; # Set to yes if AMF/UDM/NRF/UPF will relying on a DNS to resolve FQDN + } + + AMF : + { + IPV4_ADDRESS = "0.0.0.0"; # YOUR AMF CONFIG HERE + PORT = 80; # YOUR AMF CONFIG HERE (default: 80) + API_VERSION = "v1"; # YOUR AMF API VERSION FOR SBI CONFIG HERE + FQDN = "oai-amf" # YOUR AMF FQDN CONFIG HERE + }; + + UDM : + { + IPV4_ADDRESS = "127.0.0.1"; # YOUR UDM CONFIG HERE + PORT = 80; # YOUR UDM CONFIG HERE (default: 80) + API_VERSION = "v1"; # YOUR UDM API VERSION FOR SBI CONFIG HERE + FQDN = "localhost" # YOUR UDM FQDN CONFIG HERE + }; + + NRF : + { + IPV4_ADDRESS = "192.168.71.130"; # YOUR NRF CONFIG HERE + PORT = 80; # YOUR NRF CONFIG HERE (default: 80) + API_VERSION = "v1"; # YOUR NRF API VERSION FOR SBI CONFIG HERE + FQDN = "oai-nrf" # YOUR NRF FQDN CONFIG HERE + }; + + UPF_LIST = ( + {IPV4_ADDRESS = "192.168.71.134" ; FQDN = "oai-spgwu"} # YOUR UPF CONFIG HERE + ); + + LOCAL_CONFIGURATION : + { + SESSION_MANAGEMENT_SUBSCRIPTION_LIST = ( + { NSSAI_SST = 222, NSSAI_SD = "123", DNN = "default", DEFAULT_SESSION_TYPE = "IPV4", DEFAULT_SSC_MODE = 1, + QOS_PROFILE_5QI = 7, QOS_PROFILE_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PREEMPTCAP = "NOT_PREEMPT", + QOS_PROFILE_ARP_PREEMPTVULN = "NOT_PREEMPTABLE", SESSION_AMBR_UL = "20Mbps", SESSION_AMBR_DL = "22Mbps"}, + { NSSAI_SST = 1; NSSAI_SD = "1", DNN = "oai", DEFAULT_SESSION_TYPE = "IPV4", DEFAULT_SSC_MODE = 1, + QOS_PROFILE_5QI = 6, QOS_PROFILE_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PREEMPTCAP = "NOT_PREEMPT", + QOS_PROFILE_ARP_PREEMPTVULN = "NOT_PREEMPTABLE", SESSION_AMBR_UL = "20Mbps", SESSION_AMBR_DL = "22Mbps"} + ); + }; + +}; + diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai_db.sql b/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai_db.sql new file mode 100755 index 0000000000..fbd7907a71 --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai_db.sql @@ -0,0 +1,217 @@ +-- MySQL dump 10.13 Distrib 5.5.46, for debian-linux-gnu (x86_64) +-- +-- Host: localhost Database: oai_db +-- ------------------------------------------------------ +-- Server version 5.5.46-0ubuntu0.14.04.2 + +/*!40101 SET @OLD_CHARACTER_SET_CLIENT=@@CHARACTER_SET_CLIENT */; +/*!40101 SET @OLD_CHARACTER_SET_RESULTS=@@CHARACTER_SET_RESULTS */; +/*!40101 SET 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SET CHARACTER_SET_RESULTS=@OLD_CHARACTER_SET_RESULTS */; +/*!40101 SET COLLATION_CONNECTION=@OLD_COLLATION_CONNECTION */; +/*!40111 SET SQL_NOTES=@OLD_SQL_NOTES */; + +-- Dump completed on 2016-06-28 11:41:40 diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/smf-healthcheck.sh b/ci-scripts/yaml_files/5g_fdd_rfsimulator/smf-healthcheck.sh new file mode 100755 index 0000000000..d9ff7608e8 --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/smf-healthcheck.sh @@ -0,0 +1,21 @@ +#!/bin/bash +set -eo pipefail + +STATUS=0 +SMF_IP_SBI_INTERFACE=$(ifconfig $SMF_INTERFACE_NAME_FOR_SBI | grep inet | awk {'print $2'}) +SMF_SBI_PORT_STATUS=$(netstat -tnpl | grep -o "$SMF_IP_SBI_INTERFACE:$SMF_INTERFACE_PORT_FOR_SBI") + +#Check if entrypoint properly configured the conf file and no parameter is unset(optional) +#NB_UNREPLACED_AT=`cat /openair-smf/etc/*.conf | grep -v contact@openairinterface.org | grep -c @ || true` + +#if [ $NB_UNREPLACED_AT -ne 0 ]; then +# STATUS=-1 +# echo "Healthcheck error: UNHEALTHY configuration file is not configured properly" +#fi +# +if [[ -z $SMF_SBI_PORT_STATUS ]]; then + STATUS=-1 + echo "Healthcheck error: UNHEALTHY SBI TCP/HTTP port $SMF_INTERFACE_PORT_FOR_SBI is not listening." +fi + +exit $STATUS diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/spgwu-healthcheck.sh b/ci-scripts/yaml_files/5g_fdd_rfsimulator/spgwu-healthcheck.sh new file mode 100755 index 0000000000..0e3b67ee7e --- /dev/null +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/spgwu-healthcheck.sh @@ -0,0 +1,28 @@ +#!/bin/bash +set -eo pipefail + +STATUS=0 +SGW_PORT_FOR_S1U_S12_S4_UP=2152 +SGW_PORT_FOR_SX=8805 +SGW_IP_S1U_INTERFACE=$(ifconfig $SGW_INTERFACE_NAME_FOR_S1U_S12_S4_UP | grep inet | awk {'print $2'}) +SGW_IP_SX_INTERFACE=$(ifconfig $SGW_INTERFACE_NAME_FOR_SX | grep inet | awk {'print $2'}) +S1U_S12_S4_UP_PORT_STATUS=$(netstat -unpl | grep -o "$SGW_IP_S1U_INTERFACE:$SGW_PORT_FOR_S1U_S12_S4_UP") +SX_PORT_STATUS=$(netstat -unpl | grep -o "$SGW_IP_SX_INTERFACE:$SGW_PORT_FOR_SX") +#Check if entrypoint properly configured the conf file and no parameter is unset (optional) +NB_UNREPLACED_AT=`cat /openair-spgwu/etc/*.conf | grep -v contact@openairinterface.org | grep -c @ || true` +if [ $NB_UNREPLACED_AT -ne 0 ]; then + STATUS=1 + echo "Healthcheck error: UNHEALTHY configuration file is not configured properly" +fi + +if [[ -z $S1U_S12_S4_UP_PORT_STATUS ]]; then + STATUS=1 + echo "Healthcheck error: UNHEALTHY S1U port $SGW_PORT_FOR_S1U_S12_S4_UP is not listening." +fi + +if [[ -z $SX_PORT_STATUS ]]; then + STATUS=1 + echo "Healthcheck error: UNHEALTHY SX port $SGW_PORT_FOR_SX is not listening." +fi + +exit $STATUS \ No newline at end of file diff --git a/docker/scripts/gnb_entrypoint.sh b/docker/scripts/gnb_entrypoint.sh index 79d6c6dc37..aec5c48050 100755 --- a/docker/scripts/gnb_entrypoint.sh +++ b/docker/scripts/gnb_entrypoint.sh @@ -10,6 +10,7 @@ THREAD_PARALLEL_CONFIG=${THREAD_PARALLEL_CONFIG:-PARALLEL_SINGLE_THREAD} if [[ -v USE_NSA_TDD_MONO ]]; then cp $PREFIX/etc/gnb.nsa.tdd.conf $PREFIX/etc/gnb.conf; fi if [[ -v USE_SA_TDD_MONO ]]; then cp $PREFIX/etc/gnb.sa.tdd.conf $PREFIX/etc/gnb.conf; fi +if [[ -v USE_SA_FDD_MONO ]]; then cp $PREFIX/etc/gnb.sa.fdd.conf $PREFIX/etc/gnb.conf; fi if [[ -v USE_SA_CU ]]; then ln -s $PREFIX/etc/gnb.sa.cu.conf $PREFIX/etc/gnb.conf; fi if [[ -v USE_SA_TDD_CU ]]; then cp $PREFIX/etc/gnb.sa.du.tdd.conf $PREFIX/etc/gnb.conf; fi # Sometimes, the templates are not enough. We mount a conf file on $PREFIX/etc. It can be a template itself. diff --git a/docker/scripts/gnb_parameters.yaml b/docker/scripts/gnb_parameters.yaml index 2f150d394a..8547d48e67 100644 --- a/docker/scripts/gnb_parameters.yaml +++ b/docker/scripts/gnb_parameters.yaml @@ -94,6 +94,36 @@ - key: parallel_config env: "@THREAD_PARALLEL_CONFIG@" + - filePrefix: gnb.sa.band66.fr1.106PRB.usrpn300.conf + outputfilename: "gnb.sa.fdd.conf" + config: + - key: Active_gNBs + env: "@GNB_NAME@" + - key: gNB_name + env: "@GNB_NAME@" + - key: mcc + env: "@MCC@" + - key: mnc + env: "@MNC@" + - key: mnc_length + env: "@MNC_LENGTH@" + - key: tracking_area_code + env: "@TAC@" + - key: sst + env: "@NSSAI_SST@" + - key: ipv4 + env: "@AMF_IP_ADDRESS@" + - key: GNB_INTERFACE_NAME_FOR_NG_AMF + env: "@GNB_NGA_IF_NAME@" + - key: GNB_IPV4_ADDRESS_FOR_NG_AMF + env: "@GNB_NGA_IP_ADDRESS@" + - key: GNB_INTERFACE_NAME_FOR_NGU + env: "@GNB_NGU_IF_NAME@" + - key: GNB_IPV4_ADDRESS_FOR_NGU + env: "@GNB_NGU_IP_ADDRESS@" + - key: parallel_config + env: "@THREAD_PARALLEL_CONFIG@" + - filePrefix: gNB_SA_CU.conf outputfilename: "gnb.sa.cu.conf" config: From ae7e68baea6af63e9e5e5a4b1d3862d39cc2f593 Mon Sep 17 00:00:00 2001 From: Raphael Defosseux Date: Tue, 8 Feb 2022 11:06:25 +0100 Subject: [PATCH 57/67] fix(ci): fix CN5G deployment with latest images Signed-off-by: Raphael Defosseux --- .../5g_fdd_rfsimulator/docker-compose.yaml | 4 +- .../5g_fdd_rfsimulator/oai-smf.conf | 133 ------------------ 2 files changed, 2 insertions(+), 135 deletions(-) delete mode 100644 ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml b/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml index bf75828ed1..587722f2ef 100644 --- a/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml @@ -111,7 +111,6 @@ services: oai-smf: container_name: "rfsim5g-oai-smf" image: oai-smf:latest - entrypoint: /bin/bash -c "/openair-smf/bin/oai_smf -c /openair-smf/bin/oai-smf.conf -o" environment: - TZ=Europe/Paris - INSTANCE=0 @@ -140,12 +139,13 @@ services: - REGISTER_NRF=yes - DISCOVER_UPF=yes - USE_FQDN_DNS=yes + - DNN_NI0=oai + - DNN_NI2=oai.ipv4 depends_on: - oai-nrf - oai-amf volumes: - ./smf-healthcheck.sh:/openair-smf/bin/smf-healthcheck.sh - - ./oai-smf.conf:/openair-smf/bin/oai-smf.conf healthcheck: test: /bin/bash -c "/openair-smf/bin/smf-healthcheck.sh" interval: 10s diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf b/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf deleted file mode 100644 index 0c83ab8be9..0000000000 --- a/ci-scripts/yaml_files/5g_fdd_rfsimulator/oai-smf.conf +++ /dev/null @@ -1,133 +0,0 @@ -################################################################################ -# Licensed to the OpenAirInterface (OAI) Software Alliance under one or more -# contributor license agreements. See the NOTICE file distributed with -# this work for additional information regarding copyright ownership. -# The OpenAirInterface Software Alliance licenses this file to You under -# the OAI Public License, Version 1.1 (the "License"); you may not use this file -# except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.openairinterface.org/?page_id=698 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -#------------------------------------------------------------------------------- -# For more information about the OpenAirInterface (OAI) Software Alliance: -# contact@openairinterface.org -################################################################################ - -SMF = -{ - FQDN = "oai-smf-svc"; - INSTANCE = 0; # 0 is the default - PID_DIRECTORY = "/var/run"; # /var/run is the default - - INTERFACES : - { - N4 : - { - # SMF binded interface for N4 communication (UPF) - INTERFACE_NAME = "eth0"; # YOUR NETWORK CONFIG HERE - IPV4_ADDRESS = "read"; - }; - - SBI : - { - # SMF binded interface for SBI interface (e.g., communication with AMF, UDM) - INTERFACE_NAME = "eth0"; # YOUR NETWORK CONFIG HERE - IPV4_ADDRESS = "read"; - PORT = 80; # YOUR NETWORK CONFIG HERE (default: 80) - HTTP2_PORT = 9090; # YOUR NETWORK CONFIG HERE - API_VERSION = "v1"; # YOUR SMF API VERSION CONFIG HERE - }; - - }; - - - # Pool of UE assigned IP addresses - # Do not make IP pools overlap - # first IPv4 address X.Y.Z.1 is reserved for GTP network device on UPF - IP_ADDRESS_POOL : - { - IPV4_LIST = ( - {RANGE = "12.1.1.2 - 12.1.1.128";}, # STRING, IPv4 RANGE IP_start - IP_end, YOUR NETWORK CONFIG HERE. - {RANGE = "12.1.1.129 - 12.1.1.224";}, # STRING, IPv4 RANGE IP_start - IP_end, YOUR NETWORK CONFIG HERE. - {RANGE = "10.10.10.2 - 10.10.10.253";} # STRING, IPv4 RANGE IP_start - IP_end, YOUR NETWORK CONFIG HERE. - - ); - IPV6_LIST = ( - {PREFIX = "2001:1:2::/64";}, # STRING, IPv6 prefix, YOUR NETWORK CONFIG HERE. - {PREFIX = "3001:1:2::/64";}, # STRING, IPv6 prefix, YOUR NETWORK CONFIG HERE. - {PREFIX = "4001:1:2::/64";} # STRING, IPv6 prefix, YOUR NETWORK CONFIG HERE. - ); - }; - - DNN_LIST = ( - # IPV4_POOL, IPV6_POOL are index in IPV4_LIST, IPV6_LIST, PDU_SESSION_TYPE choice in {IPv4, IPv6, IPv4v6} - {DNN_NI = "default"; PDU_SESSION_TYPE = "IPv4"; IPV4_POOL = 2; IPV6_POOL = -1}, - {DNN_NI = "carrier.com"; PDU_SESSION_TYPE = "IPv4"; IPV4_POOL = 1; IPV6_POOL = -1}, - {DNN_NI = "oai"; PDU_SESSION_TYPE = "IPv4"; IPV4_POOL = 0; IPV6_POOL = -1} - ); - - # DNS address communicated to UEs - DEFAULT_DNS_IPV4_ADDRESS = "192.168.18.129"; # YOUR DNS CONFIG HERE - DEFAULT_DNS_SEC_IPV4_ADDRESS = "192.168.18.129"; # YOUR DNS CONFIG HERE - DEFAULT_DNS_IPV6_ADDRESS = "2001:4860:4860::8888"; # YOUR DNS CONFIG HERE - DEFAULT_DNS_SEC_IPV6_ADDRESS = "2001:4860:4860::8844"; # YOUR DNS CONFIG HERE - - SUPPORT_FEATURES: - { - # STRING, {"yes", "no"}, - REGISTER_NRF = "yes"; # Set to yes if SMF resgisters to an NRF - DISCOVER_UPF = "yes"; # Set to yes to enable UPF discovery and selection - FORCE_PUSH_PROTOCOL_CONFIGURATION_OPTIONS = "no"; # Non standard feature, normally should be set to "no", - # but you may need to set to yes for UE that do not explicitly request a PDN address through NAS signalling - USE_LOCAL_SUBSCRIPTION_INFO = "yes"; # Set to yes if SMF uses local subscription information instead of from an UDM - USE_FQDN_DNS = "yes"; # Set to yes if AMF/UDM/NRF/UPF will relying on a DNS to resolve FQDN - } - - AMF : - { - IPV4_ADDRESS = "0.0.0.0"; # YOUR AMF CONFIG HERE - PORT = 80; # YOUR AMF CONFIG HERE (default: 80) - API_VERSION = "v1"; # YOUR AMF API VERSION FOR SBI CONFIG HERE - FQDN = "oai-amf" # YOUR AMF FQDN CONFIG HERE - }; - - UDM : - { - IPV4_ADDRESS = "127.0.0.1"; # YOUR UDM CONFIG HERE - PORT = 80; # YOUR UDM CONFIG HERE (default: 80) - API_VERSION = "v1"; # YOUR UDM API VERSION FOR SBI CONFIG HERE - FQDN = "localhost" # YOUR UDM FQDN CONFIG HERE - }; - - NRF : - { - IPV4_ADDRESS = "192.168.71.130"; # YOUR NRF CONFIG HERE - PORT = 80; # YOUR NRF CONFIG HERE (default: 80) - API_VERSION = "v1"; # YOUR NRF API VERSION FOR SBI CONFIG HERE - FQDN = "oai-nrf" # YOUR NRF FQDN CONFIG HERE - }; - - UPF_LIST = ( - {IPV4_ADDRESS = "192.168.71.134" ; FQDN = "oai-spgwu"} # YOUR UPF CONFIG HERE - ); - - LOCAL_CONFIGURATION : - { - SESSION_MANAGEMENT_SUBSCRIPTION_LIST = ( - { NSSAI_SST = 222, NSSAI_SD = "123", DNN = "default", DEFAULT_SESSION_TYPE = "IPV4", DEFAULT_SSC_MODE = 1, - QOS_PROFILE_5QI = 7, QOS_PROFILE_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PREEMPTCAP = "NOT_PREEMPT", - QOS_PROFILE_ARP_PREEMPTVULN = "NOT_PREEMPTABLE", SESSION_AMBR_UL = "20Mbps", SESSION_AMBR_DL = "22Mbps"}, - { NSSAI_SST = 1; NSSAI_SD = "1", DNN = "oai", DEFAULT_SESSION_TYPE = "IPV4", DEFAULT_SSC_MODE = 1, - QOS_PROFILE_5QI = 6, QOS_PROFILE_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PRIORITY_LEVEL = 1, QOS_PROFILE_ARP_PREEMPTCAP = "NOT_PREEMPT", - QOS_PROFILE_ARP_PREEMPTVULN = "NOT_PREEMPTABLE", SESSION_AMBR_UL = "20Mbps", SESSION_AMBR_DL = "22Mbps"} - ); - }; - -}; - From eca14f6ec9562b49771726954897d5418fa5c168 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 3 Feb 2022 15:00:21 +0100 Subject: [PATCH 58/67] Schedule UL 5 RBs at MCS 10 on inactivity --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 827d95dba5..2220f8065f 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2769,13 +2769,12 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP, UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 5; UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10; } else { - // assigne RBS( 3 RBs) -/* - first_rb[CC_id] = first_rb[CC_id] + 3; - UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3; - UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2; + // assigne RBS( 5 RBs) + first_rb[CC_id] = first_rb[CC_id] + 5; + UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 5; + UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 4; UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10; -*/ } + } } } else if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_INACTIVE ) { // assigne RBS( 3 RBs) From 759314a12572799ddecf6f1538fcbf561621e9f7 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 7 Feb 2022 16:00:47 +0100 Subject: [PATCH 59/67] Enrich assert in ULSCH decoding --- openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c b/openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c index ae8c666d18..fceff580a3 100644 --- a/openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c +++ b/openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c @@ -601,7 +601,8 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB, G = G - Q_RI - Q_CQI; ulsch_harq->G = G; AssertFatal((int)G > 0, - "FATAL: ulsch_decoding.c G < 0 (%u) : Q_RI %u, Q_CQI %u\n",G,Q_RI,Q_CQI); + "FATAL: ulsch_decoding.c G < 0 (%u) : Q_RI %u, Q_CQI %u, nb_rb %u, Q_m %u, ulsch_harq->Nsymb_pusch %u, Qprime %u\n", + G, Q_RI, Q_CQI, nb_rb, Q_m, ulsch_harq->Nsymb_pusch, Qprime); H = G + Q_CQI; Hprime = H/Q_m; // Demultiplexing/Deinterleaving of PUSCH/ACK/RI/CQI From 388cfafea8cd93fd85bcc78ae4fa564e96a16e42 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 7 Feb 2022 16:31:44 +0100 Subject: [PATCH 60/67] Stop scheduling in UL after ul_failure_timer --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index 2220f8065f..bb013906f7 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -2241,7 +2241,8 @@ void ulsch_scheduler_pre_ue_select_fairRR( if (UE_info->UE_template[CC_id][UE_id].configured == FALSE) continue; - if (UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) + if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0 + || UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue; // UL DCI @@ -2403,7 +2404,8 @@ void ulsch_scheduler_pre_ue_select_fairRR( if (UE_info->UE_template[CC_id][UE_id].configured == FALSE) continue; - if (UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) + if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0 + || UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue; if ( (ulsch_ue_select[CC_id].ue_num >= ulsch_ue_max_num[CC_id]) || (cc_id_flag[CC_id] == 1) ) { From 5bdaeb571840acbb861adeea6b37a419f023140c Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 7 Feb 2022 18:39:06 +0100 Subject: [PATCH 61/67] Stop scheduling DL on UL failure or out of sync --- openair2/LAYER2/MAC/eNB_scheduler_fairRR.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c index bb013906f7..6c9ffabd4f 100644 --- a/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_fairRR.c @@ -220,6 +220,11 @@ void dlsch_scheduler_pre_ue_select_fairRR( continue; } + + if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0 + || UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) + continue; + if(mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) { continue; } @@ -335,6 +340,10 @@ void dlsch_scheduler_pre_ue_select_fairRR( if (rnti == NOT_A_RNTI) continue; + if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0 + || UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) + continue; + if(mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) { continue; } @@ -459,6 +468,10 @@ void dlsch_scheduler_pre_ue_select_fairRR( if (rnti == NOT_A_RNTI) continue; + if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0 + || UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) + continue; + if(mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) { continue; } From 8e6e4d82370cbf2758238e317be8b2a11c30f2e0 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 8 Feb 2022 10:58:04 +0100 Subject: [PATCH 62/67] Log inactivity timer --- openair2/LAYER2/MAC/main.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/MAC/main.c b/openair2/LAYER2/MAC/main.c index a4e924c68b..4554b247f5 100644 --- a/openair2/LAYER2/MAC/main.c +++ b/openair2/LAYER2/MAC/main.c @@ -68,7 +68,7 @@ void *mac_stats_thread(void *param) { else { total_bler = (double)UE_scheduling_control->pusch_rx_error_num[CC_id] / (double)(UE_scheduling_control->pusch_rx_error_num[CC_id] + UE_scheduling_control->pusch_rx_num[CC_id]) * 100; } - fprintf(fd,"MAC UE rnti %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf (%lf/%lf) total_bler %lf mcsoff %d pre_allocated nb_rb %d, mcs %d, bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d\n", + fprintf(fd,"MAC UE rnti %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf (%lf/%lf) total_bler %lf mcsoff %d pre_allocated nb_rb %d, mcs %d, bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d inactivity timer %d\n", rnti, UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync", UE_info->UE_template[CC_id][UE_id].phr_info, @@ -97,7 +97,8 @@ void *mac_stats_thread(void *param) { #endif UE_scheduling_control->first_cnt[CC_id], UE_scheduling_control->ret_cnt[CC_id], - UE_scheduling_control->aperiodic_ri_received[CC_id] + UE_scheduling_control->aperiodic_ri_received[CC_id], + UE_scheduling_control->ul_inactivity_timer ); fprintf(fd," ULSCH rounds %d/%d/%d/%d, DLSCH rounds %d/%d/%d/%d, ULSCH errors %d, DLSCH errors %d\n", UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_rounds[0], From 92a021a15992d75865dd3b43dc4836e5daf173a5 Mon Sep 17 00:00:00 2001 From: Raphael Defosseux Date: Thu, 10 Feb 2022 15:45:44 +0100 Subject: [PATCH 63/67] fix(docker): SA FDD template file not generated; cosmetics changes on the CI side Signed-off-by: Raphael Defosseux --- ci-scripts/xml_files/container_5g_fdd_rfsim.xml | 4 ++-- ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml | 4 ++-- ci-scripts/xml_files/container_5g_rfsim.xml | 4 ++-- ci-scripts/xml_files/container_5g_rfsim_down.xml | 2 +- .../yaml_files/5g_fdd_rfsimulator/docker-compose.yaml | 10 +++++----- docker/scripts/generateTemplate.py | 1 + 6 files changed, 13 insertions(+), 12 deletions(-) diff --git a/ci-scripts/xml_files/container_5g_fdd_rfsim.xml b/ci-scripts/xml_files/container_5g_fdd_rfsim.xml index 44be29cca4..28269b2d03 100644 --- a/ci-scripts/xml_files/container_5g_fdd_rfsim.xml +++ b/ci-scripts/xml_files/container_5g_fdd_rfsim.xml @@ -21,8 +21,8 @@ --> - rfsim-5gnr - Testing 5G NR RF sim - Monolithic gNB + rfsim-5gnr-fdd + Testing 5G NR RF sim - Monolithic FDD gNB wrench 4 diff --git a/ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml b/ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml index c9e9a99d7b..d960949f7d 100644 --- a/ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml +++ b/ci-scripts/xml_files/container_5g_fdd_rfsim_down.xml @@ -21,8 +21,8 @@ --> - rfsim-5gnr-down - CleanUp 5G RF - Monolithic gNB + rfsim-5gnr-fdd-down + CleanUp 5G RF - Monolithic FDD gNB trash 100012 diff --git a/ci-scripts/xml_files/container_5g_rfsim.xml b/ci-scripts/xml_files/container_5g_rfsim.xml index d1114616a8..7485b1f8ba 100644 --- a/ci-scripts/xml_files/container_5g_rfsim.xml +++ b/ci-scripts/xml_files/container_5g_rfsim.xml @@ -21,8 +21,8 @@ --> - rfsim-5gnr - Testing 5G NR RF sim - Monolithic gNB + rfsim-5gnr-tdd + Testing 5G NR RF sim - Monolithic TDD gNB wrench 4 diff --git a/ci-scripts/xml_files/container_5g_rfsim_down.xml b/ci-scripts/xml_files/container_5g_rfsim_down.xml index 9acc3f85a1..b369b1fad8 100644 --- a/ci-scripts/xml_files/container_5g_rfsim_down.xml +++ b/ci-scripts/xml_files/container_5g_rfsim_down.xml @@ -22,7 +22,7 @@ --> rfsim-5gnr-down - CleanUp 5G RF - Monolithic gNB + CleanUp 5G RF - Monolithic TDD gNB trash 100002 diff --git a/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml b/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml index 587722f2ef..3e46adb9e7 100644 --- a/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml +++ b/ci-scripts/yaml_files/5g_fdd_rfsimulator/docker-compose.yaml @@ -241,15 +241,15 @@ services: NSSAI_SD1: 112233 AMF_IP_ADDRESS: 192.168.71.132 GNB_NGA_IF_NAME: eth0 - GNB_NGA_IP_ADDRESS: 192.168.71.136 + GNB_NGA_IP_ADDRESS: 192.168.71.140 GNB_NGU_IF_NAME: eth0 - GNB_NGU_IP_ADDRESS: 192.168.71.136 + GNB_NGU_IP_ADDRESS: 192.168.71.140 USE_ADDITIONAL_OPTIONS: --sa -E --rfsim --log_config.global_log_options level,nocolor,time depends_on: - oai-ext-dn networks: public_net: - ipv4_address: 192.168.71.136 + ipv4_address: 192.168.71.140 healthcheck: test: /bin/bash -c "pgrep nr-softmodem" interval: 10s @@ -260,7 +260,7 @@ services: privileged: true container_name: rfsim5g-oai-nr-ue environment: - RFSIMULATOR: 192.168.71.136 + RFSIMULATOR: 192.168.71.140 FULL_IMSI: '208990100001100' FULL_KEY: 'fec86ba6eb707ed08905757b1bb44b8f' OPC: 'C42449363BBAD02B66D16BC975D77CC1' @@ -272,7 +272,7 @@ services: - oai-gnb networks: public_net: - ipv4_address: 192.168.71.137 + ipv4_address: 192.168.71.150 healthcheck: test: /bin/bash -c "pgrep nr-uesoftmodem" interval: 10s diff --git a/docker/scripts/generateTemplate.py b/docker/scripts/generateTemplate.py index 3d037294e6..297c202a03 100644 --- a/docker/scripts/generateTemplate.py +++ b/docker/scripts/generateTemplate.py @@ -55,6 +55,7 @@ def main(): "rcc.band40.tm1.25PRB": f'{data[0]["paths"]["dest_dir"]}/{outputfilename}', "gnb.band78.tm1.fr1.106PRB.usrpb210.conf": f'{data[0]["paths"]["dest_dir"]}/{outputfilename}', "gnb.band78.sa.fr1.106PRB.usrpn310.conf": f'{data[0]["paths"]["dest_dir"]}/{outputfilename}', + "gnb.sa.band66.fr1.106PRB.usrpn300.conf": f'{data[0]["paths"]["dest_dir"]}/{outputfilename}', "gNB_SA_CU.conf": f'{data[0]["paths"]["dest_dir"]}/{outputfilename}', "gNB_SA_DU.conf": f'{data[0]["paths"]["dest_dir"]}/{outputfilename}', "ue.nfapi": f'{data[0]["paths"]["dest_dir"]}/{outputfilename}', From 11d80b93a9bde17e27637f5bc6903f520a249ea0 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 10 Feb 2022 15:55:26 +0100 Subject: [PATCH 64/67] Increase LTE 2x2 ping test threshold to 40ms --- ci-scripts/xml_files/lte_2x2_tm1_quectel.xml | 2 +- ci-scripts/xml_files/lte_2x2_tm2_quectel.xml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/ci-scripts/xml_files/lte_2x2_tm1_quectel.xml b/ci-scripts/xml_files/lte_2x2_tm1_quectel.xml index 6cb7b2883b..11c4abce1b 100644 --- a/ci-scripts/xml_files/lte_2x2_tm1_quectel.xml +++ b/ci-scripts/xml_files/lte_2x2_tm1_quectel.xml @@ -96,7 +96,7 @@ nrmodule2_quectel -c 100 -s 1024 -i 0,2 1 - 30 + 40 diff --git a/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml b/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml index fcc772b8f4..6b5698698a 100644 --- a/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml +++ b/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml @@ -96,7 +96,7 @@ nrmodule2_quectel -c 100 -s 1024 -i 0,2 1 - 30 + 40 From c645c12db4fcf8144a52f1f7b608d7f6c3b0d369 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 20 Jan 2022 18:56:44 +0100 Subject: [PATCH 65/67] using uid also in SA --- openair2/RRC/NR/L2_nr_interface.c | 18 +++++++++--------- openair2/RRC/NR/MESSAGES/asn1_msg.c | 15 ++++++--------- openair2/RRC/NR/MESSAGES/asn1_msg.h | 14 ++++++-------- openair2/RRC/NR/rrc_gNB_reconfig.c | 2 -- 4 files changed, 21 insertions(+), 28 deletions(-) diff --git a/openair2/RRC/NR/L2_nr_interface.c b/openair2/RRC/NR/L2_nr_interface.c index cf7dcf1b64..4f54b9978d 100644 --- a/openair2/RRC/NR/L2_nr_interface.c +++ b/openair2/RRC/NR/L2_nr_interface.c @@ -325,7 +325,15 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP, NR_ServingCellConfigCommon_t *scc=RC.nrrrc[module_idP]->carrier.servingcellconfigcommon; memset(&cellGroupConfig,0,sizeof(cellGroupConfig)); - fill_initial_cellGroupConfig(rntiP,-1,&cellGroupConfig,scc,&RC.nrrrc[module_idP]->carrier); + struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(RC.nrrrc[module_idP]); + ue_context_p->ue_id_rnti = rntiP; + ue_context_p->ue_context.rnti = rntiP; + ue_context_p->ue_context.random_ue_identity = rntiP; + ue_context_p->ue_context.Srb0.Active = 1; + RB_INSERT(rrc_nr_ue_tree_s, &RC.nrrrc[module_idP]->rrc_ue_head, ue_context_p); + + fill_initial_cellGroupConfig(ue_context_p->local_uid,&cellGroupConfig,scc,&RC.nrrrc[module_idP]->carrier); + MessageDef* tmp=itti_alloc_new_message_sized(TASK_RRC_GNB, 0, F1AP_INITIAL_UL_RRC_MESSAGE, sizeof(f1ap_initial_ul_rrc_message_t) + sdu_lenP); f1ap_initial_ul_rrc_message_t *msg = &F1AP_INITIAL_UL_RRC_MESSAGE(tmp); @@ -346,14 +354,6 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP, memcpy(msg->rrc_container, sduP, sdu_lenP); msg->rrc_container_length=sdu_lenP; itti_send_msg_to_task(TASK_DU_F1, 0, tmp); - - struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(RC.nrrrc[module_idP]); - ue_context_p->ue_id_rnti = rntiP; - ue_context_p->ue_context.rnti = rntiP; - ue_context_p->ue_context.random_ue_identity = rntiP; - ue_context_p->ue_context.Srb0.Active = 1; - RB_INSERT(rrc_nr_ue_tree_s, &RC.nrrrc[module_idP]->rrc_ue_head, ue_context_p); - return(0); } diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index bbc05da506..fcf156a76e 100755 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -1002,8 +1002,7 @@ long rrc_get_max_nr_csrs(uint8_t max_rbs, long b_SRS) { return c_srs; } -void fill_initial_SpCellConfig(rnti_t rnti, - int uid, +void fill_initial_SpCellConfig(int uid, NR_SpCellConfig_t *SpCellConfig, NR_ServingCellConfigCommon_t *scc, rrc_gNB_carrier_data_t *carrier) { @@ -1042,9 +1041,8 @@ void fill_initial_SpCellConfig(rnti_t rnti, // one symbol (13) NR_PUCCH_Resource_t *pucchres0=calloc(1,sizeof(*pucchres0)); pucchres0->pucch_ResourceId=0; - //pucchres0->startingPRB=0; - pucchres0->startingPRB=(8+rnti) % curr_bwp; - LOG_D(NR_RRC, "pucchres0->startPRB %ld rnti %d curr_bwp %d\n", pucchres0->startingPRB, rnti, curr_bwp); + pucchres0->startingPRB=(8+uid) % curr_bwp; + LOG_D(NR_RRC, "pucchres0->startPRB %ld uid %d curr_bwp %d\n", pucchres0->startingPRB, uid, curr_bwp); pucchres0->intraSlotFrequencyHopping=NULL; pucchres0->secondHopPRB=NULL; pucchres0->format.present= NR_PUCCH_Resource__format_PR_format0; @@ -1448,8 +1446,7 @@ void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGr ASN_SEQUENCE_ADD(&ue_context_mastercellGroup->rlc_BearerToAddModList->list, rlc_BearerConfig_drb); } -void fill_initial_cellGroupConfig(rnti_t rnti, - int uid, +void fill_initial_cellGroupConfig(int uid, NR_CellGroupConfig_t *cellGroupConfig, NR_ServingCellConfigCommon_t *scc, rrc_gNB_carrier_data_t *carrier) { @@ -1543,7 +1540,7 @@ void fill_initial_cellGroupConfig(rnti_t rnti, cellGroupConfig->spCellConfig = calloc(1,sizeof(*cellGroupConfig->spCellConfig)); - fill_initial_SpCellConfig(rnti,uid,cellGroupConfig->spCellConfig,scc,carrier); + fill_initial_SpCellConfig(uid,cellGroupConfig->spCellConfig,scc,carrier); cellGroupConfig->sCellToAddModList = NULL; cellGroupConfig->sCellToReleaseList = NULL; @@ -1622,7 +1619,7 @@ uint8_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP, } else { cellGroupConfig = calloc(1, sizeof(NR_CellGroupConfig_t)); - fill_initial_cellGroupConfig(ue_context_pP->ue_context.rnti,ue_context_pP->local_uid,cellGroupConfig,scc,carrier); + fill_initial_cellGroupConfig(ue_context_pP->local_uid,cellGroupConfig,scc,carrier); enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig, NULL, diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.h b/openair2/RRC/NR/MESSAGES/asn1_msg.h index ca92652c6c..cb971acd60 100644 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.h +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.h @@ -100,16 +100,14 @@ void do_SpCellConfig(gNB_RRC_INST *rrc, uint8_t do_RRCReject(uint8_t Mod_id, uint8_t *const buffer); -void fill_initial_SpCellConfig(rnti_t rnti, - int uid, - NR_SpCellConfig_t *SpCellConfig, - NR_ServingCellConfigCommon_t *scc, +void fill_initial_SpCellConfig(int uid, + NR_SpCellConfig_t *SpCellConfig, + NR_ServingCellConfigCommon_t *scc, rrc_gNB_carrier_data_t *carrier); -void fill_initial_cellGroupConfig(rnti_t rnti, - int uid, - NR_CellGroupConfig_t *cellGroupConfig, - NR_ServingCellConfigCommon_t *scc, +void fill_initial_cellGroupConfig(int uid, + NR_CellGroupConfig_t *cellGroupConfig, + NR_ServingCellConfigCommon_t *scc, rrc_gNB_carrier_data_t *carrier); void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *ue_context_mastercellGroup); diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index db4dc2d579..3a28409aea 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -914,9 +914,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco pucch_Config->resourceToAddModList = calloc(1,sizeof(*pucch_Config->resourceToAddModList)); pucch_Config->resourceToReleaseList = NULL; NR_PUCCH_Resource_t *pucchres0=calloc(1,sizeof(*pucchres0)); - NR_PUCCH_Resource_t *pucchres1=calloc(1,sizeof(*pucchres1)); NR_PUCCH_Resource_t *pucchres2=calloc(1,sizeof(*pucchres2)); - NR_PUCCH_Resource_t *pucchres3=calloc(1,sizeof(*pucchres3)); pucchres0->pucch_ResourceId=1; pucchres0->startingPRB= (8 + uid) % curr_bwp; From 63989e8a694485b3e1ccb0d0763d754a57c13103 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 17 Feb 2022 19:53:33 +0100 Subject: [PATCH 66/67] Fix for F1 RFsim fail We compute the preferred DL TDAs when receiving the cellGroup from the RRC. However, in F1 and the RFsim, it seems that the scheduler tries to access the preferred DL TDAs before they have been set after receiving the cellGroup. In this commit, add a simple check to verify the preferred TDA has been set up. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 0d857a0ba9..cd34a543c7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -895,7 +895,10 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t /* This is temporary and it assumes all UEs have the same BWP and TDA*/ int UE_id = UE_info->list.head; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; + const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0; + if (!RC.nrmac[module_id]->preferred_dl_tda[bwp_id]) + return; + const int tda = RC.nrmac[module_id]->preferred_dl_tda[bwp_id][slot]; int startSymbolIndex, nrOfSymbols; const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList : From 9b302d04322d18233e9ff7874846803ca2589609 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 18 Feb 2022 12:20:06 +0100 Subject: [PATCH 67/67] Fix DU default config, increase 5G F1 RFsim throughput requirements --- ci-scripts/conf_files/gNB_SA_DU.conf | 2 +- ci-scripts/xml_files/container_5g_f1_rfsim.xml | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/ci-scripts/conf_files/gNB_SA_DU.conf b/ci-scripts/conf_files/gNB_SA_DU.conf index adcbcd45d0..64f2dd5d0e 100644 --- a/ci-scripts/conf_files/gNB_SA_DU.conf +++ b/ci-scripts/conf_files/gNB_SA_DU.conf @@ -280,7 +280,7 @@ serveraddr = "server"; phy_log_verbosity ="medium"; mac_log_level ="info"; mac_log_verbosity ="high"; - rlc_log_level ="debug"; + rlc_log_level ="info"; rlc_log_verbosity ="medium"; pdcp_log_level ="info"; pdcp_log_verbosity ="medium"; diff --git a/ci-scripts/xml_files/container_5g_f1_rfsim.xml b/ci-scripts/xml_files/container_5g_f1_rfsim.xml index 501f2fe46f..fc24a3d67c 100644 --- a/ci-scripts/xml_files/container_5g_f1_rfsim.xml +++ b/ci-scripts/xml_files/container_5g_f1_rfsim.xml @@ -100,7 +100,7 @@ rfsim5g-oai-nr-ue rfsim5g-oai-ext-dn -B 12.1.1.2 -u -i 1 -s - -c 12.1.1.2 -u -i 1 -t 30 -b 200K + -c 12.1.1.2 -u -i 1 -t 30 -b 3M @@ -109,7 +109,7 @@ rfsim5g-oai-ext-dn rfsim5g-oai-nr-ue -u -i 1 -s - -B 12.1.1.2 -c 192.168.72.135 -u -i 1 -t 30 -b 5K + -B 12.1.1.2 -c 192.168.72.135 -u -i 1 -t 30 -b 1M