Merge remote-tracking branch 'eurecom/develop' into episys/mel/merge_develop_cfra_working
This commit is contained in:
@@ -85,6 +85,7 @@
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#include "T.h"
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#include "nfapi/oai_integration/vendor_ext.h"
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#include "executables/softmodem-common.h"
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#include <nfapi/oai_integration/nfapi_pnf.h>
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#include <openair1/PHY/NR_TRANSPORT/nr_ulsch.h>
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#include <PHY/NR_ESTIMATION/nr_ul_estimation.h>
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@@ -559,6 +560,7 @@ void init_gNB(int single_thread_flag,int wait_for_sync) {
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gNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = gNB->cqi_raw_pdu_list;*/
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gNB->prach_energy_counter = 0;
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gNB->prb_interpolation = get_softmodem_params()->prb_interpolation;
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}
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@@ -64,6 +64,7 @@
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#define CONFIG_HLP_NOSNGLT "Disables single-thread mode in lte-softmodem\n"
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#define CONFIG_HLP_TADV "Set timing_advance\n"
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#define CONFIG_HLP_DLF "Set the downlink frequency for all component carriers\n"
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#define CONFIG_HLP_ULOFF "Set the uplink frequnecy offset for all component carriers\n"
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#define CONFIG_HLP_CHOFF "Channel id offset\n"
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#define CONFIG_HLP_SOFTS "Enable soft scope and L1 and L2 stats (Xforms)\n"
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#define CONFIG_HLP_EXMCAL "Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n"
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@@ -71,13 +72,14 @@
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#define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
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#define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n"
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#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
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#define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n"
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#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
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#define CONFIG_HLP_ULMCS_PHYTEST "Set the uplink MCS for PHYTEST mode\n"
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#define CONFIG_HLP_DLBW_PHYTEST "Set the number of PRBs used for DLSCH in PHYTEST mode\n"
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#define CONFIG_HLP_ULBW_PHYTEST "Set the number of PRBs used for ULSCH in PHYTEST mode\n"
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#define CONFIG_HLP_PRB_SA "Set the number of PRBs for SA\n"
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#define CONFIG_HLP_DLBM_PHYTEST "Bitmap for DLSCH slots (slot 0 starts at LSB)\n"
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#define CONFIG_HLP_ULBM_PHYTEST "Bitmap for ULSCH slots (slot 0 starts at LSB)\n"
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#define CONFIG_HLP_SSC "Set the start subcarrier \n"
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#define CONFIG_HLP_TDD "Set hardware to TDD mode (default: FDD). Used only with -U (otherwise set in config file).\n"
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#define CONFIG_HLP_UE "Set the lte softmodem as a UE\n"
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#define CONFIG_HLP_L2MONW "Enable L2 wireshark messages on localhost \n"
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@@ -119,7 +121,7 @@
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{"g" , CONFIG_HLP_LOGL, 0, uptr:&glog_level, defintval:0, TYPE_UINT, 0}, \
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{"G" , CONFIG_HLP_LOGV, 0, uptr:&glog_verbosity, defintval:0, TYPE_UINT16, 0}, \
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{"telnetsrv", CONFIG_HLP_TELN, PARAMFLAG_BOOL, uptr:&start_telnetsrv, defintval:0, TYPE_UINT, 0}, \
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{"msc", CONFIG_HLP_MSC, PARAMFLAG_BOOL, uptr:&START_MSC, defintval:0, TYPE_UINT, 0}, \
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{"msc", CONFIG_HLP_MSC, PARAMFLAG_BOOL, uptr:&START_MSC, defintval:0, TYPE_UINT, 0}, \
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}
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#define CMDLINE_ONLINELOG_IDX 0
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@@ -826,7 +826,8 @@ if(!IS_SOFTMODEM_NOS1)
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}
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printf("About to call end_configmodule() from %s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
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end_configmodule();
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// We have to set PARAMFLAG_NOFREE on right paramters before re-enabling end_configmodule()
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//end_configmodule();
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printf("Called end_configmodule() from %s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
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// wait for end of program
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printf("TYPE <CTRL-C> TO TERMINATE\n");
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+12
-9
@@ -482,7 +482,7 @@ static void UE_synch(void *arg) {
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uint64_t dl_carrier, ul_carrier;
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nr_get_carrier_frequencies(&UE->frame_parms, &dl_carrier, &ul_carrier);
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if (nr_initial_sync(&syncD->proc, UE, 2) == 0) {
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if (nr_initial_sync(&syncD->proc, UE, 2, get_softmodem_params()->sa, get_nrUE_params()->nr_dlsch_parallel) == 0) {
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freq_offset = UE->common_vars.freq_offset; // frequency offset computed with pss in initial sync
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hw_slot_offset = ((UE->rx_offset<<1) / UE->frame_parms.samples_per_subframe * UE->frame_parms.slots_per_subframe) +
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round((float)((UE->rx_offset<<1) % UE->frame_parms.samples_per_subframe)/UE->frame_parms.samples_per_slot0);
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@@ -977,15 +977,18 @@ void *UE_thread(void *arg) {
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if (openair0_cfg[0].duplex_mode == duplex_mode_TDD) {
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uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots;
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uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots;
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int nrofUplinkSlots, nrofUplinkSymbols;
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if (mac->scc) {
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nrofUplinkSlots = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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nrofUplinkSymbols = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
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}
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else {
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nrofUplinkSlots = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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nrofUplinkSymbols = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
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}
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uint8_t num_UL_slots = nrofUplinkSlots + (nrofUplinkSymbols != 0);
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int nrofUplinkSlots = 0;
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if (mac->scc_SIB)
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nrofUplinkSlots = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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else if (mac->scc)
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nrofUplinkSlots = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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uint8_t num_UL_slots = nrofUplinkSlots + (nrofUplinkSlots != 0);
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uint8_t first_tx_slot = tdd_period - num_UL_slots;
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if (slot_tx_usrp % tdd_period == first_tx_slot)
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@@ -33,6 +33,7 @@
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//#include "common/utils/threadPool/thread-pool.h"
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#include "common/utils/load_module_shlib.h"
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//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
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#include "common/utils/nr/nr_common.h"
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#include "../../ARCH/COMMON/common_lib.h"
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#include "../../ARCH/ETHERNET/USERSPACE/LIB/if_defs.h"
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@@ -262,6 +263,7 @@ void init_tpools(uint8_t nun_dlsch_threads) {
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}
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static void get_options(void) {
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nrUE_params.ofdm_offset_divisor = 8;
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paramdef_t cmdline_params[] =CMDLINE_NRUEPARAMS_DESC ;
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int numparams = sizeof(cmdline_params)/sizeof(paramdef_t);
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config_process_cmdline( cmdline_params,numparams,NULL);
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@@ -288,7 +290,7 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){
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UE->mode = normal_txrx;
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config_process_cmdline( cmdline_params,numparams,NULL);
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config_get(cmdline_params,numparams,NULL);
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int pindex = config_paramidx_fromname(cmdline_params,numparams, CALIBRX_OPT);
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if ( (cmdline_params[pindex].paramflags & PARAMFLAG_PARAMSET) != 0) UE->mode = rx_calib_ue;
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@@ -327,24 +329,20 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){
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UE->rf_map.card = card_offset;
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UE->rf_map.chain = CC_id + chain_offset;
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LOG_I(PHY,"Set UE mode %d, UE_fo_compensation %d, UE_scan_carrier %d, UE_no_timing_correction %d \n",
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UE->mode, UE->UE_fo_compensation, UE->UE_scan_carrier, UE->no_timing_correction);
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LOG_I(PHY,"Set UE mode %d, UE_fo_compensation %d, UE_scan_carrier %d, UE_no_timing_correction %d \n, do_prb_interpolation %d\n",
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UE->mode, UE->UE_fo_compensation, UE->UE_scan_carrier, UE->no_timing_correction, UE->prb_interpolation);
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// Set FP variables
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if (tddflag){
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fp->frame_type = TDD;
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LOG_I(PHY, "Set UE frame_type %d\n", fp->frame_type);
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}
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fp->N_RB_DL = N_RB_DL;
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LOG_I(PHY, "Set UE N_RB_DL %d\n", N_RB_DL);
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LOG_I(PHY, "Set UE nb_rx_antenna %d, nb_tx_antenna %d, threequarter_fs %d\n", fp->nb_antennas_rx, fp->nb_antennas_tx, fp->threequarter_fs);
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fp->ofdm_offset_divisor = nrUE_params.ofdm_offset_divisor;
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}
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void init_openair0(void) {
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@@ -8,7 +8,8 @@
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#define CONFIG_HLP_DLSCH_PARA "number of threads for dlsch processing 0 for no parallelization"
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#define CONFIG_HLP_DLSCH_PARA "number of threads for dlsch processing 0 for no parallelization\n"
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#define CONFIG_HLP_OFFSET_DIV "Divisor for computing OFDM symbol offset in Rx chain (num samples in CP/<the value>). Default value is 8. To set the sample offset to 0, set this value ~ 10e6\n"
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/***************************************************************************************************************************************/
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/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
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when calling config_get or config_getlist functions */
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@@ -29,6 +30,7 @@
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{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \
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{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
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{"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, iptr:(int32_t *)&nrUE_params.nr_dlsch_parallel, defintval:0, TYPE_UINT8, 0}, \
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{"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, uptr:(uint32_t *)&nrUE_params.ofdm_offset_divisor, defuintval:UINT_MAX, TYPE_UINT32, 0}, \
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{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
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{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \
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{"rrc_config_path", CONFIG_HLP_RRC_CFG_PATH,0, strptr:(char **)&rrc_config_path, defstrval:"./", TYPE_STRING, 0}, \
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@@ -41,31 +43,34 @@
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/* optname helpstr paramflags XXXptr defXXXval type numelt */
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/*------------------------------------------------------------------------------------------------------------------------------------------*/
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#define CMDLINE_NRUE_PHYPARAMS_DESC { \
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{ CALIBRX_OPT, CONFIG_HLP_CALUER, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
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{ CALIBRXMED_OPT, CONFIG_HLP_CALUERM, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
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{ CALIBRXBYP_OPT, CONFIG_HLP_CALUERB, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
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{ DBGPRACH_OPT, CONFIG_HLP_DBGUEPR, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
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{ NOL2CONNECT_OPT, CONFIG_HLP_NOL2CN, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
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{CALIBPRACH_OPT, CONFIG_HLP_CALPRACH, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
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{ DUMPFRAME_OPT, CONFIG_HLP_DUMPFRAME, PARAMFLAG_BOOL, iptr:&dumpframe, defintval:0, TYPE_INT, 0}, \
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{"ue-rxgain", CONFIG_HLP_UERXG, 0, dblptr:&(rx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
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{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, dblptr:&rx_gain_off, defdblval:0, TYPE_DOUBLE, 0}, \
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{"ue-txgain", CONFIG_HLP_UETXG, 0, dblptr:&(tx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
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{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&(fp->nb_antennas_rx), defuintval:1, TYPE_UINT8, 0}, \
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{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&(fp->nb_antennas_tx), defuintval:1, TYPE_UINT8, 0}, \
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{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&(UE->UE_scan_carrier), defintval:0, TYPE_INT, 0}, \
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{"ue-fo-compensation", CONFIG_HLP_UEFO, PARAMFLAG_BOOL, iptr:&(UE->UE_fo_compensation), defintval:0, TYPE_INT, 0}, \
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{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
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{"r" , CONFIG_HLP_PRB, 0, uptr:&(N_RB_DL), defuintval:160, TYPE_UINT, 0}, \
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{"A" , CONFIG_HLP_TADV, 0, iptr:&(UE->timing_advance), defintval:0, TYPE_INT, 0}, \
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{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, u8ptr:&(fp->threequarter_fs), defintval:0, TYPE_UINT8, 0}, \
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{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
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{"ue-timing-correction-disable", CONFIG_HLP_DISABLETIMECORR, PARAMFLAG_BOOL, iptr:&(UE->no_timing_correction), defintval:0, TYPE_INT, 0}, \
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{ CALIBRX_OPT, CONFIG_HLP_CALUER, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
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{ CALIBRXMED_OPT, CONFIG_HLP_CALUERM, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
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{ CALIBRXBYP_OPT, CONFIG_HLP_CALUERB, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
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{ DBGPRACH_OPT, CONFIG_HLP_DBGUEPR, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
|
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{ NOL2CONNECT_OPT, CONFIG_HLP_NOL2CN, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
|
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{ CALIBPRACH_OPT, CONFIG_HLP_CALPRACH, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
|
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{ DUMPFRAME_OPT, CONFIG_HLP_DUMPFRAME, PARAMFLAG_BOOL, iptr:&dumpframe, defintval:0, TYPE_INT, 0}, \
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{"ue-rxgain", CONFIG_HLP_UERXG, 0, dblptr:&(rx_gain[0][0]), defdblval:0, TYPE_DOUBLE,0}, \
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{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, dblptr:&rx_gain_off, defdblval:0, TYPE_DOUBLE,0}, \
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{"ue-txgain", CONFIG_HLP_UETXG, 0, dblptr:&(tx_gain[0][0]), defdblval:0, TYPE_DOUBLE,0}, \
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{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&(fp->nb_antennas_rx), defuintval:1, TYPE_UINT8, 0}, \
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{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&(fp->nb_antennas_tx), defuintval:1, TYPE_UINT8, 0}, \
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{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&(UE->UE_scan_carrier), defintval:0, TYPE_INT, 0}, \
|
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{"ue-fo-compensation", CONFIG_HLP_UEFO, PARAMFLAG_BOOL, iptr:&(UE->UE_fo_compensation), defintval:0, TYPE_INT, 0}, \
|
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{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
|
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{"A" , CONFIG_HLP_TADV, 0, iptr:&(UE->timing_advance), defintval:0, TYPE_INT, 0}, \
|
||||
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, u8ptr:&(fp->threequarter_fs), defintval:0, TYPE_UINT8, 0}, \
|
||||
{"r" , CONFIG_HLP_PRB_SA, 0, iptr:&(fp->N_RB_DL), defintval:106, TYPE_UINT, 0}, \
|
||||
{"s" , CONFIG_HLP_SSC, 0, u16ptr:&(fp->ssb_start_subcarrier), defintval:516, TYPE_UINT16,0}, \
|
||||
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
|
||||
{"do-prb-interpolation", CONFIG_HLP_PRBINTER, PARAMFLAG_BOOL, iptr:&(UE->prb_interpolation), defintval:0, TYPE_INT, 0}, \
|
||||
{"ue-timing-correction-disable", CONFIG_HLP_DISABLETIMECORR, PARAMFLAG_BOOL, iptr:&(UE->no_timing_correction), defintval:0, TYPE_INT, 0}, \
|
||||
}
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint64_t optmask; //mask to store boolean config options
|
||||
uint32_t ofdm_offset_divisor; // Divisor for sample offset computation for each OFDM symbol
|
||||
uint8_t nr_dlsch_parallel; // number of threads for dlsch decoding, 0 means no parallelization
|
||||
tpool_t Tpool; // thread pool
|
||||
} nrUE_params_t;
|
||||
|
||||
@@ -72,6 +72,7 @@ extern "C"
|
||||
#define CONFIG_HLP_DLMCS "Set the maximum downlink MCS\n"
|
||||
#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
|
||||
#define CONFIG_HLP_256QAM "Use the 256 QAM mcs table for PDSCH\n"
|
||||
#define CONFIG_HLP_PRBINTER "Do PRB based averaging of channel estimates. Frequency domain linear interpolation by default\n"
|
||||
|
||||
#define CONFIG_HLP_NONSTOP "Go back to frame sync mode after 100 consecutive PBCH failures\n"
|
||||
//#define CONFIG_HLP_NUMUES "Set the number of UEs for the emulation"
|
||||
@@ -119,6 +120,7 @@ extern "C"
|
||||
#define SEND_DMRSSYNC softmodem_params.send_dmrs_sync
|
||||
#define USIM_TEST softmodem_params.usim_test
|
||||
#define USE_256QAM_TABLE softmodem_params.use_256qam_table
|
||||
#define PRB_INTERPOLATION softmodem_params.prb_interpolation
|
||||
#define NFAPI softmodem_params.nfapi
|
||||
#define NSA softmodem_params.nsa
|
||||
#define NODE_NUMBER softmodem_params.node_number
|
||||
@@ -139,8 +141,8 @@ extern int usrp_tx_thread;
|
||||
{"time-source", CONFIG_HLP_TME, 0, uptr:&TIMING_SOURCE, defintval:0, TYPE_UINT, 0}, \
|
||||
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&WAIT_FOR_SYNC, defintval:0, TYPE_INT, 0}, \
|
||||
{"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&SINGLE_THREAD_FLAG, defintval:0, TYPE_INT, 0}, \
|
||||
{"C" , CONFIG_HLP_DLF, 0, u64ptr:&(downlink_frequency[0][0]), defuintval:3619200000, TYPE_UINT64, 0}, \
|
||||
{"CO" , CONFIG_HLP_ULF, 0, iptr:&(uplink_frequency_offset[0][0]), defintval:0, TYPE_INT, 0}, \
|
||||
{"C" , CONFIG_HLP_DLF, 0, u64ptr:&(downlink_frequency[0][0]), defuintval:0, TYPE_UINT64, 0}, \
|
||||
{"CO" , CONFIG_HLP_ULF, 0, iptr:&(uplink_frequency_offset[0][0]), defintval:0, TYPE_INT, 0}, \
|
||||
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&CHAIN_OFFSET, defintval:0, TYPE_INT, 0}, \
|
||||
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
|
||||
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
|
||||
@@ -158,8 +160,9 @@ extern int usrp_tx_thread;
|
||||
{"nsa", CONFIG_HLP_NSA, PARAMFLAG_BOOL, iptr:&NSA, defintval:0, TYPE_INT, 0}, \
|
||||
{"node-number", NULL, 0, u16ptr:&NODE_NUMBER, defuintval:0, TYPE_UINT16, 0}, \
|
||||
{"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr:&usrp_tx_thread, defstrval:0, TYPE_INT, 0}, \
|
||||
{"do-prb-interpolation", CONFIG_HLP_PRBINTER, PARAMFLAG_BOOL, iptr:&PRB_INTERPOLATION, defintval:0, TYPE_INT, 0}, \
|
||||
{"nfapi", CONFIG_HLP_NFAPI, 0, u8ptr:&nfapi_mode, defintval:0, TYPE_UINT8, 0}, \
|
||||
{"non-stop", CONFIG_HLP_NONSTOP, PARAMFLAG_BOOL, iptr:&NON_STOP, defintval:0, TYPE_INT, 0}, \
|
||||
{"non-stop", CONFIG_HLP_NONSTOP, PARAMFLAG_BOOL, iptr:&NON_STOP, defintval:0, TYPE_INT, 0}, \
|
||||
}
|
||||
|
||||
#define CONFIG_HLP_NSA "Enable NSA mode \n"
|
||||
@@ -250,6 +253,7 @@ typedef struct {
|
||||
int hw_timing_advance;
|
||||
uint32_t send_dmrs_sync;
|
||||
int use_256qam_table;
|
||||
int prb_interpolation;
|
||||
uint8_t nfapi;
|
||||
int nsa;
|
||||
uint16_t node_number;
|
||||
|
||||
Reference in New Issue
Block a user