From 6b3ddcc79923a056fd2e468ec9a0795a94aadbf5 Mon Sep 17 00:00:00 2001 From: Sakthivel Velumani Date: Thu, 24 Sep 2020 15:36:18 +0200 Subject: [PATCH] fixed cce indexing to allow multiple pdcch on single coreset --- openair1/PHY/NR_TRANSPORT/nr_dci.c | 46 +++++++++++-------- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 3 ++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 14 +++--- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 15 ++++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 37 +++++++++------ .../NR_MAC_gNB/gNB_scheduler_primitives.c | 40 ++++++++++++---- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 5 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 6 +++ 8 files changed, 109 insertions(+), 57 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 2d79aa8fbd..225ffd29ac 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -64,37 +64,23 @@ void nr_pdcch_scrambling(uint32_t *in, } } - - -uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB, - nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, - nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu, - uint32_t **gold_pdcch_dmrs, - int32_t *txdataF, - int16_t amp, - NR_DL_FRAME_PARMS frame_parms) { +uint8_t nr_generate_dci(PHY_VARS_gNB *gNB, + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, + uint32_t **gold_pdcch_dmrs, + int32_t *txdataF, + int16_t amp, + NR_DL_FRAME_PARMS frame_parms) { int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration uint16_t cset_start_sc; uint8_t cset_start_symb, cset_nsymb; int k,l,k_prime,dci_idx, dmrs_idx; - /*First iteration: single DCI*/ - - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15=NULL; - // find coreset descriptor int rb_offset; int n_rb; - AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n"); - AssertFatal(pdcch_pdu==NULL || ul_dci_pdu==NULL,"Can't handle both DL and UL DCI in same slot\n"); - - - if (pdcch_pdu) pdcch_pdu_rel15 = &pdcch_pdu->pdcch_pdu_rel15; - else if (ul_dci_pdu) pdcch_pdu_rel15 = &ul_dci_pdu->pdcch_pdu_rel15; - nr_fill_cce_list(gNB,0,pdcch_pdu_rel15); get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset); @@ -244,3 +230,23 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB, return 0; } +uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB, + nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, + nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu, + uint32_t **gold_pdcch_dmrs, + int32_t *txdataF, + int16_t amp, + NR_DL_FRAME_PARMS frame_parms) { + + AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n"); + + if (pdcch_pdu && ul_dci_pdu) + return (nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms) || + nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms)); + else if (pdcch_pdu) + return nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); + else if (ul_dci_pdu) + return nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); + +} + diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 58de000ac5..bef24fd173 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -440,6 +440,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0 memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1 + for (int i=0; iUE_info.num_pdcch_cand[UE_id][i] = 0; for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { //mbsfn_status[CC_id] = 0; @@ -469,6 +471,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // This schedule RA procedure if not in phy_test mode // Otherwise already consider 5G already connected + RC.nrmac[module_idP]->current_slot=slot; if (get_softmodem_params()->phy_test == 0) { nr_schedule_RA(module_idP, frame, slot); nr_schedule_reception_msg3(module_idP, 0, frame, slot); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 413727b9cb..0fa76370f6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -674,13 +674,13 @@ void nr_generate_Msg2(module_id_t module_idP, uint8_t nr_of_candidates, aggregation_level; find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 0 /* common */); - int CCEIndex = allocate_nr_CCEs( - nr_mac, - bwp, - coreset, - aggregation_level, - 0, /* n_RNTI 0: common search space */ - 0); // m + int CCEIndex = allocate_nr_CCEs(nr_mac, + bwp, + coreset, + aggregation_level, + 0, // Y + 0, // m + nr_of_candidates); if (CCEIndex < 0) { LOG_E(MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index ed142a42c8..4c6558d4f6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -488,16 +488,21 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, sched_ctrl->search_space); sched_ctrl->coreset = get_coreset( sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */); + int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = UE_info->Y[UE_id][cid][slot]; + const int m = UE_info->num_pdcch_cand[UE_id][cid]; sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - sched_ctrl->active_bwp, - sched_ctrl->coreset, - sched_ctrl->aggregation_level, - UE_info->rnti[UE_id], - 0); // m + sched_ctrl->active_bwp, + sched_ctrl->coreset, + sched_ctrl->aggregation_level, + Y, + m, + nr_of_candidates); if (sched_ctrl->cce_index < 0) { LOG_E(MAC, "%s(): could not find CCE for UE %d\n", __func__, UE_id); return; } + UE_info->num_pdcch_cand[UE_id][cid]++; /* Find PUCCH occasion */ nr_update_pucch_scheduling( diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 5f9d5d8a10..812b9f317c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -417,18 +417,23 @@ int configure_fapi_dl_pdu_phytest(int Mod_idP, uint8_t nr_of_candidates, aggregation_level; find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */); - int CCEIndex = allocate_nr_CCEs( - nr_mac, - bwp, - coreset, - aggregation_level, - UE_info->rnti[UE_id], - 0); // m + const int cid = coreset->controlResourceSetId; + const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot]; + const int m = UE_info->num_pdcch_cand[UE_id][cid]; + int CCEIndex = allocate_nr_CCEs(nr_mac, + bwp, + coreset, + aggregation_level, + Y, + m, + nr_of_candidates); if (CCEIndex < 0) { LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PDSCH\n", __func__); free(dci_pdu_rel15); return 0; } + UE_info->num_pdcch_cand[UE_id][cid]++; + nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, UE_info->rnti[UE_id], @@ -1126,19 +1131,23 @@ void schedule_fapi_ul_pdu(int Mod_idP, uint8_t nr_of_candidates, aggregation_level; find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */); - int CCEIndex = allocate_nr_CCEs( - nr_mac, - bwp, - coreset, - aggregation_level, - UE_info->rnti[UE_id], - 0); // m + const int cid = coreset->controlResourceSetId; + const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot]; + const int m = UE_info->num_pdcch_cand[UE_id][cid]; + int CCEIndex = allocate_nr_CCEs(nr_mac, + bwp, + coreset, + aggregation_level, + Y, + m, + nr_of_candidates); if (CCEIndex < 0) { LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); pusch_sched->active = false; return; } else { + UE_info->num_pdcch_cand[UE_id][cid]++; nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, UE_info->rnti[UE_id], diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index a686215fd5..40a56a5c81 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -172,8 +172,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, NR_BWP_Downlink_t *bwp, NR_ControlResourceSet_t *coreset, int aggregation, - uint16_t n_RNTI, - int m) { + uint16_t Y, + int m, + int nr_of_candidates) { // uncomment these when we allocate for common search space // NR_COMMON_channels_t *cc = nr_mac->common_channels; // NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; @@ -189,15 +190,19 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, n_rb*=6; uint16_t N_reg = n_rb * coreset->duration; - uint16_t n_CI=0; - const uint32_t A[3]={39827,39829,39839}; - /* if n_RNTI is zero, this results in zero, too! */ - uint16_t Y = (A[0]*n_RNTI)%65537; // Candidate 0, antenna port 0 + uint16_t n_CI = 0; - uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE; + const uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE; + const uint16_t M_s_max = nr_of_candidates; - uint16_t M_s_max = (aggregation==4)?4:(aggregation==8)?2:1; - int first_cce = aggregation * (( Y + (m*N_cce)/(aggregation*M_s_max) + n_CI ) % CEILIDIV(N_cce,aggregation)); + AssertFatal(m < nr_of_candidates, + "PDCCH candidate index %d in CORESET %d exceeds the maximum " + "number of PDCCH candidates (%d)\n", + m, + coreset_id, + nr_of_candidates); + + int first_cce = aggregation * (( Y + CEILIDIV((m*N_cce),(aggregation*M_s_max)) + n_CI ) % CEILIDIV(N_cce,aggregation)); for (int i=0;iY[UE_id][0][s] = (A[0]*UE_list->rnti[UE_id]) % D; + UE_list->Y[UE_id][1][s] = (A[1]*UE_list->rnti[UE_id]) % D; + UE_list->Y[UE_id][2][s] = (A[2]*UE_list->rnti[UE_id]) % D; + + for (s=1; s<160; s++) { + UE_list->Y[UE_id][0][s] = (A[0]*UE_list->Y[UE_id][0][s-1]) % D; + UE_list->Y[UE_id][1][s] = (A[1]*UE_list->Y[UE_id][1][s-1]) % D; + UE_list->Y[UE_id][2][s] = (A[2]*UE_list->Y[UE_id][2][s-1]) % D; + } +} + int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info; @@ -1642,6 +1663,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ UE_info->active[UE_id] = true; UE_info->rnti[UE_id] = rntiP; add_nr_ue_list(&UE_info->list, UE_id); + set_Y(UE_info, UE_id); memset((void *) &UE_info->UE_sched_ctrl[UE_id], 0, sizeof(NR_UE_sched_ctrl_t)); diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 726615b6e3..edfb3f1e1d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -314,8 +314,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, NR_BWP_Downlink_t *bwp, NR_ControlResourceSet_t *coreset, int aggregation, - uint16_t n_RNTI, - int m); + uint16_t Y, + int m, + int nr_of_candidates); int get_dlscs(nfapi_nr_config_request_t *cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 0ed64a9621..f8be6afadc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -380,6 +380,10 @@ typedef struct { bool active[MAX_MOBILES_PER_GNB]; rnti_t rnti[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB]; + /// CCE indexing + int Y[MAX_MOBILES_PER_GNB][3][160]; + int m[MAX_MOBILES_PER_GNB]; + int num_pdcch_cand[MAX_MOBILES_PER_GNB][MAX_NUM_CORESET]; } NR_UE_info_t; /*! \brief top level eNB MAC structure */ @@ -442,6 +446,8 @@ typedef struct gNB_MAC_INST_s { time_stats_t schedule_pch; /// CCE lists int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE]; + /// current slot + int current_slot; } gNB_MAC_INST; #endif /*__LAYER2_NR_MAC_GNB_H__ */