Process PUSCH packets
xran K release introduces a new parameter nRxPkt describing the fragmentation of Rx symbols. Co-authored-by: Teodora Vladić <teodora.vladic@openairinterface.org> Signed-off-by: Teodora Vladić <teodora.vladic@openairinterface.org>
This commit is contained in:
co-authored by
Teodora Vladić
parent
ba4239653e
commit
6b665a851e
+56
-18
@@ -44,6 +44,7 @@ int xran_is_prach_slot(uint8_t PortId, uint32_t subframe_id, uint32_t slot_id
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#ifndef USE_POLLING
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#ifndef USE_POLLING
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extern notifiedFIFO_t oran_sync_fifo;
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extern notifiedFIFO_t oran_sync_fifo;
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#define MAX_QUEUE_LENGTH_NO_JUMP 3
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atomic_int xran_queue_length = 0;
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atomic_int xran_queue_length = 0;
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#else
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#else
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volatile oran_sync_info_t oran_sync_info = {0};
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volatile oran_sync_info_t oran_sync_info = {0};
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@@ -135,6 +136,21 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status
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info->f = frame;
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info->f = frame;
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#if defined K_RELEASE
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#if defined K_RELEASE
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info->mu = mu;
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info->mu = mu;
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for (int ru_idx = 0; ru_idx < num_ports; ru_idx++) {
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oran_buf_list_t *bufs = get_xran_buffers(ru_idx);
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struct xran_fh_config *fh_config = get_xran_fh_config(ru_idx);
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for (uint16_t cc_id = 0; cc_id < 1 /* fh_config->nCC */; cc_id++) { // OAI does not support multiple CC yet.
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for(uint32_t ant_id = 0; ant_id < fh_config->neAxc; ant_id++) {
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struct xran_prb_map *pRbMap = (struct xran_prb_map *)bufs->dstcp[ant_id][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
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AssertFatal(pRbMap != NULL, "(%d:%d:%d)pRbMap == NULL. Aborting.\n", cc_id, tti % XRAN_N_FE_BUF_LEN, ant_id);
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for (uint32_t sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
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info->nRxPkt[cc_id][ant_id][sym_id] = pRbMap->sFrontHaulRxPacketCtrl[sym_id].nRxPkt;
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pRbMap->sFrontHaulRxPacketCtrl[sym_id].nRxPkt = 0;
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}
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}
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}
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}
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#endif
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#endif
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LOG_D(HW, "Push %d.%d.%d (slot %d, subframe %d,last_slot %d)\n", frame, info->sl, slot, ru_id, subframe, last_slot);
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LOG_D(HW, "Push %d.%d.%d (slot %d, subframe %d,last_slot %d)\n", frame, info->sl, slot, ru_id, subframe, last_slot);
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atomic_fetch_add(&xran_queue_length, 1);
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atomic_fetch_add(&xran_queue_length, 1);
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@@ -146,6 +162,19 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status
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oran_sync_info.f = frame;
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oran_sync_info.f = frame;
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#if defined K_RELEASE
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#if defined K_RELEASE
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oran_sync_info.mu = mu;
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oran_sync_info.mu = mu;
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oran_buf_list_t *bufs = get_xran_buffers(ru_id);
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struct xran_fh_config *fh_config = get_xran_fh_config(ru_id);
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for (uint16_t cc_id = 0; cc_id < 1 /* fh_config->nCC */; cc_id++) { // OAI does not support multiple CC yet.
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for(uint32_t ant_id = 0; ant_id < fh_config->neAxc; ant_id++) {
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struct xran_prb_map *pRbMap = (struct xran_prb_map *)bufs->dstcp[ant_id][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
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AssertFatal(pRbMap != NULL, "(%d:%d:%d)pRbMap == NULL. Aborting.\n", cc_id, tti % XRAN_N_FE_BUF_LEN, ant_id);
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for (uint32_t sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
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oran_sync_info.nRxPkt[cc_id][ant_id][sym_id] = pRbMap->sFrontHaulRxPacketCtrl[sym_id].nRxPkt;
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pRbMap->sFrontHaulRxPacketCtrl[sym_id].nRxPkt = 0;
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}
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}
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}
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#endif
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#endif
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#endif
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#endif
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} else
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} else
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@@ -178,7 +207,7 @@ static int read_prach_data(ru_info_t *ru, int frame, int slot
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#if defined K_RELEASE
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#if defined K_RELEASE
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, uint8_t mu
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, uint8_t mu
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#endif
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#endif
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)
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)
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{
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{
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/* calculate tti and subframe_id from frame, slot num */
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/* calculate tti and subframe_id from frame, slot num */
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int sym_idx = 0;
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int sym_idx = 0;
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@@ -341,7 +370,6 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
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atomic_fetch_sub(&xran_queue_length, 1);
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atomic_fetch_sub(&xran_queue_length, 1);
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oran_sync_info_t *info = NotifiedFifoData(res);
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oran_sync_info_t *info = NotifiedFifoData(res);
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#define MAX_QUEUE_LENGTH_NO_JUMP 3
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if (xran_queue_length > 0 && xran_queue_length < MAX_QUEUE_LENGTH_NO_JUMP) {
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if (xran_queue_length > 0 && xran_queue_length < MAX_QUEUE_LENGTH_NO_JUMP) {
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LOG_D(HW, "%4d.%2d TTI processing delay detected\n", info->f, info->sl);
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LOG_D(HW, "%4d.%2d TTI processing delay detected\n", info->f, info->sl);
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} else if (xran_queue_length >= MAX_QUEUE_LENGTH_NO_JUMP) {
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} else if (xran_queue_length >= MAX_QUEUE_LENGTH_NO_JUMP) {
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@@ -440,28 +468,38 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
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int start_totalRB = pRbMap->prbMap[0].nRBStart;
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int start_totalRB = pRbMap->prbMap[0].nRBStart;
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int32_t local_dst[num_totalRB * N_SC_PER_PRB] __attribute__((aligned(64)));
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int32_t local_dst[num_totalRB * N_SC_PER_PRB] __attribute__((aligned(64)));
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#if defined K_RELEASE
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struct xran_prb_elm *pRbElm = &pRbMap->prbMap[0];
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struct xran_rx_packet_ctl *p_rx_packet_ctl = &pRbMap->sFrontHaulRxPacketCtrl[sym_idx];
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uint32_t one_rb_size =
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(((pRbElm->iqWidth == 0) || (pRbElm->iqWidth == 16)) ? (N_SC_PER_PRB * 2 * 2) : (3 * pRbElm->iqWidth + 1));
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#ifndef USE_POLLING
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int32_t nRxPkt = info->nRxPkt[cc_id][ant_id][sym_idx];
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#else
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int32_t nRxPkt = oran_sync_info.nRxPkt[cc_id][ant_id][sym_idx];
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#endif
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LOG_D(HW, "nRxPkt %d\n", nRxPkt);
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for (int pkt_idx = 0; pkt_idx < nRxPkt; pkt_idx++) {
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uint8_t *pData;
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if (fh_init->mtu < p_rx_packet_ctl->nRBSize[pkt_idx] * one_rb_size)
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pData = bufs->dst[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN]
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.pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT]
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.pData;
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else
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pData = p_rx_packet_ctl->pData[pkt_idx];
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int numRB = p_rx_packet_ctl->nRBSize[pkt_idx];
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int startRB = p_rx_packet_ctl->nRBStart[pkt_idx];
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// num_prbu & start_prbu are for UL U-plane only
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LOG_D(HW, "p_rx_packet_ctl[%d] startRB[%d]:numRB[%d]\n", pkt_idx, startRB, numRB);
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{
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{
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#elif defined F_RELEASE
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LOG_D(HW, "[%d.%d] pRbMap->nPrbElm %d\n", *frame, *slot, pRbMap->nPrbElm);
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LOG_D(HW, "[%d.%d] pRbMap->nPrbElm %d\n", *frame, *slot, pRbMap->nPrbElm);
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for (uint32_t idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
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for (uint32_t idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
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int numRB, startRB;
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int numRB, startRB;
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uint8_t *pData;
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uint8_t *pData;
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struct xran_section_desc *p_sec_desc = NULL;
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struct xran_section_desc *p_sec_desc = NULL;
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struct xran_prb_elm *pRbElm = &pRbMap->prbMap[idxElm];
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struct xran_prb_elm *pRbElm = &pRbMap->prbMap[idxElm];
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#if defined K_RELEASE
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uint32_t one_rb_size =
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(((pRbElm->iqWidth == 0) || (pRbElm->iqWidth == 16)) ? (N_SC_PER_PRB * 2 * 2) : (3 * pRbElm->iqWidth + 1));
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if (fh_init->mtu < num_totalRB * one_rb_size)
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pData = bufs->dst[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN]
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.pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT]
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.pData;
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else {
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p_sec_desc = &pRbElm->sec_desc[sym_idx];
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pData = p_sec_desc->pData;
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}
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numRB = num_totalRB;
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startRB = start_totalRB;
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{
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{
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#elif defined F_RELEASE
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// UP_nRBSize & UP_nRBStart are for DL U-plane only
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// UP_nRBSize & UP_nRBStart are for DL U-plane only
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LOG_D(HW, "[%d.%d] idxElm[%d] startSym[%d]:numSym[%d] UP_startRB[%d]:UP_numRB[%d] sym_idx[%d] ant_id[%d] pRbElm->nRBStart[%d]:pRbElm->nRBSize[%d]\n", *frame, *slot, idxElm, pRbElm->nStartSymb, pRbElm->numSymb, pRbElm->UP_nRBStart, pRbElm->UP_nRBSize, sym_idx, ant_id, pRbElm->nRBStart, pRbElm->nRBSize);
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LOG_D(HW, "[%d.%d] idxElm[%d] startSym[%d]:numSym[%d] UP_startRB[%d]:UP_numRB[%d] sym_idx[%d] ant_id[%d] pRbElm->nRBStart[%d]:pRbElm->nRBSize[%d]\n", *frame, *slot, idxElm, pRbElm->nStartSymb, pRbElm->numSymb, pRbElm->UP_nRBStart, pRbElm->UP_nRBSize, sym_idx, ant_id, pRbElm->nRBStart, pRbElm->nRBSize);
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for (int idxDesc = 0; idxDesc < XRAN_MAX_FRAGMENT; idxDesc++) {
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for (int idxDesc = 0; idxDesc < XRAN_MAX_FRAGMENT; idxDesc++) {
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@@ -14,15 +14,17 @@ typedef struct {
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uint32_t f;
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uint32_t f;
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#if defined K_RELEASE
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#if defined K_RELEASE
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uint8_t mu;
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uint8_t mu;
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// the first column can expand to XRAN_MAX_SECTOR_NR for the support of multiple CCs
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int32_t nRxPkt[1][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
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#endif
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#endif
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} oran_sync_info_t;
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} oran_sync_info_t;
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/** @brief xran callback for fronthaul RX, see xran_5g_fronthault_config(). */
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/** @brief xran callback for fronthaul RX, see xran_5g_fronthault_config(). */
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void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status
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void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status
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#if defined K_RELEASE
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#if defined K_RELEASE
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, uint8_t mu
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, uint8_t mu
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#endif
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#endif
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);
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);
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/** @brief xran callback for time alignment, see xran_reg_physide_cb(). */
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/** @brief xran callback for time alignment, see xran_reg_physide_cb(). */
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int oai_physide_dl_tti_call_back(void *param
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int oai_physide_dl_tti_call_back(void *param
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#if defined K_RELEASE
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#if defined K_RELEASE
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@@ -94,6 +94,9 @@ static struct xran_prb_map get_xran_prb_map(const struct xran_fh_config *f, cons
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e->nBeamIndex = 0;
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e->nBeamIndex = 0;
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e->compMethod = f->ru_conf.compMeth;
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e->compMethod = f->ru_conf.compMeth;
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e->iqWidth = f->ru_conf.iqWidth;
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e->iqWidth = f->ru_conf.iqWidth;
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#if defined K_RELEASE
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memset(&prbmap.sFrontHaulRxPacketCtrl, 0, XRAN_NUM_OF_SYMBOL_PER_SLOT * sizeof(struct xran_rx_packet_ctl));
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#endif
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return prbmap;
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return prbmap;
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}
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}
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