Moved writing samples to RU inside TX function
This commit is contained in:
+86
-74
@@ -34,6 +34,7 @@
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#include "LAYER2/nr_pdcp/nr_pdcp_entity.h"
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#include "LAYER2/nr_pdcp/nr_pdcp_entity.h"
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#include "openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h"
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#include "openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h"
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#include "PHY/NR_REFSIG/refsig_defs_ue.h"
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#include "PHY/NR_REFSIG/refsig_defs_ue.h"
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#include "radio/COMMON/common_lib.h"
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/*
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/*
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* NR SLOT PROCESSING SEQUENCE
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* NR SLOT PROCESSING SEQUENCE
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@@ -602,6 +603,61 @@ static void UE_synch(void *arg) {
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}
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}
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}
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}
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static void RU_write(nr_rxtx_thread_data_t *rxtxD) {
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PHY_VARS_NR_UE *UE = rxtxD->UE;
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UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
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void *txp[NB_ANTENNAS_TX];
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for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
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txp[i] = (void *)&UE->common_vars.txdata[i][UE->frame_parms.get_samples_slot_timestamp(
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proc->nr_slot_tx, &UE->frame_parms, 0)];
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radio_tx_flag_t flags = Invalid;
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NR_UE_MAC_INST_t *mac = get_mac_inst(0);
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if (openair0_cfg[0].duplex_mode == duplex_mode_TDD && !get_softmodem_params()->continuous_tx) {
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uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots;
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int nrofUplinkSlots, nrofUplinkSymbols;
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if (mac->scc) {
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nrofUplinkSlots = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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nrofUplinkSymbols = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
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}
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else {
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nrofUplinkSlots = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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nrofUplinkSymbols = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
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}
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int slot_tx_usrp = proc->nr_slot_tx;
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uint8_t num_UL_slots = nrofUplinkSlots + (nrofUplinkSymbols != 0);
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uint8_t first_tx_slot = tdd_period - num_UL_slots;
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if (slot_tx_usrp % tdd_period == first_tx_slot)
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flags = StartOfBurst;
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else if (slot_tx_usrp % tdd_period == first_tx_slot + num_UL_slots - 1)
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flags = EndOfBurst;
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else if (slot_tx_usrp % tdd_period > first_tx_slot)
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flags = MiddleOfBurst;
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} else {
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flags = MiddleOfBurst;
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}
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if (flags || IS_SOFTMODEM_RFSIM)
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AssertFatal(rxtxD->writeBlockSize ==
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UE->rfdevice.trx_write_func(&UE->rfdevice,
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proc->timestamp_tx,
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txp,
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rxtxD->writeBlockSize,
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UE->frame_parms.nb_antennas_tx,
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flags),"");
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for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
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memset(txp[i], 0, rxtxD->writeBlockSize);
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}
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void processSlotTX(void *arg) {
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void processSlotTX(void *arg) {
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nr_rxtx_thread_data_t *rxtxD = (nr_rxtx_thread_data_t *) arg;
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nr_rxtx_thread_data_t *rxtxD = (nr_rxtx_thread_data_t *) arg;
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@@ -635,6 +691,8 @@ void processSlotTX(void *arg) {
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phy_procedures_nrUE_TX(UE, proc, proc->gNB_id, &phy_data);
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phy_procedures_nrUE_TX(UE, proc, proc->gNB_id, &phy_data);
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}
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}
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RU_write(rxtxD);
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}
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}
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void UE_processing(nr_rxtx_thread_data_t *rxtxD) {
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void UE_processing(nr_rxtx_thread_data_t *rxtxD) {
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@@ -783,7 +841,7 @@ void *UE_thread(void *arg) {
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PHY_VARS_NR_UE *UE = (PHY_VARS_NR_UE *) arg;
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PHY_VARS_NR_UE *UE = (PHY_VARS_NR_UE *) arg;
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// int tx_enabled = 0;
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// int tx_enabled = 0;
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openair0_timestamp timestamp, writeTimestamp;
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openair0_timestamp timestamp, writeTimestamp;
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void *rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX];
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void *rxp[NB_ANTENNAS_RX];
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int start_rx_stream = 0;
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int start_rx_stream = 0;
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fapi_nr_config_request_t *cfg = &UE->nrUE_config;
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fapi_nr_config_request_t *cfg = &UE->nrUE_config;
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AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
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AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
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@@ -795,11 +853,14 @@ void *UE_thread(void *arg) {
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notifiedFIFO_t nf;
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notifiedFIFO_t nf;
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initNotifiedFIFO(&nf);
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initNotifiedFIFO(&nf);
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notifiedFIFO_t txFifo;
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initNotifiedFIFO(&txFifo);
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notifiedFIFO_t freeBlocks;
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notifiedFIFO_t freeBlocks;
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initNotifiedFIFO_nothreadSafe(&freeBlocks);
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initNotifiedFIFO_nothreadSafe(&freeBlocks);
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NR_UE_MAC_INST_t *mac = get_mac_inst(0);
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int timing_advance = UE->timing_advance;
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int timing_advance = UE->timing_advance;
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NR_UE_MAC_INST_t *mac = get_mac_inst(0);
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bool syncRunning=false;
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bool syncRunning=false;
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const int nb_slot_frame = UE->frame_parms.slots_per_frame;
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const int nb_slot_frame = UE->frame_parms.slots_per_frame;
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@@ -870,7 +931,6 @@ void *UE_thread(void *arg) {
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int slot_nr = absolute_slot % nb_slot_frame;
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int slot_nr = absolute_slot % nb_slot_frame;
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nr_rxtx_thread_data_t curMsg = {0};
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nr_rxtx_thread_data_t curMsg = {0};
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initNotifiedFIFO(&curMsg.txFifo);
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curMsg.UE=UE;
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curMsg.UE=UE;
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// update thread index for received subframe
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// update thread index for received subframe
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curMsg.proc.CC_id = UE->CC_id;
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curMsg.proc.CC_id = UE->CC_id;
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@@ -897,20 +957,16 @@ void *UE_thread(void *arg) {
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rxp[i] = (void *)&UE->common_vars.rxdata[i][firstSymSamp+
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rxp[i] = (void *)&UE->common_vars.rxdata[i][firstSymSamp+
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UE->frame_parms.get_samples_slot_timestamp(slot_nr,&UE->frame_parms,0)];
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UE->frame_parms.get_samples_slot_timestamp(slot_nr,&UE->frame_parms,0)];
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for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
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txp[i] = (void *)&UE->common_vars.txdata[i][UE->frame_parms.get_samples_slot_timestamp(
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((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH)%nb_slot_frame),&UE->frame_parms,0)];
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int readBlockSize, writeBlockSize;
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int readBlockSize, writeBlockSize;
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if (slot_nr<(nb_slot_frame - 1)) {
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if (slot_nr<(nb_slot_frame - 1)) {
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readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms);
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readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms);
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writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms);
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writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX) % nb_slot_frame, &UE->frame_parms);
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} else {
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} else {
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UE->rx_offset_diff = computeSamplesShift(UE);
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UE->rx_offset_diff = computeSamplesShift(UE);
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readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms) -
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readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms) -
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UE->rx_offset_diff;
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UE->rx_offset_diff;
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writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH) % nb_slot_frame, &UE->frame_parms)- UE->rx_offset_diff;
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writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX) % nb_slot_frame, &UE->frame_parms)- UE->rx_offset_diff;
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}
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}
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AssertFatal(readBlockSize ==
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AssertFatal(readBlockSize ==
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@@ -936,28 +992,30 @@ void *UE_thread(void *arg) {
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LOG_E(PHY,"can't compensate: diff =%d\n", first_symbols);
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LOG_E(PHY,"can't compensate: diff =%d\n", first_symbols);
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}
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}
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curMsg.proc.timestamp_tx = timestamp+
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// use previous timing_advance value to compute writeTimestamp
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UE->frame_parms.get_samples_slot_timestamp(slot_nr,&UE->frame_parms,DURATION_RX_TO_TX)
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writeTimestamp = timestamp+
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- firstSymSamp;
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UE->frame_parms.get_samples_slot_timestamp(slot_nr,&UE->frame_parms,DURATION_RX_TO_TX)
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- firstSymSamp - openair0_cfg[0].tx_sample_advance -
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UE->N_TA_offset - timing_advance;
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// but use current UE->timing_advance value to compute writeBlockSize
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if (UE->timing_advance != timing_advance) {
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writeBlockSize -= UE->timing_advance - timing_advance;
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timing_advance = UE->timing_advance;
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}
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// Start TX slot processing here. It runs in parallel with RX slot processing
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// Start TX slot processing here. It runs in parallel with RX slot processing
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notifiedFIFO_elt_t *newElt = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_tx, &curMsg.txFifo, processSlotTX);
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notifiedFIFO_elt_t *newElt = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_tx, &txFifo, processSlotTX);
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nr_rxtx_thread_data_t *curMsgTx = (nr_rxtx_thread_data_t *) NotifiedFifoData(newElt);
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nr_rxtx_thread_data_t *curMsgTx = (nr_rxtx_thread_data_t *) NotifiedFifoData(newElt);
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curMsgTx->proc = curMsg.proc;
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curMsgTx->proc = curMsg.proc;
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curMsgTx->writeBlockSize = writeBlockSize;
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curMsgTx->proc.timestamp_tx = writeTimestamp;
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curMsgTx->UE = UE;
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curMsgTx->UE = UE;
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pushTpool(&(get_nrUE_params()->Tpool), newElt);
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pushTpool(&(get_nrUE_params()->Tpool), newElt);
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// RX slot processing
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// RX slot processing
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UE_processing(&curMsg);
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UE_processing(&curMsg);
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// Wait for PUSCH processing to finish
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notifiedFIFO_elt_t *res;
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res = pullTpool(&curMsg.txFifo, &(get_nrUE_params()->Tpool));
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if (res == NULL)
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LOG_E(PHY, "Tpool has been aborted\n");
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else
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delNotifiedFIFO_elt(res);
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if (curMsg.proc.decoded_frame_rx != -1)
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if (curMsg.proc.decoded_frame_rx != -1)
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decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | curMsg.proc.decoded_frame_rx);
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decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | curMsg.proc.decoded_frame_rx);
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else
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else
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@@ -967,59 +1025,13 @@ void *UE_thread(void *arg) {
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LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
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LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
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decoded_frame_rx, curMsg.proc.frame_rx);
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decoded_frame_rx, curMsg.proc.frame_rx);
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// use previous timing_advance value to compute writeTimestamp
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// Wait for TX slot processing to finish
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writeTimestamp = timestamp+
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notifiedFIFO_elt_t *res;
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UE->frame_parms.get_samples_slot_timestamp(slot_nr,&UE->frame_parms,DURATION_RX_TO_TX
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res = pullTpool(&txFifo, &(get_nrUE_params()->Tpool));
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- NR_RX_NB_TH) - firstSymSamp - openair0_cfg[0].tx_sample_advance -
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if (res == NULL)
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UE->N_TA_offset - timing_advance;
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LOG_E(PHY, "Tpool has been aborted\n");
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else
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// but use current UE->timing_advance value to compute writeBlockSize
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delNotifiedFIFO_elt(res);
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if (UE->timing_advance != timing_advance) {
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writeBlockSize -= UE->timing_advance - timing_advance;
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timing_advance = UE->timing_advance;
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}
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int flags = 0;
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if (openair0_cfg[0].duplex_mode == duplex_mode_TDD && !get_softmodem_params()->continuous_tx) {
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uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots;
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int nrofUplinkSlots, nrofUplinkSymbols;
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if (mac->scc) {
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nrofUplinkSlots = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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nrofUplinkSymbols = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
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}
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else {
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nrofUplinkSlots = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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nrofUplinkSymbols = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
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}
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int slot_tx_usrp = slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH;
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uint8_t num_UL_slots = nrofUplinkSlots + (nrofUplinkSymbols != 0);
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uint8_t first_tx_slot = tdd_period - num_UL_slots;
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if (slot_tx_usrp % tdd_period == first_tx_slot)
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flags = 2;
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else if (slot_tx_usrp % tdd_period == first_tx_slot + num_UL_slots - 1)
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flags = 3;
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else if (slot_tx_usrp % tdd_period > first_tx_slot)
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flags = 1;
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} else {
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flags = 1;
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}
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if (flags || IS_SOFTMODEM_RFSIM)
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AssertFatal(writeBlockSize ==
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UE->rfdevice.trx_write_func(&UE->rfdevice,
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writeTimestamp,
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txp,
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writeBlockSize,
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UE->frame_parms.nb_antennas_tx,
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flags),"");
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for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
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memset(txp[i], 0, writeBlockSize);
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} // while !oai_exit
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} // while !oai_exit
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return NULL;
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return NULL;
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@@ -768,8 +768,8 @@ typedef struct nr_rxtx_thread_data_s {
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UE_nr_rxtx_proc_t proc;
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UE_nr_rxtx_proc_t proc;
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PHY_VARS_NR_UE *UE;
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PHY_VARS_NR_UE *UE;
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NR_UE_SCHED_MODE_t ue_sched_mode;
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NR_UE_SCHED_MODE_t ue_sched_mode;
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notifiedFIFO_t txFifo;
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int writeBlockSize;
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} nr_rxtx_thread_data_t;
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} nr_rxtx_thread_data_t;
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typedef struct LDPCDecode_ue_s {
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typedef struct LDPCDecode_ue_s {
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PHY_VARS_NR_UE *phy_vars_ue;
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PHY_VARS_NR_UE *phy_vars_ue;
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@@ -269,9 +269,7 @@
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/* FFS_NR_TODO it defines ue capability which is the number of slots */
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/* FFS_NR_TODO it defines ue capability which is the number of slots */
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/* - between reception of pdsch and tarnsmission of its acknowlegment */
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/* - between reception of pdsch and tarnsmission of its acknowlegment */
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/* - between reception of un uplink grant and its related transmission */
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/* - between reception of un uplink grant and its related transmission */
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/* - FIXME temprarily set to 5 to avoid timing issues at OAI UE in rfsimulator */
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#define NR_UE_CAPABILITY_SLOT_RX_TO_TX (4)
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/* - issues caused by no rendez-vous point between TX and RX in the OAI UE */
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#define NR_UE_CAPABILITY_SLOT_RX_TO_TX (5)
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#ifndef NO_RAT_NR
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#ifndef NO_RAT_NR
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#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
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#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
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@@ -150,6 +150,14 @@ typedef enum {
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gpsdo=2
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gpsdo=2
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} clock_source_t;
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} clock_source_t;
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|
||||||
|
/*! \brief Radio Tx burst flags */
|
||||||
|
typedef enum {
|
||||||
|
Invalid = 0,
|
||||||
|
MiddleOfBurst,
|
||||||
|
StartOfBurst,
|
||||||
|
EndOfBurst
|
||||||
|
} radio_tx_flag_t;
|
||||||
|
|
||||||
/*! \brief Structure used for initializing UDP read threads */
|
/*! \brief Structure used for initializing UDP read threads */
|
||||||
typedef struct {
|
typedef struct {
|
||||||
openair0_device *device;
|
openair0_device *device;
|
||||||
|
|||||||
Reference in New Issue
Block a user