From 6e9dd015f6d34d62f14d69a4d1fd72b1f1fb00ce Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 27 Mar 2024 09:36:19 +0100 Subject: [PATCH] DCI formats 11 and 01 assume the presence of an active BWP, if not present return with an error to prevent segfault --- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 8 ++++++ .../NR_MAC_UE/nr_ue_dci_configuration.c | 27 ++++++++++--------- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 2 ++ 3 files changed, 25 insertions(+), 12 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index e9f052f20c..e07765ad14 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -3232,6 +3232,10 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, break; case NR_UL_DCI_FORMAT_0_1: + if (!UL_BWP) { + LOG_E(NR_MAC, "Error! Not possible to configure DCI format 01 without UL BWP.\n"); + return 0; + } /// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, ULSCH indicator 1 --16 size += 16; // Carrier indicator @@ -3385,6 +3389,10 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, case NR_DL_DCI_FORMAT_1_1: LOG_D(NR_MAC, "DCI_FORMAT 1_1 : pdsch_Config %p, pucch_Config %p\n", pdsch_Config, pucch_Config); + if (!DL_BWP) { + LOG_E(NR_MAC, "Error! Not possible to configure DCI format 11 without DL BWP.\n"); + return 0; + } // General note: 0 bits condition is ignored as default nbits is 0. // Format identifier size = 1; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index 2fd47cc756..69cc9df9c3 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -217,18 +217,21 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, 0); } - rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP, - current_UL_BWP, - sc_info, - mac->pdsch_HARQ_ACK_Codebook, - &mac->def_dci_pdu_rel15[dl_config->slot][dci_format], - dci_format, - rnti_type, - coreset, - dl_bwp_id, - ss->searchSpaceType->present, - mac->type0_PDCCH_CSS_config.num_rbs, - alt_size); + uint16_t dci_size = nr_dci_size(current_DL_BWP, + current_UL_BWP, + sc_info, + mac->pdsch_HARQ_ACK_Codebook, + &mac->def_dci_pdu_rel15[dl_config->slot][dci_format], + dci_format, + rnti_type, + coreset, + dl_bwp_id, + ss->searchSpaceType->present, + mac->type0_PDCCH_CSS_config.num_rbs, + alt_size); + if (dci_size == 0) + return; + rel15->dci_length_options[i] = dci_size; } rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 378c5a1de6..56c3fdb464 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1236,6 +1236,8 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, ss->searchSpaceType->present, cset0_bwp_size, alt_size); + if (dci_size == 0) + return; pdcch_dci_pdu->PayloadSizeBits = dci_size; AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported"); if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)