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debugging with AW2S RRU. Added statistics for ULSCH/UCI in PHY and MAC.

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This commit is contained in:
Raymond Knopp
2020-12-24 16:10:03 +01:00
parent f659694eab
commit 7185b95591
32 changed files with 635 additions and 352 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/COMMON/platform_constants.h
+5
View File
@@ -86,9 +86,14 @@
#define MAX_gNB 2
#endif
#define NUMBER_OF_DLSCH_MAX 16
#define NUMBER_OF_ULSCH_MAX 16
#define NUMBER_OF_SCH_STATS_MAX 16
#define NUMBER_OF_NR_DLSCH_MAX 2//16
#define NUMBER_OF_NR_ULSCH_MAX 2//16
#define NUMBER_OF_NR_SCH_STATS_MAX 16
#define NUMBER_OF_NR_PUCCH_MAX 16
#define NUMBER_OF_NR_SR_MAX 16
#define NUMBER_OF_NR_PDCCH_MAX 16
openair2/LAYER2/MAC/eNB_scheduler.c
+3 -3
View File
@@ -596,13 +596,13 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
UE_scheduling_control = &(UE_info->UE_sched_ctrl[UE_id]);
if (((frameP & 127) == 0) && (subframeP == 0)) {
LOG_I(MAC,"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
LOG_I(MAC,"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d (TPC accum %d) PUCCH SNR %d (TPC accum %d)\n",
rnti,
UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync",
UE_info->UE_template[CC_id][UE_id].phr_info,
UE_scheduling_control->dl_cqi[CC_id],
(5 * UE_scheduling_control->pusch_snr[CC_id] - 640) / 10,
(5 * UE_scheduling_control->pucch1_snr[CC_id] - 640) / 10);
(5 * UE_scheduling_control->pusch_snr[CC_id] - 640) / 10, UE_scheduling_control->pucch_tpc_accumulated[CC_id],
(5 * UE_scheduling_control->pucch1_snr[CC_id] - 640) / 10, UE_scheduling_control->pusch_tpc_accumulated[CC_id]);
}
RC.eNB[module_idP][CC_id]->pusch_stats_bsr[UE_id][(frameP * 10) + subframeP] = -63;
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+12 -9
View File
@@ -483,8 +483,8 @@ void generate_Msg2(module_id_t module_idP,
first_rb = 0;
vrb_map[first_rb] = 1;
vrb_map[first_rb + 1] = 1;
vrb_map[first_rb + 2] = 1;
vrb_map[first_rb + 3] = 1;
//vrb_map[first_rb + 2] = 1;
//vrb_map[first_rb + 3] = 1;
memset((void *) dl_config_pdu, 0, sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_dl_config_dci_dl_pdu));
@@ -495,12 +495,12 @@ void generate_Msg2(module_id_t module_idP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 2; // RA-RNTI : see Table 4-10 from SCF082 - nFAPI specifications
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = 1; // no TPC
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = 0; // no TPC
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = 1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL, first_rb, 4);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL, first_rb, 2);
// This checks if the above DCI allocation is feasible in current subframe
if (!CCE_allocation_infeasible(module_idP, CC_idP, 0, subframeP,
@@ -519,7 +519,7 @@ void generate_Msg2(module_id_t module_idP,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = ra->RA_rnti;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL, first_rb, 4);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL, first_rb, 2);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1; // first block
@@ -1295,9 +1295,9 @@ initiate_ra_proc(module_id_t module_idP,
prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13;
}
LOG_D(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n",
module_idP, CC_id, frameP, subframeP, preamble_index);
LOG_I(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d, timing offset %d\n",
module_idP, CC_id, frameP, subframeP, preamble_index, timing_offset);
LOG_D(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n",
module_idP, CC_id, frameP, subframeP, rach_resource_type);
@@ -1339,6 +1339,9 @@ initiate_ra_proc(module_id_t module_idP,
abort();
case 1 :
case 3 :
case 4 :
case 5 :
offset = 6;
break;
}
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+4 -1
View File
@@ -1066,18 +1066,21 @@ schedule_ue_spec(module_id_t module_idP,
if (snr > target_snr + 4) {
tpc = 0; //-1
ue_sched_ctrl->pucch_tpc_accumulated[CC_id]--;
} else if (snr < target_snr - 4) {
tpc = 2; //+1
ue_sched_ctrl->pucch_tpc_accumulated[CC_id]--;
} else {
tpc = 1; //0
}
LOG_D(MAC, "[eNB %d] DLSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, snr/target snr %d/%d (normal case)\n",
LOG_D(MAC, "[eNB %d] DLSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d (accumulated %d), snr/target snr %d/%d (normal case)\n",
module_idP,
frameP,
subframeP,
harq_pid,
tpc,
ue_sched_ctrl->pucch_tpc_accumulated[CC_id],
snr,
target_snr);
} // Po_PUCCH has been updated
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
+36 -78
View File
@@ -47,7 +47,7 @@
#include "OCG_extern.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"
#include "rlc.h"
#include "common/utils/lte/prach_utils.h"
#include "T.h"
@@ -1042,48 +1042,6 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
}
}
#ifdef TM5
// This has to be revisited!!!!
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
i1 = 0;
i2 = 0;
i3 = 0;
for (j = 0; j < N_RBG[CC_id]; j++) {
if (MIMO_mode_indicator[CC_id][j] == 2) {
i1 = i1 + 1;
} else if (MIMO_mode_indicator[CC_id][j] == 1) {
i2 = i2 + 1;
} else if (MIMO_mode_indicator[CC_id][j] == 0) {
i3 = i3 + 1;
}
}
if ((i1 < N_RBG[CC_id]) && (i2 > 0) && (i3 == 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_SUMIMO_transmissions + 1;
}
if (i3 == N_RBG[CC_id] && i1 == 0 && i2 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions +
1;
}
if((i1 < N_RBG[CC_id]) && (i3 > 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_MUMIMO_transmissions + 1;
}
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions +
1;
}
#endif
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
for (i = 0; i < dlsch_ue_select[CC_id].ue_num; i++) {
if(dlsch_ue_select[CC_id].list[i].ue_priority == SCH_DL_MSG2) {
@@ -1152,7 +1110,6 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
// int continue_flag = 0;
int32_t snr, target_snr;
int32_t tpc = 1;
static int32_t tpc_accumulated = 0;
UE_sched_ctrl_t *ue_sched_ctl;
int mcs;
int i;
@@ -1936,7 +1893,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
//#ifdef DEBUG_eNB_SCHEDULER
if (ta_update != 31) {
LOG_D(MAC,
LOG_I(MAC,
"[eNB %d][DLSCH] Frame %d Generate header for UE_id %d on CC_id %d: sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,timing advance value : %d, padding %d,post_padding %d,(mcs %d, TBS %d, nb_rb %d),header_dcch %d, header_dtch %d\n",
module_idP, frameP, UE_id, CC_id,
sdu_length_total, num_sdus, sdu_lengths[0],
@@ -2013,17 +1970,17 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
if (snr > target_snr + 4) {
tpc = 0; //-1
tpc_accumulated--;
ue_sched_ctl->pucch_tpc_accumulated[CC_id]--;
} else if (snr < target_snr - 4) {
tpc = 2; //+1
tpc_accumulated++;
ue_sched_ctl->pucch_tpc_accumulated[CC_id]++;
} else {
tpc = 1; //0
}
LOG_D(MAC,"[eNB %d] DLSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, snr/target snr %d/%d\n",
module_idP,frameP, subframeP,harq_pid,tpc,
tpc_accumulated,snr,target_snr);
ue_sched_ctl->pucch_tpc_accumulated[CC_id],snr,target_snr);
} // Po_PUCCH has been updated
else {
tpc = 1; //0
@@ -2241,7 +2198,6 @@ void ulsch_scheduler_pre_ue_select_fairRR(
uint8_t first_ue_id[MAX_NUM_CCs][20];
uint8_t ul_inactivity_num[MAX_NUM_CCs];
uint8_t ul_inactivity_id[MAX_NUM_CCs][20]={{0}};
// LTE_DL_FRAME_PARMS *frame_parms;
uint8_t ulsch_ue_max_num[MAX_NUM_CCs];
uint16_t saved_ulsch_dci[MAX_NUM_CCs];
rnti_t rnti;
@@ -2564,7 +2520,6 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
eNB_MAC_INST *eNB = RC.mac[module_idP];
UE_info_t *UE_info= &eNB->UE_info;
UE_TEMPLATE *UE_template = NULL;
LTE_DL_FRAME_PARMS *frame_parms = NULL;
uint8_t ue_num_temp;
uint8_t total_rbs=0;
uint8_t average_rbs;
@@ -2583,18 +2538,17 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
// MCS and RB assgin
for ( CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++ ) {
cc = &RC.mac[module_idP]->common_channels[CC_id];
frame_parms = &(RC.eNB[module_idP][CC_id]->frame_parms);
int N_RB_UL = to_prb(cc->ul_Bandwidth);
if (cc->tdd_Config) { //TDD
if (frame_parms->N_RB_UL == 25) {
if (N_RB_UL == 25) {
num_pucch_rb = 1;
} else if (frame_parms->N_RB_UL == 50) {
} else if (N_RB_UL == 50) {
num_pucch_rb = 2;
} else {
num_pucch_rb = 3;
}
} else {//FDD
if (frame_parms->N_RB_UL == 25) {
if (N_RB_UL == 25) {
num_pucch_rb = 1;
} else {
num_pucch_rb = 2;
@@ -2619,13 +2573,13 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
continue;
}
if (first_rb[CC_id] >= frame_parms->N_RB_UL-num_pucch_rb ) {
if (first_rb[CC_id] >= N_RB_UL-num_pucch_rb ) {
LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: dropping, not enough RBs\n",
module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id);
break;
}
total_rbs = frame_parms->N_RB_UL-num_pucch_rb-first_rb[CC_id];
total_rbs = N_RB_UL-num_pucch_rb-first_rb[CC_id];
average_rbs = (int)round((double)total_rbs/(double)ue_num_temp);
if ( average_rbs < 3 ) {
@@ -2677,21 +2631,24 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ul_total_buffer > 0 ) {
rb_table_index = 2;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
tx_power= estimate_ue_tx_power(0,tbs*8,rb_table[rb_table_index],0,cc->Ncp,0);
while ( (((UE_template->phr_info - tx_power) < 0 ) || (tbs > bytes_to_schedule)) && (mcs > 3) ) {
mcs--;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
tx_power= estimate_ue_tx_power(0,tbs*8,rb_table[rb_table_index],0,cc->Ncp,0);
}
while ( (tbs < bytes_to_schedule) && (rb_table[rb_table_index]<(frame_parms->N_RB_UL-num_pucch_rb-first_rb[CC_id])) &&
while ( (tbs < bytes_to_schedule) && (rb_table[rb_table_index]<(N_RB_UL-num_pucch_rb-first_rb[CC_id])) &&
((UE_template->phr_info - tx_power) > 0) && (rb_table_index < 32 )) {
rb_table_index++;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
tx_power= estimate_ue_tx_power(0,tbs*8,rb_table[rb_table_index],0,cc->Ncp,0);
}
if (rb_table[rb_table_index]>40) LOG_I(MAC,"bytes_to_schedule %d, nb_rb %d tx_power %d PHR %d\n",
bytes_to_schedule,rb_table[rb_table_index],
estimate_ue_tx_power(0,tbs*8,rb_table[rb_table_index],0,cc->Ncp,0),
UE_template->phr_info);
if ( rb_table[rb_table_index]<3 ) {
rb_table_index=2;
}
@@ -2834,12 +2791,10 @@ schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs];
memset(ulsch_ue_select, 0, sizeof(ulsch_ue_select));
LTE_DL_FRAME_PARMS *frame_parms ;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
cc = &mac->common_channels[CC_id];
frame_parms= &RC.eNB[module_idP][CC_id]->frame_parms;
int N_RB_UL=to_prb(cc->ul_Bandwidth);
// output of scheduling, the UE numbers in RBs, where it is in the code???
// check if RA (Msg3) is active in this subframeP, if so skip the PRBs used for Msg3
// Msg3 is using 1 PRB so we need to increase first_rb accordingly
@@ -2849,13 +2804,13 @@ schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].ue_priority = SCH_UL_MSG3;
if (cc->tdd_Config == NULL) {
if(frame_parms->N_RB_UL == 25) {
if(N_RB_UL == 25) {
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].start_rb = 1;
} else {
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].start_rb = 2;
}
} else {
switch(frame_parms->N_RB_UL) {
switch(N_RB_UL) {
case 25:
default:
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].start_rb = 1;
@@ -2879,14 +2834,18 @@ schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
}
//PRACH
if (is_prach_subframe(frame_parms,sched_frame,sched_subframe)==1) {
if (is_prach_subframe0(cc->tdd_Config!=NULL ? cc->tdd_Config->subframeAssignment : 0,cc->tdd_Config!=NULL ? 1 : 0,
cc->radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex,
sched_frame,sched_subframe)==1) {
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].ue_priority = SCH_UL_PRACH;
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].start_rb = get_prach_prb_offset(
frame_parms,
frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
0,//tdd_mapindex
frameP); //Nf --> shouldn't it be sched_frame ???
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].start_rb =
get_prach_prb_offset(cc->tdd_Config!=NULL ? 1 : 0,
cc->tdd_Config!=NULL ? cc->tdd_Config->subframeAssignment : 0,
to_prb(cc->ul_Bandwidth),
cc->radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex,
cc->radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset,
0,
sched_frame);
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].nb_rb = 6;
ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].UE_id = -1;
ulsch_ue_select[CC_id].ue_num++;
@@ -2914,7 +2873,6 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
uint32_t cqi_req,cshift,ndi,tpc;
int32_t snr;
int32_t target_snr=0;
static int32_t tpc_accumulated=0;
int CC_id,ulsch_ue_num;
int N_RB_UL;
eNB_MAC_INST *eNB = RC.mac[module_idP];
@@ -3095,10 +3053,10 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
if (snr > target_snr + 4) {
tpc = 0; //-1
tpc_accumulated--;
UE_sched_ctrl->pusch_tpc_accumulated[CC_id]--;
} else if (snr < target_snr - 4) {
tpc = 2; //+1
tpc_accumulated++;
UE_sched_ctrl->pusch_tpc_accumulated[CC_id]++;
} else {
tpc = 1; //0
}
@@ -3109,7 +3067,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
if (tpc!=1) {
LOG_D(MAC,"[eNB %d] ULSCH schedulerRR: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, snr/target snr %d/%d\n",
module_idP,frameP,subframeP,harq_pid,tpc,
tpc_accumulated,snr,target_snr);
UE_sched_ctrl->pusch_tpc_accumulated[CC_id],snr,target_snr);
}
// new transmission
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+43 -35
View File
@@ -57,7 +57,7 @@
#include "flexran_agent_mac.h"
#include <dlfcn.h>
#include <openair2/LAYER2/MAC/mac.h>
#include "common/utils/lte/prach_utils.h"
#include "T.h"
@@ -144,16 +144,18 @@ rx_sdu(const module_id_t enb_mod_idP,
if (UE_id != -1) {
UE_scheduling_control = &UE_info->UE_sched_ctrl[UE_id];
UE_template_ptr = &UE_info->UE_template[CC_idP][UE_id];
LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH (%s) sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d, timing_advance %d\n",
enb_mod_idP,
harq_pid,
CC_idP,
frameP,
subframeP,
sduP==NULL ? "in error" : "OK",
UE_scheduling_control->round_UL[CC_idP][harq_pid],
current_rnti,
UE_id,
ul_cqi);
ul_cqi,
timing_advance);
AssertFatal(UE_scheduling_control->round_UL[CC_idP][harq_pid] < 8, "round >= 8\n");
if (sduP != NULL) {
@@ -270,14 +272,17 @@ rx_sdu(const module_id_t enb_mod_idP,
AssertFatal(mac->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx > 1,
"maxHARQ %d should be greater than 1\n",
(int) mac->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx);
LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d [RAPROC Msg3] Received ULSCH sdu round %d from PHY (rnti %x, RA_id %d) ul_cqi %d\n",
LOG_I(MAC, "[eNB %d][PUSCH %d] CC_id %d [RAPROC Msg3] Received ULSCH sdu (%s) round %d from PHY (rnti %x, RA_id %d) ul_cqi %d, timing advance %d\n",
enb_mod_idP,
harq_pid,
CC_idP,
sduP!=NULL ? "OK" : "in error",
ra->msg3_round,
current_rnti,
RA_id,
ul_cqi);
ul_cqi,
timing_advance);
first_rb = ra->msg3_first_rb;
if (sduP == NULL) { // we've got an error on Msg3
@@ -1214,16 +1219,19 @@ schedule_ulsch(module_id_t module_idP,
/* Note: RC.nb_mac_CC[module_idP] should be lower than or equal to NFAPI_CC_MAX */
for (int CC_id = 0; CC_id < RC.nb_mac_CC[module_idP]; CC_id++, cc++) {
LTE_DL_FRAME_PARMS *frame_parms = &RC.eNB[module_idP][CC_id]->frame_parms;
if (is_prach_subframe(frame_parms, sched_frame, sched_subframe)) {
int start_rb = get_prach_prb_offset(
frame_parms,
frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
0, // tdd_mapindex
sched_frame); // Nf
if (is_prach_subframe0(cc->tdd_Config!=NULL ? cc->tdd_Config->subframeAssignment : 0,cc->tdd_Config!=NULL ? 1 : 0,
cc->radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex,
sched_frame, sched_subframe)) {
int start_rb = get_prach_prb_offset(cc->tdd_Config!=NULL ? 1 : 0,
cc->tdd_Config!=NULL ? cc->tdd_Config->subframeAssignment : 0,
to_prb(cc->ul_Bandwidth),
cc->radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex,
cc->radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset,
0, // tdd_mapindex
sched_frame); // Nf
for (int i = 0; i < 6; i++)
cc[CC_id].vrb_map_UL[start_rb + i] = 1;
cc->vrb_map_UL[start_rb + i] = 1;
}
/* HACK: let's remove the PUCCH from available RBs
@@ -1235,24 +1243,24 @@ schedule_ulsch(module_id_t module_idP,
*/
switch (to_prb(cc[CC_id].ul_Bandwidth)) {
case 25:
cc[CC_id].vrb_map_UL[0] = 1;
cc[CC_id].vrb_map_UL[24] = 1;
cc->vrb_map_UL[0] = 1;
cc->vrb_map_UL[24] = 1;
break;
case 50:
cc[CC_id].vrb_map_UL[0] = 1;
cc[CC_id].vrb_map_UL[1] = 1;
cc[CC_id].vrb_map_UL[48] = 1;
cc[CC_id].vrb_map_UL[49] = 1;
cc->vrb_map_UL[0] = 1;
cc->vrb_map_UL[1] = 1;
cc->vrb_map_UL[48] = 1;
cc->vrb_map_UL[49] = 1;
break;
case 100:
cc[CC_id].vrb_map_UL[0] = 1;
cc[CC_id].vrb_map_UL[1] = 1;
cc[CC_id].vrb_map_UL[2] = 1;
cc[CC_id].vrb_map_UL[97] = 1;
cc[CC_id].vrb_map_UL[98] = 1;
cc[CC_id].vrb_map_UL[99] = 1;
cc->vrb_map_UL[0] = 1;
cc->vrb_map_UL[1] = 1;
cc->vrb_map_UL[2] = 1;
cc->vrb_map_UL[97] = 1;
cc->vrb_map_UL[98] = 1;
cc->vrb_map_UL[99] = 1;
break;
default:
@@ -1270,6 +1278,8 @@ schedule_ulsch(module_id_t module_idP,
/*
* Schedule the DCI0 for ULSCH
*/
void
schedule_ulsch_rnti(module_id_t module_idP,
int CC_id,
@@ -1277,7 +1287,6 @@ schedule_ulsch_rnti(module_id_t module_idP,
sub_frame_t subframeP,
unsigned char sched_subframeP) {
/* TODO: does this need to be static? */
static int32_t tpc_accumulated = 0;
/* values from 0 to 7 can be used for mapping the cyclic shift
* (36.211 , Table 5.5.2.1.1-1) */
const uint32_t cshift = 0;
@@ -1401,8 +1410,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
/* Power control */
/*
* Compute the expected ULSCH RX snr (for the stats)
* This is the normalized RX snr and this should be constant (regardless
* of mcs) Is not in dBm, unit from nfapi, converting to dBm
*
*/
const int32_t snr = (5 * UE_sched_ctrl_ptr->pusch_snr[CC_id] - 640) / 10;
const int32_t target_snr = mac->puSch10xSnr / 10;
@@ -1423,10 +1431,10 @@ schedule_ulsch_rnti(module_id_t module_idP,
if (snr > target_snr + 4) {
tpc = 0; // -1
tpc_accumulated--;
UE_sched_ctrl_ptr->pusch_tpc_accumulated[CC_id]--;
} else if (snr < target_snr - 4) {
tpc = 2; // +1
tpc_accumulated++;
UE_sched_ctrl_ptr->pusch_tpc_accumulated[CC_id]++;
}
}
if (tpc != 1) {
@@ -1438,7 +1446,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
subframeP,
harq_pid,
tpc,
tpc_accumulated,
UE_sched_ctrl_ptr->pusch_tpc_accumulated[CC_id],
snr,
target_snr);
}
@@ -1998,10 +2006,10 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP,
if (snr > target_snr + 4) {
tpc = 0; //-1
UE_sched_ctrl->tpc_accumulated[CC_id]--;
UE_sched_ctrl->pusch_tpc_accumulated[CC_id]--;
} else if (snr < target_snr - 4) {
tpc = 2; //+1
UE_sched_ctrl->tpc_accumulated[CC_id]++;
UE_sched_ctrl->pusch_tpc_accumulated[CC_id]++;
} else {
tpc = 1; //0
}
@@ -2016,7 +2024,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP,
subframeP,
harq_pid,
tpc,
UE_sched_ctrl->tpc_accumulated[CC_id],
UE_sched_ctrl->pusch_tpc_accumulated[CC_id],
snr,
target_snr);
}
openair2/LAYER2/MAC/mac.h
+2 -2
View File
@@ -775,7 +775,6 @@ typedef struct {
uint32_t num_mac_sdu_rx;
// Length of SDU Got from LC UL - Size array can be refined
uint32_t sdu_length_rx[NB_RB_MAX];
} eNB_UE_STATS;
/*! \brief eNB template for UE context information */
@@ -964,7 +963,8 @@ typedef struct {
uint16_t feedback_cnt[NFAPI_CC_MAX];
uint16_t timing_advance;
uint16_t timing_advance_r9;
uint8_t tpc_accumulated[NFAPI_CC_MAX];
int8_t pusch_tpc_accumulated[NFAPI_CC_MAX];
int8_t pucch_tpc_accumulated[NFAPI_CC_MAX];
uint8_t periodic_wideband_cqi[NFAPI_CC_MAX];
uint8_t periodic_wideband_spatial_diffcqi[NFAPI_CC_MAX];
uint8_t periodic_wideband_pmi[NFAPI_CC_MAX];
openair2/LAYER2/MAC/pre_processor.c
+3 -3
View File
@@ -730,13 +730,13 @@ void calculate_max_mcs_min_rb(module_id_t mod_id,
int tbs = get_TBS_UL(*mcs, rb_table[*rb_index]);
// fixme: set use_srs flag
*tx_power = estimate_ue_tx_power(tbs * 8, rb_table[*rb_index], 0, Ncp, 0);
*tx_power = estimate_ue_tx_power(0,tbs * 8, rb_table[*rb_index], 0, Ncp, 0);
/* find maximum MCS */
while ((phr - *tx_power < 0 || tbs > bytes) && *mcs > 3) {
mcs--;
tbs = get_TBS_UL(*mcs, rb_table[*rb_index]);
*tx_power = estimate_ue_tx_power(tbs * 8, rb_table[*rb_index], 0, Ncp, 0);
*tx_power = estimate_ue_tx_power(0,tbs * 8, rb_table[*rb_index], 0, Ncp, 0);
}
/* find minimum necessary RBs */
@@ -746,7 +746,7 @@ void calculate_max_mcs_min_rb(module_id_t mod_id,
&& phr - *tx_power > 0) {
(*rb_index)++;
tbs = get_TBS_UL(*mcs, rb_table[*rb_index]);
*tx_power = estimate_ue_tx_power(tbs * 8, rb_table[*rb_index], 0, Ncp, 0);
*tx_power = estimate_ue_tx_power(0,tbs * 8, rb_table[*rb_index], 0, Ncp, 0);
}
/* Decrease if we went to far in last iteration */
openair2/LAYER2/MAC/rar_tools.c
+4 -2
View File
@@ -67,8 +67,10 @@ fill_rar(const module_id_t module_idP,
rar[5] = (uint8_t) (ra->rnti & 0xff);
//ra->timing_offset = 0;
ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
//rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
//rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
rar[0] = (uint8_t) (ra->timing_offset >> (4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4)) & 0xf0; // 4 LSBs of timing advance + divide by 4
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
if(N_RB_UL == 25) {