bugfix: change memory management of interface between PHY and MAC scheduler
This commit fixes a bug caused by global variables in the gNB_MAC_INST structure used to transfer MAC scheduler's results to the PHY layer. When using several threads in the PHY layer, it may happen that the MAC scheduler is called a second time by the second PHY thread for the next slot before the content of the global variables in the gNB_MAC_INST structure used to store the result of the MAC scheduler for the current slot have been consumed by the first thread, leading to unpredictable results (all of them certainly wrong). The solution is to introduce a small memory management module for the interface between the PHY threads and the MAC scheduler. The MAC scheduler now fills the data structures passed to it, and not a global variable anymore. The PHY layer manages the structures and ensures that no data is overwritten before being fully consumed by the various threads of the PHY layer. Some care has to be taken because several PHY threads will access the same structures at the same time for a given slot (in read mode, so it's okay). A mechanism of reference counting has thus been introduced. Only one CC is supported. This restriction should not be too hard to remove if/when needed. (The code before this commit does not seem to work for more than one CC anyway.)
This commit is contained in:
@@ -81,6 +81,17 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
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NR_IF_Module_t *NR_IF_Module_init(int Mod_id) { return (NULL); }
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nfapi_mode_t nfapi_getmode(void) { return NFAPI_MODE_UNKNOWN; }
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void inc_ref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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void deref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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nrUE_params_t nrUE_params={0};
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nrUE_params_t *get_nrUE_params(void) {
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@@ -328,7 +328,7 @@ int main(int argc, char **argv)
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//int frame_length_complex_samples_no_prefix;
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NR_DL_FRAME_PARMS *frame_parms;
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UE_nr_rxtx_proc_t UE_proc;
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NR_Sched_Rsp_t Sched_INFO;
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NR_Sched_Rsp_t *Sched_INFO;
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gNB_MAC_INST *gNB_mac;
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NR_UE_MAC_INST_t *UE_mac;
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int cyclic_prefix_type = NFAPI_CP_NORMAL;
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@@ -994,28 +994,33 @@ int main(int argc, char **argv)
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round = 0;
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UE_harq_process->DLround = round;
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UE_harq_process->first_rx = 1;
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Sched_INFO = malloc(sizeof(*Sched_INFO));
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if (Sched_INFO == NULL) {
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LOG_E(PHY, "out of memory\n");
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exit(1);
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}
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memset(Sched_INFO, 0, sizeof(*Sched_INFO));
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Sched_INFO->sched_response_id = -1;
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while ((round<num_rounds) && (UE_harq_process->ack==0)) {
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round_trials[round]++;
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clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
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clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot, &Sched_INFO->DL_req, &Sched_INFO->TX_req, &Sched_INFO->UL_dci_req);
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UE_info->UE_sched_ctrl.harq_processes[harq_pid].ndi = !(trial&1);
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UE_info->UE_sched_ctrl.harq_processes[harq_pid].round = round;
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nr_schedule_ue_spec(0, frame, slot);
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Sched_INFO.module_id = 0;
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Sched_INFO.CC_id = 0;
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Sched_INFO.frame = frame;
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Sched_INFO.slot = slot;
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Sched_INFO.DL_req = &gNB_mac->DL_req[0];
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Sched_INFO.UL_tti_req = gNB_mac->UL_tti_req_ahead[0];
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Sched_INFO.UL_dci_req = NULL;
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Sched_INFO.TX_req = &gNB_mac->TX_req[0];
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nr_schedule_ue_spec(0, frame, slot, &Sched_INFO->DL_req, &Sched_INFO->TX_req);
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Sched_INFO->module_id = 0;
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Sched_INFO->CC_id = 0;
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Sched_INFO->frame = frame;
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Sched_INFO->slot = slot;
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Sched_INFO->UL_dci_req.numPdus = 0;
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pushNotifiedFIFO(&gNB->L1_tx_free,msgL1Tx);
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nr_schedule_response(&Sched_INFO);
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nr_schedule_response(Sched_INFO);
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/* PTRS values for DLSIM calculations */
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nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[Sched_INFO.CC_id].dl_tti_request_body;
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nfapi_nr_dl_tti_request_body_t *dl_req = &Sched_INFO->DL_req.dl_tti_request_body;
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[1];
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
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pdu_bit_map = pdsch_pdu_rel15->pduBitmap;
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@@ -67,6 +67,17 @@ openair0_config_t openair0_cfg[MAX_CARDS];
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uint8_t const nr_rv_round_map[4] = {0, 2, 3, 1};
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void inc_ref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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void deref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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uint64_t get_softmodem_optmask(void) {return 0;}
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static softmodem_params_t softmodem_params;
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softmodem_params_t *get_softmodem_params(void) {
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@@ -86,6 +86,17 @@ softmodem_params_t *get_softmodem_params(void) {return 0;}
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instance_t DUuniqInstance=0;
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instance_t CUuniqInstance=0;
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void inc_ref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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void deref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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int nr_derive_key_ng_ran_star(uint16_t pci, uint64_t nr_arfcn_dl, const uint8_t key[32], uint8_t *key_ng_ran_star)
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{
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return 0;
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@@ -73,6 +73,17 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
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NR_IF_Module_t *NR_IF_Module_init(int Mod_id) { return (NULL); }
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nfapi_mode_t nfapi_getmode(void) { return NFAPI_MODE_UNKNOWN; }
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void inc_ref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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void deref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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nrUE_params_t nrUE_params={0};
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nrUE_params_t *get_nrUE_params(void) {
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@@ -80,6 +80,17 @@ PHY_VARS_NR_UE *PHY_vars_UE_g[1][1] = { { NULL } };
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uint16_t n_rnti = 0x1234;
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openair0_config_t openair0_cfg[MAX_CARDS];
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void inc_ref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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void deref_sched_response(int _)
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{
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LOG_E(PHY, "fatal\n");
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exit(1);
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}
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int nr_postDecode_sim(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
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ldpcDecode_t *rdata = (ldpcDecode_t*) NotifiedFifoData(req);
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NR_UL_gNB_HARQ_t *ulsch_harq = rdata->ulsch_harq;
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@@ -759,10 +759,10 @@ int main(int argc, char **argv)
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NR_gNB_ULSCH_t *ulsch_gNB = &gNB->ulsch[UE_id];
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// nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_process->ulsch_pdu;
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nfapi_nr_ul_tti_request_t *UL_tti_req = malloc(sizeof(*UL_tti_req));
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NR_Sched_Rsp_t *Sched_INFO = malloc(sizeof(*Sched_INFO));
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memset((void*)Sched_INFO,0,sizeof(*Sched_INFO));
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Sched_INFO->UL_tti_req=UL_tti_req;
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nfapi_nr_ul_tti_request_t *UL_tti_req = &Sched_INFO->UL_tti_req;
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Sched_INFO->sched_response_id = -1;
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nr_phy_data_tx_t phy_data = {0};
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