diff --git a/openair1/PHY/defs_nr_UE.h b/openair1/PHY/defs_nr_UE.h index 760481976c..e580c329dd 100644 --- a/openair1/PHY/defs_nr_UE.h +++ b/openair1/PHY/defs_nr_UE.h @@ -20,7 +20,7 @@ */ /*! \file PHY/defs_nr_UE.h - \brief Top-level defines and structure definitions for nr ue + \brief Top-level constants and data structures definitions for NR UE \author Guy De Souza, H. WANG, A. Mico Pereperez \date 2018 \version 0.1 @@ -123,6 +123,9 @@ #define FRAME_PERIOD 100000000ULL #define DAQ_PERIOD 66667ULL +#define DLSCH_RB_ALLOC 0x1fbf // skip DC RB (total 23/25 RBs) +#define DLSCH_RB_ALLOC_12 0x0aaa // skip DC RB (total 23/25 RBs) +#define NS_PER_SLOT 500000 #undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all diff --git a/openair1/SCHED_NR_UE/defs.h b/openair1/SCHED_NR_UE/defs.h index e5325399f8..a5461ddde7 100644 --- a/openair1/SCHED_NR_UE/defs.h +++ b/openair1/SCHED_NR_UE/defs.h @@ -20,6 +20,7 @@ */ /* + \brief NR UE PHY functions prototypes \author R. Knopp, F. Kaltenberger \company EURECOM \email knopp@eurecom.fr diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index a42c3088a8..ce24fa6383 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -75,17 +75,10 @@ fifo_dump_emos_UE emos_dump_UE; #include "intertask_interface.h" #include "T.h" -#define DLSCH_RB_ALLOC 0x1fbf // skip DC RB (total 23/25 RBs) -#define DLSCH_RB_ALLOC_12 0x0aaa // skip DC RB (total 23/25 RBs) - -#define NS_PER_SLOT 500000 - char nr_mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"}; const uint8_t nr_rv_round_map_ue[4] = {0, 2, 1, 3}; -extern double cpuf; - #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) extern uint64_t downlink_frequency[MAX_NUM_CCs][4]; #endif diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index d8583167dd..706cd55832 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -20,7 +20,7 @@ */ /* \file nr_mac.h - * \brief common MAC data structures, constant, and function prototype + * \brief common MAC data structures and constants * \author R. Knopp, K.H. HSU, G. Casati * \date 2019 * \version 0.1 @@ -37,13 +37,17 @@ #include #include +// Definitions for MAC control and data #define NR_BCCH_DL_SCH 3 // SI - #define NR_BCCH_BCH 5 // MIB - #define CCCH_PAYLOAD_SIZE_MAX 128 - #define RAR_PAYLOAD_SIZE_MAX 128 +#define MAX_BWP_SIZE 275 + +typedef enum frequency_range_e { + FR1 = 0, + FR2 +} frequency_range_t; // For both DL/UL-SCH // Except: @@ -339,6 +343,68 @@ typedef struct { #define NR_MAX_NUM_LCGID 8 #define MAX_RLC_SDU_SUBHEADER_SIZE 3 +//=========== +// PRACH defs +//=========== + +// =============================================== +// SSB to RO mapping public defines and structures +// =============================================== +#define MAX_SSB_PER_RO (16) // Maximum number of SSBs that can be mapped to a single RO +#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot +#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot + +// PRACH occasion details +typedef struct prach_occasion_info { + uint8_t start_symbol; // 0 - 13 (14 symbols in a slot) + uint8_t fdm; // 0-7 (possible values of msg1-FDM: 1, 2, 4 or 8) + uint8_t slot; // 0 - 159 (maximum number of slots in a 10ms frame - @ 240kHz) + uint8_t frame; // 0 - 15 (maximum number of frames in a 160ms association pattern) + uint8_t mapped_ssb_idx[MAX_SSB_PER_RO]; // List of mapped SSBs + uint8_t nb_mapped_ssb; + uint16_t format; // RO preamble format +} prach_occasion_info_t; + +// PRACH occasion slot details +// A PRACH occasion slot is a series of PRACH occasions in time (symbols) and frequency +typedef struct prach_occasion_slot { + prach_occasion_info_t prach_occasion[MAX_TDM][MAX_FDM]; // Starting symbol of each PRACH occasions in a slot + uint8_t nb_of_prach_occasion_in_time; + uint8_t nb_of_prach_occasion_in_freq; +} prach_occasion_slot_t; + +//========= +// DCI defs +//========= + +typedef enum { + NR_DL_DCI_FORMAT_1_0 = 0, + NR_DL_DCI_FORMAT_1_1, + NR_DL_DCI_FORMAT_2_0, + NR_DL_DCI_FORMAT_2_1, + NR_DL_DCI_FORMAT_2_2, + NR_DL_DCI_FORMAT_2_3, + NR_UL_DCI_FORMAT_0_0, + NR_UL_DCI_FORMAT_0_1 +} nr_dci_format_t; + +typedef enum { + NR_RNTI_new = 0, + NR_RNTI_C, + NR_RNTI_RA, + NR_RNTI_P, + NR_RNTI_CS, + NR_RNTI_TC, + NR_RNTI_SP_CSI, + NR_RNTI_SI, + NR_RNTI_SFI, + NR_RNTI_INT, + NR_RNTI_TPC_PUSCH, + NR_RNTI_TPC_PUCCH, + NR_RNTI_TPC_SRS, + NR_RNTI_MCS_C, +} nr_rnti_type_t; + #endif /*__LAYER2_MAC_H__ */ diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index 0e6d110e71..58b3f98fdd 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -20,13 +20,12 @@ */ /*! \file mac.h -* \brief MAC data structures, constant, and function prototype +* \brief common MAC function prototypes * \author Navid Nikaein and Raymond Knopp, WIE-TAI CHEN * \date Dec. 2019 * \version 0.1 * \company Eurecom * \email raymond.knopp@eurecom.fr - */ #ifndef __LAYER2_NR_MAC_COMMON_H__ @@ -36,73 +35,6 @@ #include "NR_CellGroupConfig.h" #include "nr_mac.h" -// =============================================== -// SSB to RO mapping public defines and structures -// =============================================== -#define MAX_SSB_PER_RO (16) // Maximum number of SSBs that can be mapped to a single RO -#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot -#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot - -// Definitions for MAC control and data -#define MAX_BWP_SIZE 275 - -extern int64_t table_6_3_3_2_3_prachConfig_Index [256][9]; - -typedef enum frequency_range_e { - FR1 = 0, - FR2 -} frequency_range_t; - -// PRACH occasion details -typedef struct prach_occasion_info { - uint8_t start_symbol; // 0 - 13 (14 symbols in a slot) - uint8_t fdm; // 0-7 (possible values of msg1-FDM: 1, 2, 4 or 8) - uint8_t slot; // 0 - 159 (maximum number of slots in a 10ms frame - @ 240kHz) - uint8_t frame; // 0 - 15 (maximum number of frames in a 160ms association pattern) - uint8_t mapped_ssb_idx[MAX_SSB_PER_RO]; // List of mapped SSBs - uint8_t nb_mapped_ssb; - uint16_t format; // RO preamble format -} prach_occasion_info_t; - -// PRACH occasion slot details -// A PRACH occasion slot is a series of PRACH occasions in time (symbols) and frequency -typedef struct prach_occasion_slot { - prach_occasion_info_t prach_occasion[MAX_TDM][MAX_FDM]; // Starting symbol of each PRACH occasions in a slot - uint8_t nb_of_prach_occasion_in_time; - uint8_t nb_of_prach_occasion_in_freq; -} prach_occasion_slot_t; - -// ======================================== - - -typedef enum { - NR_DL_DCI_FORMAT_1_0 = 0, - NR_DL_DCI_FORMAT_1_1, - NR_DL_DCI_FORMAT_2_0, - NR_DL_DCI_FORMAT_2_1, - NR_DL_DCI_FORMAT_2_2, - NR_DL_DCI_FORMAT_2_3, - NR_UL_DCI_FORMAT_0_0, - NR_UL_DCI_FORMAT_0_1 -} nr_dci_format_t; - -typedef enum { - NR_RNTI_new = 0, - NR_RNTI_C, - NR_RNTI_RA, - NR_RNTI_P, - NR_RNTI_CS, - NR_RNTI_TC, - NR_RNTI_SP_CSI, - NR_RNTI_SI, - NR_RNTI_SFI, - NR_RNTI_INT, - NR_RNTI_TPC_PUSCH, - NR_RNTI_TPC_PUCCH, - NR_RNTI_TPC_SRS, - NR_RNTI_MCS_C, -} nr_rnti_type_t; - uint16_t config_bandwidth(int mu, int nb_rb, int nr_band); void get_frame_type(uint16_t nr_bandP, uint8_t scs_index, lte_frame_type_t *current_type); diff --git a/openair2/LAYER2/NR_MAC_UE/mac.h b/openair2/LAYER2/NR_MAC_UE/mac.h deleted file mode 100644 index 9418511adf..0000000000 --- a/openair2/LAYER2/NR_MAC_UE/mac.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. - * The OpenAirInterface Software Alliance licenses this file to You under - * the OAI Public License, Version 1.1 (the "License"); you may not use this file - * except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.openairinterface.org/?page_id=698 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - *------------------------------------------------------------------------------- - * For more information about the OpenAirInterface (OAI) Software Alliance: - * contact@openairinterface.org - */ - -/* \file mac.h - * \brief MAC data structures, constant, and function prototype - * \author R. Knopp, K.H. HSU - * \date 2018 - * \version 0.1 - * \company Eurecom / NTUST - * \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr - * \note - * \warning - */ - -#ifndef __LAYER2_NR_UE_MAC_DEFS_H__ -#define __LAYER2_NR_UE_MAC_DEFS_H__ - -#include -#include -#include - -/*!\brief UE layer 2 status */ -typedef enum { - UE_CONNECTION_OK = 0, - UE_CONNECTION_LOST, - UE_PHY_RESYNCH, - UE_PHY_HO_PRACH -} NR_UE_L2_STATE_t; - -#endif /*__LAYER2_NR_UE_MAC_DEFS_H__ */ diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index d2302f405d..ca8c2cfff7 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -20,7 +20,7 @@ */ /* \file mac_defs.h - * \brief MAC data structures, constant, and function prototype + * \brief MAC data structures and constants * \author R. Knopp, K.H. HSU * \date 2018 * \version 0.1 @@ -69,13 +69,106 @@ #include "PHY/defs_nr_common.h" #include "openair2/LAYER2/NR_MAC_COMMON/nr_mac.h" -#define NB_NR_UE_MAC_INST 1 -/*!\brief Maximum number of logical channl group IDs */ +// ========== +// NR UE defs +// ========== +#define NB_NR_UE_MAC_INST 1 +#define MAX_NUM_BWP 2 +#define NUM_SLOT_FRAME 10 /*!\brief value for indicating BSR Timer is not running */ #define NR_MAC_UE_BSR_TIMER_NOT_RUNNING (0xFFFF) +// ================================================ +// SSB to RO mapping private defines and structures +// ================================================ + +#define MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PERIOD (16) // Maximum association period is 16 +#define MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD (16) // Max association pattern period is 160ms and minimum PRACH configuration period is 10ms +#define MAX_NB_ASSOCIATION_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD (16) // Max nb of association periods in an association pattern period of 160ms +#define MAX_NB_FRAME_IN_PRACH_CONF_PERIOD (16) // Max PRACH configuration period is 160ms and frame is 10ms +#define MAX_NB_SLOT_IN_FRAME (160) // Max number of slots in a frame (@ SCS 240kHz = 160) +#define MAX_NB_FRAME_IN_ASSOCIATION_PATTERN_PERIOD (16) // Maximum number of frames in the maximum association pattern period +#define MAX_NB_SSB (64) // Maximum number of possible SSB indexes +#define MAX_RO_PER_SSB (8) // Maximum number of consecutive ROs that can be mapped to an SSB according to the ssb_per_RACH config + +// Maximum number of ROs that can be mapped to an SSB in an association pattern +// This is to reserve enough elements in the SSBs list for each mapped ROs for a single SSB +// An arbitrary maximum number is chosen to be safe: maximum number of slots in an association pattern * maximum number of ROs in a slot +#define MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN (MAX_TDM*MAX_FDM*MAX_NB_SLOT_IN_FRAME*MAX_NB_FRAME_IN_ASSOCIATION_PATTERN_PERIOD) + +// =============== +// DCI fields defs +// =============== + +#define NBR_NR_FORMATS 8 // The number of formats is 8 (0_0, 0_1, 1_0, 1_1, 2_0, 2_1, 2_2, 2_3) +#define NBR_NR_DCI_FIELDS 56 // The number of different dci fields defined in TS 38.212 subclause 7.3.1 + +#define IDENTIFIER_DCI_FORMATS 0 +#define CARRIER_IND 1 +#define SUL_IND_0_1 2 +#define SLOT_FORMAT_IND 3 +#define PRE_EMPTION_IND 4 +#define BLOCK_NUMBER 5 +#define CLOSE_LOOP_IND 6 +#define BANDWIDTH_PART_IND 7 +#define SHORT_MESSAGE_IND 8 +#define SHORT_MESSAGES 9 +#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10 +#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11 +#define TIME_DOM_RESOURCE_ASSIGNMENT 12 +#define VRB_TO_PRB_MAPPING 13 +#define PRB_BUNDLING_SIZE_IND 14 +#define RATE_MATCHING_IND 15 +#define ZP_CSI_RS_TRIGGER 16 +#define FREQ_HOPPING_FLAG 17 +#define TB1_MCS 18 +#define TB1_NDI 19 +#define TB1_RV 20 +#define TB2_MCS 21 +#define TB2_NDI 22 +#define TB2_RV 23 +#define MCS 24 +#define NDI 25 +#define RV 26 +#define HARQ_PROCESS_NUMBER 27 +#define DAI_ 28 +#define FIRST_DAI 29 +#define SECOND_DAI 30 +#define TB_SCALING 31 +#define TPC_PUSCH 32 +#define TPC_PUCCH 33 +#define PUCCH_RESOURCE_IND 34 +#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35 +#define SRS_RESOURCE_IND 36 +#define PRECOD_NBR_LAYERS 37 +#define ANTENNA_PORTS 38 +#define TCI 39 +#define SRS_REQUEST 40 +#define TPC_CMD 41 +#define CSI_REQUEST 42 +#define CBGTI 43 +#define CBGFI 44 +#define PTRS_DMRS 45 +#define BETA_OFFSET_IND 46 +#define DMRS_SEQ_INI 47 +#define UL_SCH_IND 48 +#define PADDING_NR_DCI 49 +#define SUL_IND_0_0 50 +#define RA_PREAMBLE_INDEX 51 +#define SUL_IND_1_0 52 +#define SS_PBCH_INDEX 53 +#define PRACH_MASK_INDEX 54 +#define RESERVED_NR_DCI 55 + +/*!\brief UE layer 2 status */ +typedef enum { + UE_CONNECTION_OK = 0, + UE_CONNECTION_LOST, + UE_PHY_RESYNCH, + UE_PHY_HO_PRACH +} NR_UE_L2_STATE_t; typedef enum { SFN_C_MOD_2_EQ_0, @@ -145,9 +238,6 @@ typedef struct { int16_t bucket_size[NR_MAX_NUM_LCID]; } NR_UE_SCHEDULING_INFO; - -#define MAX_NUM_BWP 2 - typedef enum { RA_UE_IDLE = 0, WAIT_RAR = 1, @@ -349,67 +439,42 @@ typedef struct { uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI } nr_dci_pdu_rel15_t; -#define NUM_SLOT_FRAME 10 +// The PRACH Config period is a series of selected slots in one or multiple frames +typedef struct prach_conf_period { + prach_occasion_slot_t prach_occasion_slot_map[MAX_NB_FRAME_IN_PRACH_CONF_PERIOD][MAX_NB_SLOT_IN_FRAME]; + uint16_t nb_of_prach_occasion; // Total number of PRACH occasions in the PRACH Config period + uint8_t nb_of_frame; // Size of the PRACH Config period in number of 10ms frames + uint8_t nb_of_slot; // Nb of slots in each frame +} prach_conf_period_t; -#define NBR_NR_FORMATS 8 // The number of formats is 8 (0_0, 0_1, 1_0, 1_1, 2_0, 2_1, 2_2, 2_3) -#define NBR_NR_DCI_FIELDS 56 // The number of different dci fields defined in TS 38.212 subclause 7.3.1 +// The association period is a series of PRACH Config periods +typedef struct prach_association_period { + prach_conf_period_t *prach_conf_period_list[MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PERIOD]; + uint8_t nb_of_prach_conf_period; // Nb of PRACH configuration periods within the association period + uint8_t nb_of_frame; // Total number of frames included in the association period +} prach_association_period_t; -#define IDENTIFIER_DCI_FORMATS 0 -#define CARRIER_IND 1 -#define SUL_IND_0_1 2 -#define SLOT_FORMAT_IND 3 -#define PRE_EMPTION_IND 4 -#define BLOCK_NUMBER 5 -#define CLOSE_LOOP_IND 6 -#define BANDWIDTH_PART_IND 7 -#define SHORT_MESSAGE_IND 8 -#define SHORT_MESSAGES 9 -#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10 -#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11 -#define TIME_DOM_RESOURCE_ASSIGNMENT 12 -#define VRB_TO_PRB_MAPPING 13 -#define PRB_BUNDLING_SIZE_IND 14 -#define RATE_MATCHING_IND 15 -#define ZP_CSI_RS_TRIGGER 16 -#define FREQ_HOPPING_FLAG 17 -#define TB1_MCS 18 -#define TB1_NDI 19 -#define TB1_RV 20 -#define TB2_MCS 21 -#define TB2_NDI 22 -#define TB2_RV 23 -#define MCS 24 -#define NDI 25 -#define RV 26 -#define HARQ_PROCESS_NUMBER 27 -#define DAI_ 28 -#define FIRST_DAI 29 -#define SECOND_DAI 30 -#define TB_SCALING 31 -#define TPC_PUSCH 32 -#define TPC_PUCCH 33 -#define PUCCH_RESOURCE_IND 34 -#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35 -#define SRS_RESOURCE_IND 36 -#define PRECOD_NBR_LAYERS 37 -#define ANTENNA_PORTS 38 -#define TCI 39 -#define SRS_REQUEST 40 -#define TPC_CMD 41 -#define CSI_REQUEST 42 -#define CBGTI 43 -#define CBGFI 44 -#define PTRS_DMRS 45 -#define BETA_OFFSET_IND 46 -#define DMRS_SEQ_INI 47 -#define UL_SCH_IND 48 -#define PADDING_NR_DCI 49 -#define SUL_IND_0_0 50 -#define RA_PREAMBLE_INDEX 51 -#define SUL_IND_1_0 52 -#define SS_PBCH_INDEX 53 -#define PRACH_MASK_INDEX 54 -#define RESERVED_NR_DCI 55 +// The association pattern is a series of Association periods +typedef struct prach_association_pattern { + prach_association_period_t prach_association_period_list[MAX_NB_ASSOCIATION_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD]; + prach_conf_period_t prach_conf_period_list[MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD]; + uint8_t nb_of_assoc_period; // Nb of association periods within the association pattern + uint8_t nb_of_prach_conf_period_in_max_period; // Nb of PRACH configuration periods within the maximum association pattern period (according to the size of the configured PRACH + uint8_t nb_of_frame; // Total number of frames included in the association pattern period (after mapping the SSBs and determining the real association pattern length) +} prach_association_pattern_t; + +// SSB details +typedef struct ssb_info { + boolean_t transmitted; // True if the SSB index is transmitted according to the SSB positions map configuration + prach_occasion_info_t *mapped_ro[MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN]; // List of mapped RACH Occasions to this SSB index + uint16_t nb_mapped_ro; // Total number of mapped ROs to this SSB index +} ssb_info_t; + +// List of all the possible SSBs and their details +typedef struct ssb_list_info { + ssb_info_t tx_ssb[MAX_NB_SSB]; + uint8_t nb_tx_ssb; +} ssb_list_info_t; /*@}*/ #endif /*__LAYER2_MAC_DEFS_H__ */ diff --git a/openair2/LAYER2/NR_MAC_UE/mac_extern.h b/openair2/LAYER2/NR_MAC_UE/mac_extern.h index 54cdc4d149..654d32c5da 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_extern.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_extern.h @@ -92,4 +92,46 @@ extern uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]; // for PDSCH from TS 38.214 subclause 5.1.2.1.1 extern uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]; +extern int64_t table_6_3_3_2_3_prachConfig_Index [256][9]; + +extern const uint8_t table_9_2_2_1[16][8]; + +// DCI +extern const uint8_t table_7_3_1_1_2_2_3_4_5[64][20]; +extern const uint8_t table_7_3_1_1_2_12[14][3]; +extern const uint8_t table_7_3_1_1_2_13[10][4]; +extern const uint8_t table_7_3_1_1_2_14[3][5]; +extern const uint8_t table_7_3_1_1_2_15[4][6]; +extern const uint8_t table_7_3_1_1_2_16[12][2]; +extern const uint8_t table_7_3_1_1_2_17[7][3]; +extern const uint8_t table_7_3_1_1_2_18[3][4]; +extern const uint8_t table_7_3_1_1_2_19[2][5]; +extern const uint8_t table_7_3_1_1_2_20[28][3]; +extern const uint8_t table_7_3_1_1_2_21[19][4]; +extern const uint8_t table_7_3_1_1_2_22[6][5]; +extern const uint8_t table_7_3_1_1_2_23[5][6]; +extern const uint8_t table_7_3_2_3_3_1[12][5]; +extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6]; +extern const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10]; +extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5]; +extern const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7]; +extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6]; +extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10]; + +extern const uint16_t table_7_2_1[16]; + extern dci_pdu_rel15_t *def_dci_pdu_rel15; + +extern dci_pdu_rel15_t *def_dci_pdu_rel15; + +extern void mac_rlc_data_ind(const module_id_t module_idP, + const rnti_t rntiP, + const eNB_index_t eNB_index, + const frame_t frameP, + const eNB_flag_t enb_flagP, + const MBMS_flag_t MBMS_flagP, + const logical_chan_id_t channel_idP, + char *buffer_pP, + const tb_size_t tb_sizeP, + num_tb_t num_tbP, + crc_t *crcs_pP); diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index 57d7f9a509..0dad94fe80 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -34,11 +34,9 @@ #define __LAYER2_MAC_UE_PROTO_H__ #include "mac_defs.h" -#include "mac.h" #include "PHY/defs_nr_UE.h" #include "RRC/NR_UE/rrc_defs.h" - /**\brief decode mib pdu in NR_UE, from if_module ul_ind with P7 tx_ind message \param module_id module id \param cc_id component carrier id diff --git a/openair2/LAYER2/NR_MAC_UE/mac_vars.c b/openair2/LAYER2/NR_MAC_UE/mac_vars.c index 95dea61a45..17fe319c3e 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_vars.c +++ b/openair2/LAYER2/NR_MAC_UE/mac_vars.c @@ -30,7 +30,7 @@ * \warning */ -#include "mac_defs.h" +#include #define reserved 0xffff @@ -90,46 +90,416 @@ const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 }; -/* - #define mu_pusch 1 -// definition table j Table 6.1.2.1.1-4 - #define j ((mu_pusch==3)?3:(mu_pusch==2)?2:1) - uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1 - {j, 0,14}, // row index 1 - {j, 0,12}, // row index 2 - {j, 0,10}, // row index 3 - {j, 2,10}, // row index 4 - {j, 4,10}, // row index 5 - {j, 4,8}, // row index 6 - {j, 4,6}, // row index 7 - {j+1,0,14}, // row index 8 - {j+1,0,12}, // row index 9 - {j+1,0,10}, // row index 10 - {j+2,0,14}, // row index 11 - {j+2,0,12}, // row index 12 - {j+2,0,10}, // row index 13 - {j, 8,6}, // row index 14 - {j+3,0,14}, // row index 15 - {j+3,0,10} // row index 16 - }; +const uint8_t table_9_2_2_1[16][8]={{0,12,2, 0, 0,3,0,0}, + {0,12,2, 0, 0,4,8,0}, + {0,12,2, 3, 0,4,8,0}, + {1,10,4, 0, 0,6,0,0}, + {1,10,4, 0, 0,3,6,9}, + {1,10,4, 2, 0,3,6,9}, + {1,10,4, 4, 0,3,6,9}, + {1,4, 10,0, 0,6,0,0}, + {1,4, 10,0, 0,3,6,9}, + {1,4, 10,2, 0,3,6,9}, + {1,4, 10,4, 0,3,6,9}, + {1,0, 14,0, 0,6,0,0}, + {1,0, 14,0, 0,3,6,9}, + {1,0, 14,2, 0,3,6,9}, + {1,0, 14,4, 0,3,6,9}, + {1,0, 14,26,0,3,0,0}}; - #define dmrs_typeA_pos 2 - uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1 - {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1 - {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2 - {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8}, // row index 3 - {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6}, // row index 4 - {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4}, // row index 5 - {0,(dmrs_typeA_pos == 2)?9:10,(dmrs_typeA_pos == 2)?4:4}, // row index 6 - {0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4}, // row index 7 - {0,5,7}, // row index 8 - {0,5,2}, // row index 9 - {0,9,2}, // row index 10 - {0,12,2}, // row index 11 - {0,1,13}, // row index 12 - {0,1,6}, // row index 13 - {0,2,4}, // row index 14 - {0,4,7}, // row index 15 - {0,8,4} // row index 16 - }; -*/ +// table_7_3_1_1_2_2_3_4_5 contains values for number of layers and precoding information for tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2 +// the first 6 columns contain table 7.3.1.1.2-2: Precoding information and number of layers, for 4 antenna ports, if transformPrecoder=disabled and maxRank = 2 or 3 or 4 +// next six columns contain table 7.3.1.1.2-3: Precoding information and number of layers for 4 antenna ports, if transformPrecoder= enabled, or if transformPrecoder=disabled and maxRank = 1 +// next four columns contain table 7.3.1.1.2-4: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder=disabled and maxRank = 2 +// next four columns contain table 7.3.1.1.2-5: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder= enabled, or if transformPrecoder= disabled and maxRank = 1 +const uint8_t table_7_3_1_1_2_2_3_4_5[64][20] = { + {1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}, + {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, + {1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 2, 0, 2, 0, 1, 2, 0, 0}, + {1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 2, 0, 0, 1, 3, 0, 0}, + {2, 0, 2, 0, 2, 0, 1, 4, 1, 4, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0}, + {2, 1, 2, 1, 2, 1, 1, 5, 1, 5, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0}, + {2, 2, 2, 2, 2, 2, 1, 6, 1, 6, 0, 0, 1, 5, 0, 0, 0, 0, 0, 0}, + {2, 3, 2, 3, 2, 3, 1, 7, 1, 7, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0}, + {2, 4, 2, 4, 2, 4, 1, 8, 1, 8, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0}, + {2, 5, 2, 5, 2, 5, 1, 9, 1, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {3, 0, 3, 0, 3, 0, 1, 10, 1, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {4, 0, 4, 0, 4, 0, 1, 11, 1, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 4, 1, 4, 0, 0, 1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 5, 1, 5, 0, 0, 1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 6, 1, 6, 0, 0, 1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 7, 1, 7, 0, 0, 1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 8, 1, 8, 0, 0, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 9, 1, 9, 0, 0, 1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 10, 1, 10, 0, 0, 1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 11, 1, 11, 0, 0, 1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 6, 2, 6, 0, 0, 1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 7, 2, 7, 0, 0, 1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 8, 2, 8, 0, 0, 1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 9, 2, 9, 0, 0, 1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 10, 2, 10, 0, 0, 1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 11, 2, 11, 0, 0, 1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 12, 2, 12, 0, 0, 1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 13, 2, 13, 0, 0, 1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {3, 2, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {4, 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {4, 2, 4, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {2, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {3, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {3, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {4, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +}; + +const uint8_t table_7_3_1_1_2_12[14][3] = { + {1,0,1}, + {1,1,1}, + {2,0,1}, + {2,1,1}, + {2,2,1}, + {2,3,1}, + {2,0,2}, + {2,1,2}, + {2,2,2}, + {2,3,2}, + {2,4,2}, + {2,5,2}, + {2,6,2}, + {2,7,2} +}; + +const uint8_t table_7_3_1_1_2_13[10][4] = { + {1,0,1,1}, + {2,0,1,1}, + {2,2,3,1}, + {2,0,2,1}, + {2,0,1,2}, + {2,2,3,2}, + {2,4,5,2}, + {2,6,7,2}, + {2,0,4,2}, + {2,2,6,2} +}; + +const uint8_t table_7_3_1_1_2_14[3][5] = { + {2,0,1,2,1}, + {2,0,1,4,2}, + {2,2,3,6,2} +}; + +const uint8_t table_7_3_1_1_2_15[4][6] = { + {2,0,1,2,3,1}, + {2,0,1,4,5,2}, + {2,2,3,6,7,2}, + {2,0,2,4,6,2} +}; + +const uint8_t table_7_3_1_1_2_16[12][2] = { + {1,0}, + {1,1}, + {2,0}, + {2,1}, + {2,2}, + {2,3}, + {3,0}, + {3,1}, + {3,2}, + {3,3}, + {3,4}, + {3,5} +}; + +const uint8_t table_7_3_1_1_2_17[7][3] = { + {1,0,1}, + {2,0,1}, + {2,2,3}, + {3,0,1}, + {3,2,3}, + {3,4,5}, + {2,0,2} +}; + +const uint8_t table_7_3_1_1_2_18[3][4] = { + {2,0,1,2}, + {3,0,1,2}, + {3,3,4,5} +}; + +const uint8_t table_7_3_1_1_2_19[2][5] = { + {2,0,1,2,3}, + {3,0,1,2,3} +}; + +const uint8_t table_7_3_1_1_2_20[28][3] = { + {1,0,1}, + {1,1,1}, + {2,0,1}, + {2,1,1}, + {2,2,1}, + {2,3,1}, + {3,0,1}, + {3,1,1}, + {3,2,1}, + {3,3,1}, + {3,4,1}, + {3,5,1}, + {3,0,2}, + {3,1,2}, + {3,2,2}, + {3,3,2}, + {3,4,2}, + {3,5,2}, + {3,6,2}, + {3,7,2}, + {3,8,2}, + {3,9,2}, + {3,10,2}, + {3,11,2}, + {1,0,2}, + {1,1,2}, + {1,6,2}, + {1,7,2} +}; + +const uint8_t table_7_3_1_1_2_21[19][4] = { + {1,0,1,1}, + {2,0,1,1}, + {2,2,3,1}, + {3,0,1,1}, + {3,2,3,1}, + {3,4,5,1}, + {2,0,2,1}, + {3,0,1,2}, + {3,2,3,2}, + {3,4,5,2}, + {3,6,7,2}, + {3,8,9,2}, + {3,10,11,2}, + {1,0,1,2}, + {1,6,7,2}, + {2,0,1,2}, + {2,2,3,2}, + {2,6,7,2}, + {2,8,9,2} +}; + +const uint8_t table_7_3_1_1_2_22[6][5] = { + {2,0,1,2,1}, + {3,0,1,2,1}, + {3,3,4,5,1}, + {3,0,1,6,2}, + {3,2,3,8,2}, + {3,4,5,10,2} +}; + +const uint8_t table_7_3_1_1_2_23[5][6] = { + {2,0,1,2,3,1}, + {3,0,1,2,3,1}, + {3,0,1,6,7,2}, + {3,2,3,8,9,2}, + {3,4,5,10,11,2} +}; + +const uint8_t table_7_3_2_3_3_1[12][5] = { + {1,0,0,0,0}, + {1,1,0,0,0}, + {1,0,1,0,0}, + {2,0,0,0,0}, + {2,1,0,0,0}, + {2,2,0,0,0}, + {2,3,0,0,0}, + {2,0,1,0,0}, + {2,2,3,0,0}, + {2,0,1,2,0}, + {2,0,1,2,3}, + {2,0,2,0,0} +}; + +const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6] = { + {1,0,0,0,0,1}, + {1,1,0,0,0,1}, + {1,0,1,0,0,1}, + {2,0,0,0,0,1}, + {2,1,0,0,0,1}, + {2,2,0,0,0,1}, + {2,3,0,0,0,1}, + {2,0,1,0,0,1}, + {2,2,3,0,0,1}, + {2,0,1,2,0,1}, + {2,0,1,2,3,1}, + {2,0,2,0,0,1}, + {2,0,0,0,0,2}, + {2,1,0,0,0,2}, + {2,2,0,0,0,2}, + {2,3,0,0,0,2}, + {2,4,0,0,0,2}, + {2,5,0,0,0,2}, + {2,6,0,0,0,2}, + {2,7,0,0,0,2}, + {2,0,1,0,0,2}, + {2,2,3,0,0,2}, + {2,4,5,0,0,2}, + {2,6,7,0,0,2}, + {2,0,4,0,0,2}, + {2,2,6,0,0,2}, + {2,0,1,4,0,2}, + {2,2,3,6,0,2}, + {2,0,1,4,5,2}, + {2,2,3,6,7,2}, + {2,0,2,4,6,2} +}; + +const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = { + {2,0,1,2,3,4,0,0,0,2}, + {2,0,1,2,3,4,6,0,0,2}, + {2,0,1,2,3,4,5,6,0,2}, + {2,0,1,2,3,4,5,6,7,2} +}; + +const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5] = { + {1,0,0,0,0}, + {1,1,0,0,0}, + {1,0,1,0,0}, + {2,0,0,0,0}, + {2,1,0,0,0}, + {2,2,0,0,0}, + {2,3,0,0,0}, + {2,0,1,0,0}, + {2,2,3,0,0}, + {2,0,1,2,0}, + {2,0,1,2,3}, + {3,0,0,0,0}, + {3,1,0,0,0}, + {3,2,0,0,0}, + {3,3,0,0,0}, + {3,4,0,0,0}, + {3,5,0,0,0}, + {3,0,1,0,0}, + {3,2,3,0,0}, + {3,4,5,0,0}, + {3,0,1,2,0}, + {3,3,4,5,0}, + {3,0,1,2,3}, + {2,0,2,0,0} +}; + +const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = { + {3,0,1,2,3,4,0}, + {3,0,1,2,3,4,5} +}; + +const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6] = { + {1,0,0,0,0,1}, + {1,1,0,0,0,1}, + {1,0,1,0,0,1}, + {2,0,0,0,0,1}, + {2,1,0,0,0,1}, + {2,2,0,0,0,1}, + {2,3,0,0,0,1}, + {2,0,1,0,0,1}, + {2,2,3,0,0,1}, + {2,0,1,2,0,1}, + {2,0,1,2,3,1}, + {3,0,0,0,0,1}, + {3,1,0,0,0,1}, + {3,2,0,0,0,1}, + {3,3,0,0,0,1}, + {3,4,0,0,0,1}, + {3,5,0,0,0,1}, + {3,0,1,0,0,1}, + {3,2,3,0,0,1}, + {3,4,5,0,0,1}, + {3,0,1,2,0,1}, + {3,3,4,5,0,1}, + {3,0,1,2,3,1}, + {2,0,2,0,0,1}, + {3,0,0,0,0,2}, + {3,1,0,0,0,2}, + {3,2,0,0,0,2}, + {3,3,0,0,0,2}, + {3,4,0,0,0,2}, + {3,5,0,0,0,2}, + {3,6,0,0,0,2}, + {3,7,0,0,0,2}, + {3,8,0,0,0,2}, + {3,9,0,0,0,2}, + {3,10,0,0,0,2}, + {3,11,0,0,0,2}, + {3,0,1,0,0,2}, + {3,2,3,0,0,2}, + {3,4,5,0,0,2}, + {3,6,7,0,0,2}, + {3,8,9,0,0,2}, + {3,10,11,0,0,2}, + {3,0,1,6,0,2}, + {3,2,3,8,0,2}, + {3,4,5,10,0,2}, + {3,0,1,6,7,2}, + {3,2,3,8,9,2}, + {3,4,5,10,11,2}, + {1,0,0,0,0,2}, + {1,1,0,0,0,2}, + {1,6,0,0,0,2}, + {1,7,0,0,0,2}, + {1,0,1,0,0,2}, + {1,6,7,0,0,2}, + {2,0,1,0,0,2}, + {2,2,3,0,0,2}, + {2,6,7,0,0,2}, + {2,8,9,0,0,2} +}; + +const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = { + {3,0,1,2,3,4,0,0,0,1}, + {3,0,1,2,3,4,5,0,0,1}, + {2,0,1,2,3,6,0,0,0,2}, + {2,0,1,2,3,6,8,0,0,2}, + {2,0,1,2,3,6,7,8,0,2}, + {2,0,1,2,3,6,7,8,9,2} +}; + +// table 7.2-1 TS 38.321 +const uint16_t table_7_2_1[16] = { + 5, // row index 0 + 10, // row index 1 + 20, // row index 2 + 30, // row index 3 + 40, // row index 4 + 60, // row index 5 + 80, // row index 6 + 120, // row index 7 + 160, // row index 8 + 240, // row index 9 + 320, // row index 10 + 480, // row index 11 + 960, // row index 12 + 1920, // row index 13 +}; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c index 4138b3b435..e3f2f43cec 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c @@ -30,8 +30,6 @@ * \warning */ -#include "mac.h" - /* Tools */ #include "SIMULATION/TOOLS/sim.h" // for taus diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 95769cc103..3b4bd6c3af 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -76,84 +76,11 @@ #include #include -// ================================================ -// SSB to RO mapping private defines and structures -// ================================================ - -#define MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PERIOD (16) // Maximum association period is 16 -#define MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD (16) // Max association pattern period is 160ms and minimum PRACH configuration period is 10ms -#define MAX_NB_ASSOCIATION_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD (16) // Max nb of association periods in an association pattern period of 160ms -#define MAX_NB_FRAME_IN_PRACH_CONF_PERIOD (16) // Max PRACH configuration period is 160ms and frame is 10ms -#define MAX_NB_SLOT_IN_FRAME (160) // Max number of slots in a frame (@ SCS 240kHz = 160) -#define MAX_NB_FRAME_IN_ASSOCIATION_PATTERN_PERIOD (16) // Maximum number of frames in the maximum association pattern period -#define MAX_NB_SSB (64) // Maximum number of possible SSB indexes -#define MAX_RO_PER_SSB (8) // Maximum number of consecutive ROs that can be mapped to an SSB according to the ssb_per_RACH config - -// Maximum number of ROs that can be mapped to an SSB in an association pattern -// This is to reserve enough elements in the SSBs list for each mapped ROs for a single SSB -// An arbitrary maximum number is chosen to be safe: maximum number of slots in an association pattern * maximum number of ROs in a slot -#define MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN (MAX_TDM*MAX_FDM*MAX_NB_SLOT_IN_FRAME*MAX_NB_FRAME_IN_ASSOCIATION_PATTERN_PERIOD) - -// The PRACH Config period is a series of selected slots in one or multiple frames -typedef struct prach_conf_period { - prach_occasion_slot_t prach_occasion_slot_map[MAX_NB_FRAME_IN_PRACH_CONF_PERIOD][MAX_NB_SLOT_IN_FRAME]; - uint16_t nb_of_prach_occasion; // Total number of PRACH occasions in the PRACH Config period - uint8_t nb_of_frame; // Size of the PRACH Config period in number of 10ms frames - uint8_t nb_of_slot; // Nb of slots in each frame -} prach_conf_period_t; - -// The association period is a series of PRACH Config periods -typedef struct prach_association_period { - prach_conf_period_t *prach_conf_period_list[MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PERIOD]; - uint8_t nb_of_prach_conf_period; // Nb of PRACH configuration periods within the association period - uint8_t nb_of_frame; // Total number of frames included in the association period -} prach_association_period_t; - -// The association pattern is a series of Association periods -typedef struct prach_association_pattern { - prach_association_period_t prach_association_period_list[MAX_NB_ASSOCIATION_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD]; - prach_conf_period_t prach_conf_period_list[MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD]; - uint8_t nb_of_assoc_period; // Nb of association periods within the association pattern - uint8_t nb_of_prach_conf_period_in_max_period; // Nb of PRACH configuration periods within the maximum association pattern period (according to the size of the configured PRACH - uint8_t nb_of_frame; // Total number of frames included in the association pattern period (after mapping the SSBs and determining the real association pattern length) -} prach_association_pattern_t; - -// SSB details -typedef struct ssb_info { - boolean_t transmitted; // True if the SSB index is transmitted according to the SSB positions map configuration - prach_occasion_info_t *mapped_ro[MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN]; // List of mapped RACH Occasions to this SSB index - uint16_t nb_mapped_ro; // Total number of mapped ROs to this SSB index -} ssb_info_t; - -// List of all the possible SSBs and their details -typedef struct ssb_list_info { - ssb_info_t tx_ssb[MAX_NB_SSB]; - uint8_t nb_tx_ssb; -} ssb_list_info_t; - static prach_association_pattern_t prach_assoc_pattern; static ssb_list_info_t ssb_list; -// =============================================== -// =============================================== - //#define ENABLE_MAC_PAYLOAD_DEBUG 1 -#define DEBUG_EXTRACT_DCI 1 - -extern dci_pdu_rel15_t *def_dci_pdu_rel15; - -extern void mac_rlc_data_ind ( - const module_id_t module_idP, - const rnti_t rntiP, - const eNB_index_t eNB_index, - const frame_t frameP, - const eNB_flag_t enb_flagP, - const MBMS_flag_t MBMS_flagP, - const logical_chan_id_t channel_idP, - char *buffer_pP, - const tb_size_t tb_sizeP, - num_tb_t num_tbP, - crc_t *crcs_pP); +//#define DEBUG_EXTRACT_DCI // Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config static void build_ro_list(NR_ServingCellConfigCommon_t *scc, uint8_t unpaired) { @@ -793,25 +720,6 @@ uint32_t get_ssb_slot(uint32_t ssb_index){ // return first_symbol(case, freq, ssb_index) / 14 } -uint8_t table_9_2_2_1[16][8]={ - {0,12,2, 0, 0,3,0,0}, - {0,12,2, 0, 0,4,8,0}, - {0,12,2, 3, 0,4,8,0}, - {1,10,4, 0, 0,6,0,0}, - {1,10,4, 0, 0,3,6,9}, - {1,10,4, 2, 0,3,6,9}, - {1,10,4, 4, 0,3,6,9}, - {1,4, 10,0, 0,6,0,0}, - {1,4, 10,0, 0,3,6,9}, - {1,4, 10,2, 0,3,6,9}, - {1,4, 10,4, 0,3,6,9}, - {1,0, 14,0, 0,6,0,0}, - {1,0, 14,0, 0,3,6,9}, - {1,0, 14,2, 0,3,6,9}, - {1,0, 14,4, 0,3,6,9}, - {1,0, 14,26,0,3,0,0} -}; - int8_t nr_ue_decode_mib(module_id_t module_id, int cc_id, uint8_t gNB_index, @@ -1766,365 +1674,6 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s * This code contains all the functions needed to process all dci fields. * These tables and functions are going to be called by function nr_ue_process_dci */ -// table_7_3_1_1_2_2_3_4_5 contains values for number of layers and precoding information for tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2 -// the first 6 columns contain table 7.3.1.1.2-2: Precoding information and number of layers, for 4 antenna ports, if transformPrecoder=disabled and maxRank = 2 or 3 or 4 -// next six columns contain table 7.3.1.1.2-3: Precoding information and number of layers for 4 antenna ports, if transformPrecoder= enabled, or if transformPrecoder=disabled and maxRank = 1 -// next four columns contain table 7.3.1.1.2-4: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder=disabled and maxRank = 2 -// next four columns contain table 7.3.1.1.2-5: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder= enabled, or if transformPrecoder= disabled and maxRank = 1 -uint8_t table_7_3_1_1_2_2_3_4_5[64][20] = { - {1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}, - {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, - {1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 2, 0, 2, 0, 1, 2, 0, 0}, - {1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 2, 0, 0, 1, 3, 0, 0}, - {2, 0, 2, 0, 2, 0, 1, 4, 1, 4, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0}, - {2, 1, 2, 1, 2, 1, 1, 5, 1, 5, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0}, - {2, 2, 2, 2, 2, 2, 1, 6, 1, 6, 0, 0, 1, 5, 0, 0, 0, 0, 0, 0}, - {2, 3, 2, 3, 2, 3, 1, 7, 1, 7, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0}, - {2, 4, 2, 4, 2, 4, 1, 8, 1, 8, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0}, - {2, 5, 2, 5, 2, 5, 1, 9, 1, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 0, 3, 0, 3, 0, 1, 10, 1, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 0, 4, 0, 4, 0, 1, 11, 1, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 4, 1, 4, 0, 0, 1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 5, 1, 5, 0, 0, 1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 6, 1, 6, 0, 0, 1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 7, 1, 7, 0, 0, 1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 8, 1, 8, 0, 0, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 9, 1, 9, 0, 0, 1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 10, 1, 10, 0, 0, 1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 11, 1, 11, 0, 0, 1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 6, 2, 6, 0, 0, 1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 7, 2, 7, 0, 0, 1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 8, 2, 8, 0, 0, 1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 9, 2, 9, 0, 0, 1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 10, 2, 10, 0, 0, 1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 11, 2, 11, 0, 0, 1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 12, 2, 12, 0, 0, 1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 13, 2, 13, 0, 0, 1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 2, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 2, 4, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {2, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {3, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -}; -uint8_t table_7_3_1_1_2_12[14][3] = { - {1,0,1}, - {1,1,1}, - {2,0,1}, - {2,1,1}, - {2,2,1}, - {2,3,1}, - {2,0,2}, - {2,1,2}, - {2,2,2}, - {2,3,2}, - {2,4,2}, - {2,5,2}, - {2,6,2}, - {2,7,2} -}; -uint8_t table_7_3_1_1_2_13[10][4] = { - {1,0,1,1}, - {2,0,1,1}, - {2,2,3,1}, - {2,0,2,1}, - {2,0,1,2}, - {2,2,3,2}, - {2,4,5,2}, - {2,6,7,2}, - {2,0,4,2}, - {2,2,6,2} -}; -uint8_t table_7_3_1_1_2_14[3][5] = { - {2,0,1,2,1}, - {2,0,1,4,2}, - {2,2,3,6,2} -}; -uint8_t table_7_3_1_1_2_15[4][6] = { - {2,0,1,2,3,1}, - {2,0,1,4,5,2}, - {2,2,3,6,7,2}, - {2,0,2,4,6,2} -}; -uint8_t table_7_3_1_1_2_16[12][2] = { - {1,0}, - {1,1}, - {2,0}, - {2,1}, - {2,2}, - {2,3}, - {3,0}, - {3,1}, - {3,2}, - {3,3}, - {3,4}, - {3,5} -}; -uint8_t table_7_3_1_1_2_17[7][3] = { - {1,0,1}, - {2,0,1}, - {2,2,3}, - {3,0,1}, - {3,2,3}, - {3,4,5}, - {2,0,2} -}; -uint8_t table_7_3_1_1_2_18[3][4] = { - {2,0,1,2}, - {3,0,1,2}, - {3,3,4,5} -}; -uint8_t table_7_3_1_1_2_19[2][5] = { - {2,0,1,2,3}, - {3,0,1,2,3} -}; -uint8_t table_7_3_1_1_2_20[28][3] = { - {1,0,1}, - {1,1,1}, - {2,0,1}, - {2,1,1}, - {2,2,1}, - {2,3,1}, - {3,0,1}, - {3,1,1}, - {3,2,1}, - {3,3,1}, - {3,4,1}, - {3,5,1}, - {3,0,2}, - {3,1,2}, - {3,2,2}, - {3,3,2}, - {3,4,2}, - {3,5,2}, - {3,6,2}, - {3,7,2}, - {3,8,2}, - {3,9,2}, - {3,10,2}, - {3,11,2}, - {1,0,2}, - {1,1,2}, - {1,6,2}, - {1,7,2} -}; -uint8_t table_7_3_1_1_2_21[19][4] = { - {1,0,1,1}, - {2,0,1,1}, - {2,2,3,1}, - {3,0,1,1}, - {3,2,3,1}, - {3,4,5,1}, - {2,0,2,1}, - {3,0,1,2}, - {3,2,3,2}, - {3,4,5,2}, - {3,6,7,2}, - {3,8,9,2}, - {3,10,11,2}, - {1,0,1,2}, - {1,6,7,2}, - {2,0,1,2}, - {2,2,3,2}, - {2,6,7,2}, - {2,8,9,2} -}; -uint8_t table_7_3_1_1_2_22[6][5] = { - {2,0,1,2,1}, - {3,0,1,2,1}, - {3,3,4,5,1}, - {3,0,1,6,2}, - {3,2,3,8,2}, - {3,4,5,10,2} -}; -uint8_t table_7_3_1_1_2_23[5][6] = { - {2,0,1,2,3,1}, - {3,0,1,2,3,1}, - {3,0,1,6,7,2}, - {3,2,3,8,9,2}, - {3,4,5,10,11,2} -}; -uint8_t table_7_3_2_3_3_1[12][5] = { - {1,0,0,0,0}, - {1,1,0,0,0}, - {1,0,1,0,0}, - {2,0,0,0,0}, - {2,1,0,0,0}, - {2,2,0,0,0}, - {2,3,0,0,0}, - {2,0,1,0,0}, - {2,2,3,0,0}, - {2,0,1,2,0}, - {2,0,1,2,3}, - {2,0,2,0,0} -}; -uint8_t table_7_3_2_3_3_2_oneCodeword[31][6] = { - {1,0,0,0,0,1}, - {1,1,0,0,0,1}, - {1,0,1,0,0,1}, - {2,0,0,0,0,1}, - {2,1,0,0,0,1}, - {2,2,0,0,0,1}, - {2,3,0,0,0,1}, - {2,0,1,0,0,1}, - {2,2,3,0,0,1}, - {2,0,1,2,0,1}, - {2,0,1,2,3,1}, - {2,0,2,0,0,1}, - {2,0,0,0,0,2}, - {2,1,0,0,0,2}, - {2,2,0,0,0,2}, - {2,3,0,0,0,2}, - {2,4,0,0,0,2}, - {2,5,0,0,0,2}, - {2,6,0,0,0,2}, - {2,7,0,0,0,2}, - {2,0,1,0,0,2}, - {2,2,3,0,0,2}, - {2,4,5,0,0,2}, - {2,6,7,0,0,2}, - {2,0,4,0,0,2}, - {2,2,6,0,0,2}, - {2,0,1,4,0,2}, - {2,2,3,6,0,2}, - {2,0,1,4,5,2}, - {2,2,3,6,7,2}, - {2,0,2,4,6,2} -}; -uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = { - {2,0,1,2,3,4,0,0,0,2}, - {2,0,1,2,3,4,6,0,0,2}, - {2,0,1,2,3,4,5,6,0,2}, - {2,0,1,2,3,4,5,6,7,2} -}; -uint8_t table_7_3_2_3_3_3_oneCodeword[24][5] = { - {1,0,0,0,0}, - {1,1,0,0,0}, - {1,0,1,0,0}, - {2,0,0,0,0}, - {2,1,0,0,0}, - {2,2,0,0,0}, - {2,3,0,0,0}, - {2,0,1,0,0}, - {2,2,3,0,0}, - {2,0,1,2,0}, - {2,0,1,2,3}, - {3,0,0,0,0}, - {3,1,0,0,0}, - {3,2,0,0,0}, - {3,3,0,0,0}, - {3,4,0,0,0}, - {3,5,0,0,0}, - {3,0,1,0,0}, - {3,2,3,0,0}, - {3,4,5,0,0}, - {3,0,1,2,0}, - {3,3,4,5,0}, - {3,0,1,2,3}, - {2,0,2,0,0} -}; -uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = { - {3,0,1,2,3,4,0}, - {3,0,1,2,3,4,5} -}; -uint8_t table_7_3_2_3_3_4_oneCodeword[58][6] = { - {1,0,0,0,0,1}, - {1,1,0,0,0,1}, - {1,0,1,0,0,1}, - {2,0,0,0,0,1}, - {2,1,0,0,0,1}, - {2,2,0,0,0,1}, - {2,3,0,0,0,1}, - {2,0,1,0,0,1}, - {2,2,3,0,0,1}, - {2,0,1,2,0,1}, - {2,0,1,2,3,1}, - {3,0,0,0,0,1}, - {3,1,0,0,0,1}, - {3,2,0,0,0,1}, - {3,3,0,0,0,1}, - {3,4,0,0,0,1}, - {3,5,0,0,0,1}, - {3,0,1,0,0,1}, - {3,2,3,0,0,1}, - {3,4,5,0,0,1}, - {3,0,1,2,0,1}, - {3,3,4,5,0,1}, - {3,0,1,2,3,1}, - {2,0,2,0,0,1}, - {3,0,0,0,0,2}, - {3,1,0,0,0,2}, - {3,2,0,0,0,2}, - {3,3,0,0,0,2}, - {3,4,0,0,0,2}, - {3,5,0,0,0,2}, - {3,6,0,0,0,2}, - {3,7,0,0,0,2}, - {3,8,0,0,0,2}, - {3,9,0,0,0,2}, - {3,10,0,0,0,2}, - {3,11,0,0,0,2}, - {3,0,1,0,0,2}, - {3,2,3,0,0,2}, - {3,4,5,0,0,2}, - {3,6,7,0,0,2}, - {3,8,9,0,0,2}, - {3,10,11,0,0,2}, - {3,0,1,6,0,2}, - {3,2,3,8,0,2}, - {3,4,5,10,0,2}, - {3,0,1,6,7,2}, - {3,2,3,8,9,2}, - {3,4,5,10,11,2}, - {1,0,0,0,0,2}, - {1,1,0,0,0,2}, - {1,6,0,0,0,2}, - {1,7,0,0,0,2}, - {1,0,1,0,0,2}, - {1,6,7,0,0,2}, - {2,0,1,0,0,2}, - {2,2,3,0,0,2}, - {2,6,7,0,0,2}, - {2,8,9,0,0,2} -}; -uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = { - {3,0,1,2,3,4,0,0,0,1}, - {3,0,1,2,3,4,5,0,0,1}, - {2,0,1,2,3,6,0,0,0,2}, - {2,0,1,2,3,6,8,0,0,2}, - {2,0,1,2,3,6,7,8,0,2}, - {2,0,1,2,3,6,7,8,9,2} -}; int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, uint16_t n_RB_ULBWP, diff --git a/openair2/LAYER2/NR_MAC_UE/rar_tools_nrUE.c b/openair2/LAYER2/NR_MAC_UE/rar_tools_nrUE.c index d63d822370..c6c1f77394 100644 --- a/openair2/LAYER2/NR_MAC_UE/rar_tools_nrUE.c +++ b/openair2/LAYER2/NR_MAC_UE/rar_tools_nrUE.c @@ -41,32 +41,14 @@ #include "common/ran_context.h" /* MAC */ -#include "NR_MAC_UE/mac.h" #include "NR_MAC_UE/mac_proto.h" +#include "NR_MAC_UE/mac_extern.h" #include "NR_MAC_COMMON/nr_mac_extern.h" #include // #define DEBUG_RAR // #define DEBUG_MSG3 -// table 7.2-1 TS 38.321 -uint16_t table_7_2_1[16] = { - 5, // row index 0 - 10, // row index 1 - 20, // row index 2 - 30, // row index 3 - 40, // row index 4 - 60, // row index 5 - 80, // row index 6 - 120, // row index 7 - 160, // row index 8 - 240, // row index 9 - 320, // row index 10 - 480, // row index 11 - 960, // row index 12 - 1920, // row index 13 -}; - void nr_config_Msg3_pdu(NR_UE_MAC_INST_t *mac, int Msg3_f_alloc, uint8_t Msg3_t_alloc, diff --git a/openair2/RRC/NR_UE/rrc_defs.h b/openair2/RRC/NR_UE/rrc_defs.h index a2c66e4961..2b87f1f36b 100644 --- a/openair2/RRC/NR_UE/rrc_defs.h +++ b/openair2/RRC/NR_UE/rrc_defs.h @@ -39,7 +39,6 @@ #include "platform_types.h" -#include "NR_MAC_UE/mac.h" #include "NR_MAC_COMMON/nr_mac.h" #include "rrc_list.h" #include "NR_asn_constant.h"