From 749d6af42e256dbb61068bc0d4d6bceab59daf36 Mon Sep 17 00:00:00 2001 From: rmagueta Date: Thu, 19 Nov 2020 02:22:47 +0000 Subject: [PATCH] Merge develop-sib1 into this branch --- .../gnb.band78.tm1.106PRB.usrpn300.conf | 20 +- .../nfapi/public_inc/fapi_nr_ue_constants.h | 2 +- openair1/PHY/NR_TRANSPORT/nr_dci.c | 27 +- openair1/PHY/NR_TRANSPORT/nr_dlsch.c | 4 +- .../nr_dl_channel_estimation.c | 3 +- openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h | 1 + openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 23 +- .../PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c | 12 +- .../NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 2 +- openair1/PHY/defs_nr_common.h | 2 + openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 3 + openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 170 ++++--- openair2/GNB_APP/RRC_nr_paramsvalues.h | 16 + openair2/GNB_APP/gnb_config.c | 16 + openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 464 ++++++++++++++++- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h | 73 +++ openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h | 61 +++ openair2/LAYER2/NR_MAC_UE/config_ue.c | 59 ++- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 34 +- openair2/LAYER2/NR_MAC_UE/mac_extern.h | 52 -- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 2 - openair2/LAYER2/NR_MAC_UE/mac_vars.c | 58 --- .../NR_MAC_UE/nr_ue_dci_configuration.c | 86 +++- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 475 ++++-------------- openair2/LAYER2/NR_MAC_gNB/config.c | 2 + openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 3 + .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 288 ++++++++++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 3 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 70 ++- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 9 + openair2/LAYER2/NR_MAC_gNB/main.c | 2 + openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 14 + openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 1 + openair2/RRC/NR/L2_nr_interface.c | 178 +++++-- openair2/RRC/NR/MESSAGES/asn1_msg.c | 20 +- openair2/RRC/NR/nr_rrc_defs.h | 1 + openair2/RRC/NR/nr_rrc_proto.h | 6 + openair2/RRC/NR/rrc_gNB_reconfig.c | 93 +++- openair2/RRC/NR_UE/rrc_UE.c | 35 ++ openair2/RRC/NR_UE/rrc_defs.h | 4 +- openair2/RRC/NR_UE/rrc_proto.h | 5 + 41 files changed, 1685 insertions(+), 714 deletions(-) diff --git a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf index 6f081fa24f..82265d7ce6 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf @@ -23,7 +23,14 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; - + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 10; + searchSpaceZero = 0; + } + ); + servingCellConfigCommon = ( { #spCellConfigCommon @@ -33,7 +40,7 @@ gNBs = # downlinkConfigCommon #frequencyInfoDL # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) - absoluteFrequencySSB = 641032; + absoluteFrequencySSB = 641272; dl_frequencyBand = 78; # this is 3600 MHz dl_absoluteFrequencyPointA = 640000; @@ -46,7 +53,7 @@ gNBs = #initialDownlinkBWP #genericParameters # this is RBstart=41,L=24 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 6366; + initialDLBWPlocationAndBandwidth = 6366; # 6366 12925 12956 28875 # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialDLBWPsubcarrierSpacing = 1; @@ -77,7 +84,12 @@ gNBs = #this is SS=1,L=5 initialDLBWPstartSymbolAndLength_3 = 57; - #uplinkConfigCommon + initialDLBWPk0_4 = 0; + initialDLBWPmappingType_4 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_4 = 58; + + #uplinkConfigCommon #frequencyInfoUL ul_frequencyBand = 78; #scs-SpecificCarrierList diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h index e1d06335f5..0a83c1a27f 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h @@ -44,7 +44,7 @@ #define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01 #define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02 #define FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH 0x03 - +#define FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH 0x04 #define FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01 #define FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02 diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index cc71e9dd97..f09f9ca890 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -30,6 +30,8 @@ * \warning */ +#include +#include #include "nr_dci.h" #include "nr_dlsch.h" #include "nr_sch_dmrs.h" @@ -81,17 +83,13 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, int rb_offset; int n_rb; - nr_fill_cce_list(gNB,0,pdcch_pdu_rel15); - - get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset); - // compute rb_offset and n_prb based on frequency allocation - + nr_fill_cce_list(gNB,0,pdcch_pdu_rel15); + get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset); + cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB; if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) { - cset_start_sc = frame_parms.first_carrier_offset + - (frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB + rb_offset)*NR_NB_SC_PER_RB; - } else - cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB; + cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB; + } for (int d=0;dnumDlDci;d++) { /*The coreset is initialised @@ -105,8 +103,10 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb); LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb); // DMRS length is per OFDM symbol - AssertFatal(pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED, - "Interleaved CCE REG MAPPING not supported\n"); + + //AssertFatal(pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED, + //"Interleaved CCE REG MAPPING not supported\n"); + uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)? (n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE) uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE) @@ -225,7 +225,10 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, k -= frame_parms.ofdm_symbol_size; } // m } // reg_idx - + + LOG_I(PHY, ">> DCI: payloadSize = %d | payload = %llx\n", + *pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload); + } // for (int d=0;dnumDlDci;d++) } diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c index 4461edb33b..b7e59a0b42 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c @@ -269,7 +269,9 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB, /// Resource mapping // Non interleaved VRB to PRB mapping - uint16_t start_sc = frame_parms->first_carrier_offset + rel15->rbStart*NR_NB_SC_PER_RB; + uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB; + + if (start_sc >= frame_parms->ofdm_symbol_size) start_sc -= frame_parms->ofdm_symbol_size; diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c index 71cd4c44e4..7ca4db0b60 100644 --- a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c +++ b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c @@ -645,6 +645,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, unsigned char Ns, unsigned short p, unsigned char symbol, + unsigned short BWPStart, unsigned short bwp_start_subcarrier, unsigned short nb_rb_pdsch) { @@ -715,7 +716,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, // generate pilot - uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12; + uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12 - BWPStart; int config_type = 0; // needs to be updated from higher layer nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][0], &pilot[0],1000,0,nb_rb_pdsch+rb_offset); diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h b/openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h index 892c6b7692..824e752235 100644 --- a/openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h +++ b/openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h @@ -69,6 +69,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, unsigned char Ns, unsigned short p, unsigned char symbol, + unsigned short BWPStart, unsigned short bwp_start_subcarrier, unsigned short nb_rb_pdsch); diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index 53456bb691..031cf0444f 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -36,6 +36,8 @@ #include #endif +#include +#include #include "executables/softmodem-common.h" #include "nr_transport_proto_ue.h" @@ -369,7 +371,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, LOG_DDD("n_BWP_start=%d, coreset_nbr_rb=%d\n",n_BWP_start,coreset_nbr_rb); int c_rb_by6; - c_rb = n_BWP_start; + c_rb = 0; for (int rb=0;rbN_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case - rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))]; + rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); } @@ -389,7 +391,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC) // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF - rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol + rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol LOG_DDD("in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))); //rxF = &rxdataF[aarx][(1 + 12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol @@ -401,7 +403,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case - rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))]; + rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; #ifdef NR_PDCCH_DCI_DEBUG LOG_D(PHY,"in odd case c_rb (%d) is lower or equal than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); @@ -411,7 +413,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // number of RBs is odd and c_rb is higher than half system bandwidth + 1 // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC - rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol + rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol #ifdef NR_PDCCH_DCI_DEBUG LOG_D(PHY,"in odd case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - frame_parms->N_RB_DL) - 5 + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))); @@ -421,7 +423,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC // if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC) // we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table) - rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))]; + rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; #ifdef NR_PDCCH_DCI_DEBUG LOG_D(PHY,"in odd case c_rb (%d) is half N_RB_DL + 1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); @@ -889,13 +891,20 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, dci_ind->dci_list[dci_ind->number_of_dcis].payloadSize = dci_length; memcpy((void*)dci_ind->dci_list[dci_ind->number_of_dcis].payloadBits,(void*)dci_estimation,8); dci_ind->number_of_dcis++; + + LOG_I(PHY, "\n>> Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n\n", + n_rnti,rel15->dci_format_options[k],CCEind,dci_length,*(unsigned long long*)dci_estimation); + break; // If DCI is found, no need to check for remaining DCI lengths } else { - LOG_D(PHY,"Decoded crc %x does not match rnti %x for DCI format %d\n", crc, n_rnti, rel15->dci_format_options[k]); + LOG_I(PHY,"Decoded crc %x does not match rnti %x for DCI format %d\n", crc, n_rnti, rel15->dci_format_options[k]); } } } } + + LOG_I(PHY,"nr_dci_decoding_procedure: frame = %i, slot = %i\n", frame, slot); + return(dci_ind->number_of_dcis); } diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c index fb3f1ae133..cc98e24773 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c @@ -591,20 +591,22 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, // Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) { - LOG_D(PHY,"Segment %u CRC OK\n\033[0m",r); - if (r==0) - for (int i=0;i<10;i++) LOG_D(PHY,"byte %d : %x\n",i,((uint8_t*)llrProcBuf)[i]); + + LOG_I(PHY,"Segment %u CRC OK\n\033[0m",r); + + if (r==0) { + for (int i=0;i<10;i++) LOG_I(PHY,"byte %d : %x\n",i,((uint8_t*)llrProcBuf)[i]); + } //Temporary hack no_iteration_ldpc = dlsch->max_ldpc_iterations; ret = no_iteration_ldpc; } else { - LOG_D(PHY,"CRC NOK\n\033[0m"); + LOG_I(PHY,"CRC NOT OK\n\033[0m"); ret = 1 + dlsch->max_ldpc_iterations; } - nb_total_decod++; if (no_iteration_ldpc > dlsch->max_ldpc_iterations){ nb_error_decod++; diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index fae97f6824..0808822dd9 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -377,7 +377,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, pdsch_vars[eNB_id]->pmi_ext, symbol, pilots, - start_rb, + start_rb + dlsch0_harq->BWPStart, nb_rb_pdsch, nr_tti_rx, ue->high_speed_flag, diff --git a/openair1/PHY/defs_nr_common.h b/openair1/PHY/defs_nr_common.h index e5678f894d..bcc0a5133c 100644 --- a/openair1/PHY/defs_nr_common.h +++ b/openair1/PHY/defs_nr_common.h @@ -108,6 +108,8 @@ #define MAX_NUM_NR_DLSCH_SEGMENTS 34 #define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056) +#define MAX_NR_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits. + #define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS #define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056) diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 25bff31fcc..25b27aef98 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -81,6 +81,9 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH){ dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_ra[0]; } + else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){ + dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0]; + } fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr; diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index b0d765b746..d33bb5acf8 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -32,6 +32,7 @@ #define _GNU_SOURCE +#include #include "assertions.h" #include "defs.h" #include "PHY/defs_nr_UE.h" @@ -738,15 +739,16 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_ // do channel estimation for first DMRS only for (m = s0; m < 3; m++) { if (((1<harq_processes[harq_pid]->dlDmrsSymbPos) > 0) { - nr_pdsch_channel_estimation(ue, - 0 /*eNB_id*/, - nr_tti_rx, - 0 /*p*/, - m, - ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12, - pdsch_nb_rb); - LOG_D(PHY,"Channel Estimation in symbol %d\n",m); - break; + nr_pdsch_channel_estimation(ue, + 0 /*eNB_id*/, + nr_tti_rx, + 0 /*p*/, + m, + BWPStart, + ue->frame_parms.first_carrier_offset+(BWPStart+pdsch_start_rb)*12, + pdsch_nb_rb); + LOG_D(PHY,"Channel Estimation in symbol %d\n",m); + break; } } for (m = s0; m < (s1 + s0); m++) { @@ -782,8 +784,8 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_ return -1; } else { // This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS) - if (pdsch == RA_PDSCH) ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m]=ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m-1]; - else if (pdsch == PDSCH) { + if (pdsch == RA_PDSCH) ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m]=ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m-1]; + else if (pdsch == PDSCH || pdsch == SI_PDSCH) { if (nr_rx_pdsch(ue, pdsch, eNB_id, @@ -797,7 +799,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_ dlsch0->current_harq_pid) < 0) return -1; } - else AssertFatal(1==0,"not RA_PDSCH or PDSCH\n"); + else AssertFatal(1==0,"not RA_PDSCH, SI_PDSCH or PDSCH\n"); } if (pdsch == PDSCH) LOG_D(PHY,"Done processing symbol %d : llr_offset %d\n",m,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m]); #if UE_TIMING_TRACE @@ -1190,6 +1192,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, case PDSCH: rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_DLSCH; break; + case SI_PDSCH: + rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_SIB; + break; default: break; } @@ -1711,15 +1716,16 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0]; fapi_nr_config_request_t *cfg = &ue->nrUE_config; + NR_UE_MAC_INST_t *mac = get_mac_inst(ue->Mod_id); + fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; + uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0; uint8_t dci_cnt = 0; NR_DL_FRAME_PARMS *fp = &ue->frame_parms; - //NR_UE_MAC_INST_t *mac = get_mac_inst(0); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN); - LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx); + LOG_D(PHY, " ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx % 1024, nr_tti_rx); /* uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1); @@ -1798,28 +1804,35 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, 0, 0); + fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15; + + dci_cnt = 0; + for(int n_ss = 0; n_ssnb_search_space; n_ss++) { + // note: this only works if RBs for PDCCH are contigous! - LOG_D(PHY,"pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n", - fp->first_carrier_offset,pdcch_vars->pdcch_config[0].BWPStart,coreset_start_rb); + LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n", + fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb); + + rel15 = &pdcch_vars->pdcch_config[n_ss]; + if (coreset_nb_rb > 0) nr_pdcch_channel_estimation(ue, - 0, - nr_tti_rx, - l, - fp->first_carrier_offset+(pdcch_vars->pdcch_config[0].BWPStart + coreset_start_rb)*12, - coreset_nb_rb); - + 0, + nr_tti_rx, + l, + fp->first_carrier_offset + + (pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb) * 12, + coreset_nb_rb); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT); #if UE_TIMING_TRACE stop_meas(&ue->ofdm_demod_stats); #endif - - //printf("phy procedure pdcch start measurement l =%d\n",l); - //nr_ue_measurement_procedures(l,ue,proc,gNB_id,(nr_tti_rx),mode); - - } - dci_cnt = nr_ue_pdcch_procedures(gNB_id, ue, proc); + dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc); + + } + } if (dci_cnt > 0) { @@ -1828,6 +1841,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, NR_UE_DLSCH_t *dlsch = NULL; if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active == 1){ dlsch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]; + } else if (ue->dlsch_SI[0]->active == 1){ + dlsch = ue->dlsch_SI[0]; } else if (ue->dlsch_ra[0]->active == 1){ dlsch = ue->dlsch_ra[0]; } @@ -1867,7 +1882,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, // do procedures for C-RNTI int ret_pdsch = 0; if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active == 1) { - //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN); + + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + dlsch_config_pdu->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); + dlsch_config_pdu->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); + dlsch_config_pdu->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + ret_pdsch = nr_ue_pdsch_procedures(ue, proc, gNB_id, @@ -1875,24 +1896,33 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0], NULL); - //printf("phy procedure pdsch start measurement\n"); + if (ret_pdsch >= 0) + nr_ue_dlsch_procedures(ue, + proc, + gNB_id, + PDSCH, + ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0], + ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][1], + &ue->dlsch_errors[gNB_id], + mode); + nr_ue_measurement_procedures(2,ue,proc,gNB_id,nr_tti_rx,mode); - /* - write_output("rxF.m","rxF",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0][0],fp->ofdm_symbol_size*14,1,1); - write_output("rxF_ch.m","rxFch",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->dl_ch_estimates[0][0],fp->ofdm_symbol_size*14,1,1); - write_output("rxF_ch_ext.m","rxFche",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->dl_ch_estimates_ext[0][2*50*12],50*12,1,1); - write_output("rxF_ext.m","rxFe",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->rxdataF_ext[0][0],50*12*14,1,1); - write_output("rxF_comp.m","rxFc",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->rxdataF_comp0[0][0],fp->N_RB_DL*12*14,1,1); - write_output("rxF_llr.m","rxFllr",ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->llr[0],(nb_symb_sch-1)*50*12+50*6,1,0); - */ + // deactivate dlsch once dlsch proc is done + ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active = 0; - //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT); } // do procedures for SI-RNTI if ((ue->dlsch_SI[gNB_id]) && (ue->dlsch_SI[gNB_id]->active == 1)) { VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN); + + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + dlsch_config_pdu->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + dlsch_config_pdu->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + dlsch_config_pdu->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + nr_ue_pdsch_procedures(ue, proc, gNB_id, @@ -1912,12 +1942,27 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, // deactivate dlsch once dlsch proc is done ue->dlsch_SI[gNB_id]->active = 0; + // FIXME: It was assumed that SIB1 has only one segment + int harq_pid = PHY_vars_UE_g[0][0]->dlsch_SI[0]->current_harq_pid; + if(ue->dlsch_SI[gNB_id]->harq_processes[harq_pid]->harq_ack.ack == 1) { + nr_rrc_ue_decode_NR_SIB1_Message(&ue->dlsch_SI[gNB_id]->harq_processes[harq_pid]->c[0][0], + ue->dlsch_SI[gNB_id]->harq_processes[harq_pid]->TBS); + } else { + LOG_D(PHY,"SIB1 CRC NOT OK"); + } + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT); } // do procedures for P-RNTI if ((ue->dlsch_p[gNB_id]) && (ue->dlsch_p[gNB_id]->active == 1)) { VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN); + + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + dlsch_config_pdu->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); + dlsch_config_pdu->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); + dlsch_config_pdu->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + nr_ue_pdsch_procedures(ue, proc, gNB_id, @@ -1943,6 +1988,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, // do procedures for RA-RNTI if ((ue->dlsch_ra[gNB_id]) && (ue->dlsch_ra[gNB_id]->active == 1)) { VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN); + + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + dlsch_config_pdu->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); + dlsch_config_pdu->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); + dlsch_config_pdu->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + nr_ue_pdsch_procedures(ue, proc, gNB_id, @@ -1964,46 +2015,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT); } - - // do procedures for C-RNTI - if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active == 1) { - LOG_D(PHY, "DLSCH data reception at nr_tti_rx: %d \n \n", nr_tti_rx); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN); - -#if UE_TIMING_TRACE - start_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]); -#endif - - if (ret_pdsch >= 0) - nr_ue_dlsch_procedures(ue, - proc, - gNB_id, - PDSCH, - ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0], - ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][1], - &ue->dlsch_errors[gNB_id], - mode); - - -#if UE_TIMING_TRACE - stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]); -#if DISABLE_LOG_X - printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0)); - printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0)); -#else - LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0)); - LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0)); -#endif - -#endif - - // deactivate dlsch once dlsch proc is done - ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active = 0; - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT); - - } #if UE_TIMING_TRACE start_meas(&ue->generic_stat); #endif diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h index 231aeb34f4..1f1d076e9d 100644 --- a/openair2/GNB_APP/RRC_nr_paramsvalues.h +++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h @@ -39,6 +39,7 @@ /* cell configuration section name */ #define GNB_CONFIG_STRING_GNB_LIST "gNBs" +#define GNB_CONFIG_STRING_PDCCH_CONFIGSIB1 "pdcch_ConfigSIB1" #define GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON "servingCellConfigCommon" #define GNB_CONFIG_STRING_PHYSCELLID "physCellId" #define GNB_CONFIG_STRING_NTIMINGADVANCEOFFSET "n_TimingAdvanceOffset" @@ -210,6 +211,21 @@ #define CARRIERBANDWIDTH_OKVALUES {11,18,24,25,31,32,38,51,52,65,66,78,79,93,106,107,121,132,133,135,160,162,189,216,217,245,264,270,273} +/*--------------------------------------------------------------------------------------------------------------------*/ +/* pdcch_ConfigSIB1 parameters */ +/*--------------------------------------------------------------------------------------------------------------------*/ +#define CONTROL_RESOURCE_SET_ZERO "controlResourceSetZero" +#define SEARCH_SPACE_ZERO "searchSpaceZero" + +#define PDCCH_CONFIGSIB1PARAMS_DESC(pdcch_ConfigSIB1) { \ +{CONTROL_RESOURCE_SET_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->controlResourceSetZero, defintval:0, TYPE_INT64, 0}, \ +{SEARCH_SPACE_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->searchSpaceZero, defintval:0, TYPE_INT64, 0} \ +} + +#define CONTROL_RESOURCE_SET_ZERO_IDX 0 +#define SEARCH_SPACE_ZERO_IDX 1 +/*--------------------------------------------------------------------------------------------------------------------*/ + /*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ /* Serving Cell Config Common configuration parameters */ /* optname helpstr paramflags XXXptr defXXXval type numelt */ diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 977807d150..7a7a465f06 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -572,6 +572,22 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { gnb_id = *(GNBParamList.paramarray[i][GNB_GNB_ID_IDX].uptr); } + // pdcch_ConfigSIB1 + rrc->carrier.pdcch_ConfigSIB1 = calloc(1,sizeof(NR_PDCCH_ConfigSIB1_t)); + paramdef_t pdcch_ConfigSIB1[] = PDCCH_CONFIGSIB1PARAMS_DESC(rrc->carrier.pdcch_ConfigSIB1); + paramlist_def_t pdcch_ConfigSIB1ParamList = {GNB_CONFIG_STRING_PDCCH_CONFIGSIB1, NULL, 0}; + sprintf(aprefix, "%s.[%i]", GNB_CONFIG_STRING_GNB_LIST, 0); + config_getlist(&pdcch_ConfigSIB1ParamList, NULL, 0, aprefix); + if (pdcch_ConfigSIB1ParamList.numelt > 0) { + sprintf(aprefix, "%s.[%i].%s.[%i]", GNB_CONFIG_STRING_GNB_LIST,0,GNB_CONFIG_STRING_PDCCH_CONFIGSIB1, 0); + config_get(pdcch_ConfigSIB1,sizeof(pdcch_ConfigSIB1)/sizeof(paramdef_t),aprefix); + } + + AssertFatal(rrc->carrier.pdcch_ConfigSIB1->controlResourceSetZero == 10 + || rrc->carrier.pdcch_ConfigSIB1->controlResourceSetZero == 11 + || rrc->carrier.pdcch_ConfigSIB1->controlResourceSetZero == 12, + "controlResourceSetZero %li not suported yet\n", rrc->carrier.pdcch_ConfigSIB1->controlResourceSetZero); + sprintf(aprefix, "%s.[%i]", GNB_CONFIG_STRING_GNB_LIST, 0); config_getlist(&SCCsParamList, NULL, 0, aprefix); diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index 9a5946498d..6b3d6e1c3a 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -33,6 +33,8 @@ #include "LAYER2/NR_MAC_gNB/mac_proto.h" #include +#define reserved 0xffff + const uint8_t nr_slots_per_frame[5] = {10, 20, 40, 80, 160}; // Table 6.3.3.1-5 (38.211) NCS for preamble formats with delta_f_RA = 1.25 KHz @@ -48,6 +50,74 @@ uint16_t NCS_restricted_TypeB_delta_f_RA_5[14] = {36,57,60,63,65,68,71,77,81,8 // Table 6.3.3.1-7 (38.211) NCS for preamble formats with delta_f_RA = 15 * 2mu KHz where mu = {0,1,2,3} uint16_t NCS_unrestricted_delta_f_RA_15[16] = {0,2,4,6,8,10,12,13,15,17,19,23,27,34,46,69}; + +// specification mapping talbe, table_38$x_$y_$z_c$a +// - $x: specification +// - $y: subclause-major +// - $z: subclause-minor +// - $a: ($a)th of column in table, start from zero +const int32_t table_38213_13_1_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, reserved}; // index 15 reserved +const int32_t table_38213_13_1_c2[16] = {24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, 96, 96, 96, reserved}; // index 15 reserved +const int32_t table_38213_13_1_c3[16] = { 2, 2, 2, 3, 3, 3, 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved}; // index 15 reserved +const int32_t table_38213_13_1_c4[16] = { 0, 2, 4, 0, 2, 4, 12, 16, 12, 16, 12, 16, 38, 38, 38, reserved}; // index 15 reserved + +const int32_t table_38213_13_2_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved}; // index 14-15 reserved +const int32_t table_38213_13_2_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved}; // index 14-15 reserved +const int32_t table_38213_13_2_c3[16] = { 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved}; // index 14-15 reserved +const int32_t table_38213_13_2_c4[16] = { 5, 6, 7, 8, 5, 6, 7, 8, 18, 20, 18, 20, 18, 20, reserved, reserved}; // index 14-15 reserved + +const int32_t table_38213_13_3_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved +const int32_t table_38213_13_3_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved +const int32_t table_38213_13_3_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved +const int32_t table_38213_13_3_c4[16] = { 2, 6, 2, 6, 2, 6, 28, 28, 28, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved + +const int32_t table_38213_13_4_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; +const int32_t table_38213_13_4_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48}; +const int32_t table_38213_13_4_c3[16] = { 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 1, 1, 1, 2, 2, 2}; +const int32_t table_38213_13_4_c4[16] = { 0, 1, 2, 3, 4, 0, 1, 2, 3, 4, 12, 14, 16, 12, 14, 16}; + +const int32_t table_38213_13_5_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved +const int32_t table_38213_13_5_c2[16] = {48, 48, 48, 96, 96, 96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved +const int32_t table_38213_13_5_c3[16] = { 1, 2, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved +const int32_t table_38213_13_5_c4[16] = { 4, 4, 4, 0, 56, 0, 56, 0, 56, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved + +const int32_t table_38213_13_6_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved +const int32_t table_38213_13_6_c2[16] = {24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved +const int32_t table_38213_13_6_c3[16] = { 2, 2, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved +const int32_t table_38213_13_6_c4[16] = { 0, 4, 0, 4, 0, 28, 0, 28, 0, 28, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved + +const int32_t table_38213_13_7_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, reserved, reserved, reserved, reserved}; // index 12-15 reserved +const int32_t table_38213_13_7_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 48, 48, 96, 96, reserved, reserved, reserved, reserved}; // index 12-15 reserved +const int32_t table_38213_13_7_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved}; // index 12-15 reserved +const int32_t table_38213_13_7_c4[16] = { 0, 8, 0, 8, 0, 8, 28, 28,-41, 49,-41, 97, reserved, reserved, reserved, reserved}; // index 12-15 reserved, condition A as default + +const int32_t table_38213_13_8_c1[16] = { 1, 1, 1, 1, 3, 3, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved +const int32_t table_38213_13_8_c2[16] = {24, 24, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved +const int32_t table_38213_13_8_c3[16] = { 2, 2, 1, 2, 2, 2, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved +const int32_t table_38213_13_8_c4[16] = { 0, 4, 14, 14,-20, 24,-20, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved, condition A as default + +const int32_t table_38213_13_9_c1[16] = {1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved +const int32_t table_38213_13_9_c2[16] = {96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved +const int32_t table_38213_13_9_c3[16] = { 1, 1, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved +const int32_t table_38213_13_9_c4[16] = { 0, 16, 0, 16, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved + +const int32_t table_38213_13_10_c1[16] = {1, 1, 1, 1, 2, 2, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved +const int32_t table_38213_13_10_c2[16] = {48, 48, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved +const int32_t table_38213_13_10_c3[16] = { 1, 1, 2, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved +const int32_t table_38213_13_10_c4[16] = { 0, 8, 0, 8,-41, 25,-41, 49, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved, condition A as default + +const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5}; // O +const int32_t table_38213_13_11_c2[16] = { 1, 2, 1, 2, 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1}; +const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1}; // M +const int32_t table_38213_13_11_c4[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 2, 1, 2}; // i is even as default + +const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // O, index 14-15 reserved +const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved +const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved + +const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 }; + +const char *prachfmt03[]={"0","1","2","3"}; const char *prachfmt[]={"0","1","2","3", "A1","A2","A3","B1","B4","C0","C2","A1/B1","A2/B2","A3/B3"}; const char *duplex_mode[]={"FDD","TDD"}; @@ -2283,11 +2353,19 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc, long rbg_size_config; int num_entries = 0; int pusch_antenna_ports = 1; // TODO hardcoded number of antenna ports for pusch - NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; - NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]; - NR_PDSCH_Config_t *pdsch_config = bwp->bwp_Dedicated->pdsch_Config->choice.setup; - NR_PUSCH_Config_t *pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup; - NR_SRS_Config_t *srs_config = ubwp->bwp_Dedicated->srs_Config->choice.setup; + + NR_BWP_Downlink_t *bwp = NULL; + NR_BWP_Uplink_t *ubwp = NULL; + NR_PDSCH_Config_t *pdsch_config = NULL; + NR_PUSCH_Config_t *pusch_Config = NULL; + NR_SRS_Config_t *srs_config = NULL; + if(bwp_id > 0) { + bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; + ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]; + pdsch_config = bwp->bwp_Dedicated->pdsch_Config->choice.setup; + pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup; + srs_config = ubwp->bwp_Dedicated->srs_Config->choice.setup; + } switch(format) { /*Only sizes for 0_0 and 1_0 are correct at the moment*/ @@ -2494,6 +2572,11 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc, /// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28 size += 28; size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment + + dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + dci_pdu->time_domain_assignment.nbits = 4; + dci_pdu->vrb_to_prb_mapping.nbits = 1; + break; case NR_DL_DCI_FORMAT_1_1: @@ -2846,3 +2929,374 @@ int binomial(int n, int k) { return c; } +uint32_t get_ssb_slot(uint32_t ssb_index){ + // this function now only support f <= 3GHz + return ssb_index & 0x3 ; + + // return first_symbol(case, freq, ssb_index) / 14 +} + +int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, + NR_MIB_t *mib, + uint8_t extra_bits, + uint32_t ssb_length, + uint32_t ssb_index, + uint32_t ssb_offset_point_a) { + + // deafult for testing + subcarrier_spacing_t scs_ssb = scs_30kHz; + channel_bandwidth_t min_channel_bw = bw_10MHz; + frequency_range_t frequency_range = FR1; + const uint32_t num_slot_per_frame = 20; + + type0_PDCCH_CSS_config->ssb_length = ssb_length; + type0_PDCCH_CSS_config->ssb_index = ssb_index; + type0_PDCCH_CSS_config->frame = (mib->systemFrameNumber.buf[0] >> mib->systemFrameNumber.bits_unused); + + uint16_t frame_number_4lsb = 0; + for (int i=0; i<4; i++) { + frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); + } + + uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] + uint8_t ssb_subcarrier_offset = (uint8_t)mib->ssb_SubcarrierOffset; + + type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame << 4; + type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame | frame_number_4lsb; + + if(type0_PDCCH_CSS_config->ssb_length == 64){ + type0_PDCCH_CSS_config->ssb_index = type0_PDCCH_CSS_config->ssb_index & (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] } + }else{ + if(ssb_subcarrier_offset_msb){ + ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; + } + } + + // assume carrier frequency < 6GHz + subcarrier_spacing_t scs_pdcch; + if(mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){ + scs_pdcch = scs_15kHz; + }else{ //NR_MIB__subCarrierSpacingCommon_scs30or120 + scs_pdcch = scs_30kHz; + } + + uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13 + uint32_t index_4msb = (mib->pdcch_ConfigSIB1.controlResourceSetZero); + uint32_t index_4lsb = (mib->pdcch_ConfigSIB1.searchSpaceZero); + + type0_PDCCH_CSS_config->num_rbs = -1; + type0_PDCCH_CSS_config->num_symbols = -1; + type0_PDCCH_CSS_config->rb_offset = -1; + + // type0-pdcch coreset + switch( (scs_ssb << 5) | scs_pdcch ){ + case (scs_15kHz << 5) | scs_15kHz : + AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n"); + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + type0_PDCCH_CSS_config->num_rbs = table_38213_13_1_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_1_c3[index_4msb]; + type0_PDCCH_CSS_config->rb_offset = table_38213_13_1_c4[index_4msb]; + break; + + case (scs_15kHz << 5) | scs_30kHz: + AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n"); + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + type0_PDCCH_CSS_config->num_rbs = table_38213_13_2_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_2_c3[index_4msb]; + type0_PDCCH_CSS_config->rb_offset = table_38213_13_2_c4[index_4msb]; + break; + + case (scs_30kHz << 5) | scs_15kHz: + if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ + AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n"); + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + type0_PDCCH_CSS_config->num_rbs = table_38213_13_3_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_3_c3[index_4msb]; + type0_PDCCH_CSS_config->rb_offset = table_38213_13_3_c4[index_4msb]; + }else if(min_channel_bw & bw_40MHz){ + AssertFatal(index_4msb < 9, "38.213 Table 13-5 4 MSB out of range\n"); + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + type0_PDCCH_CSS_config->num_rbs = table_38213_13_5_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_5_c3[index_4msb]; + type0_PDCCH_CSS_config->rb_offset = table_38213_13_5_c4[index_4msb]; + }else{ ; } + + break; + + case (scs_30kHz << 5) | scs_30kHz: + if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + type0_PDCCH_CSS_config->num_rbs = table_38213_13_4_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_4_c3[index_4msb]; + type0_PDCCH_CSS_config->rb_offset = table_38213_13_4_c4[index_4msb]; + + LOG_I(MAC,"<<<<<<<<num_rbs,type0_PDCCH_CSS_config->num_symbols,type0_PDCCH_CSS_config->rb_offset ); + + }else if(min_channel_bw & bw_40MHz){ + AssertFatal(index_4msb < 10, "38.213 Table 13-6 4 MSB out of range\n"); + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + type0_PDCCH_CSS_config->num_rbs = table_38213_13_6_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_6_c3[index_4msb]; + type0_PDCCH_CSS_config->rb_offset = table_38213_13_6_c4[index_4msb]; + }else{ ; } + break; + + case (scs_120kHz << 5) | scs_60kHz: + AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n"); + if(index_4msb & 0x7){ + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + }else if(index_4msb & 0x18){ + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 2; + }else{ ; } + + type0_PDCCH_CSS_config->num_rbs = table_38213_13_7_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_7_c3[index_4msb]; + if(!is_condition_A && (index_4msb == 8 || index_4msb == 10)){ + type0_PDCCH_CSS_config->rb_offset = table_38213_13_7_c4[index_4msb] - 1; + }else{ + type0_PDCCH_CSS_config->rb_offset = table_38213_13_7_c4[index_4msb]; + } + break; + + case (scs_120kHz << 5) | scs_120kHz: + AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n"); + if(index_4msb & 0x3){ + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + }else if(index_4msb & 0x0c){ + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 3; + } + + type0_PDCCH_CSS_config->num_rbs = table_38213_13_8_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_8_c3[index_4msb]; + if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ + type0_PDCCH_CSS_config->rb_offset = table_38213_13_8_c4[index_4msb] - 1; + }else{ + type0_PDCCH_CSS_config->rb_offset = table_38213_13_8_c4[index_4msb]; + } + break; + + case (scs_240kHz << 5) | scs_60kHz: + AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n"); + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + type0_PDCCH_CSS_config->num_rbs = table_38213_13_9_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_9_c3[index_4msb]; + type0_PDCCH_CSS_config->rb_offset = table_38213_13_9_c4[index_4msb]; + break; + + case (scs_240kHz << 5) | scs_120kHz: + AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n"); + if(index_4msb & 0x3){ + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; + }else if(index_4msb & 0x0c){ + type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 2; + } + type0_PDCCH_CSS_config->num_rbs = table_38213_13_10_c2[index_4msb]; + type0_PDCCH_CSS_config->num_symbols = table_38213_13_10_c3[index_4msb]; + if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ + type0_PDCCH_CSS_config->rb_offset = table_38213_13_10_c4[index_4msb]-1; + }else{ + type0_PDCCH_CSS_config->rb_offset = table_38213_13_10_c4[index_4msb]; + } + + break; + + default: + break; + } + + AssertFatal(type0_PDCCH_CSS_config->num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined"); + AssertFatal(type0_PDCCH_CSS_config->num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined"); + AssertFatal(type0_PDCCH_CSS_config->rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined"); + + + //uint32_t cell_id = 0; // obtain from L1 later + + //mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset; + //mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1; + +// uint64_t mask = 0x0; +// uint8_t i; +// for(i=0; i<(type0_PDCCH_CSS_config->num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs +// mask = mask >> 1; +// mask = mask | 0x100000000000; +// } + + //LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset); + +// mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask; +// mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset +// +// //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols; +// mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED; +// mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2 +// mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2 +// mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id; +// mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE; +// mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id; + + + // type0-pdcch search space + float big_o; + float big_m; + uint32_t temp; + type0_PDCCH_CSS_config->sfn_c=SFN_C_IMPOSSIBLE; // only valid for mux=1 + type0_PDCCH_CSS_config->n_c=UINT_MAX; + type0_PDCCH_CSS_config->number_of_search_space_per_slot=UINT_MAX; + type0_PDCCH_CSS_config->first_symbol_index=UINT_MAX; + type0_PDCCH_CSS_config->search_space_duration; // element of search space + // 38.213 table 10.1-1 + + /// MUX PATTERN 1 + if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){ + big_o = table_38213_13_11_c1[index_4lsb]; + type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; + big_m = table_38213_13_11_c3[index_4lsb]; + + temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m); + type0_PDCCH_CSS_config->n_c = temp / num_slot_per_frame; + if((temp/num_slot_per_frame) & 0x1){ + type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_1; + }else{ + type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_0; + } + + if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (type0_PDCCH_CSS_config->ssb_index&1)){ + type0_PDCCH_CSS_config->first_symbol_index = type0_PDCCH_CSS_config->num_symbols; + }else{ + type0_PDCCH_CSS_config->first_symbol_index = table_38213_13_11_c4[index_4lsb]; + } + // 38.213 chapter 13: over two consecutive slots + type0_PDCCH_CSS_config->search_space_duration = 2; + } + + if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){ + big_o = table_38213_13_12_c1[index_4lsb]; + type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; + big_m = table_38213_13_12_c3[index_4lsb]; + + if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (type0_PDCCH_CSS_config->ssb_index&1)){ + type0_PDCCH_CSS_config->first_symbol_index = 7; + }else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (type0_PDCCH_CSS_config->ssb_index&1)){ + type0_PDCCH_CSS_config->first_symbol_index = type0_PDCCH_CSS_config->num_symbols; + }else{ + type0_PDCCH_CSS_config->first_symbol_index = 0; + } + // 38.213 chapter 13: over two consecutive slots + type0_PDCCH_CSS_config->search_space_duration = 2; + } + + /// MUX PATTERN 2 + if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 2){ + + if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){ + // 38.213 Table 13-13 + AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n"); + // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot + // sfn_c = SFN_C_EQ_SFN_SSB; + type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index); + switch(type0_PDCCH_CSS_config->ssb_index & 0x3){ // ssb_index(i) mod 4 + case 0: + type0_PDCCH_CSS_config->first_symbol_index = 0; + break; + case 1: + type0_PDCCH_CSS_config->first_symbol_index = 1; + break; + case 2: + type0_PDCCH_CSS_config->first_symbol_index = 6; + break; + case 3: + type0_PDCCH_CSS_config->first_symbol_index = 7; + break; + default: break; + } + + }else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){ + // 38.213 Table 13-14 + AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n"); + // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot + // sfn_c = SFN_C_EQ_SFN_SSB; + type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index); + switch(type0_PDCCH_CSS_config->ssb_index & 0x7){ // ssb_index(i) mod 8 + case 0: + type0_PDCCH_CSS_config->first_symbol_index = 0; + break; + case 1: + type0_PDCCH_CSS_config->first_symbol_index = 1; + break; + case 2: + type0_PDCCH_CSS_config->first_symbol_index = 2; + break; + case 3: + type0_PDCCH_CSS_config->first_symbol_index = 3; + break; + case 4: + type0_PDCCH_CSS_config->first_symbol_index = 12; + type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index) - 1; + break; + case 5: + type0_PDCCH_CSS_config->first_symbol_index = 13; + type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index) - 1; + break; + case 6: + type0_PDCCH_CSS_config->first_symbol_index = 0; + break; + case 7: + type0_PDCCH_CSS_config->first_symbol_index = 1; + break; + default: break; + } + }else{ ; } + // 38.213 chapter 13: over one slot + type0_PDCCH_CSS_config->search_space_duration = 1; + } + + /// MUX PATTERN 3 + if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 3){ + if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){ + // 38.213 Table 13-15 + AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n"); + // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot + // sfn_c = SFN_C_EQ_SFN_SSB; + type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index); + switch(type0_PDCCH_CSS_config->ssb_index & 0x3){ // ssb_index(i) mod 4 + case 0: + type0_PDCCH_CSS_config->first_symbol_index = 4; + break; + case 1: + type0_PDCCH_CSS_config->first_symbol_index = 8; + break; + case 2: + type0_PDCCH_CSS_config->first_symbol_index = 2; + break; + case 3: + type0_PDCCH_CSS_config->first_symbol_index = 6; + break; + default: break; + } + }else{ ; } + // 38.213 chapter 13: over one slot + type0_PDCCH_CSS_config->search_space_duration = 1; + } + + AssertFatal(type0_PDCCH_CSS_config->number_of_search_space_per_slot!=UINT_MAX,""); + +// uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot; +// mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0]; +// mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1]; +// mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4 +// mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8 +// mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16 +// mac->type0_pdcch_dci_config.duration = search_space_duration; +// mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset +// AssertFatal(first_symbol_index!=UINT_MAX,""); +// mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff; + + AssertFatal(type0_PDCCH_CSS_config->sfn_c!=SFN_C_IMPOSSIBLE,""); + AssertFatal(type0_PDCCH_CSS_config->n_c!=UINT_MAX,""); + + type0_PDCCH_CSS_config->n_0 = ((uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m))%num_slot_per_frame; + type0_PDCCH_CSS_config->cset_start_rb = ssb_offset_point_a - type0_PDCCH_CSS_config->rb_offset; + + return 0; +} diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index f31723a7d6..8fbced9186 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -32,9 +32,24 @@ #ifndef __LAYER2_NR_MAC_COMMON_H__ #define __LAYER2_NR_MAC_COMMON_H__ +#include "NR_MIB.h" #include "NR_PDSCH-Config.h" #include "NR_CellGroupConfig.h" #include "nr_mac.h" +#include "openair1/PHY/impl_defs_nr.h" + +#define TABLE_38213_13_1_NUM_INDEXES 15 +#define TABLE_38213_13_2_NUM_INDEXES 14 +#define TABLE_38213_13_3_NUM_INDEXES 9 +#define TABLE_38213_13_4_NUM_INDEXES 16 +#define TABLE_38213_13_5_NUM_INDEXES 9 +#define TABLE_38213_13_6_NUM_INDEXES 10 +#define TABLE_38213_13_7_NUM_INDEXES 12 +#define TABLE_38213_13_8_NUM_INDEXES 8 +#define TABLE_38213_13_9_NUM_INDEXES 4 +#define TABLE_38213_13_10_NUM_INDEXES 8 +#define TABLE_38213_13_11_NUM_INDEXES 16 +#define TABLE_38213_13_12_NUM_INDEXES 14 // =============================================== @@ -94,6 +109,57 @@ typedef enum { NR_RNTI_MCS_C, } nr_rnti_type_t; +typedef enum subcarrier_spacing_e { + scs_15kHz = 0x1, + scs_30kHz = 0x2, + scs_60kHz = 0x4, + scs_120kHz = 0x8, + scs_240kHz = 0x16 +} subcarrier_spacing_t; + +typedef enum channel_bandwidth_e { + bw_5MHz = 0x1, + bw_10MHz = 0x2, + bw_20MHz = 0x4, + bw_40MHz = 0x8, + bw_80MHz = 0x16, + bw_100MHz = 0x32 +} channel_bandwidth_t; + +typedef enum frequency_range_e { + FR1 = 0, + FR2 +} frequency_range_t; + +typedef enum nr_ssb_and_cset_mux_pattern_type_e { + NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=1, + NR_SSB_AND_CSET_MUX_PATTERN_TYPE2, + NR_SSB_AND_CSET_MUX_PATTERN_TYPE3 +} nr_ssb_and_cset_mux_pattern_type_t; + +typedef enum { + SFN_C_MOD_2_EQ_0, + SFN_C_MOD_2_EQ_1, + SFN_C_IMPOSSIBLE +} SFN_C_TYPE; + +typedef struct Type0_PDCCH_CSS_config_s { + int32_t num_rbs; + int32_t num_symbols; + int32_t rb_offset; // Offset from SSB RB0 + uint32_t type0_pdcch_ss_mux_pattern; + uint16_t frame; + SFN_C_TYPE sfn_c; + uint32_t n_c; + uint32_t n_0; + uint32_t number_of_search_space_per_slot; + uint32_t first_symbol_index; + uint32_t search_space_duration; + uint32_t ssb_length; + uint32_t ssb_index; + uint32_t cset_start_rb; +} NR_Type0_PDCCH_CSS_config_t; + uint16_t config_bandwidth(int mu, int nb_rb, int nr_band); void get_frame_type(uint16_t nr_bandP, uint8_t scs_index, lte_frame_type_t *current_type); @@ -178,5 +244,12 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table); uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB); +int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, + NR_MIB_t *mib, + uint8_t extra_bits, + uint32_t ssb_length, + uint32_t ssb_index, + uint32_t ssb_offset_point_a); + int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH); #endif diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h index 5c714e4a93..50918b2e76 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h @@ -75,5 +75,66 @@ extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX]; extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; #endif*/ +// Type0-PDCCH search space +extern const int32_t table_38213_13_1_c1[16]; +extern const int32_t table_38213_13_1_c2[16]; +extern const int32_t table_38213_13_1_c3[16]; +extern const int32_t table_38213_13_1_c4[16]; + +extern const int32_t table_38213_13_2_c1[16]; +extern const int32_t table_38213_13_2_c2[16]; +extern const int32_t table_38213_13_2_c3[16]; +extern const int32_t table_38213_13_2_c4[16]; + +extern const int32_t table_38213_13_3_c1[16]; +extern const int32_t table_38213_13_3_c2[16]; +extern const int32_t table_38213_13_3_c3[16]; +extern const int32_t table_38213_13_3_c4[16]; + +extern const int32_t table_38213_13_4_c1[16]; +extern const int32_t table_38213_13_4_c2[16]; +extern const int32_t table_38213_13_4_c3[16]; +extern const int32_t table_38213_13_4_c4[16]; + +extern const int32_t table_38213_13_5_c1[16]; +extern const int32_t table_38213_13_5_c2[16]; +extern const int32_t table_38213_13_5_c3[16]; +extern const int32_t table_38213_13_5_c4[16]; + +extern const int32_t table_38213_13_6_c1[16]; +extern const int32_t table_38213_13_6_c2[16]; +extern const int32_t table_38213_13_6_c3[16]; +extern const int32_t table_38213_13_6_c4[16]; + +extern const int32_t table_38213_13_7_c1[16]; +extern const int32_t table_38213_13_7_c2[16]; +extern const int32_t table_38213_13_7_c3[16]; +extern const int32_t table_38213_13_7_c4[16]; + +extern const int32_t table_38213_13_8_c1[16]; +extern const int32_t table_38213_13_8_c2[16]; +extern const int32_t table_38213_13_8_c3[16]; +extern const int32_t table_38213_13_8_c4[16]; + +extern const int32_t table_38213_13_9_c1[16]; +extern const int32_t table_38213_13_9_c2[16]; +extern const int32_t table_38213_13_9_c3[16]; +extern const int32_t table_38213_13_9_c4[16]; + +extern const int32_t table_38213_13_10_c1[16]; +extern const int32_t table_38213_13_10_c2[16]; +extern const int32_t table_38213_13_10_c3[16]; +extern const int32_t table_38213_13_10_c4[16]; + +extern const float table_38213_13_11_c1[16]; +extern const int32_t table_38213_13_11_c2[16]; +extern const float table_38213_13_11_c3[16]; +extern const int32_t table_38213_13_11_c4[16]; + +extern const float table_38213_13_12_c1[16]; +extern const int32_t table_38213_13_12_c2[16]; +extern const float table_38213_13_12_c3[16]; + +extern const int32_t table_38213_10_1_1_c2[5]; #endif //DEF_H diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 7f98af2453..828b05c9fc 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -387,13 +387,70 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id]; AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n"); AssertFatal(*css->controlResourceSetId == mac->coreset[bwp_id - 1][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n"); - AssertFatal(css->searchSpaceId != 0, "css->searchSpaceId is 0\n"); + AssertFatal(&css->searchSpaceId != NULL, "css->searchSpaceId is null\n"); AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n"); AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n"); AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n"); mac->SSpace[0][0][ss_id] = css; ss_id++; } + + // TODO: Merge this code in a single function as fill_default_searchSpaceZero() in rrc_gNB_reconfig.c + // Search space zero + if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero)); + if(mac->search_space_zero->controlResourceSetId == NULL) mac->search_space_zero->controlResourceSetId=calloc(1,sizeof(*mac->search_space_zero->controlResourceSetId)); + if(mac->search_space_zero->monitoringSymbolsWithinSlot == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot = calloc(1,sizeof(*mac->search_space_zero->monitoringSymbolsWithinSlot)); + if(mac->search_space_zero->monitoringSymbolsWithinSlot->buf == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot->buf = calloc(1,2); + if(mac->search_space_zero->nrofCandidates == NULL) mac->search_space_zero->nrofCandidates = calloc(1,sizeof(*mac->search_space_zero->nrofCandidates)); + if(mac->search_space_zero->searchSpaceType == NULL) mac->search_space_zero->searchSpaceType = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType)); + if(mac->search_space_zero->searchSpaceType->choice.common == NULL) mac->search_space_zero->searchSpaceType->choice.common=calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common)); + if(mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0)); + mac->search_space_zero->searchSpaceId = 0; + *mac->search_space_zero->controlResourceSetId = 0; + mac->search_space_zero->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*mac->search_space_zero->monitoringSlotPeriodicityAndOffset)); + mac->search_space_zero->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1; + mac->search_space_zero->duration=NULL; + // should be '1100 0000 0000 00'B (LSB first!), first two symbols in slot, adjust if needed + mac->search_space_zero->monitoringSymbolsWithinSlot->buf[1] = 0; + mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6); + mac->search_space_zero->monitoringSymbolsWithinSlot->size = 2; + mac->search_space_zero->monitoringSymbolsWithinSlot->bits_unused = 2; + mac->search_space_zero->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; + mac->search_space_zero->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; + mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0; + mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1; + mac->search_space_zero->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; + mac->search_space_zero->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; + + // Coreset0 + if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0)); + mac->coreset0->controlResourceSetId = 0; + // frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B, + if(mac->coreset0->frequencyDomainResources.buf == NULL) mac->coreset0->frequencyDomainResources.buf = calloc(1,6); + mac->coreset0->frequencyDomainResources.buf[0] = 0xff; + mac->coreset0->frequencyDomainResources.buf[1] = 0; + mac->coreset0->frequencyDomainResources.buf[2] = 0; + mac->coreset0->frequencyDomainResources.buf[3] = 0; + mac->coreset0->frequencyDomainResources.buf[4] = 0; + mac->coreset0->frequencyDomainResources.buf[5] = 0; + mac->coreset0->frequencyDomainResources.size = 6; + mac->coreset0->frequencyDomainResources.bits_unused = 3; + mac->coreset0->duration = 1; + mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved)); + mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2; + mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = 0; // FIXME: mac->scc->physCellId; + mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle; + if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList)); + NR_TCI_StateId_t *tci[8]; + for (int i=0;i<8;i++) { + tci[i]=calloc(1,sizeof(*tci[i])); + *tci[i] = i; + ASN_SEQUENCE_ADD(&mac->coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]); + } + mac->coreset0->tci_StatesPDCCH_ToReleaseList = NULL; + mac->coreset0->tci_PresentInDCI = NULL; + mac->coreset0->pdcch_DMRS_ScramblingID = NULL; + } int nr_rrc_mac_config_req_ue( diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index e97695e201..7bf68f9981 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -76,13 +76,6 @@ /*!\brief value for indicating BSR Timer is not running */ #define NR_MAC_UE_BSR_TIMER_NOT_RUNNING (0xFFFF) - -typedef enum { - SFN_C_MOD_2_EQ_0, - SFN_C_MOD_2_EQ_1, - SFN_C_IMPOSSIBLE -} SFN_C_TYPE; - // LTE structure, might need to be adapted for NR typedef struct { /// buffer status for each lcgid @@ -265,6 +258,11 @@ typedef struct { /// PHR uint8_t PHR_reporting_active; + + NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config; + NR_SearchSpace_t *search_space_zero; + NR_ControlResourceSet_t *coreset0; + } NR_UE_MAC_INST_t; typedef enum seach_space_mask_e { @@ -275,28 +273,6 @@ typedef enum seach_space_mask_e { type3_pdcch = 0x10 } search_space_mask_t; -typedef enum subcarrier_spacing_e { - scs_15kHz = 0x1, - scs_30kHz = 0x2, - scs_60kHz = 0x4, - scs_120kHz = 0x8, - scs_240kHz = 0x16 -} subcarrier_spacing_t; - -typedef enum channel_bandwidth_e { - bw_5MHz = 0x1, - bw_10MHz = 0x2, - bw_20MHz = 0x4, - bw_40MHz = 0x8, - bw_80MHz = 0x16, - bw_100MHz = 0x32 -} channel_bandwidth_t; - -typedef enum frequency_range_e { - FR1 = 0, - FR2 -} frequency_range_t; - typedef struct { uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS: uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213] diff --git a/openair2/LAYER2/NR_MAC_UE/mac_extern.h b/openair2/LAYER2/NR_MAC_UE/mac_extern.h index 54cdc4d149..79d671b8fb 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_extern.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_extern.h @@ -34,58 +34,6 @@ //extern NR_UE_MAC_INST_t *UE_mac_inst; -// Type0-PDCCH search space -extern const int32_t table_38213_13_1_c2[16]; -extern const int32_t table_38213_13_1_c3[16]; -extern const int32_t table_38213_13_1_c4[16]; - -extern const int32_t table_38213_13_2_c2[16]; -extern const int32_t table_38213_13_2_c3[16]; -extern const int32_t table_38213_13_2_c4[16]; - -extern const int32_t table_38213_13_3_c2[16]; -extern const int32_t table_38213_13_3_c3[16]; -extern const int32_t table_38213_13_3_c4[16]; - -extern const int32_t table_38213_13_4_c2[16]; -extern const int32_t table_38213_13_4_c3[16]; -extern const int32_t table_38213_13_4_c4[16]; - -extern const int32_t table_38213_13_5_c2[16]; -extern const int32_t table_38213_13_5_c3[16]; -extern const int32_t table_38213_13_5_c4[16]; - -extern const int32_t table_38213_13_6_c2[16]; -extern const int32_t table_38213_13_6_c3[16]; -extern const int32_t table_38213_13_6_c4[16]; - -extern const int32_t table_38213_13_7_c2[16]; -extern const int32_t table_38213_13_7_c3[16]; -extern const int32_t table_38213_13_7_c4[16]; - -extern const int32_t table_38213_13_8_c2[16]; -extern const int32_t table_38213_13_8_c3[16]; -extern const int32_t table_38213_13_8_c4[16]; - -extern const int32_t table_38213_13_9_c2[16]; -extern const int32_t table_38213_13_9_c3[16]; -extern const int32_t table_38213_13_9_c4[16]; - -extern const int32_t table_38213_13_10_c2[16]; -extern const int32_t table_38213_13_10_c3[16]; -extern const int32_t table_38213_13_10_c4[16]; - -extern const float table_38213_13_11_c1[16]; -extern const int32_t table_38213_13_11_c2[16]; -extern const float table_38213_13_11_c3[16]; -extern const int32_t table_38213_13_11_c4[16]; - -extern const float table_38213_13_12_c1[16]; -extern const int32_t table_38213_13_12_c2[16]; -extern const float table_38213_13_12_c3[16]; - -extern const int32_t table_38213_10_1_1_c2[5]; - // DCI extraction // for PUSCH from TS 38.214 subclause 6.1.2.1.1 extern uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index ab6a047500..1eaa02e77b 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -123,8 +123,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci); uint32_t get_ssb_frame(uint32_t test); -uint32_t get_ssb_slot(uint32_t ssb_index); - uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe); diff --git a/openair2/LAYER2/NR_MAC_UE/mac_vars.c b/openair2/LAYER2/NR_MAC_UE/mac_vars.c index 95dea61a45..4986ab5883 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_vars.c +++ b/openair2/LAYER2/NR_MAC_UE/mac_vars.c @@ -32,64 +32,6 @@ #include "mac_defs.h" -#define reserved 0xffff - -// specification mapping talbe, table_38$x_$y_$z_c$a -// - $x: specification -// - $y: subclause-major -// - $z: subclause-minor -// - $a: ($a)th of column in table, start from zero -const int32_t table_38213_13_1_c2[16] = {24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, 96, 96, 96, reserved}; // index 15 reserved -const int32_t table_38213_13_1_c3[16] = { 2, 2, 2, 3, 3, 3, 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved}; // index 15 reserved -const int32_t table_38213_13_1_c4[16] = { 0, 2, 4, 0, 2, 4, 12, 16, 12, 16, 12, 16, 38, 38, 38, reserved}; // index 15 reserved - -const int32_t table_38213_13_2_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved}; // index 14-15 reserved -const int32_t table_38213_13_2_c3[16] = { 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved}; // index 14-15 reserved -const int32_t table_38213_13_2_c4[16] = { 5, 6, 7, 8, 5, 6, 7, 8, 18, 20, 18, 20, 18, 20, reserved, reserved}; // index 14-15 reserved - -const int32_t table_38213_13_3_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved -const int32_t table_38213_13_3_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved -const int32_t table_38213_13_3_c4[16] = { 2, 6, 2, 6, 2, 6, 28, 28, 28, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved - -const int32_t table_38213_13_4_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48}; -const int32_t table_38213_13_4_c3[16] = { 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 1, 1, 1, 2, 2, 2}; -const int32_t table_38213_13_4_c4[16] = { 0, 1, 2, 3, 4, 0, 1, 2, 3, 4, 12, 14, 16, 12, 14, 16}; - -const int32_t table_38213_13_5_c2[16] = {48, 48, 48, 96, 96, 96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved -const int32_t table_38213_13_5_c3[16] = { 1, 2, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved -const int32_t table_38213_13_5_c4[16] = { 4, 4, 4, 0, 56, 0, 56, 0, 56, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved - -const int32_t table_38213_13_6_c2[16] = {24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved -const int32_t table_38213_13_6_c3[16] = { 2, 2, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved -const int32_t table_38213_13_6_c4[16] = { 0, 4, 0, 4, 0, 28, 0, 28, 0, 28, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved - -const int32_t table_38213_13_7_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 48, 48, 96, 96, reserved, reserved, reserved, reserved}; // index 12-15 reserved -const int32_t table_38213_13_7_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved}; // index 12-15 reserved -const int32_t table_38213_13_7_c4[16] = { 0, 8, 0, 8, 0, 8, 28, 28,-41, 49,-41, 97, reserved, reserved, reserved, reserved}; // index 12-15 reserved, condition A as default - -const int32_t table_38213_13_8_c2[16] = { 1, 1, 1, 1, 3, 3, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved -const int32_t table_38213_13_8_c3[16] = {24, 24, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved -const int32_t table_38213_13_8_c4[16] = { 0, 4, 14, 14,-20, 24,-20, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved, condition A as default - -const int32_t table_38213_13_9_c2[16] = {96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved -const int32_t table_38213_13_9_c3[16] = { 1, 1, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved -const int32_t table_38213_13_9_c4[16] = { 0, 16, 0, 16, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved - -const int32_t table_38213_13_10_c2[16] = {48, 48, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved -const int32_t table_38213_13_10_c3[16] = { 1, 1, 2, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved -const int32_t table_38213_13_10_c4[16] = { 0, 8, 0, 8,-41, 25,-41, 49, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved, condition A as default - -const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5}; // O -const int32_t table_38213_13_11_c2[16] = { 1, 2, 1, 2, 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1}; -const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1}; // M -const int32_t table_38213_13_11_c4[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 2, 1, 2}; // i is even as default - -const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // O, index 14-15 reserved -const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved -const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved - -const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 }; - /* #define mu_pusch 1 // definition table j Table 6.1.2.1.1-4 diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index 4c950a92e6..07dce96f51 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -38,6 +38,7 @@ #include "common/utils/nr/nr_common.h" #include "executables/softmodem-common.h" #include +#include "nfapi_nr_interface.h" #ifdef NR_PDCCH_DCI_TOOLS_DEBUG #define LOG_DCI_D(a...) printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) ->" a) @@ -53,16 +54,22 @@ dci_pdu_rel15_t *def_dci_pdu_rel15; void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) { LOG_D(MAC,"Filling search candidates for DCI\n"); - - rel15->number_of_candidates=4; - rel15->CCE[0]=0; - rel15->L[0]=4; - rel15->CCE[1]=4; - rel15->L[1]=4; - rel15->CCE[2]=8; - rel15->L[2]=4; - rel15->CCE[3]=12; - rel15->L[3]=4; + + if(ss->searchSpaceId == 0) { + rel15->number_of_candidates=1; + rel15->CCE[0]=0; + rel15->L[0]=6; + } else { + rel15->number_of_candidates=4; + rel15->CCE[0]=0; + rel15->L[0]=4; + rel15->CCE[1]=4; + rel15->L[1]=4; + rel15->CCE[2]=8; + rel15->L[2]=4; + rel15->CCE[3]=12; + rel15->L[3]=4; + } } @@ -76,10 +83,19 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t NR_ServingCellConfigCommon_t *scc = mac->scc; NR_BWP_DownlinkCommon_t *bwp_Common = mac->DLbwp[bwp_id - 1]->bwp_Common; NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP; - NR_SearchSpace_t *ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id]; - // CORESET configuration - NR_ControlResourceSet_t *coreset = mac->coreset[bwp_id - 1][coreset_id - 1]; + NR_SearchSpace_t *ss; + NR_ControlResourceSet_t *coreset; + if(ss_id>=0) { + ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id]; + coreset = mac->coreset[bwp_id - 1][coreset_id - 1]; + rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; + } else { + ss = mac->search_space_zero; + coreset = mac->coreset0; + rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1; + } + rel15->coreset.duration = coreset->duration; for (int i = 0; i < 6; i++) rel15->coreset.frequency_domain_resource[i] = coreset->frequencyDomainResources.buf[i]; @@ -95,7 +111,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t rel15->coreset.InterleaverSize = 0; rel15->coreset.ShiftIndex = 0; } - rel15->coreset.CoreSetType = 1; + rel15->coreset.precoder_granularity = coreset->precoderGranularity; // Scrambling RNTI @@ -145,7 +161,24 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t case NR_RNTI_SP_CSI: break; case NR_RNTI_SI: + + // we use DL BWP dedicated + sps = bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12; + + // for SPS=14 8 MSBs in positions 13 down to 6 + monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); + + rel15->rnti = 0xFFFF; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values + rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + + for (int i = 0; i < rel15->num_dci_options; i++) { + rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0); + } + break; + case NR_RNTI_SFI: break; case NR_RNTI_INT: @@ -205,6 +238,10 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl // Fetch configuration for searchSpaceZero // note: The search space with the SearchSpaceId = 0 identifies the search space configured via PBCH (MIB) and in ServingCellConfigCommon (searchSpaceZero). if (pdcch_ConfigCommon->choice.setup->searchSpaceZero){ + if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 == NULL){ + pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1)); + } + *pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 = 0; LOG_D(MAC, "[DCI_CONFIG] Configure SearchSpace#0 of the initial BWP\n"); LOG_W(MAC, "[DCI_CONFIG] This should not be available yet..."); } @@ -326,4 +363,25 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl break; } } + + // Search space 0, CORESET ID 0 + + NR_BWP_DownlinkCommon_t *bwp_Common = bwp->bwp_Common; + NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; + + if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){ + + NR_SearchSpace_t *ss0 = mac->search_space_zero; + fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; + + if (ss0->searchSpaceId == *pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){ + if( (frame%2 == mac->type0_PDCCH_CSS_config.sfn_c) && (slot == mac->type0_PDCCH_CSS_config.n_0) ){ + rel15->num_dci_options = 1; + rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0; + config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1); + fill_dci_search_candidates(ss0, rel15); + } + } + } + } diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index a22291092b..359b631582 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -49,6 +49,7 @@ #include "NR_MAC_COMMON/nr_mac.h" #include "NR_MAC_UE/mac_proto.h" #include "NR_MAC_UE/mac_extern.h" +#include "NR_MAC_COMMON/nr_mac_extern.h" #include "common/utils/nr/nr_common.h" /* PHY */ @@ -787,12 +788,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, } -uint32_t get_ssb_slot(uint32_t ssb_index){ - // this function now only support f <= 3GHz - return ssb_index & 0x3 ; - - // return first_symbol(case, freq, ssb_index) / 14 -} uint8_t table_9_2_2_1[16][8]={ {0,12,2, 0, 0,3,0,0}, @@ -970,7 +965,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, uint16_t frame_number_4lsb = 0; for (int i=0; i<4; i++) frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); - //uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] + uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset; @@ -993,351 +988,26 @@ int8_t nr_ue_decode_mib(module_id_t module_id, LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon); LOG_I(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset); LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position); - LOG_I(MAC,"pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1); + LOG_I(MAC,"pdcch config sib1.controlResourceSetZero: %d\n", (int)mac->mib->pdcch_ConfigSIB1.controlResourceSetZero); + LOG_I(MAC,"pdcch config sib1.searchSpaceZero: %d\n", (int)mac->mib->pdcch_ConfigSIB1.searchSpaceZero); LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred); LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection); LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); #endif - subcarrier_spacing_t scs_ssb = scs_30kHz; // default for - //const uint32_t scs_index = 0; - const uint32_t num_slot_per_frame = 20; - subcarrier_spacing_t scs_pdcch; + get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, mac->mib, extra_bits, ssb_length, ssb_index, + mac->phy_config.config_req.ssb_table.ssb_offset_point_a); - // assume carrier frequency < 6GHz - if(mac->mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){ - scs_pdcch = scs_15kHz; - }else{ //NR_MIB__subCarrierSpacingCommon_scs30or120 - scs_pdcch = scs_30kHz; - } + ssb_index = mac->type0_PDCCH_CSS_config.ssb_index; // TODO: ssb_index should obtain from L1 in case Lssb != 64 + mac->type0_pdcch_ss_mux_pattern = mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern; + mac->type0_pdcch_ss_sfn_c = mac->type0_PDCCH_CSS_config.sfn_c; + mac->type0_pdcch_ss_n_c = mac->type0_PDCCH_CSS_config.n_c; + mac->dl_config_request.sfn = mac->type0_PDCCH_CSS_config.frame; + mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS + channel_bandwidth_t min_channel_bw = bw_10MHz; // default for testing - channel_bandwidth_t min_channel_bw = bw_10MHz; // deafult for testing - - uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13 - frequency_range_t frequency_range = FR1; - uint32_t index_4msb = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero); - uint32_t index_4lsb = (mac->mib->pdcch_ConfigSIB1.searchSpaceZero); - int32_t num_rbs = -1; - int32_t num_symbols = -1; - int32_t rb_offset = -1; - //LOG_I(MAC,"<<<<<<<<mib->pdcch_ConfigSIB1,index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch); - - // type0-pdcch coreset - switch( (scs_ssb << 5)|scs_pdcch ){ - case (scs_15kHz << 5) | scs_15kHz : - AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_1_c2[index_4msb]; - num_symbols = table_38213_13_1_c3[index_4msb]; - rb_offset = table_38213_13_1_c4[index_4msb]; - break; - - case (scs_15kHz << 5) | scs_30kHz: - AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_2_c2[index_4msb]; - num_symbols = table_38213_13_2_c3[index_4msb]; - rb_offset = table_38213_13_2_c4[index_4msb]; - break; - - case (scs_30kHz << 5) | scs_15kHz: - if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ - AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_3_c2[index_4msb]; - num_symbols = table_38213_13_3_c3[index_4msb]; - rb_offset = table_38213_13_3_c4[index_4msb]; - }else if(min_channel_bw & bw_40MHz){ - AssertFatal(index_4msb < 9, "38.213 Table 13-5 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_5_c2[index_4msb]; - num_symbols = table_38213_13_5_c3[index_4msb]; - rb_offset = table_38213_13_5_c4[index_4msb]; - }else{ ; } - - break; - - case (scs_30kHz << 5) | scs_30kHz: - if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_4_c2[index_4msb]; - num_symbols = table_38213_13_4_c3[index_4msb]; - rb_offset = table_38213_13_4_c4[index_4msb]; - LOG_I(MAC,"<<<<<<<<type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_6_c2[index_4msb]; - num_symbols = table_38213_13_6_c3[index_4msb]; - rb_offset = table_38213_13_6_c4[index_4msb]; - }else{ ; } - break; - - case (scs_120kHz << 5) | scs_60kHz: - AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n"); - if(index_4msb & 0x7){ - mac->type0_pdcch_ss_mux_pattern = 1; - }else if(index_4msb & 0x18){ - mac->type0_pdcch_ss_mux_pattern = 2; - }else{ ; } - - num_rbs = table_38213_13_7_c2[index_4msb]; - num_symbols = table_38213_13_7_c3[index_4msb]; - if(!is_condition_A && (index_4msb == 8 || index_4msb == 10)){ - rb_offset = table_38213_13_7_c4[index_4msb] - 1; - }else{ - rb_offset = table_38213_13_7_c4[index_4msb]; - } - break; - - case (scs_120kHz << 5) | scs_120kHz: - AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n"); - if(index_4msb & 0x3){ - mac->type0_pdcch_ss_mux_pattern = 1; - }else if(index_4msb & 0x0c){ - mac->type0_pdcch_ss_mux_pattern = 3; - } - - num_rbs = table_38213_13_8_c2[index_4msb]; - num_symbols = table_38213_13_8_c3[index_4msb]; - if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ - rb_offset = table_38213_13_8_c4[index_4msb] - 1; - }else{ - rb_offset = table_38213_13_8_c4[index_4msb]; - } - break; - - case (scs_240kHz << 5) | scs_60kHz: - AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n"); - mac->type0_pdcch_ss_mux_pattern = 1; - num_rbs = table_38213_13_9_c2[index_4msb]; - num_symbols = table_38213_13_9_c3[index_4msb]; - rb_offset = table_38213_13_9_c4[index_4msb]; - break; - - case (scs_240kHz << 5) | scs_120kHz: - AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n"); - if(index_4msb & 0x3){ - mac->type0_pdcch_ss_mux_pattern = 1; - }else if(index_4msb & 0x0c){ - mac->type0_pdcch_ss_mux_pattern = 2; - } - num_rbs = table_38213_13_10_c2[index_4msb]; - num_symbols = table_38213_13_10_c3[index_4msb]; - if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){ - rb_offset = table_38213_13_10_c4[index_4msb]-1; - }else{ - rb_offset = table_38213_13_10_c4[index_4msb]; - } - - break; - - default: - break; - } - - AssertFatal(num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined"); - AssertFatal(num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined"); - AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined"); - - //uint32_t cell_id = 0; // obtain from L1 later - - //mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset; - //mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1; - uint64_t mask = 0x0; - uint8_t i; - for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs - mask = mask >> 1; - mask = mask | 0x100000000000; - } - //LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset); - /* - mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask; - mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset - - //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols; - mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED; - mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2 - mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2 - mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id; - mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE; - mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id; - */ - - - // type0-pdcch search space - float big_o; - float big_m; - uint32_t temp; - SFN_C_TYPE sfn_c=SFN_C_IMPOSSIBLE; // only valid for mux=1 - uint32_t n_c=UINT_MAX; - uint32_t number_of_search_space_per_slot=UINT_MAX; -// uint32_t first_symbol_index=UINT_MAX; -// uint32_t search_space_duration; // element of search space - // 38.213 table 10.1-1 - - /// MUX PATTERN 1 - if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){ - big_o = table_38213_13_11_c1[index_4lsb]; - number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; - big_m = table_38213_13_11_c3[index_4lsb]; - - temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(ssb_index*big_m); - n_c = temp / num_slot_per_frame; - if((temp/num_slot_per_frame) & 0x1){ - sfn_c = SFN_C_MOD_2_EQ_1; - }else{ - sfn_c = SFN_C_MOD_2_EQ_0; - } - -// if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (ssb_index&1)){ -// first_symbol_index = num_symbols; -// }else{ -// first_symbol_index = table_38213_13_11_c4[index_4lsb]; -// } - // 38.213 chapter 13: over two consecutive slots -// search_space_duration = 2; - } - - if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){ - big_o = table_38213_13_12_c1[index_4lsb]; - number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; - big_m = table_38213_13_12_c3[index_4lsb]; - -// if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (ssb_index&1)){ -// first_symbol_index = 7; -// }else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (ssb_index&1)){ -// first_symbol_index = num_symbols; -// }else{ -// first_symbol_index = 0; -// } - // 38.213 chapter 13: over two consecutive slots - //search_space_duration = 2; - } - - /// MUX PATTERN 2 - if(mac->type0_pdcch_ss_mux_pattern == 2){ - - if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){ - // 38.213 Table 13-13 - AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n"); - // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot - // sfn_c = SFN_C_EQ_SFN_SSB; - n_c = get_ssb_slot(ssb_index); -// switch(ssb_index & 0x3){ // ssb_index(i) mod 4 -// case 0: -// first_symbol_index = 0; -// break; -// case 1: -// first_symbol_index = 1; -// break; -// case 2: -// first_symbol_index = 6; -// break; -// case 3: -// first_symbol_index = 7; -// break; -// default: break; -// } - - }else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){ - // 38.213 Table 13-14 - AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n"); - // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot - // sfn_c = SFN_C_EQ_SFN_SSB; - n_c = get_ssb_slot(ssb_index); - switch(ssb_index & 0x7){ // ssb_index(i) mod 8 - case 0: -// first_symbol_index = 0; - break; - case 1: -// first_symbol_index = 1; - break; - case 2: -// first_symbol_index = 2; - break; - case 3: -// first_symbol_index = 3; - break; - case 4: -// first_symbol_index = 12; - n_c = get_ssb_slot(ssb_index) - 1; - break; - case 5: -// first_symbol_index = 13; - n_c = get_ssb_slot(ssb_index) - 1; - break; - case 6: -// first_symbol_index = 0; - break; - case 7: -// first_symbol_index = 1; - break; - default: break; - } - }else{ ; } - // 38.213 chapter 13: over one slot -// search_space_duration = 1; - } - - /// MUX PATTERN 3 - if(mac->type0_pdcch_ss_mux_pattern == 3){ - if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){ - // 38.213 Table 13-15 - AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n"); - // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot - // sfn_c = SFN_C_EQ_SFN_SSB; - n_c = get_ssb_slot(ssb_index); -// switch(ssb_index & 0x3){ // ssb_index(i) mod 4 -// case 0: -// first_symbol_index = 4; -// break; -// case 1: -// first_symbol_index = 8; -// break; -// case 2: -// first_symbol_index = 2; -// break; -// case 3: -// first_symbol_index = 6; -// break; -// default: break; -// } - }else{ ; } - // 38.213 chapter 13: over one slot -// search_space_duration = 1; - } - - AssertFatal(number_of_search_space_per_slot!=UINT_MAX,""); - /* - uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot; - mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0]; - mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1]; - mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4 - mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8 - mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16 - mac->type0_pdcch_dci_config.duration = search_space_duration; - mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset - AssertFatal(first_symbol_index!=UINT_MAX,""); - mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff; - */ - AssertFatal(sfn_c!=SFN_C_IMPOSSIBLE,""); - AssertFatal(n_c!=UINT_MAX,""); - mac->type0_pdcch_ss_sfn_c = sfn_c; - mac->type0_pdcch_ss_n_c = n_c; - - // fill in the elements in config request inside P5 message - mac->phy_config.Mod_id = module_id; - mac->phy_config.CC_id = cc_id; - - mac->dl_config_request.sfn = frame; - mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS - - //} return 0; - } @@ -2895,6 +2565,11 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p dlsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_DLBWP); dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP); + LOG_D(MAC,"riv = %i\n", riv); + LOG_D(MAC,"n_RB_DLBWP = %i\n", n_RB_DLBWP); + LOG_D(MAC,"number_rbs = %i\n", dlsch_config_pdu->number_rbs); + LOG_D(MAC,"start_rb = %i\n", dlsch_config_pdu->start_rb); + } if(pusch_config_pdu != NULL){ /* @@ -3058,6 +2733,11 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, SLIV2SL(startSymbolAndLength,&S,&L); dlsch_config_pdu->start_symbol=S; dlsch_config_pdu->number_symbols=L; + + LOG_I(MAC,"SLIV = %i\n", startSymbolAndLength); + LOG_I(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol); + LOG_I(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols); + } else {// Default configuration from tables // k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; @@ -3643,14 +3323,35 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr */ dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; - //fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_pdu_1_0 = dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + + NR_ServingCellConfigCommon_t *scc = mac->scc; + NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP; + + if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){ + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH; + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + } + else if(rnti == SI_RNTI) { + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH; + dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + } + else { + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + } + /* IDENTIFIER_DCI_FORMATS */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ - nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val); + nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,dlsch_config_pdu_1_0->BWPSize,dci->frequency_domain_assignment.val); + /* TIME_DOM_RESOURCE_ASSIGNMENT */ if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0) return -1; @@ -3659,11 +3360,17 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr mac->scc->dmrs_TypeA_Position, dlsch_config_pdu_1_0->number_symbols); dlsch_config_pdu_1_0->dmrsConfigType = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1; + /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ - if (dlsch_config_pdu_1_0->number_symbols == 2) - dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; - else - dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2; + //if (dlsch_config_pdu_1_0->number_symbols == 2) + // dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; + //else + // dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2; + + /* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214, + using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */ + dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; + /* VRB_TO_PRB_MAPPING */ dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; /* MCS */ @@ -3724,12 +3431,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr dlsch_config_pdu_1_0->pucch_resource_id, dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind); - if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){ - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH; - } else { - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - } - // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); @@ -4014,7 +3715,7 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ case NR_RNTI_RA: case NR_RNTI_TC: case NR_RNTI_P: - case NR_RNTI_SI: + //case NR_RNTI_SI: if (mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero) { uint8_t bwp_id = 1; uint8_t coreset_id = 0; // assuming controlResourceSetId is 0 for controlResourceSetZero @@ -4024,6 +3725,9 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); } break; + case NR_RNTI_SI: + N_RB = mac->type0_PDCCH_CSS_config.num_rbs; + break; case NR_RNTI_C: N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275); break; @@ -4263,23 +3967,42 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, break; case NR_RNTI_SI: - /* - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++); - // Time domain assignment 4 bit - for (int i=0; i<4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); - // MCS 5bit //bit over 32, so dci_pdu ++ - for (int i=0; i<5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); - // Redundancy version 2bit - for (int i=0; i<2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++); - */ + + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; + + // VRB to PRB mapping 1 bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; + + // MCS 5bit //bit over 32, so dci_pdu ++ + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + + // Redundancy version 2 bit + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; + + // System information indicator 1 bit + pos++; + dci_pdu_rel15->system_info_indicator = (*dci_pdu>>(dci_size-pos))&0x1; + + LOG_D(MAC,"N_RB = %i\n", N_RB); + LOG_D(MAC,"dci_size = %i\n", dci_size); + LOG_D(MAC,"fsize = %i\n", fsize); + LOG_D(MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); + break; case NR_RNTI_TC: diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index ab49fcdc8c..674d30b794 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -357,6 +357,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, if (secondaryCellGroup) { + RC.nrmac[Mod_idP]->secondaryCellGroupCommon = secondaryCellGroup; + NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; if (add_ue == 1 && get_softmodem_params()->phy_test) { const int UE_id = add_new_nr_ue(Mod_idP,rnti); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 5d701bf5b8..b2f1f82d7b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -491,6 +491,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, // This schedules MIB schedule_nr_mib(module_idP, frame, slot, slots_per_frame[*scc->ssbSubcarrierSpacing]); + // This schedules SIB1 + schedule_nr_sib1(module_idP, frame, slot); + // This schedule PRACH if we are not in phy_test mode if (get_softmodem_params()->phy_test == 0) schedule_nr_prach(module_idP, frame, slot); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 92af24a04d..40691b3315 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -30,6 +30,7 @@ */ +#include "GNB_APP/RRC_nr_paramsvalues.h" #include "assertions.h" #include "NR_MAC_gNB/nr_mac_gNB.h" #include "NR_MAC_gNB/mac_proto.h" @@ -38,21 +39,19 @@ #include "common/utils/LOG/vcd_signal_dumper.h" #include "UTIL/OPT/opt.h" #include "OCG.h" -#include "OCG_extern.h" - #include "RRC/NR/nr_rrc_extern.h" +#include "common/utils/nr/nr_common.h" -//#include "LAYER2/MAC/pre_processor.c" #include "pdcp.h" -#include "intertask_interface.h" - #define ENABLE_MAC_PAYLOAD_DEBUG #define DEBUG_eNB_SCHEDULER 1 #include "common/ran_context.h" +#include "executables/softmodem-common.h" + extern RAN_CONTEXT_t RC; extern uint8_t SSB_Table[38]; @@ -153,6 +152,17 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1); dl_req->nPDUs++; } + + // Get type0_PDCCH_CSS_config parameters + NR_DL_FRAME_PARMS *frame_parms = &RC.gNB[module_idP]->frame_parms; + NR_MIB_t *mib = RC.nrrrc[module_idP]->carrier.mib.message.choice.mib; + uint8_t gNB_xtra_byte = 0; + for (int i = 0; i < 8; i++) { + gNB_xtra_byte |= ((RC.gNB[module_idP]->pbch.pbch_a >> (31 - i)) & 1) << (7 - i); + } + get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config, mib, gNB_xtra_byte, frame_parms->Lmax, + frame_parms->ssb_index, frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB); + } // checking if there is any SSB in slot @@ -212,3 +222,271 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int CC_id) { for (int rb = 0; rb < 20; rb++) vrb_map[rbStart + rb] = 1; } + +void schedule_control_sib1(module_id_t module_id, + int CC_id, + int time_domain_allocation, + uint8_t mcsTableIdx, + uint8_t mcs, + uint8_t numDmrsCdmGrpsNoData, + int num_total_bytes) { + + gNB_MAC_INST *gNB_mac = RC.nrmac[module_id]; + NR_ServingCellConfigCommon_t *servingcellconfigcommon = gNB_mac->common_channels[CC_id].ServingCellConfigCommon; + uint8_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; + + if (gNB_mac->sched_ctrlCommon == NULL){ + gNB_mac->sched_ctrlCommon = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon)); + gNB_mac->sched_ctrlCommon->search_space = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->search_space)); + gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp)); + gNB_mac->sched_ctrlCommon->coreset = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->coreset)); + gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp)); + fill_default_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space); + fill_default_coresetZero(gNB_mac->sched_ctrlCommon->coreset,servingcellconfigcommon); + fill_default_initialDownlinkBWP(gNB_mac->sched_ctrlCommon->active_bwp,servingcellconfigcommon); + } + + gNB_mac->sched_ctrlCommon->time_domain_allocation = time_domain_allocation; + gNB_mac->sched_ctrlCommon->mcsTableIdx = mcsTableIdx; + gNB_mac->sched_ctrlCommon->mcs = mcs; + gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData = numDmrsCdmGrpsNoData; + gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes; + + uint8_t nr_of_candidates; + find_aggregation_candidates(&gNB_mac->sched_ctrlCommon->aggregation_level, &nr_of_candidates, gNB_mac->sched_ctrlCommon->search_space); + + gNB_mac->sched_ctrlCommon->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], + gNB_mac->sched_ctrlCommon->active_bwp, + gNB_mac->sched_ctrlCommon->coreset, + gNB_mac->sched_ctrlCommon->aggregation_level, + 0, + 0, + nr_of_candidates); + + if (gNB_mac->sched_ctrlCommon->cce_index < 0) { + LOG_E(MAC, "%s(): could not find CCE for coreset0\n", __func__); + return; + } + + const uint16_t bwpSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs; + int rbStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb; + + // Calculate number of PRB_DMRS + uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6; + + // Calculate number of symbols + struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength; + int startSymbolIndex, nrOfSymbols; + SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); + + LOG_I(MAC,"SLIV = %i\n", startSymbolAndLength); + LOG_I(MAC,"startSymbolIndex = %i\n", startSymbolIndex); + LOG_I(MAC,"nrOfSymbols = %i\n", nrOfSymbols); + + int rbSize = 0; + uint32_t TBS = 0; + do { + rbSize++; + TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), + nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), + rbSize, nrOfSymbols, N_PRB_DMRS,0, 0,1) >> 3; + } while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && TBS < gNB_mac->sched_ctrlCommon->num_total_bytes); + gNB_mac->sched_ctrlCommon->rbSize = rbSize; + gNB_mac->sched_ctrlCommon->rbStart = 0; + + // Mark the corresponding RBs as used + for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->rbSize; rb++) { + vrb_map[rb + rbStart] = 1; + } +} + +void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, + nfapi_nr_dl_tti_request_body_t *dl_req, + uint32_t TBS, + int StartSymbolIndex, + int NrOfSymbols) { + + gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP]; + NR_COMMON_channels_t *cc = gNB_mac->common_channels; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + NR_CellGroupConfig_t *secondaryCellGroup = gNB_mac->secondaryCellGroupCommon; + NR_BWP_Downlink_t *bwp = gNB_mac->sched_ctrlCommon->active_bwp; + + nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; + memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); + dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; + dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); + + nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs+1]; + memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); + dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE; + dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu)); + + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; + + pdcch_pdu_rel15->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1; + + pdsch_pdu_rel15->pduBitmap = 0; + pdsch_pdu_rel15->rnti = SI_RNTI; + pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++; + + pdsch_pdu_rel15->BWPSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs; + pdsch_pdu_rel15->BWPStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb; + + pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing; + if (bwp->bwp_Common->genericParameters.cyclicPrefix) { + pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix; + } else { + pdsch_pdu_rel15->CyclicPrefix = 0; + } + + pdsch_pdu_rel15->NrOfCodewords = 1; + pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs,0); + pdsch_pdu_rel15->qamModOrder[0] = 2; + pdsch_pdu_rel15->mcsIndex[0] = gNB_mac->sched_ctrlCommon->mcs; + pdsch_pdu_rel15->mcsTable[0] = 0; + pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[0]; + pdsch_pdu_rel15->dataScramblingId = *scc->physCellId; + pdsch_pdu_rel15->nrOfLayers = 1; + pdsch_pdu_rel15->transmissionScheme = 0; + pdsch_pdu_rel15->refPoint = 1; + pdsch_pdu_rel15->dmrsConfigType = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1; + pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId; + pdsch_pdu_rel15->SCID = 0; + pdsch_pdu_rel15->numDmrsCdmGrpsNoData = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData; + pdsch_pdu_rel15->dmrsPorts = 1; + pdsch_pdu_rel15->resourceAlloc = 1; + pdsch_pdu_rel15->rbStart = gNB_mac->sched_ctrlCommon->rbStart; + pdsch_pdu_rel15->rbSize = gNB_mac->sched_ctrlCommon->rbSize; + pdsch_pdu_rel15->VRBtoPRBMapping = 0; + pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx); + pdsch_pdu_rel15->TBSize[0] = TBS; + pdsch_pdu_rel15->mcsTable[0] = gNB_mac->sched_ctrlCommon->mcsTableIdx; + pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex; + pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; + + pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup, scc->dmrs_TypeA_Position, pdsch_pdu_rel15->NrOfSymbols); + + dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; + memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t) * MAX_DCI_CORESET); + + dci_pdu_rel15[0].bwp_indicator.val = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id; + + // frequency domain assignment + dci_pdu_rel15[0].frequency_domain_assignment.val = + PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, + pdsch_pdu_rel15->rbStart, + gNB_mac->type0_PDCCH_CSS_config.num_rbs); + + dci_pdu_rel15[0].time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation; + dci_pdu_rel15[0].mcs = gNB_mac->sched_ctrlCommon->mcs; + dci_pdu_rel15[0].rv = pdsch_pdu_rel15->rvIndex[0]; + dci_pdu_rel15[0].harq_pid = 0; + dci_pdu_rel15[0].ndi = 0; + dci_pdu_rel15[0].dai[0].val = 0; + dci_pdu_rel15[0].tpc = 0; // table 7.2.1-1 in 38.213 + dci_pdu_rel15[0].pucch_resource_indicator = 0; + dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator.val = 0; + dci_pdu_rel15[0].antenna_ports.val = 0; + dci_pdu_rel15[0].dmrs_sequence_initialization.val = pdsch_pdu_rel15->SCID; + + nr_configure_pdcch(gNB_mac, + pdcch_pdu_rel15, + SI_RNTI, + gNB_mac->sched_ctrlCommon->search_space, + gNB_mac->sched_ctrlCommon->coreset, + scc, + bwp, + gNB_mac->sched_ctrlCommon->aggregation_level, + gNB_mac->sched_ctrlCommon->cce_index); + + int dci_formats[2]; + int rnti_types[2]; + + dci_formats[0] = NR_DL_DCI_FORMAT_1_0; + rnti_types[0] = NR_RNTI_SI; + + fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pdsch_pdu_rel15->BWPSize,gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id); + + dl_req->nPDUs += 2; + + LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); + LOG_D(MAC,"BWPStart: %i\n", pdcch_pdu_rel15->BWPStart); + LOG_D(MAC,"SubcarrierSpacing: %i\n", pdcch_pdu_rel15->SubcarrierSpacing); + LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix); + LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex); + LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols); + for(int n=0;n<6;n++) LOG_D(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]); + LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType); + LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize); + LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize); + LOG_D(MAC,"CoreSetType: %i\n", pdcch_pdu_rel15->CoreSetType); + LOG_D(MAC,"ShiftIndex: %i\n", pdcch_pdu_rel15->ShiftIndex); + LOG_D(MAC,"precoderGranularity: %i\n", pdcch_pdu_rel15->precoderGranularity); + LOG_D(MAC,"numDlDci: %i\n", pdcch_pdu_rel15->numDlDci); + +} + +void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) { + + LOG_D(MAC,"Schedule_nr_sib1: frameP = %i, slotP = %i\n", frameP, slotP); + + // static values + const int CC_id = 0; + int time_domain_allocation = 2; // FIXME: For OAI-UE (2), For 3rd party implementation and 3GPP compliant (4) + uint8_t mcsTableIdx = 0; + uint8_t mcs = 0; + uint8_t numDmrsCdmGrpsNoData = 1; // FIXME: For OAI-UE (1), For 3rd party implementation and 3GPP compliant (2) + + gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP]; + + if( (frameP%2 == gNB_mac->type0_PDCCH_CSS_config.sfn_c) && (slotP == gNB_mac->type0_PDCCH_CSS_config.n_0) && (gNB_mac->type0_PDCCH_CSS_config.num_rbs > 0) ) { + + LOG_D(MAC,"> SIB1 transmission\n"); + + // Get SIB1 + uint8_t sib1_payload[100]; + uint8_t sib1_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, BCCH, 1, sib1_payload); + LOG_D(MAC,"sib1_sdu_length = %i\n", sib1_sdu_length); + LOG_I(MAC,"SIB1: \n"); + for (int i=0;ipre_processor_sib1(module_idP, CC_id, time_domain_allocation, mcsTableIdx, mcs, numDmrsCdmGrpsNoData, sib1_sdu_length);; + + // Calculate number of symbols + int startSymbolIndex, nrOfSymbols; + struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); + + // Calculate number of PRB_DMRS + uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6; + + const uint32_t TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), + nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), + gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS,0 ,0 ,1 ) >> 3; + + nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; + nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, TBS, startSymbolIndex, nrOfSymbols); + + const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs; + nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req]; + + // Data to be transmitted + bzero(tx_req->TLVs[0].value.direct,MAX_NR_DLSCH_PAYLOAD_BYTES); + memcpy(tx_req->TLVs[0].value.direct, sib1_payload, sib1_sdu_length); + + tx_req->PDU_length = TBS; + tx_req->PDU_index = gNB_mac->pdu_index[0]++; + tx_req->num_TLV = 1; + tx_req->TLVs[0].length = TBS + 2; + gNB_mac->TX_req[CC_id].Number_of_PDUs++; + gNB_mac->TX_req[CC_id].SFN = frameP; + gNB_mac->TX_req[CC_id].Slot = slotP; + } +} \ No newline at end of file diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 7a7fe1288c..5853486e7b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -628,7 +628,8 @@ void nr_schedule_ue_spec(module_id_t module_id, gNB_MAC_INST *gNB_mac = RC.nrmac[module_id]; /* PREPROCESSOR */ - gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd); + //gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd); + nr_simple_dlsch_preprocessor(module_id, frame, slot, num_slots_per_tdd); NR_UE_info_t *UE_info = &gNB_mac->UE_info; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index c6d9a86fce..c927eba687 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -180,7 +180,14 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, // NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; int coreset_id = coreset->controlResourceSetId; - int *cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id]; + + int *cce_list; + if(bwp->bwp_Id == 0) { + cce_list = nr_mac->cce_list[1][0]; + } else { + cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id]; + } + int n_rb=0; for (int i=0;i<6;i++) @@ -678,8 +685,12 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac, pdcch_pdu->ShiftIndex = 0; } - pdcch_pdu->CoreSetType = 1; - + if(coreset->controlResourceSetId == 0) { + pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1; + } else{ + pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; + } + //precoderGranularity pdcch_pdu->precoderGranularity = coreset->precoderGranularity; @@ -1248,22 +1259,43 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc, break; case NR_RNTI_SI: - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - for (int i=0; ifrequency_domain_assignment.val>>(fsize-i-1))&1)<<(dci_size-pos++); - // Time domain assignment 4 bit - for (int i=0; i<4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val>>(3-i))&1)<<(dci_size-pos++); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); - // MCS 5bit //bit over 32, so dci_pdu ++ - for (int i=0; i<5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); - // Redundancy version 2bit - for (int i=0; i<2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++); - + + pos=1; + + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + for (int i=0; ifrequency_domain_assignment.val>>(fsize-1-i))&1)<<(dci_size-pos++); + + // Time domain assignment 4 bit + for (int i=0; i<4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val>>(3-i))&1)<<(dci_size-pos++); + + // VRB to PRB mapping 1 bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); + + // MCS 5bit //bit over 32, so dci_pdu ++ + for (int i=0; i<5; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); + + // Redundancy version 2 bit + for (int i=0; i<2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++); + + // System information indicator 1bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->system_info_indicator&1)<<(dci_size-pos++); + + // reserved 15 bits + + LOG_D(PHY,"dci_size = %i\n", dci_size); + LOG_D(PHY,"fsize = %i\n", fsize); + LOG_D(PHY,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(PHY,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(PHY,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(PHY,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(PHY,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(PHY,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); + break; case NR_RNTI_TC: diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index b3cd91fd01..f98ceb3935 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -80,6 +80,15 @@ void nr_schedule_ue_spec(module_id_t module_id, sub_frame_t slot, int num_slots_per_tdd); +void schedule_control_sib1(module_id_t module_id, + int CC_id, + int time_domain_allocation, + uint8_t mcsTableIdx, + uint8_t mcs, + uint8_t numDmrsCdmGrpsNoData, + int num_total_bytes); + +void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP); /* \brief default preprocessor */ void nr_simple_dlsch_preprocessor(module_id_t module_id, frame_t frame, diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index b7db1f67aa..6c65a5789d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -87,6 +87,8 @@ void mac_top_init_gNB(void) else RC.nrmac[i]->pre_processor_dl = nr_simple_dlsch_preprocessor; + RC.nrmac[i]->pre_processor_sib1 = schedule_control_sib1; + }//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++) AssertFatal(rlc_module_init(1) == 0,"Could not initialize RLC layer\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 656d1c3e7c..1780aa3f9f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -442,6 +442,14 @@ typedef void (*nr_pp_impl_dl)(module_id_t mod_id, sub_frame_t slot, int num_slots_per_tdd); +typedef void (*nr_pp_impl_sib1)(module_id_t module_id, + int CC_id, + int time_domain_allocation, + uint8_t mcsTableIdx, + uint8_t mcs, + uint8_t numDmrsCdmGrpsNoData, + int num_total_bytes); + /*! \brief top level eNB MAC structure */ typedef struct gNB_MAC_INST_s { /// Ethernet parameters for northbound midhaul interface @@ -507,6 +515,12 @@ typedef struct gNB_MAC_INST_s { /// DL preprocessor for differentiated scheduling nr_pp_impl_dl pre_processor_dl; + + NR_UE_sched_ctrl_t *sched_ctrlCommon; + NR_CellGroupConfig_t *secondaryCellGroupCommon; + NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config; + nr_pp_impl_sib1 pre_processor_sib1; + } gNB_MAC_INST; #endif /*__LAYER2_NR_MAC_GNB_H__ */ diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index d680e454e8..e15c365375 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -191,6 +191,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu, (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_SIB; + LOG_D(MAC,"[L2][IF MODULE][DL INDICATION][RX_IND], SIB case Number of PDUs: %d \n", dl_info->rx_ind->number_pdus); break; case FAPI_NR_RX_PDU_TYPE_DLSCH: diff --git a/openair2/RRC/NR/L2_nr_interface.c b/openair2/RRC/NR/L2_nr_interface.c index d117b18199..57e723aff5 100644 --- a/openair2/RRC/NR/L2_nr_interface.c +++ b/openair2/RRC/NR/L2_nr_interface.c @@ -30,11 +30,11 @@ #include "platform_types.h" #include "nr_rrc_defs.h" -#include "nr_rrc_extern.h" #include "common/utils/LOG/log.h" #include "pdcp.h" -#include "msc.h" #include "common/ran_context.h" +#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h" +#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h" #include "intertask_interface.h" @@ -43,6 +43,104 @@ extern RAN_CONTEXT_t RC; + +int generate_pdcch_ConfigSIB1(NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1, + long ssbSubcarrierSpacing, + long subCarrierSpacingCommon, + channel_bandwidth_t min_channel_bw) { + + nr_ssb_and_cset_mux_pattern_type_t mux_pattern; + + switch (ssbSubcarrierSpacing) { + + case NR_SubcarrierSpacing_kHz15: + if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz15) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_1_NUM_INDEXES; + mux_pattern = table_38213_13_1_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz30) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_2_NUM_INDEXES; + mux_pattern = table_38213_13_2_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else { + AssertFatal(true,"Invalid subCarrierSpacingCommon\n"); + } + break; + + case NR_SubcarrierSpacing_kHz30: + if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz15) { + + if ( (min_channel_bw == bw_5MHz) || (min_channel_bw == bw_10MHz) ) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_3_NUM_INDEXES; + mux_pattern = table_38213_13_3_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else if (min_channel_bw == bw_40MHz) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_5_NUM_INDEXES; + mux_pattern = table_38213_13_5_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else { + AssertFatal(true,"Invalid min_bandwidth\n"); + } + + } else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz30) { + + if ( (min_channel_bw == bw_5MHz) || (min_channel_bw == bw_10MHz) ) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_4_NUM_INDEXES; + mux_pattern = table_38213_13_4_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else if (min_channel_bw == bw_40MHz) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_6_NUM_INDEXES; + mux_pattern = table_38213_13_6_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else { + AssertFatal(true,"Invalid min_bandwidth\n"); + } + + } else { + AssertFatal(true,"Invalid subCarrierSpacingCommon\n"); + } + break; + + case NR_SubcarrierSpacing_kHz120: + if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz60) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_7_NUM_INDEXES; + mux_pattern = table_38213_13_7_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz120) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_8_NUM_INDEXES; + mux_pattern = table_38213_13_8_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else { + AssertFatal(true,"Invalid subCarrierSpacingCommon\n"); + } + break; + + case NR_SubcarrierSpacing_kHz240: + if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz60) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_9_NUM_INDEXES; + mux_pattern = table_38213_13_9_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz120) { + pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_10_NUM_INDEXES; + mux_pattern = table_38213_13_10_c1[pdcch_ConfigSIB1->controlResourceSetZero]; + } else { + AssertFatal(true,"Invalid subCarrierSpacingCommon\n"); + } + break; + + default: + AssertFatal(true,"Invalid ssbSubcarrierSpacing\n"); + break; + } + + + frequency_range_t frequency_range = FR1; + if(ssbSubcarrierSpacing>=60) { + frequency_range = FR2; + } + + pdcch_ConfigSIB1->searchSpaceZero = 0; + if(mux_pattern == NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 && frequency_range == FR1){ + pdcch_ConfigSIB1->searchSpaceZero = rand() % TABLE_38213_13_11_NUM_INDEXES; + } + if(mux_pattern == NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 && frequency_range == FR2){ + pdcch_ConfigSIB1->searchSpaceZero = rand() % TABLE_38213_13_12_NUM_INDEXES; + } + + return 0; +} + int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP, const int CC_id, const frame_t frameP, @@ -58,41 +156,57 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP, LOG_D(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%ld\n",Mod_idP,Srb_id); #endif - gNB_RRC_INST *rrc; - rrc_gNB_carrier_data_t *carrier; - NR_BCCH_BCH_Message_t *mib; - NR_SRB_INFO * srb_info; - char payload_size, *payload_pP; - - rrc = RC.nrrrc[Mod_idP]; - carrier = &rrc->carrier; - mib = &carrier->mib; - srb_info = &carrier->Srb0; + rrc_gNB_carrier_data_t *carrier; + NR_BCCH_BCH_Message_t *mib; + NR_SRB_INFO *srb_info; + char payload_size, *payload_pP; - /* MIBCH */ - if( (Srb_id & RAB_OFFSET ) == MIBCH) { - mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2; - enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message, - NULL, - (void *)mib, - carrier->MIB, - 24); - LOG_D(NR_RRC,"Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n",frameP,sfn_msb,carrier->MIB,enc_rval.encoded); - buffer_pP[0]=carrier->MIB[0]; - buffer_pP[1]=carrier->MIB[1]; - buffer_pP[2]=carrier->MIB[2]; - LOG_D(NR_RRC,"MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n",buffer_pP[0],buffer_pP[1],buffer_pP[2]); - AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n", - enc_rval.failed_type->name, enc_rval.encoded); - return(3); - } + carrier = &RC.nrrrc[Mod_idP]->carrier; + mib = &carrier->mib; + srb_info = &carrier->Srb0; + + /* MIBCH */ + if ((Srb_id & RAB_OFFSET) == MIBCH) { + + // Currently we are getting the pdcch_ConfigSIB1 from the configuration file. + // 3GPP is not clear about the static/semi-static/dynamic behaviour of the pdcch_ConfigSIB1 value + // on the gNB side. + // Uncomment this function for a dynamic pdcch_ConfigSIB1. + // TODO: Update this static value + //channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1 + //generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1, + // *carrier->servingcellconfigcommon->ssbSubcarrierSpacing, + // carrier->mib.message.choice.mib->subCarrierSpacingCommon, + // min_channel_bw); + + mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero; + mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero; + + mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2; + enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message, + NULL, + (void *) mib, + carrier->MIB, + 24); + LOG_D(NR_RRC, "Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n", frameP, sfn_msb, carrier->MIB, + enc_rval.encoded); + buffer_pP[0] = carrier->MIB[0]; + buffer_pP[1] = carrier->MIB[1]; + buffer_pP[2] = carrier->MIB[2]; + LOG_D(NR_RRC, "MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n", buffer_pP[0], buffer_pP[1], + buffer_pP[2]); + AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n", + enc_rval.failed_type->name, enc_rval.encoded); + return (3); + } /* TODO BCCH SIB1 SIBs */ if ((Srb_id & RAB_OFFSET ) == BCCH) { - memcpy(&buffer_pP[0], - RC.rrc[Mod_idP]->carrier[CC_id].SIB1_MBMS, - RC.rrc[Mod_idP]->carrier[CC_id].sizeof_SIB1_MBMS); + memcpy(&buffer_pP[0], + RC.nrrrc[Mod_idP]->carrier.SIB1, + RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1); + return RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1; } /* CCCH */ diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index 4cfa2c9f3f..4ec5a5c6bc 100644 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -39,6 +39,7 @@ #include #include /* for _ASN_DEFAULT_STACK_MAX */ #include +#include #include "asn1_msg.h" #include "RRC/NR/nr_rrc_extern.h" @@ -201,11 +202,13 @@ uint8_t do_MIB_NR(gNB_RRC_INST *rrc,uint32_t frame) { mib->message.choice.mib->ssb_SubcarrierOffset = (carrier->ssb_SubcarrierOffset)&15; /* - * The SIB1 will be sent in this allocation (Type0-PDCCH) : 38.213, 13-4 Table and 38.213 13-11 to 13-14 tables - * the reverse allocation is in nr_ue_decode_mib() - */ - mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero; - mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero; + * The SIB1 will be sent in this allocation (Type0-PDCCH) : 38.213, 13-4 Table and 38.213 13-11 to 13-14 tables + * the reverse allocation is in nr_ue_decode_mib() + */ + mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = rrc->carrier.pdcch_ConfigSIB1->controlResourceSetZero; + mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = rrc->carrier.pdcch_ConfigSIB1->searchSpaceZero; + + AssertFatal(scc->ssbSubcarrierSpacing != NULL, "scc->ssbSubcarrierSpacing is null\n"); switch (*scc->ssbSubcarrierSpacing) { case NR_SubcarrierSpacing_kHz15: @@ -334,13 +337,16 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, nr_uac_BarringInfoSet.uac_BarringForAccessIdentity.bits_unused = 1; ASN_SEQUENCE_ADD(&sib1->uac_BarringInfo->uac_BarringInfoSetList, &nr_uac_BarringInfoSet); #endif + + xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1_message->message.choice.c1->choice.systemInformationBlockType1); + //encode SIB1 to data - carrier->SIB1=(uint8_t *) malloc16(128); + if(carrier->SIB1 == NULL) carrier->SIB1=(uint8_t *) malloc16(MAX_NR_SIB_LENGTH/8); enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_DL_SCH_Message, NULL, (void *)sib1_message, carrier->SIB1, - 128); + MAX_NR_SIB_LENGTH/8); AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n", enc_rval.failed_type->name, enc_rval.encoded); diff --git a/openair2/RRC/NR/nr_rrc_defs.h b/openair2/RRC/NR/nr_rrc_defs.h index 9a53a5bbe0..ec608f1a29 100644 --- a/openair2/RRC/NR/nr_rrc_defs.h +++ b/openair2/RRC/NR/nr_rrc_defs.h @@ -383,6 +383,7 @@ typedef struct { int pucch_TargetSNRx10; NR_BCCH_DL_SCH_Message_t *siblock1; NR_ServingCellConfigCommon_t *servingcellconfigcommon; + NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1; NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS]; NR_SRB_INFO SI; NR_SRB_INFO Srb0; diff --git a/openair2/RRC/NR/nr_rrc_proto.h b/openair2/RRC/NR/nr_rrc_proto.h index dd5fdddbaa..e5541a434b 100644 --- a/openair2/RRC/NR/nr_rrc_proto.h +++ b/openair2/RRC/NR/nr_rrc_proto.h @@ -71,6 +71,12 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ void rrc_remove_nsa_user(gNB_RRC_INST *rrc, int rnti); +void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon); + +void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon); + +void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0); + void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CellGroupConfig_t *secondaryCellGroup, int scg_id, diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index a9e27da95d..edd4213dc4 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -47,6 +47,96 @@ #define false 0 #define true 1 +void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon) { + + bwp->bwp_Id = 0; + + bwp->bwp_Common=calloc(1,sizeof(*bwp->bwp_Common)); + memcpy((void*)&bwp->bwp_Common, + &servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP, + sizeof(bwp->bwp_Common)); + + bwp->bwp_Dedicated=calloc(1,sizeof(*bwp->bwp_Dedicated)); + bwp->bwp_Dedicated->pdsch_Config = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config)); + bwp->bwp_Dedicated->pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup; + bwp->bwp_Dedicated->pdsch_Config->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup)); + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL; + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA)); + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup; + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup)); + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL; + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL; + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL; + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL; + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS=NULL; + bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition)); + *bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0; +} + +void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon) { + + coreset0->controlResourceSetId = 0; + + // frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B, + if(coreset0->frequencyDomainResources.buf == NULL) coreset0->frequencyDomainResources.buf = calloc(1,6); + coreset0->frequencyDomainResources.buf[0] = 0xff; + coreset0->frequencyDomainResources.buf[1] = 0; + coreset0->frequencyDomainResources.buf[2] = 0; + coreset0->frequencyDomainResources.buf[3] = 0; + coreset0->frequencyDomainResources.buf[4] = 0; + coreset0->frequencyDomainResources.buf[5] = 0; + coreset0->frequencyDomainResources.size = 6; + coreset0->frequencyDomainResources.bits_unused = 3; + coreset0->duration = 1; + coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved)); + coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2; + coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = servingcellconfigcommon->physCellId; + coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle; + + if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList)); + + NR_TCI_StateId_t *tci[8]; + for (int i=0;i<8;i++) { + tci[i]=calloc(1,sizeof(*tci[i])); + *tci[i] = i; + ASN_SEQUENCE_ADD(&coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]); + } + coreset0->tci_StatesPDCCH_ToReleaseList = NULL; + coreset0->tci_PresentInDCI = NULL; + coreset0->pdcch_DMRS_ScramblingID = NULL; + +} + +void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) { + + if(ss0->controlResourceSetId == NULL) ss0->controlResourceSetId=calloc(1,sizeof(*ss0->controlResourceSetId)); + if(ss0->monitoringSymbolsWithinSlot == NULL) ss0->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss0->monitoringSymbolsWithinSlot)); + if(ss0->monitoringSymbolsWithinSlot->buf == NULL) ss0->monitoringSymbolsWithinSlot->buf = calloc(1,2); + if(ss0->nrofCandidates == NULL) ss0->nrofCandidates = calloc(1,sizeof(*ss0->nrofCandidates)); + if(ss0->searchSpaceType == NULL) ss0->searchSpaceType = calloc(1,sizeof(*ss0->searchSpaceType)); + if(ss0->searchSpaceType->choice.common == NULL) ss0->searchSpaceType->choice.common=calloc(1,sizeof(*ss0->searchSpaceType->choice.common)); + if(ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0)); + + ss0->searchSpaceId = 0; + *ss0->controlResourceSetId = 0; + ss0->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss0->monitoringSlotPeriodicityAndOffset)); + ss0->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1; + ss0->duration=NULL; + + // should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed + ss0->monitoringSymbolsWithinSlot->buf[1] = 0; + ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6); + ss0->monitoringSymbolsWithinSlot->size = 2; + ss0->monitoringSymbolsWithinSlot->bits_unused = 2; + + ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; + ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; + ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0; + ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1; + ss0->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; + + ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; +} void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CellGroupConfig_t *secondaryCellGroup, @@ -475,7 +565,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss); - bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=NULL; + bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1)); + *bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=0; bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation=NULL; bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->pagingSearchSpace=NULL; bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace)); diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index 1e182eff8b..8afc3165ef 100755 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -432,6 +432,41 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message( return 0; } +/*brief decode SIB1 message*/ +int8_t nr_rrc_ue_decode_NR_SIB1_Message(uint8_t *const bufferP, const uint8_t buffer_len){ + + NR_BCCH_DL_SCH_Message_t *bcch_message = NULL; + + asn_dec_rval_t dec_rval = uper_decode_complete(NULL, + &asn_DEF_NR_BCCH_DL_SCH_Message, + (void **)&bcch_message, + (const void *)bufferP, + buffer_len); + + if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) { + + printf("NR_BCCH_DL_SCH decode error\n"); + for (int i=0; isib1 != NULL){ + SEQUENCE_free(&asn_DEF_NR_BCCH_BCH_Message, (void *)NR_UE_rrc_inst->sib1, 1 ); + } + NR_UE_rrc_inst->sib1 = bcch_message->message.choice.c1->choice.systemInformationBlockType1; + xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)NR_UE_rrc_inst->sib1); + + } + + return 0; +} + // from NR SRB3 int8_t nr_rrc_ue_decode_NR_DL_DCCH_Message( diff --git a/openair2/RRC/NR_UE/rrc_defs.h b/openair2/RRC/NR_UE/rrc_defs.h index 6481fb0cea..30c803eff3 100644 --- a/openair2/RRC/NR_UE/rrc_defs.h +++ b/openair2/RRC/NR_UE/rrc_defs.h @@ -51,6 +51,7 @@ #include "NR_asn_constant.h" #include "NR_SchedulingRequestToAddMod.h" #include "NR_MIB.h" +#include "NR_SIB1.h" #include "NR_BCCH-BCH-Message.h" #include "NR_DL-DCCH-Message.h" @@ -70,7 +71,8 @@ typedef struct NR_UE_RRC_INST_s { NR_RadioBearerConfig_t *radio_bearer_config; NR_MIB_t *mib; - + NR_SIB1_t *sib1; + // lists // CellGroupConfig.rlc-BearerToAddModList RRC_LIST_TYPE(NR_RLC_BearerConfig_t, NR_maxLC_ID) RLC_Bearer_Config_list; diff --git a/openair2/RRC/NR_UE/rrc_proto.h b/openair2/RRC/NR_UE/rrc_proto.h index 7bc7e4b90c..292eae10d4 100644 --- a/openair2/RRC/NR_UE/rrc_proto.h +++ b/openair2/RRC/NR_UE/rrc_proto.h @@ -86,6 +86,11 @@ int8_t nr_rrc_ue_process_radio_bearer_config(NR_RadioBearerConfig_t *radio_beare \param sdu_len length of buffer*/ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(const module_id_t module_id, const uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len); +/**\brief decode NR SIB1 message + \param sduP pointer to buffer of ASN message + \param sdu_len length of buffer*/ +int8_t nr_rrc_ue_decode_NR_SIB1_Message(uint8_t *const bufferP, const uint8_t buffer_len); + /**\brief Decode NR DCCH from gNB, sent from lower layer through SRB3 \param module_id module id \param gNB_index gNB index