FR2: GPIO configuration for Interdigital Radio Unit
For FR2 and including analog beamforming, we control the beams via GPIO on radio units. In this commit, introduce a configuration option to switch the GPIO control for different devices: "generic" is the current GPIO control, "interdigital" configures the GPIO configuration to be used with an InterDigital device.
This commit is contained in:
committed by
Robert Schmidt
parent
fe61354173
commit
76ccc2f5f3
+48
-15
@@ -263,7 +263,42 @@ static int sync_to_gps(openair0_device *device) {
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#define ATR_MASK 0x7f //pins controlled by ATR
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#define ATR_RX 0x50 //data[4] and data[6]
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#define ATR_XX 0x20 //data[5]
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#define MAN_MASK ATR_MASK^0xFFF //manually controlled pins
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#define MAN_MASK ATR_MASK ^ 0xFFF // manually controlled pins
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static void trx_usrp_start_interdigital_gpio(openair0_device *device, usrp_state_t *s)
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{
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AssertFatal(device->type == USRP_X400_DEV,
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"interdigital frontend device for beam management can only be used together with an X400\n");
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// s->gpio_bank="GPIO0";
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std::vector<std::string> sxx{12, "DB0_RF0"};
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// set every pin on GPIO0 to be ocntrolled by DB1_RF0
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s->usrp->set_gpio_src(s->gpio_bank, sxx);
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// set data direction register (DDR) to output
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s->usrp->set_gpio_attr(s->gpio_bank, "DDR", 0xfff, 0xfff);
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// set lower GPIO#1 to be controlled automatically by ATR (the rest bits are controlled manually)
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s->usrp->set_gpio_attr(s->gpio_bank, "CTRL", (1 << 1), (1 << 1));
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// set GPIO1 (Tx/Rx1) to 1 for MHU1 for transmistting
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s->usrp->set_gpio_attr(s->gpio_bank, "ATR_XX", (1 << 1), (1 << 1));
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// set GPIO4 (ID0) to 1 and GPIO2 (TX/RX2) &GPIO3 (ID1) to 0
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s->usrp->set_gpio_attr(s->gpio_bank, "OUT", (1 << 4), 0x1c);
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}
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static void trx_usrp_start_generic_gpio(openair0_device *device, usrp_state_t *s)
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{
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// setup GPIO for TDD, GPIO(4) = ATR_RX
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// set data direction register (DDR) to output
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s->usrp->set_gpio_attr(s->gpio_bank, "DDR", 0xfff, 0xfff);
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// set bits to be controlled automatically by ATR
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s->usrp->set_gpio_attr(s->gpio_bank, "CTRL", ATR_MASK, 0xfff);
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// set bits to 1 when the radio is only receiving (ATR_RX)
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s->usrp->set_gpio_attr(s->gpio_bank, "ATR_RX", ATR_RX, ATR_MASK);
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// set bits to 1 when the radio is transmitting and receiveing (ATR_XX)
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// (we use full duplex here, because our RX is on all the time - this might need to change later)
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s->usrp->set_gpio_attr(s->gpio_bank, "ATR_XX", ATR_XX, ATR_MASK);
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// set all other pins to manual
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s->usrp->set_gpio_attr(s->gpio_bank, "OUT", MAN_MASK, 0xfff);
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}
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/*! \brief Called to start the USRP transceiver. Return 0 if OK, < 0 if error
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@param device pointer to the device structure specific to the RF hardware target
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@@ -280,21 +315,19 @@ static int trx_usrp_start(openair0_device *device) {
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s->gpio_bank = (char *) "GPIO0";
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s->usrp->set_gpio_src(s->gpio_bank, sxx);
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}
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#endif
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#endif
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switch (device->openair0_cfg->gpio_controller) {
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case RU_GPIO_CONTROL_GENERIC:
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trx_usrp_start_generic_gpio(device, s);
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break;
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case RU_GPIO_CONTROL_INTERDIGITAL:
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trx_usrp_start_interdigital_gpio(device, s);
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break;
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default:
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AssertFatal(false, "illegal GPIO controller %d\n", device->openair0_cfg->gpio_controller);
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}
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// setup GPIO for TDD, GPIO(4) = ATR_RX
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//set data direction register (DDR) to output
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s->usrp->set_gpio_attr(s->gpio_bank, "DDR", 0xfff, 0xfff);
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//set bits to be controlled automatically by ATR
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s->usrp->set_gpio_attr(s->gpio_bank, "CTRL", ATR_MASK, 0xfff);
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//set bits to 1 when the radio is only receiving (ATR_RX)
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s->usrp->set_gpio_attr(s->gpio_bank, "ATR_RX", ATR_RX, ATR_MASK);
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// set bits to 1 when the radio is transmitting and receiveing (ATR_XX)
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// (we use full duplex here, because our RX is on all the time - this might need to change later)
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s->usrp->set_gpio_attr(s->gpio_bank, "ATR_XX", ATR_XX, ATR_MASK);
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// set all other pins to manual
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s->usrp->set_gpio_attr(s->gpio_bank, "OUT", MAN_MASK, 0xfff);
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s->wait_for_first_pps = 1;
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s->rx_count = 0;
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s->tx_count = 0;
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