diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 469415908f..61238ae647 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -88,6 +88,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB; if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) { cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB; + } else if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0) { + cset_start_sc = cset_start_sc + pdcch_pdu_rel15->BWPStart*NR_NB_SC_PER_RB; } for (int d=0;dnumDlDci;d++) { diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c index 61d63f0f5a..71b3502c1a 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c @@ -481,6 +481,7 @@ void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, uint // start contention resolution timer ra->RA_contention_resolution_cnt = (nr_rach_ConfigCommon->ra_ContentionResolutionTimer + 1) * 8; ra->RA_contention_resolution_timer_active = 1; + ra->ra_state = WAIT_CONTENTION_RESOLUTION; } @@ -536,7 +537,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, } } - if (prach_resources->init_msg1) { + if (prach_resources->init_msg1 && ra->ra_state != RA_SUCCEEDED) { if (ra->RA_active == 0) { /* RA not active - checking if RRC is ready to initiate the RA procedure */ @@ -625,7 +626,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, if (ra->RA_window_cnt >= 0 && ra->RA_RAPID_found == 1) { // Reset RA_active flag: it disables Msg3 retransmission (8.3 of TS 38.213) - nr_ra_succeeded(mod_id, frame, nr_slot_tx); + //nr_ra_succeeded(mod_id, frame, nr_slot_tx); } else if (ra->RA_window_cnt == 0 && !ra->RA_RAPID_found) { diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index 11edc6c20d..f3b4acc9bd 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -88,7 +88,11 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t } else { ss = mac->search_space_zero; coreset = mac->coreset0; - rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1; + if(rnti_type == NR_RNTI_SI) { + rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1; + } else { + rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0; + } } rel15->coreset.duration = coreset->duration; @@ -144,7 +148,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); rel15->rnti = ra->ra_rnti; rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); + rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing; rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id); break; @@ -153,6 +157,14 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t case NR_RNTI_CS: break; case NR_RNTI_TC: + // we use the initial DL BWP + sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12; + monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); + rel15->rnti = ra->t_crnti; + rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing; + rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_TC, rel15->BWPSize, bwp_id); break; case NR_RNTI_SP_CSI: break; @@ -245,14 +257,18 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl if (ss->searchSpaceId == *pdcch_ConfigCommon->choice.setup->ra_SearchSpace){ switch(ra->ra_state){ case WAIT_RAR: - LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type1-PDCCH common random access search space\n"); - rel15->num_dci_options = 1; - rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0; - config_dci_pdu(mac, rel15, dl_config, NR_RNTI_RA, ss_id); - fill_dci_search_candidates(ss, rel15); - break; + LOG_D(NR_MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type1-PDCCH common random access search space (RA-Msg2)\n"); + rel15->num_dci_options = 1; + rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0; + config_dci_pdu(mac, rel15, dl_config, NR_RNTI_RA, -1); + fill_dci_search_candidates(ss, rel15); + break; case WAIT_CONTENTION_RESOLUTION: - LOG_E(MAC, "In %s: CB-RA not implemented yet. Should not have fallen in this case.\n", __FUNCTION__); + LOG_D(NR_MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type1-PDCCH common random access search space (RA-Msg4)\n"); + rel15->num_dci_options = 1; + rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0; + config_dci_pdu(mac, rel15, dl_config, NR_RNTI_TC, -1); + fill_dci_search_candidates(ss, rel15); break; default: break; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 250cf856bc..d228c7fc96 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -73,10 +73,10 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){ if (rnti == ra->ra_rnti) { rnti_type = NR_RNTI_RA; + } else if (rnti == ra->t_crnti && ra->ra_state == WAIT_CONTENTION_RESOLUTION) { + rnti_type = NR_RNTI_TC; } else if (rnti == mac->crnti) { rnti_type = NR_RNTI_C; - } else if (rnti == ra->t_crnti) { - rnti_type = NR_RNTI_TC; } else if (rnti == 0xFFFE) { rnti_type = NR_RNTI_P; } else if (rnti == 0xFFFF) { @@ -469,7 +469,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n"); AssertFatal(mac->ULbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n"); - const uint16_t n_RB_DLBWP = (ra->ra_state == WAIT_RAR) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const uint16_t n_RB_DLBWP = (ra->ra_state == WAIT_RAR || ra->ra_state == WAIT_CONTENTION_RESOLUTION) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); LOG_D(MAC, "In %s: Processing received DCI format %s (DL BWP %d)\n", __FUNCTION__, dci_formats[dci_format], n_RB_DLBWP); @@ -515,9 +515,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr // Config PUSCH PDU ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); - if (ret != -1 && ra->RA_active && mac->crnti){ - nr_ra_succeeded(module_id, frame, slot); - } + //if (ret != -1 && ra->RA_active && mac->crnti){ + // nr_ra_succeeded(module_id, frame, slot); + //} } @@ -578,9 +578,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr // Config PUSCH PDU ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); - if (ret != -1 && ra->RA_active && mac->crnti){ - nr_ra_succeeded(module_id, frame, slot); - } + //if (ret != -1 && ra->RA_active && mac->crnti){ + // nr_ra_succeeded(module_id, frame, slot); + //} } @@ -657,9 +657,19 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr } else { dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; } - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + + if( (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti) ) { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + } else { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + } + + if(pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition == NULL) + pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition=calloc(1,sizeof(*pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition)); + BWPSize = n_RB_DLBWP; } @@ -770,6 +780,13 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); dl_config->number_pdus = dl_config->number_pdus + 1; + + // FIXME: Remove this + if (ra->ra_state == WAIT_CONTENTION_RESOLUTION && rnti == ra->t_crnti){ + LOG_I(NR_MAC,"RA-Msg4 was received\n"); + nr_ra_succeeded(module_id, frame, slot); + } + break; } @@ -1392,39 +1409,71 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, break; case NR_RNTI_TC: - // indicating a DL DCI format 1bit + + // indicating a DL DCI format - 1 bit pos++; dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + // Freq domain assignment 0-16 bit fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; - // VRB to PRB mapping 1 bit + + // VRB to PRB mapping - 1 bit + pos++; dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; + // MCS 5bit //bit over 32, so dci_pdu ++ pos+=5; dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; - // New data indicator 1bit + + // New data indicator - 1 bit + pos++; dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; - // Redundancy version 2bit + + // Redundancy version - 2 bits pos+=2; dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; - // HARQ process number 4bit + + // HARQ process number - 4 bits pos+=4; dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; - // Downlink assignment index  E2 bits + + // Downlink assignment index - 2 bits pos+=2; dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; - // TPC command for scheduled PUCCH  E2 bits + + // TPC command for scheduled PUCCH - 2 bits pos+=2; dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; - // PDSCH-to-HARQ_feedback timing indicator  E3 bits + + // PUCCH resource indicator - 3 bits + pos+=3; + dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&7; + + // PDSCH-to-HARQ_feedback timing indicator - 3 bits pos+=3; dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7; - + + LOG_D(NR_MAC,"N_RB = %i\n", N_RB); + LOG_D(NR_MAC,"dci_size = %i\n", dci_size); + LOG_D(NR_MAC,"fsize = %i\n", fsize); + LOG_D(NR_MAC,"dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); + LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC,"dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); + LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); + LOG_D(NR_MAC,"dci_pdu_rel15->pucch_resource_indicator = %i\n", dci_pdu_rel15->pucch_resource_indicator); + LOG_D(NR_MAC,"dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); + break; } break; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 0b3492ccdc..00827a13ee 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -568,10 +568,10 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ nr_generate_Msg2(module_idP, CC_id, frameP, slotP); break; case Msg4: - //generate_Msg4(module_idP, CC_id, frameP, slotP); + nr_generate_Msg4(module_idP, CC_id, frameP, slotP); break; case WAIT_Msg4_ACK: - //check_Msg4_retransmission(module_idP, CC_id, frameP, slotP); + nr_check_Msg4_Ack(module_idP, CC_id, frameP, slotP); break; default: break; @@ -663,7 +663,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t vrb_map_UL[i + ra->msg3_first_rb] = 1; } - LOG_I(MAC, "[gNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot); + LOG_D(MAC, "[gNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot); nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[CC_id][ra->Msg3_slot]; AssertFatal(future_ul_tti_req->SFN == ra->Msg3_frame @@ -774,49 +774,43 @@ void nr_generate_Msg2(module_id_t module_idP, sub_frame_t slotP) { - int mcsIndex; - int startSymbolAndLength = 0, StartSymbolIndex = -1, NrOfSymbols = 14, StartSymbolIndex_tmp, NrOfSymbols_tmp, x_Overhead, time_domain_assignment = 0; - gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; - NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; - NR_RA_t *ra = &cc->ra[CC_id]; - NR_SearchSpace_t *ss = ra->ra_ss; - - uint16_t RA_rnti = ra->RA_rnti; - long locationAndBandwidth; - - // check if UE is doing RA on CORESET0 , InitialBWP or configured BWP from SCD - // get the BW of the PDCCH for PDCCH size and RAR PDSCH size - - NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - int dci10_bw; - - if (ra->coreset0_configured == 1) { - AssertFatal(1==0,"This is a standalone condition\n"); - } - else { // on configured BWP or initial LDBWP, bandwidth parameters in DCI correspond size of initialBWP - locationAndBandwidth = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth; - dci10_bw = NRRIV2BW(locationAndBandwidth, MAX_BWP_SIZE); - } + gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; + NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; + NR_RA_t *ra = &cc->ra[0]; if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) { + int mcsIndex = 0; + int startSymbolAndLength = 0; + int StartSymbolIndex = -1; + int NrOfSymbols = 14; + int StartSymbolIndex_tmp = 0; + int NrOfSymbols_tmp = 0; + int x_Overhead = 0; + int time_domain_assignment = 0; + uint8_t nr_of_candidates = 0; + uint8_t aggregation_level = 0; + + NR_SearchSpace_t *ss = nr_mac->sched_ctrlCommon->search_space; + NR_BWP_Downlink_t *bwp = nr_mac->sched_ctrlCommon->active_bwp; + NR_ControlResourceSet_t *coreset = nr_mac->sched_ctrlCommon->coreset; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + nfapi_nr_dl_tti_request_body_t *dl_req = &nr_mac->DL_req[CC_id].dl_tti_request_body; + // Checking if the DCI allocation is feasible in current subframe if (dl_req->nPDUs > NFAPI_NR_MAX_DL_TTI_PDUS - 2) { - LOG_I(MAC, "[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d\n", slotP, RA_rnti); + LOG_I(MAC, "[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d\n", slotP, ra->RA_rnti); return; } - uint8_t nr_of_candidates, aggregation_level; find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); - NR_BWP_Downlink_t *bwp = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id - 1]; - NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 0 /* common */); int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level, - 0, // Y - 0, // m + 0, + 0, nr_of_candidates); if (CCEIndex < 0) { @@ -826,9 +820,8 @@ void nr_generate_Msg2(module_id_t module_idP, nfapi_nr_pdu_t *tx_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs]; - /* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not - * exist, create it. This is especially important if we have multiple RAs, - * and the DLSCH has to reuse them, so we need to mark them */ + // look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially + // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them const int bwpid = bwp->bwp_Id; const int coresetid = coreset->controlResourceSetId; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; @@ -843,6 +836,9 @@ void nr_generate_Msg2(module_id_t module_idP, nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; } + // TODO: This assignment should be done in function nr_configure_pdcch() + pdcch_pdu_rel15->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0; + nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset((void *)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE; @@ -850,7 +846,7 @@ void nr_generate_Msg2(module_id_t module_idP, dl_req->nPDUs+=1; nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; - LOG_I(MAC,"[gNB %d] [RAPROC] CC_id %d Frame %d, slotP %d: Generating RAR DCI, state %d\n", module_idP, CC_id, frameP, slotP, ra->state); + LOG_I(NR_MAC,"[gNB %d] [RAPROC] CC_id %d Frame %d, slotP %d: Generating RA-Msg2 DCI, state %d\n", module_idP, CC_id, frameP, slotP, ra->state); // This code from this point on will not work on initialBWP or CORESET0 AssertFatal(ra->bwp_id>0,"cannot work on initialBWP for now\n"); @@ -860,33 +856,23 @@ void nr_generate_Msg2(module_id_t module_idP, ra->crnti); AssertFatal(ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, "downlinkBWP_ToAddModList has %d BWP!\n", ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); - NR_BWP_Uplink_t *ubwp=ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id-1]; - - LOG_I(MAC, "[RAPROC] Scheduling common search space DCI type 1 dlBWP BW %d\n", dci10_bw); - - // Qm>2 not allowed for RAR - if (get_softmodem_params()->do_ra) - mcsIndex = 9; - else - mcsIndex = 0; pdsch_pdu_rel15->pduBitmap = 0; - pdsch_pdu_rel15->rnti = RA_rnti; - /* SCF222: PDU index incremented for each PDSCH PDU sent in TX control - * message. This is used to associate control information to data and is - * reset every slot. */ + pdsch_pdu_rel15->rnti = ra->RA_rnti; + + // SCF222: PDU index incremented for each PDSCH PDU sent in TX control message. This is used to associate control + // information to data and is reset every slot. const int pduindex = nr_mac->pdu_index[CC_id]++; pdsch_pdu_rel15->pduIndex = pduindex; - - - pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + pdsch_pdu_rel15->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing; pdsch_pdu_rel15->CyclicPrefix = 0; pdsch_pdu_rel15->NrOfCodewords = 1; pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,0); pdsch_pdu_rel15->qamModOrder[0] = 2; pdsch_pdu_rel15->mcsIndex[0] = mcsIndex; + if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table == NULL) pdsch_pdu_rel15->mcsTable[0] = 0; else{ @@ -895,12 +881,13 @@ void nr_generate_Msg2(module_id_t module_idP, else pdsch_pdu_rel15->mcsTable[0] = 2; } + pdsch_pdu_rel15->rvIndex[0] = 0; pdsch_pdu_rel15->dataScramblingId = *scc->physCellId; pdsch_pdu_rel15->nrOfLayers = 1; pdsch_pdu_rel15->transmissionScheme = 0; pdsch_pdu_rel15->refPoint = 0; - pdsch_pdu_rel15->dmrsConfigType = 0; + pdsch_pdu_rel15->dmrsConfigType = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1; pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId; pdsch_pdu_rel15->SCID = 0; pdsch_pdu_rel15->numDmrsCdmGrpsNoData = 2; @@ -908,7 +895,7 @@ void nr_generate_Msg2(module_id_t module_idP, pdsch_pdu_rel15->resourceAlloc = 1; pdsch_pdu_rel15->rbStart = 0; pdsch_pdu_rel15->rbSize = 6; - pdsch_pdu_rel15->VRBtoPRBMapping = 0; // non interleaved + pdsch_pdu_rel15->VRBtoPRBMapping = 0; for (int i=0; ibwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) { startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; @@ -926,13 +913,10 @@ void nr_generate_Msg2(module_id_t module_idP, pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, scc->dmrs_TypeA_Position, NrOfSymbols); - /* Fill PDCCH DL DCI PDU */ + // Fill PDCCH DL DCI PDU nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci]; pdcch_pdu_rel15->numDlDci++; - dci_pdu->RNTI = RA_rnti; - /* TODO: remove next line */ - AssertFatal(ss->searchSpaceType->present != NR_SearchSpace__searchSpaceType_PR_ue_Specific, - "shouldn't the RA SS be common?\n"); + dci_pdu->RNTI = ra->RA_rnti; dci_pdu->ScramblingId = *scc->physCellId; dci_pdu->ScramblingRNTI = 0; dci_pdu->AggregationLevel = aggregation_level; @@ -942,47 +926,45 @@ void nr_generate_Msg2(module_id_t module_idP, dci_pdu_rel15_t dci_payload; dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, - pdsch_pdu_rel15->rbStart,dci10_bw); + pdsch_pdu_rel15->rbStart, + pdsch_pdu_rel15->BWPSize); + dci_payload.time_domain_assignment.val = time_domain_assignment; dci_payload.vrb_to_prb_mapping.val = 0; dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0]; dci_payload.tb_scaling = 0; - LOG_I(MAC, + LOG_D(NR_MAC, "[RAPROC] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d \n", dci_payload.frequency_domain_assignment.val, pdsch_pdu_rel15->rbStart, pdsch_pdu_rel15->rbSize, - dci10_bw, + pdsch_pdu_rel15->BWPSize, dci_payload.time_domain_assignment.val, dci_payload.vrb_to_prb_mapping.val, dci_payload.mcs, dci_payload.tb_scaling); - LOG_I(MAC, "Frame %d: Subframe %d : Adding common DL DCI for RA_RNTI %x\n", frameP, slotP, RA_rnti); - - const int dci_format = NR_DL_DCI_FORMAT_1_0; - const int rnti_type = NR_RNTI_RA; - - LOG_I(MAC, - "[RAPROC] DCI params: rnti %d, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n", + LOG_D(NR_MAC, + "[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n", pdcch_pdu_rel15->dci_pdu[0].RNTI, - rnti_type, - dci_format, + NR_RNTI_RA, + NR_DL_DCI_FORMAT_1_0, (unsigned long long)pdcch_pdu_rel15->FreqDomainResource, pdcch_pdu_rel15->StartSymbolIndex, pdcch_pdu_rel15->DurationSymbols); fill_dci_pdu_rel15(scc, - ra->secondaryCellGroup, - dci_pdu, + nr_mac->secondaryCellGroupCommon, + &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], &dci_payload, - dci_format, - rnti_type, - dci10_bw, - ra->bwp_id); + NR_DL_DCI_FORMAT_1_0, + NR_RNTI_RA, + pdsch_pdu_rel15->BWPSize, + nr_mac->sched_ctrlCommon->active_bwp->bwp_Id); // Program UL processing for Msg3 + NR_BWP_Uplink_t *ubwp=ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id-1]; nr_get_Msg3alloc(module_idP, CC_id, scc, ubwp, slotP, frameP, ra); LOG_I(MAC, "Frame %d, Subframe %d: Setting Msg3 reception for Frame %d Subframe %d\n", frameP, slotP, ra->Msg3_frame, ra->Msg3_slot); nr_add_msg3(module_idP, CC_id, frameP, slotP); @@ -1003,16 +985,264 @@ void nr_generate_Msg2(module_id_t module_idP, memcpy((void*)&tx_req->TLVs[0].value.direct[0], (void*)&cc[CC_id].RAR_pdu.payload[0], tx_req->TLVs[0].length); T(T_GNB_MAC_DL_RAR_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), - T_INT(RA_rnti), T_INT(frameP), T_INT(slotP), T_INT(0) /* harq pid, meaningful? */, + T_INT(ra->RA_rnti), T_INT(frameP), T_INT(slotP), T_INT(0) /* harq pid, meaningful? */, T_BUFFER(&cc[CC_id].RAR_pdu.payload[0], tx_req->TLVs[0].length)); - /* mark the corresponding RBs as used */ + // mark the corresponding RBs as used uint16_t *vrb_map = cc[CC_id].vrb_map; - for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) + for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { vrb_map[rb + pdsch_pdu_rel15->rbStart] = 1; + } } } +void nr_generate_Msg4(module_id_t module_idP, + int CC_id, + frame_t frameP, + sub_frame_t slotP) { + + gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; + NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; + NR_RA_t *ra = &cc->ra[0]; + + if (ra->Msg4_frame == frameP && ra->Msg4_slot == slotP ) { + + int mcsIndex = 0; + int startSymbolAndLength = 0; + int StartSymbolIndex = -1; + int NrOfSymbols = 14; + int StartSymbolIndex_tmp = 0; + int NrOfSymbols_tmp = 0; + int x_Overhead = 0; + int time_domain_assignment = 0; + uint8_t nr_of_candidates = 0; + uint8_t aggregation_level = 0; + + NR_SearchSpace_t *ss = nr_mac->sched_ctrlCommon->search_space; + NR_BWP_Downlink_t *bwp = nr_mac->sched_ctrlCommon->active_bwp; + NR_ControlResourceSet_t *coreset = nr_mac->sched_ctrlCommon->coreset; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + + nfapi_nr_dl_tti_request_body_t *dl_req = &nr_mac->DL_req[CC_id].dl_tti_request_body; + + // Checking if the DCI allocation is feasible in current subframe + if (dl_req->nPDUs > NFAPI_NR_MAX_DL_TTI_PDUS - 2) { + LOG_I(NR_MAC, "[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d\n", slotP, ra->rnti); + return; + } + + find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss); + int CCEIndex = allocate_nr_CCEs(nr_mac, + bwp, + coreset, + aggregation_level, + 0, + 0, + nr_of_candidates); + + if (CCEIndex < 0) { + LOG_E(NR_MAC, "%s(): cannot find free CCE for RNTI %04x!\n", __func__, ra->rnti); + return; + } + + nfapi_nr_pdu_t *tx_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs]; + + // look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially + // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them + const int bwpid = bwp->bwp_Id; + const int coresetid = coreset->controlResourceSetId; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; + if (!pdcch_pdu_rel15) { + nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; + memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t)); + dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; + dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); + dl_req->nPDUs += 1; + pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; + nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, bwp); + nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; + } + + // TODO: This assignment should be done in function nr_configure_pdcch() + pdcch_pdu_rel15->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0; + + nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; + memset((void *)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); + dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE; + dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu)); + dl_req->nPDUs+=1; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; + + LOG_I(NR_MAC,"[gNB %d] [RAPROC] CC_id %d Frame %d, slotP %d: Generating RA-Msg4 DCI, state %d\n", module_idP, CC_id, frameP, slotP, ra->state); + + // This code from this point on will not work on initialBWP or CORESET0 + AssertFatal(ra->bwp_id>0,"cannot work on initialBWP for now\n"); + AssertFatal(ra->secondaryCellGroup, "no secondaryCellGroup for RNTI %04x\n", ra->rnti); + + AssertFatal(ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, + "downlinkBWP_ToAddModList has %d BWP!\n", + ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); + + pdsch_pdu_rel15->pduBitmap = 0; + pdsch_pdu_rel15->rnti = ra->rnti; + + // SCF222: PDU index incremented for each PDSCH PDU sent in TX control message. This is used to associate control + // information to data and is reset every slot. + const int pduindex = nr_mac->pdu_index[CC_id]++; + pdsch_pdu_rel15->pduIndex = pduindex; + pdsch_pdu_rel15->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing; + pdsch_pdu_rel15->CyclicPrefix = 0; + pdsch_pdu_rel15->NrOfCodewords = 1; + pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,0); + pdsch_pdu_rel15->qamModOrder[0] = 2; + pdsch_pdu_rel15->mcsIndex[0] = mcsIndex; + + if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table == NULL) { + pdsch_pdu_rel15->mcsTable[0] = 0; + } else { + if (*bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table == 0) { + pdsch_pdu_rel15->mcsTable[0] = 1; + } else { + pdsch_pdu_rel15->mcsTable[0] = 2; + } + } + + pdsch_pdu_rel15->rvIndex[0] = 0; + pdsch_pdu_rel15->dataScramblingId = *scc->physCellId; + pdsch_pdu_rel15->nrOfLayers = 1; + pdsch_pdu_rel15->transmissionScheme = 0; + pdsch_pdu_rel15->refPoint = 0; + pdsch_pdu_rel15->dmrsConfigType = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1; + pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId; + pdsch_pdu_rel15->SCID = 0; + pdsch_pdu_rel15->numDmrsCdmGrpsNoData = 2; + pdsch_pdu_rel15->dmrsPorts = 1; + pdsch_pdu_rel15->resourceAlloc = 1; + pdsch_pdu_rel15->rbStart = 0; + pdsch_pdu_rel15->rbSize = 6; + pdsch_pdu_rel15->VRBtoPRBMapping = 0; + + for (int i=0; ibwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) { + startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &StartSymbolIndex_tmp, &NrOfSymbols_tmp); + if (NrOfSymbols_tmp < NrOfSymbols) { + NrOfSymbols = NrOfSymbols_tmp; + StartSymbolIndex = StartSymbolIndex_tmp; + time_domain_assignment = i; // this is short PDSCH added to the config to fit mixed slot + } + } + + AssertFatal(StartSymbolIndex >= 0, "StartSymbolIndex is negative\n"); + + pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex; + pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; + pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, scc->dmrs_TypeA_Position, NrOfSymbols); + + // Fill PDCCH DL DCI PDU + nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci]; + pdcch_pdu_rel15->numDlDci++; + dci_pdu->RNTI = ra->rnti; + dci_pdu->ScramblingId = *scc->physCellId; + dci_pdu->ScramblingRNTI = 0; + dci_pdu->AggregationLevel = aggregation_level; + dci_pdu->CceIndex = CCEIndex; + dci_pdu->beta_PDCCH_1_0 = 0; + dci_pdu->powerControlOffsetSS = 1; + + dci_pdu_rel15_t dci_payload; + dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, + pdsch_pdu_rel15->rbStart, + pdsch_pdu_rel15->BWPSize); + + dci_payload.time_domain_assignment.val = time_domain_assignment; + dci_payload.vrb_to_prb_mapping.val = 0; + dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0]; + dci_payload.tb_scaling = 0; + + LOG_D(NR_MAC, + "[RAPROC] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d \n", + dci_payload.frequency_domain_assignment.val, + pdsch_pdu_rel15->rbStart, + pdsch_pdu_rel15->rbSize, + pdsch_pdu_rel15->BWPSize, + dci_payload.time_domain_assignment.val, + dci_payload.vrb_to_prb_mapping.val, + dci_payload.mcs, + dci_payload.tb_scaling); + + LOG_D(NR_MAC, + "[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n", + pdcch_pdu_rel15->dci_pdu[0].RNTI, + NR_RNTI_TC, + NR_DL_DCI_FORMAT_1_0, + (unsigned long long)pdcch_pdu_rel15->FreqDomainResource, + pdcch_pdu_rel15->StartSymbolIndex, + pdcch_pdu_rel15->DurationSymbols); + + fill_dci_pdu_rel15(scc, + nr_mac->secondaryCellGroupCommon, + &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], + &dci_payload, + NR_DL_DCI_FORMAT_1_0, + NR_RNTI_TC, + pdsch_pdu_rel15->BWPSize, + nr_mac->sched_ctrlCommon->active_bwp->bwp_Id); + + x_Overhead = 0; + nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, dci_payload.tb_scaling); + + uint8_t payload[] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08}; + + // DL TX request + tx_req->PDU_length = pdsch_pdu_rel15->TBSize[0]; + tx_req->PDU_index = pduindex; + tx_req->num_TLV = 1; + tx_req->TLVs[0].length = 8; + nr_mac->TX_req[CC_id].SFN = frameP; + nr_mac->TX_req[CC_id].Number_of_PDUs++; + nr_mac->TX_req[CC_id].Slot = slotP; + memcpy(tx_req->TLVs[0].value.direct, payload, tx_req->TLVs[0].length); + + // mark the corresponding RBs as used + uint16_t *vrb_map = cc[CC_id].vrb_map; + for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { + vrb_map[rb + pdsch_pdu_rel15->rbStart] = 1; + } + ra->state = WAIT_Msg4_ACK; + + LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); + LOG_D(MAC,"BWPStart: %i\n", pdcch_pdu_rel15->BWPStart); + LOG_D(MAC,"SubcarrierSpacing: %i\n", pdcch_pdu_rel15->SubcarrierSpacing); + LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix); + LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex); + LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols); + for(int n=0;n<6;n++) LOG_D(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]); + LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType); + LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize); + LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize); + LOG_D(MAC,"CoreSetType: %i\n", pdcch_pdu_rel15->CoreSetType); + LOG_D(MAC,"ShiftIndex: %i\n", pdcch_pdu_rel15->ShiftIndex); + LOG_D(MAC,"precoderGranularity: %i\n", pdcch_pdu_rel15->precoderGranularity); + LOG_D(MAC,"numDlDci: %i\n", pdcch_pdu_rel15->numDlDci); + } +} + +void nr_check_Msg4_Ack(module_id_t module_id, + int CC_id, + frame_t frame, + sub_frame_t slot) { + + LOG_W(NR_MAC,"nr_check_Msg4_Ack() is not implemented yet!\n"); + + gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; + NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; + NR_RA_t *ra = &cc->ra[0]; + + ra->state = RA_IDLE; +} + void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP){ NR_RA_t *ra = &RC.nrmac[module_idP]->common_channels[CC_id].ra[0]; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 20da8fa30a..f2c75acd22 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1131,6 +1131,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, break; case NR_RNTI_TC: + pos = 1; // indicating a DL DCI format 1bit *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos++); // Freq domain assignment 0-16 bit @@ -1159,9 +1160,27 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, // TPC command for scheduled PUCCH – 2 bits for (int i = 0; i < 2; i++) *dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc >> (1 - i)) & 1) << (dci_size - pos++); + // PUCCH resource indicator – 3 bits + for (int i = 0; i < 3; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->pucch_resource_indicator >> (2 - i)) & 1) << (dci_size - pos++); // PDSCH-to-HARQ_feedback timing indicator – 3 bits for (int i = 0; i < 3; i++) *dci_pdu |= (((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val >> (2 - i)) & 1) << (dci_size - pos++); + + LOG_D(NR_MAC,"N_RB = %i\n", N_RB); + LOG_D(NR_MAC,"dci_size = %i\n", dci_size); + LOG_D(NR_MAC,"fsize = %i\n", fsize); + LOG_D(NR_MAC,"dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); + LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC,"dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); + LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); + LOG_D(NR_MAC,"dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); + break; } break; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 1e2f341192..0ac10c90d5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -490,12 +490,11 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, UE_info->UE_sched_ctrl[UE_id].ta_frame = frameP; free(ra->preambles.preamble_list); - ra->state = RA_IDLE; - LOG_I(NR_MAC, - "reset RA state information for RA-RNTI %04x/index %d\n", - ra->rnti, - i); + ra->state = Msg4; + ra->Msg4_frame = ( frameP +2 ) % 1024; + ra->Msg4_slot = 1; + LOG_I(MAC, "set RA state to Msg4 for RA-RNTI %04x, msg4 frame %d %d\n", ra->rnti, ra->Msg4_frame, ra->Msg4_slot); return; } } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 4b0f2eed2b..d0131e5cb2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -347,12 +347,27 @@ void config_nr_mib(int Mod_idP, int cellBarred, int intraFreqReselection); +int nr_write_ce_dlsch_pdu(module_id_t module_idP, + const NR_UE_sched_ctrl_t *ue_sched_ctl, + unsigned char *mac_pdu, + unsigned char drx_cmd, + unsigned char *ue_cont_res_id); void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP); +void nr_generate_Msg4(module_id_t module_idP, + int CC_id, + frame_t frameP, + sub_frame_t slotP); + +void nr_check_Msg4_Ack(module_id_t module_id, + int CC_id, + frame_t frame, + sub_frame_t slot); + void nr_process_mac_pdu( module_id_t module_idP, rnti_t rnti,