Revert "scheduling dl in both half frames"
This reverts commit cf5bc231ec.
This commit is contained in:
@@ -291,8 +291,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
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void nr_schedule_pucch(int Mod_idP,
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void nr_schedule_pucch(int Mod_idP,
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int UE_id,
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int UE_id,
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frame_t frameP,
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frame_t frameP,
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sub_frame_t slotP,
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sub_frame_t slotP) {
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int num_slots_per_tdd) {
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uint16_t O_uci;
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uint16_t O_uci;
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uint16_t O_ack;
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uint16_t O_ack;
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@@ -307,13 +306,12 @@ void nr_schedule_pucch(int Mod_idP,
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nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
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nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
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NR_sched_pucch *curr_pucch;
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NR_sched_pucch *curr_pucch;
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int p = slotP/num_slots_per_tdd;
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int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
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nr_ulmix_slots++;
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nr_ulmix_slots++;
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for (int k=0; k<nr_ulmix_slots; k++) {
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for (int k=0; k<nr_ulmix_slots; k++) {
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curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[p][k];
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curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k];
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if ((curr_pucch->dai_c > 0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
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if ((curr_pucch->dai_c > 0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
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UL_tti_req->SFN = frameP;
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UL_tti_req->SFN = frameP;
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UL_tti_req->Slot = slotP;
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UL_tti_req->Slot = slotP;
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@@ -335,9 +333,7 @@ void nr_schedule_pucch(int Mod_idP,
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O_ack,
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O_ack,
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SR_flag);
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SR_flag);
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memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[p][k],
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curr_pucch->dai_c = 0;
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0,
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sizeof(NR_sched_pucch));
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}
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}
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}
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}
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}
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}
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@@ -381,6 +377,14 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
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nr_ulmix_slots++;
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nr_ulmix_slots++;
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if (slot_txP== 0 && (UE_list->fiveG_connected[UE_id] || get_softmodem_params()->phy_test)) {
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for (int k=0; k<nr_ulmix_slots; k++) {
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memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k],
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0,
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sizeof(NR_sched_pucch));
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}
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}
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start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
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start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
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@@ -393,11 +397,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
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dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
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ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
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ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
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// hardcoding dlsch to be in slot 1
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if (!(slot_txP%num_slots_per_tdd)) {
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if (!(slot_txP%num_slots_per_tdd)) {
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if(slot_txP==0)
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if(slot_txP==0)
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*dlsch_in_slot_bitmap = 0x7e;
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*dlsch_in_slot_bitmap = 0x7e;
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else
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else
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*dlsch_in_slot_bitmap = 0x7e;
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*dlsch_in_slot_bitmap = 0x00;
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}
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}
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// hardcoding ulsch to be in slot 8
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// hardcoding ulsch to be in slot 8
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@@ -464,8 +469,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) {
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if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) {
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ue_sched_ctl->current_harq_pid = slot_txP % num_slots_per_tdd;
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ue_sched_ctl->current_harq_pid = slot_txP % num_slots_per_tdd;
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nr_update_pucch_scheduling(module_idP, UE_id, frame_txP, slot_txP, num_slots_per_tdd,&pucch_sched);
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nr_update_pucch_scheduling(module_idP, UE_id, frame_txP, slot_txP, num_slots_per_tdd,&pucch_sched);
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nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,
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nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, &UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched], NULL);
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&UE_list->UE_sched_ctrl[UE_id].sched_pucch[slot_txP/num_slots_per_tdd][pucch_sched], NULL);
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// resetting ta flag
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// resetting ta flag
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gNB->ta_len = 0;
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gNB->ta_len = 0;
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}
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}
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@@ -482,12 +486,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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if (get_softmodem_params()->phy_test == 0) {
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if (get_softmodem_params()->phy_test == 0) {
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if (UE_list->fiveG_connected[UE_id])
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if (UE_list->fiveG_connected[UE_id])
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nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP, num_slots_per_tdd);
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nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
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schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
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schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
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nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
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nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
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}
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}
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if (get_softmodem_params()->phy_test){
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if (get_softmodem_params()->phy_test){
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nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP, num_slots_per_tdd);
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nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
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if (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%num_slots_per_tdd)){
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if (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%num_slots_per_tdd)){
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nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
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nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
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}
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}
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@@ -370,6 +370,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
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dci_pdu_rel15[0].ndi = UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].ndi;
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dci_pdu_rel15[0].ndi = UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].ndi;
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// DAI
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// DAI
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dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3;
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dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3;
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// TPC for PUCCH
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// TPC for PUCCH
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dci_pdu_rel15[0].tpc = 1; // table 7.2.1-1 in 38.213
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dci_pdu_rel15[0].tpc = 1; // table 7.2.1-1 in 38.213
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// PUCCH resource indicator
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// PUCCH resource indicator
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@@ -1328,13 +1328,11 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
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int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
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int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
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int UE_id;
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int UE_id;
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int i,p;
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int i;
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NR_UE_list_t *UE_list = &RC.nrmac[mod_idP]->UE_list;
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NR_UE_list_t *UE_list = &RC.nrmac[mod_idP]->UE_list;
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NR_COMMON_channels_t *cc = RC.nrmac[mod_idP]->common_channels;
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NR_COMMON_channels_t *cc = RC.nrmac[mod_idP]->common_channels;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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int num_slots_ul = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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int num_slots_ul = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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int nb_periods = 1<<(7-scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0)
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0)
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num_slots_ul++;
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num_slots_ul++;
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LOG_I(MAC, "[gNB %d] Adding UE with rnti %x (next avail %d, num_UEs %d)\n",
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LOG_I(MAC, "[gNB %d] Adding UE with rnti %x (next avail %d, num_UEs %d)\n",
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@@ -1355,17 +1353,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
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memset((void *) &UE_list->UE_sched_ctrl[UE_id],
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memset((void *) &UE_list->UE_sched_ctrl[UE_id],
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0,
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0,
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sizeof(NR_UE_sched_ctrl_t));
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sizeof(NR_UE_sched_ctrl_t));
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UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch));
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UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(nb_periods*sizeof(NR_sched_pucch *));
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for (p=0; p<nb_periods; p++)
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UE_list->UE_sched_ctrl[UE_id].sched_pucch[p] = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch));
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for (p=0; p<nb_periods; p++) {
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for (int k=0; k<num_slots_ul; k++) {
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memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[p][k],
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0, sizeof(NR_sched_pucch));
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}
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}
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LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n",
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LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n",
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mod_idP,
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mod_idP,
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UE_id,
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UE_id,
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@@ -1443,7 +1431,6 @@ void nr_update_pucch_scheduling(int Mod_idP,
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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NR_sched_pucch *curr_pucch;
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NR_sched_pucch *curr_pucch;
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int tdd_index = slotP/slots_per_tdd;
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int first_ul_slot_tdd,k,i;
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int first_ul_slot_tdd,k,i;
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uint8_t pdsch_to_harq_feedback[8];
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uint8_t pdsch_to_harq_feedback[8];
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int found = 0;
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int found = 0;
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@@ -1457,7 +1444,7 @@ void nr_update_pucch_scheduling(int Mod_idP,
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// for each possible ul or mixed slot
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// for each possible ul or mixed slot
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for (k=0; k<nr_ulmix_slots; k++) {
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for (k=0; k<nr_ulmix_slots; k++) {
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curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[tdd_index][k];
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curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k];
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// if there is free room in current pucch structure
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// if there is free room in current pucch structure
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if (curr_pucch->dai_c<MAX_ACK_BITS) {
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if (curr_pucch->dai_c<MAX_ACK_BITS) {
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curr_pucch->frame = frameP;
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curr_pucch->frame = frameP;
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@@ -198,7 +198,7 @@ typedef struct NR_UE_harq {
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typedef struct {
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typedef struct {
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uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
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uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
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uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
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uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
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NR_sched_pucch **sched_pucch;
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NR_sched_pucch *sched_pucch;
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uint16_t ta_timer;
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uint16_t ta_timer;
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int16_t ta_update;
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int16_t ta_update;
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uint8_t current_harq_pid;
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uint8_t current_harq_pid;
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