Improve nr_rrc_processing_timer to support BWP switching
This commit is contained in:
@@ -518,7 +518,7 @@ void nr_store_dlsch_buffer(module_id_t module_id,
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lcid = DL_SCH_LCID_DCCH;
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lcid = DL_SCH_LCID_DCCH;
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} else if (sched_ctrl->rlc_status[DL_SCH_LCID_DCCH1].bytes_in_buffer > 0) {
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} else if (sched_ctrl->rlc_status[DL_SCH_LCID_DCCH1].bytes_in_buffer > 0) {
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lcid = DL_SCH_LCID_DCCH1;
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lcid = DL_SCH_LCID_DCCH1;
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} else if ( (sched_ctrl->bwp_switch_info.bwp_switch_state != BWP_SWITCH_RUNNING) || (sched_ctrl->schedule_enabled == true) ) {
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} else if (sched_ctrl->schedule_enabled == true) {
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lcid = DL_SCH_LCID_DTCH;
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lcid = DL_SCH_LCID_DTCH;
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} else {
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} else {
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continue;
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continue;
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@@ -1015,14 +1015,16 @@ void nr_bwp_switch(module_id_t module_id,
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case BWP_SWITCH_TO_START:
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case BWP_SWITCH_TO_START:
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LOG_W(NR_MAC,"(%d.%d) [UE_id %d] Schedule BWP switch from bwp_id %ld to %d\n",
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LOG_W(NR_MAC,"(%d.%d) [UE_id %d] Schedule BWP switch from bwp_id %ld to %d\n",
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frame, slot, UE_id, UE_info->UE_sched_ctrl[UE_id].active_bwp->bwp_Id, bwp_id);
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frame, slot, UE_id, UE_info->UE_sched_ctrl[UE_id].active_bwp->bwp_Id, bwp_id);
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sched_ctrl->bwp_switch_info.bwp_switch_timer = 0;
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sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_RUNNING;
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sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_RUNNING;
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sched_ctrl->bwp_switch_info.bwp_switch_slot = slot;
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nr_mac_rrc_bwp_switch_req(module_id, frame, slot, UE_info->rnti[UE_id], bwp_id);
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nr_mac_rrc_bwp_switch_req(module_id, frame, slot, UE_info->rnti[UE_id], bwp_id);
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break;
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break;
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case BWP_SWITCH_RUNNING:
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case BWP_SWITCH_RUNNING:
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sched_ctrl->bwp_switch_info.bwp_switch_timer++;
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// The BWP switching takes at least 10+6 ms (3GPP TS 38.331 Section 12)
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if(sched_ctrl->bwp_switch_info.bwp_switch_timer == sched_ctrl->bwp_switch_info.bwp_switch_delay) {
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// gNB needs time to schedule and send RRCReconfiguration message
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// Therefore, we wait for the same slot in next frame (10 ms) before update bwp_id in the gNB
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if (sched_ctrl->bwp_switch_info.bwp_switch_slot == slot) {
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const NR_ServingCellConfig_t *servingCellConfig = UE_info->CellGroup[UE_id] ? UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated : NULL;
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const NR_ServingCellConfig_t *servingCellConfig = UE_info->CellGroup[UE_id] ? UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated : NULL;
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const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = servingCellConfig ? servingCellConfig->downlinkBWP_ToAddModList : NULL;
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const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = servingCellConfig ? servingCellConfig->downlinkBWP_ToAddModList : NULL;
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const int bwp_id = servingCellConfig && servingCellConfig->firstActiveDownlinkBWP_Id ?
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const int bwp_id = servingCellConfig && servingCellConfig->firstActiveDownlinkBWP_Id ?
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@@ -2260,9 +2260,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
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NULL);
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NULL);
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sched_ctrl->bwp_switch_info.current_bwp = bwp_id;
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sched_ctrl->bwp_switch_info.current_bwp = bwp_id;
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sched_ctrl->bwp_switch_info.next_bwp = -1;
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sched_ctrl->bwp_switch_info.next_bwp = -1;
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sched_ctrl->bwp_switch_info.bwp_switch_timer = 0;
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sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_INACTIVE;
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sched_ctrl->bwp_switch_info.bwp_switch_state = BWP_SWITCH_INACTIVE;
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sched_ctrl->bwp_switch_info.bwp_switch_delay = 40;
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const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL;
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const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL;
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if (ubwpList) AssertFatal(ubwpList->list.count <= NR_MAX_NUM_BWP,
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if (ubwpList) AssertFatal(ubwpList->list.count <= NR_MAX_NUM_BWP,
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"uplinkBWP_ToAddModList has %d BWP!\n",
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"uplinkBWP_ToAddModList has %d BWP!\n",
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@@ -1181,10 +1181,6 @@ void pf_ul(module_id_t module_id,
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continue;
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continue;
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}
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}
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if(sched_ctrl->bwp_switch_info.bwp_switch_state == BWP_SWITCH_RUNNING) {
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continue;
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}
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/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
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/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
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* based on data to transmit) */
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* based on data to transmit) */
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if (B == 0 && do_sched) {
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if (B == 0 && do_sched) {
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@@ -566,8 +566,7 @@ typedef enum {
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typedef struct NR_BWP_switch_info {
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typedef struct NR_BWP_switch_info {
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NR_BWP_Id_t current_bwp;
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NR_BWP_Id_t current_bwp;
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NR_BWP_Id_t next_bwp;
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NR_BWP_Id_t next_bwp;
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int bwp_switch_timer;
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sub_frame_t bwp_switch_slot;
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uint8_t bwp_switch_delay;
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NR_BWP_switch_states_t bwp_switch_state;
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NR_BWP_switch_states_t bwp_switch_state;
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} NR_BWP_switch_info_t;
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} NR_BWP_switch_info_t;
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@@ -414,7 +414,13 @@ void nr_mac_gNB_enable_rrc_processing_timer_req(const module_id_t Mod_instP, con
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ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[Mod_instP], rntiP);
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ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[Mod_instP], rntiP);
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if (ue_context_p != NULL) {
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if (ue_context_p != NULL) {
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ue_context_p->ue_context.nr_rrc_processing_timer = 1;
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ue_context_p->ue_context.nr_rrc_processing_timer = 1;
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ue_context_p->ue_context.nr_rrc_processing_delay = NR_RRC_PROCESSING_DELAY_MS;
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uint32_t delay_ms = NR_RRC_PROCESSING_DELAY_MS;
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if (ue_context_p->ue_context.masterCellGroup &&
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ue_context_p->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated &&
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ue_context_p->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
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delay_ms += NR_RRC_BWP_SWITCH_DELAY_MS;
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}
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ue_context_p->ue_context.nr_rrc_processing_delay = delay_ms;
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} else {
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} else {
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LOG_D(RRC,"%s: Unknown RNTI 0x%04x\n", __FUNCTION__, rntiP);
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LOG_D(RRC,"%s: Unknown RNTI 0x%04x\n", __FUNCTION__, rntiP);
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}
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}
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@@ -101,6 +101,7 @@ typedef struct nr_uid_linear_allocator_s {
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// 3GPP TS 38.331 Section 12 Table 12.1-1: UE performance requirements for RRC procedures for UEs
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// 3GPP TS 38.331 Section 12 Table 12.1-1: UE performance requirements for RRC procedures for UEs
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#define NR_RRC_PROCESSING_DELAY_MS 10
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#define NR_RRC_PROCESSING_DELAY_MS 10
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#define NR_RRC_BWP_SWITCH_DELAY_MS 6
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#define NR_UE_MODULE_INVALID ((module_id_t) ~0) // FIXME attention! depends on type uint8_t!!!
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#define NR_UE_MODULE_INVALID ((module_id_t) ~0) // FIXME attention! depends on type uint8_t!!!
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#define NR_UE_INDEX_INVALID ((module_id_t) ~0) // FIXME attention! depends on type uint8_t!!! used to be -1
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#define NR_UE_INDEX_INVALID ((module_id_t) ~0) // FIXME attention! depends on type uint8_t!!! used to be -1
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@@ -743,7 +743,14 @@ rrc_gNB_generate_defaultRRCReconfiguration(
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NULL,
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NULL,
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ue_p->masterCellGroup);
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ue_p->masterCellGroup);
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enable_nr_rrc_processing_timer(ctxt_pP->module_id, ue_context_pP, TX_SL_AHEAD_DELAY + NR_RRC_PROCESSING_DELAY_MS);
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uint32_t delay_ms = TX_SL_AHEAD_DELAY + NR_RRC_PROCESSING_DELAY_MS;
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if (ue_p->masterCellGroup &&
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ue_p->masterCellGroup->spCellConfig &&
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ue_p->masterCellGroup->spCellConfig->spCellConfigDedicated &&
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ue_p->masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
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delay_ms += NR_RRC_BWP_SWITCH_DELAY_MS;
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}
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enable_nr_rrc_processing_timer(ctxt_pP->module_id, ue_context_pP, delay_ms);
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free(ue_context_pP->ue_context.nas_pdu.buffer);
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free(ue_context_pP->ue_context.nas_pdu.buffer);
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@@ -1008,7 +1015,14 @@ rrc_gNB_generate_dedicatedRRCReconfiguration(
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NULL,
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NULL,
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cellGroupConfig);
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cellGroupConfig);
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enable_nr_rrc_processing_timer(ctxt_pP->module_id, ue_context_pP, TX_SL_AHEAD_DELAY + NR_RRC_PROCESSING_DELAY_MS);
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uint32_t delay_ms = TX_SL_AHEAD_DELAY + NR_RRC_PROCESSING_DELAY_MS;
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if (cellGroupConfig &&
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cellGroupConfig->spCellConfig &&
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cellGroupConfig->spCellConfig->spCellConfigDedicated &&
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cellGroupConfig->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
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delay_ms += NR_RRC_BWP_SWITCH_DELAY_MS;
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}
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enable_nr_rrc_processing_timer(ctxt_pP->module_id, ue_context_pP, delay_ms);
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LOG_DUMPMSG(NR_RRC,DEBUG_RRC,(char *)buffer,size, "[MSG] RRC Reconfiguration\n");
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LOG_DUMPMSG(NR_RRC,DEBUG_RRC,(char *)buffer,size, "[MSG] RRC Reconfiguration\n");
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@@ -1914,6 +1928,8 @@ int nr_rrc_reconfiguration_req(rrc_gNB_ue_context_t *const ue_context_pP
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NULL,
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NULL,
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masterCellGroup);
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masterCellGroup);
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enable_nr_rrc_processing_timer(ctxt_pP->module_id, ue_context_pP, TX_SL_AHEAD_DELAY + NR_RRC_PROCESSING_DELAY_MS + NR_RRC_BWP_SWITCH_DELAY_MS);
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nr_rrc_data_req(ctxt_pP,
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nr_rrc_data_req(ctxt_pP,
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DCCH,
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DCCH,
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rrc_gNB_mui++,
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rrc_gNB_mui++,
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