Merge remote-tracking branch 'origin/develop-nr' into 472-add-pusch-dmrs-modes
This commit is contained in:
+5
-4
@@ -806,7 +806,6 @@ static void *ru_thread_asynch_rxtx( void *param ) {
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printf( "devices ok (ru_thread_asynch_rx)\n");
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while (!oai_exit) {
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if (oai_exit) break;
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if (subframe==9) {
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subframe=0;
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@@ -854,7 +853,7 @@ static void *ru_thread_prach( void *param ) {
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LOG_I(PHY,"%s() RU configured - RACH processing thread running\n", __FUNCTION__);
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while (!oai_exit) {
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if (oai_exit) break;
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if (wait_on_condition(&proc->mutex_prach,&proc->cond_prach,&proc->instance_cnt_prach,"ru_prach_thread") < 0) break;
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@@ -1159,7 +1158,7 @@ int setup_RU_buffers(RU_t *ru) {
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frame_parms = ru->nr_frame_parms;
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printf("setup_RU_buffers: frame_parms = %p\n",frame_parms);
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} else {
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printf("RU[%d] not initialized\n", ru->idx);
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printf("ru pointer is NULL\n");
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return(-1);
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}
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@@ -1259,7 +1258,6 @@ static void *ru_thread_tx( void *param ) {
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}
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while (!oai_exit) {
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if (oai_exit) break;
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LOG_D(PHY,"ru_thread_tx: Waiting for TX processing\n");
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// wait until eNBs are finished subframe RX n and TX n+4
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@@ -2272,6 +2270,9 @@ void RCconfig_RU(void)
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LOG_E(PHY, "Erroneous RU clock source in the provided configuration file: '%s'\n", *(RUParamList.paramarray[j][RU_SDR_CLK_SRC].strptr));
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}
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}
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else {
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RC.ru[j]->openair0_cfg.clock_source = unset;
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}
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if (strcmp(*(RUParamList.paramarray[j][RU_LOCAL_RF_IDX].strptr), "yes") == 0) {
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if ( !(config_isparamset(RUParamList.paramarray[j],RU_LOCAL_IF_NAME_IDX)) ) {
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@@ -106,7 +106,6 @@ int config_sync_var=-1;
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#endif
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volatile int oai_exit = 0;
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static clock_source_t clock_source = internal;
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static int wait_for_sync = 0;
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unsigned int mmapped_dma=0;
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@@ -23,7 +23,6 @@
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{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&phy_test, defintval:0, TYPE_INT, 0}, \
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{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&usim_test, defintval:0, TYPE_UINT8, 0}, \
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{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
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{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
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{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
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{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
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{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
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+2
-2
@@ -574,7 +574,7 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
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}
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int computeSamplesShift(PHY_VARS_NR_UE *UE) {
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if ( getenv("RFSIMULATOR") != 0) {
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if (IS_SOFTMODEM_RFSIM) {
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LOG_E(PHY,"SET rx_offset %d \n",UE->rx_offset);
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//UE->rx_offset_diff=0;
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return 0;
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@@ -803,7 +803,7 @@ if (slot_nr == (20+NR_UPLINK_SLOT-DURATION_RX_TO_TX)%20)
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msgToPush->key=slot_nr;
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pushTpool(Tpool, msgToPush);
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if (getenv("RFSIMULATOR") || IS_SOFTMODEM_NOS1) { //getenv("RFSIMULATOR")
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if (IS_SOFTMODEM_RFSIM || IS_SOFTMODEM_NOS1) { //getenv("RFSIMULATOR")
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// FixMe: Wait previous thread is done, because race conditions seems too bad
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// in case of actual RF board, the overlap between threads mitigate the issue
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// We must receive one message, that proves the slot processing is done
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@@ -116,7 +116,7 @@ volatile int start_eNB = 0;
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volatile int start_UE = 0;
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volatile int oai_exit = 0;
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static clock_source_t clock_source = internal;
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static clock_source_t clock_source = unset;
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int single_thread_flag=1;
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static double snr_dB=20;
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@@ -65,7 +65,7 @@
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{"ulsch-max-errors", CONFIG_HLP_ULMAXE, 0, uptr:&ULSCH_max_consecutive_errors, defuintval:0, TYPE_UINT, 0}, \
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{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&phy_test, defintval:0, TYPE_INT, 0}, \
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{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&usim_test, defintval:0, TYPE_UINT8, 0}, \
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{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
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{"clock-source", CONFIG_HLP_EXCCLK, 0, iptr:&clock_source, defintval:0, TYPE_INT, 0}, \
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{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
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{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
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{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
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