modifications for oaisim. oaisim_noS1 compiles at this point.
This commit is contained in:
@@ -2390,14 +2390,14 @@ uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
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if (dci_alloc[n_dci].format > 0) { // exclude the uplink dci
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if (dci_alloc[n_dci].rnti == SI_RNTI) {
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dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_eNB_SI;
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dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_SI;
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 0;//SI;
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = 0;
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl] = dlsch_eNB->harq_processes[0]->TBS>>3;
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LOG_D(PHY,"[DCI][EMUL]SI tbs is %d and dci index %d harq pid is %d \n",eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl],n_dci_dl,
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl]);
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} else if (dci_alloc[n_dci_dl].ra_flag == 1) {
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dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_eNB_ra;
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dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_ra;
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 1;//RA;
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = 0;
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl] = dlsch_eNB->harq_processes[0]->TBS>>3;
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@@ -2406,7 +2406,7 @@ uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
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} else {
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ue_id = find_ue(dci_alloc[n_dci_dl].rnti,PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]);
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DevAssert( ue_id != (uint8_t)-1 );
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dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_eNB[ue_id][0];
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dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch[ue_id][0];
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 2;//TB0;
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eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = dlsch_eNB->current_harq_pid;
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@@ -832,7 +832,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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// may not be necessary for PMCH??
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for (eNB_id2=0; eNB_id2<NB_eNB_INST; eNB_id2++) {
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if (PHY_vars_eNB_g[eNB_id2][CC_id]->lte_frame_parms.Nid_cell == phy_vars_ue->lte_frame_parms.Nid_cell)
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if (PHY_vars_eNB_g[eNB_id2][CC_id]->frame_parms.Nid_cell == phy_vars_ue->frame_parms.Nid_cell)
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break;
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}
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@@ -847,9 +847,9 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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switch (dlsch_id) {
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case PDSCH_SI: // SI
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dlsch_ue = phy_vars_ue->dlsch_ue_SI[eNB_id];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB_SI;
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case SI_PDSCH: // SI
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dlsch_ue = phy_vars_ue->dlsch_SI[eNB_id];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_SI;
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// printf("Doing SI: TBS %d\n",dlsch_ue->harq_processes[0]->TBS>>3);
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memcpy(dlsch_ue->harq_processes[0]->b,dlsch_eNB->harq_processes[0]->b,dlsch_ue->harq_processes[0]->TBS>>3);
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#ifdef DEBUG_DLSCH_DECODING
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@@ -863,9 +863,9 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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return(1);
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break;
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case PDSCH_RA: // RA
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dlsch_ue = phy_vars_ue->dlsch_ue_ra[eNB_id];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB_ra;
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case RA_PDSCH: // RA
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dlsch_ue = phy_vars_ue->dlsch_ra[eNB_id];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_ra;
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memcpy(dlsch_ue->harq_processes[0]->b,dlsch_eNB->harq_processes[0]->b,dlsch_ue->harq_processes[0]->TBS>>3);
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#ifdef DEBUG_DLSCH_DECODING
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LOG_D(PHY,"RA Decoded\n");
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@@ -879,11 +879,11 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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break;
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case PDSCH: // TB0
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dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id][0];
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dlsch_ue = phy_vars_ue->dlsch[eNB_id][0];
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harq_pid = dlsch_ue->current_harq_pid;
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ue_id= (uint32_t)find_ue((int16_t)phy_vars_ue->lte_ue_pdcch_vars[(uint32_t)eNB_id]->crnti,PHY_vars_eNB_g[eNB_id2][CC_id]);
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ue_id= (uint32_t)find_ue((int16_t)phy_vars_ue->pdcch_vars[(uint32_t)eNB_id]->crnti,PHY_vars_eNB_g[eNB_id2][CC_id]);
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DevAssert( ue_id != (uint32_t)-1 );
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB[ue_id][0];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch[ue_id][0];
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#ifdef DEBUG_DLSCH_DECODING
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@@ -918,18 +918,18 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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dlsch_ue->harq_ack[subframe].ack = 0;
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dlsch_ue->harq_ack[subframe].harq_id = harq_pid;
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dlsch_ue->harq_ack[subframe].send_harq_status = 1;
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dlsch->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
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dlsch_ue->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
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return(1+dlsch_ue->max_turbo_iterations);
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}
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break;
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case 3: { // TB1
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dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id][1];
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case PDSCH1: { // TB1
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dlsch_ue = phy_vars_ue->dlsch[eNB_id][1];
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harq_pid = dlsch_ue->current_harq_pid;
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int8_t UE_id = find_ue( phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti, PHY_vars_eNB_g[eNB_id2][CC_id] );
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int8_t UE_id = find_ue( phy_vars_ue->pdcch_vars[eNB_id]->crnti, PHY_vars_eNB_g[eNB_id2][CC_id] );
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DevAssert( UE_id != -1 );
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB[UE_id][1];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch[UE_id][1];
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// reset HARQ
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dlsch_ue->harq_processes[harq_pid]->status = SCH_IDLE;
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dlsch_ue->harq_processes[harq_pid]->round = 0;
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@@ -945,8 +945,8 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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case PMCH: // PMCH
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dlsch_ue = phy_vars_ue->dlsch_ue_MCH[eNB_id];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB_MCH;
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dlsch_ue = phy_vars_ue->dlsch_MCH[eNB_id];
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dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_MCH;
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LOG_D(PHY,"decoding pmch emul (size is %d, enb %d %d)\n", dlsch_ue->harq_processes[0]->TBS>>3, eNB_id, eNB_id2);
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#ifdef DEBUG_DLSCH_DECODING
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@@ -968,20 +968,20 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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memcpy(dlsch_ue->harq_processes[0]->b,
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dlsch_eNB->harq_processes[0]->b,
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dlsch_ue->harq_processes[0]->TBS>>3);
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dlsch->last_iteration_cnt = 1;
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dlsch_ue->last_iteration_cnt = 1;
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return(1);
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} else {
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// retransmission
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dlsch->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
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dlsch_ue->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
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return(1+dlsch_ue->max_turbo_iterations);
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}
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break;
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default:
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dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id][0];
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dlsch_ue = phy_vars_ue->dlsch[eNB_id][0];
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LOG_E(PHY,"dlsch_decoding_emul: FATAL, unknown DLSCH_id %d\n",dlsch_id);
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dlsch->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
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dlsch_ue->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
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return(1+dlsch_ue->max_turbo_iterations);
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}
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@@ -516,12 +516,13 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
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phich_string[ue->frame_parms.phich_config_common.phich_resource],
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ue->frame_parms.nb_antennas_tx_eNB);
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#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
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LOG_I(PHY,"[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
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ue->Mod_id,
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ue->proc.proc_rxtx[0].frame_rx,
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openair0_cfg[0].rx_freq[0]-ue->common_vars.freq_offset,
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ue->common_vars.freq_offset);
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#endif
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} else {
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#ifdef DEBUG_INITIAL_SYNC
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LOG_I(PHY,"[UE%d] Initial sync : PBCH not ok\n",ue->Mod_id);
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@@ -1053,9 +1053,10 @@ uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
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double bler=0.0;//, x=0.0;
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double sinr=0.0;
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uint16_t nb_rb = phy_vars_ue->lte_frame_parms.N_RB_DL;
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uint16_t nb_rb = phy_vars_ue->frame_parms.N_RB_DL;
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int16_t f;
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uint8_t CC_id=phy_vars_ue->CC_id;
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int frame_rx = phy_vars_ue->proc.proc_rxtx[0].frame_rx;
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// compute effective sinr
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// TODO: adapt this to varible bandwidth
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@@ -1074,10 +1075,10 @@ uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
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sinr,
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bler);
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if (pbch_phase == (phy_vars_ue->frame_rx % 4)) {
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if (pbch_phase == (frame_rx % 4)) {
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if (uniformrandom() >= bler) {
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memcpy(phy_vars_ue->lte_ue_pbch_vars[eNB_id]->decoded_output,PHY_vars_eNB_g[eNB_id][CC_id]->pbch_pdu,PBCH_PDU_SIZE);
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return(PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.nb_antennas_tx_eNB);
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memcpy(phy_vars_ue->pbch_vars[eNB_id]->decoded_output,PHY_vars_eNB_g[eNB_id][CC_id]->pbch_pdu,PBCH_PDU_SIZE);
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return(PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.nb_antennas_tx_eNB);
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} else
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return(-1);
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} else
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@@ -1039,7 +1039,7 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
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uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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uint8_t subframe,
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uint8_t dlsch_id,
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PDSCH_t dlsch_id,
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uint8_t eNB_id);
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/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
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@@ -1539,7 +1539,8 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
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uint8_t llr8_flag);
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uint32_t ulsch_decoding_emul(PHY_VARS_eNB *phy_vars_eNB,
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uint8_t UE_index,
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eNB_rxtx_proc_t *proc,
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uint8_t UE_index,
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uint16_t *crnti);
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void generate_phich_top(PHY_VARS_eNB *phy_vars_eNB,
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@@ -1520,16 +1520,9 @@ uint32_t ulsch_decoding_emul(PHY_VARS_eNB *eNB, eNB_rxtx_proc_t *proc,
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#endif
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for (UE_id=0; UE_id<NB_UE_INST; UE_id++) {
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if (rnti == PHY_vars_UE_g[UE_id][CC_id]->lte_ue_pdcch_vars[0]->crnti)
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if (rnti == PHY_vars_UE_g[UE_id][CC_id]->pdcch_vars[0]->crnti)
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break;
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/*
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msg("[PHY] EMUL eNB %d ulsch_decoding_emul : subframe ue id %d crnti %x nb ue %d\n",
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eNB->Mod_id,
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UE_id,
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PHY_vars_UE_g[UE_id]->lte_ue_pdcch_vars[0]->crnti,
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NB_UE_INST);
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*/
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}
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if (UE_id==NB_UE_INST) {
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@@ -2119,6 +2119,7 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
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#ifdef PHY_ABSTRACTION
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else {
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metric0_SR = rx_pucch_emul(eNB,
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proc,
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UE_id,
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pucch_format1,
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0,
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@@ -2192,11 +2193,12 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
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}
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else {
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#ifdef PHY_ABSTRACTION
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metric0 = rx_pucch_emul(eNB,UE_id,
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metric0 = rx_pucch_emul(eNB,
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proc,
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UE_id,
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pucch_format1a,
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0,
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pucch_payload0,
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subframe);
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pucch_payload0);
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#endif
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}
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@@ -2251,11 +2253,11 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
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PUCCH1a_THRES);
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else {
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#ifdef PHY_ABSTRACTION
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metric0 = rx_pucch_emul(eNB,UE_id,
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metric0 = rx_pucch_emul(eNB,proc,
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UE_id,
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format,
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0,
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pucch_payload0,
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subframe);
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pucch_payload0);
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#endif
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}
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} else { //using n1_pucch0/n1_pucch1 resources
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@@ -2283,11 +2285,12 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
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PUCCH1a_THRES);
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else {
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#ifdef PHY_ABSTRACTION
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metric0 = rx_pucch_emul(eNB,UE_id,
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metric0 = rx_pucch_emul(eNB,
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proc,
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UE_id,
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format,
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0,
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pucch_payload0,
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subframe);
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pucch_payload0);
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#endif
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}
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}
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@@ -2307,13 +2310,12 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
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PUCCH1a_THRES);
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else {
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#ifdef PHY_ABSTRACTION
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metric1 = rx_pucch_emul(eNB,UE_id,
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metric1 = rx_pucch_emul(eNB,
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proc,
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UE_id,
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format,
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1,
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pucch_payload1,
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subframe);
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pucch_payload1);
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#endif
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}
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}
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@@ -2389,7 +2391,6 @@ void cba_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq_p
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#ifdef PHY_ABSTRACTION
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else {
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rx_ulsch_emul(eNB,proc,
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subframe,
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eNB->UE_stats[UE_id].sector, // this is the effective sector id
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UE_id);
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}
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@@ -2407,6 +2408,7 @@ void cba_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq_p
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#ifdef PHY_ABSTRACTION
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else {
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ret = ulsch_decoding_emul(eNB,
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proc,
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UE_id,
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&rnti);
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}
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@@ -2909,7 +2911,6 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
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#ifdef PHY_ABSTRACTION
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else {
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rx_ulsch_emul(eNB,proc,
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subframe,
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eNB->UE_stats[i].sector, // this is the effective sector id
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i);
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||||
}
|
||||
@@ -2930,7 +2931,8 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
|
||||
|
||||
#ifdef PHY_ABSTRACTION
|
||||
else {
|
||||
ret = ulsch_decoding_emul(eNB,proc,
|
||||
ret = ulsch_decoding_emul(eNB,
|
||||
proc,
|
||||
i,
|
||||
&rnti);
|
||||
}
|
||||
|
||||
@@ -1209,8 +1209,7 @@ void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
|
||||
format,
|
||||
ue->frame_parms.pucch_config_common.nCS_AN,
|
||||
pucch_ack_payload,
|
||||
SR_payload,
|
||||
subframe_tx);
|
||||
SR_payload);
|
||||
#endif
|
||||
}
|
||||
} else if (SR_payload==1) { // no ACK/NAK but SR is triggered by MAC
|
||||
@@ -2503,7 +2502,7 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
|
||||
#ifdef PHY_ABSTRACTION
|
||||
ret = dlsch_decoding_emul(ue,
|
||||
subframe_rx,
|
||||
dlsch,
|
||||
pdsch,
|
||||
eNB_id);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -348,7 +348,7 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
|
||||
|
||||
switch (eNB_transport_info[enb_id][CC_id].dlsch_type[n_dci_dl]) {
|
||||
case 0: //SI:
|
||||
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB_SI->harq_processes[0]->b,
|
||||
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_SI->harq_processes[0]->b,
|
||||
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
|
||||
eNB_transport_info[enb_id][CC_id].tbs[n_dci_dl]);
|
||||
#ifdef DEBUG_EMU
|
||||
@@ -358,7 +358,7 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
|
||||
break;
|
||||
|
||||
case 1: //RA:
|
||||
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB_ra->harq_processes[0]->b,
|
||||
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_ra->harq_processes[0]->b,
|
||||
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
|
||||
eNB_transport_info[enb_id][CC_id].tbs[n_dci_dl]);
|
||||
#ifdef DEBUG_EMU
|
||||
@@ -370,9 +370,9 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
|
||||
case 2://TB0:
|
||||
harq_pid = eNB_transport_info[enb_id][CC_id].harq_pid[n_dci_dl];
|
||||
ue_id = eNB_transport_info[enb_id][CC_id].ue_id[n_dci_dl];
|
||||
PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][0]->rnti=
|
||||
PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][0]->rnti=
|
||||
eNB_transport_info[enb_id][CC_id].dci_alloc[n_dci_dl].rnti;
|
||||
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][0];
|
||||
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][0];
|
||||
#ifdef DEBUG_EMU
|
||||
LOG_D(EMU,
|
||||
" enb_id %d ue id is %d rnti is %x dci index %d, harq_pid %d tbs %d \n",
|
||||
@@ -393,9 +393,9 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
|
||||
case 3://TB1:
|
||||
harq_pid = eNB_transport_info[enb_id][CC_id].harq_pid[n_dci_dl];
|
||||
ue_id = eNB_transport_info[enb_id][CC_id].ue_id[n_dci_dl];
|
||||
PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][1]->rnti=
|
||||
PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][1]->rnti=
|
||||
eNB_transport_info[enb_id][CC_id].dci_alloc[n_dci_dl].rnti;
|
||||
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][1];
|
||||
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][1];
|
||||
|
||||
memcpy(dlsch_eNB->harq_processes[harq_pid]->b,
|
||||
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
|
||||
@@ -403,7 +403,7 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
|
||||
break;
|
||||
|
||||
case 5:
|
||||
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB_MCH->harq_processes[0]->b,
|
||||
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_MCH->harq_processes[0]->b,
|
||||
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
|
||||
eNB_transport_info[enb_id][CC_id].tbs[n_dci_dl]);
|
||||
#ifdef DEBUG_EMU
|
||||
@@ -491,52 +491,45 @@ void fill_phy_ue_vars(unsigned int ue_id, uint8_t CC_id,unsigned int last_slot)
|
||||
#endif
|
||||
|
||||
for (n_enb = 0; n_enb < UE_transport_info[ue_id][CC_id].num_eNB; n_enb++) {
|
||||
#ifdef DEBUG_EMU
|
||||
/* LOG_D(EMU,"Setting ulsch vars for ue %d rnti %x harq pid is %d \n",
|
||||
ue_id, UE_transport_info[ue_id][CC_id].rnti[n_enb],
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]);
|
||||
*/
|
||||
#endif
|
||||
|
||||
rnti = UE_transport_info[ue_id][CC_id].rnti[n_enb];
|
||||
enb_id = UE_transport_info[ue_id][CC_id].eNB_id[n_enb];
|
||||
|
||||
PHY_vars_UE_g[ue_id][CC_id]->lte_ue_pdcch_vars[enb_id]->crnti=rnti;
|
||||
PHY_vars_UE_g[ue_id][CC_id]->pdcch_vars[enb_id]->crnti=rnti;
|
||||
|
||||
harq_pid = UE_transport_info[ue_id][CC_id].harq_pid[n_enb];
|
||||
|
||||
//ulsch = PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id];
|
||||
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_RI[0] =
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_RI[0] =
|
||||
ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ri & 0x1;
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_RI[1] =
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_RI[1] =
|
||||
(ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ri>>1) & 0x1;
|
||||
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_ACK[0]=
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_ACK[0]=
|
||||
ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ack & 0x1;
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_ACK[1]=
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_ACK[1]=
|
||||
(ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ack>>1) & 0x1;
|
||||
//*(uint32_t *)ulsch->o = ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_uci;
|
||||
|
||||
if ((last_slot % 2) == 1) {
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->O =
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->O =
|
||||
ue_cntl_delay[ue_id][CC_id][last_slot%2].length_uci;
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->uci_format =
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->uci_format =
|
||||
ue_cntl_delay[ue_id][CC_id][last_slot%2].uci_format;
|
||||
|
||||
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o,
|
||||
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o,
|
||||
ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_uci,
|
||||
MAX_CQI_BYTES);
|
||||
|
||||
ulsch = PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id];
|
||||
ulsch = PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id];
|
||||
// if (((HLC_subband_cqi_rank1_2A_5MHz *)ulsch->o)->cqi1)
|
||||
LOG_D(EMU,
|
||||
"[UE %d] subframe %d last slot %d copy the payload from eNB %d to UE %d with harq id %d cqi (val %d, length %d) \n",
|
||||
ue_id, subframe, last_slot, enb_id, ue_id, harq_pid,
|
||||
((HLC_subband_cqi_rank1_2A_5MHz *)ulsch->o)->cqi1,
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->O);
|
||||
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->O);
|
||||
}
|
||||
|
||||
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->harq_processes[harq_pid]->b,
|
||||
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->harq_processes[harq_pid]->b,
|
||||
UE_transport_info[ue_id][CC_id].transport_blocks,
|
||||
UE_transport_info[ue_id][CC_id].tbs[enb_id]);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user