Fix whitespaces

This commit is contained in:
Mahesh
2021-02-12 01:25:09 +05:30
parent eb19e02cf3
commit 7f4ffe29c8
16 changed files with 25 additions and 44 deletions
+1 -1
View File
@@ -81,6 +81,7 @@ l1_north_init_eNB () {
return(0);
}
void phy_config_request(PHY_Config_t *phy_config) {
uint8_t Mod_id = phy_config->Mod_id;
int CC_id = phy_config->CC_id;
@@ -572,7 +573,6 @@ void phy_free_lte_eNB(PHY_VARS_eNB *eNB) {
for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) eNB->UE_stats_ptr[UE_id] = NULL;
}
void install_schedule_handlers(IF_Module_t *if_inst) {
if_inst->PHY_config_req = phy_config_request;
if_inst->schedule_response = schedule_response;
-1
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@@ -183,7 +183,6 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,
}
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms) {
LOG_I(PHY,"frame_parms->N_RB_DL=%d\n",frame_parms->N_RB_DL);
LOG_I(PHY,"frame_parms->N_RB_UL=%d\n",frame_parms->N_RB_UL);
+2
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@@ -101,6 +101,8 @@ void handle_nfapi_hi_dci0_mpdcch_dci_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,
// copy dci configuration in to eNB structure
fill_mpdcch_dci0(eNB,proc,&pdcch_vars->mdci_alloc[pdcch_vars->num_dci], &hi_dci0_config_pdu->mpdcch_dci_pdu);
}
void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_proc_t *proc,
nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu) {
LTE_eNB_PHICH *phich = &eNB->phich_vars[subframe&1];
+6 -8
View File
@@ -143,9 +143,6 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
//LOG_I(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d\n",frame,slot);
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
@@ -177,6 +174,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
gNB->pbch_configured=1;
if(NFAPI_MODE != NFAPI_MODE_VNF)
handle_nr_nfapi_ssb_pdu(gNB,frame,slot,
dl_tti_pdu);
@@ -209,10 +207,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
}
// if (UL_tti_req!=NULL) memcpy(&gNB->UL_tti_req,UL_tti_req,sizeof(nfapi_nr_ul_tti_request_t));
if(NFAPI_MODE != NFAPI_MODE_VNF)
for (int i=0;i<number_ul_dci_pdu;i++) {
handle_nfapi_nr_ul_dci_pdu(gNB, frame, slot, &UL_dci_req->ul_dci_pdu_list[i]);
}
if(NFAPI_MODE != NFAPI_MODE_VNF)
for (int i=0;i<number_ul_dci_pdu;i++) {
handle_nfapi_nr_ul_dci_pdu(gNB, frame, slot, &UL_dci_req->ul_dci_pdu_list[i]);
}
if(NFAPI_MODE != NFAPI_MODE_VNF)
for (int i = 0; i < number_ul_tti_pdu; i++) {
@@ -242,7 +240,7 @@ if(NFAPI_MODE != NFAPI_MODE_VNF)
// if (NFAPI_MODE != NFAPI_MONOLITHIC && Sched_INFO->UL_dci_req->numPdus!=0)
// {
// oai_nfapi_ul_dci_req(Sched_INFO->UL_dci_req);
// }//Only DL in nFAPI mode
// } //Uncomment for UL_TTI and UL_DCI messages in in nFAPI mode
if (NFAPI_MODE != NFAPI_MONOLITHIC)
{
+2 -10
View File
@@ -116,10 +116,8 @@ int set_tdd_config_nr( nfapi_nr_config_request_scf_t *cfg,
while(slot_number != nb_slots_to_set) {
if(nrofDownlinkSlots != 0) {
for (int number_of_symbol = 0; number_of_symbol < nrofDownlinkSlots*NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value= 0; // was 0, made 10 to check
// cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.tl.tag= NFAPI_NR_CONFIG_SLOT_CONFIG_TAG;
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value= 0;
if((number_of_symbol+1)%NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
slot_number++;
}
@@ -150,7 +148,6 @@ int set_tdd_config_nr( nfapi_nr_config_request_scf_t *cfg,
}
}
}
//printf("Set tdd config nr tti: 26, symbol count: 0 value: %d \n", cfg->tdd_table.max_tdd_periodicity_list[26].max_num_of_symbol_per_slot_list[0].slot_config.value);
/*
while(slot_number != nb_slots_to_set) {
@@ -313,7 +310,6 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) {
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) {
/* for FDD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common.value,check_slot=0;
if (cfg->cell_config.frame_duplex_type.value == FDD) {
@@ -321,9 +317,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
}
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
@@ -347,7 +341,6 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
return (NR_MIXED_SLOT);
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
@@ -372,7 +365,6 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
return (NR_MIXED_SLOT);
}
}
}
/*******************************************************************
@@ -138,9 +138,6 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
int frame,int slot,
int do_meas) {
// struct timespec time;
// clock_gettime(CLOCK_MONOTONIC, &time);
// LOG_I(PHY,"\nphy_procedures_gNB_TX frame tx %d slot tx %d time %d.%d\n",frame,slot,time.tv_sec,time.tv_nsec);
int aa;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
-1
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@@ -254,7 +254,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
memset(ul_config, 0, sizeof(fapi_nr_ul_config_request_t));
}
}
return 0;
}