Remove UE-specific ulsch bitmap, special phy test slot
when in phy test, only schedule UE to be in slot 8
This commit is contained in:
@@ -398,7 +398,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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protocol_ctxt_t ctxt;
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protocol_ctxt_t ctxt;
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PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
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PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
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uint64_t *ulsch_in_slot_bitmap=NULL;
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const int UE_id = 0;
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const int UE_id = 0;
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const int bwp_id = 1;
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const int bwp_id = 1;
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@@ -434,17 +433,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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nr_rrc_trigger(&ctxt, 0 /*CC_id*/, frame, slot >> *scc->ssbSubcarrierSpacing);
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nr_rrc_trigger(&ctxt, 0 /*CC_id*/, frame, slot >> *scc->ssbSubcarrierSpacing);
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}
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}
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ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
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if (!(slot%num_slots_per_tdd)) {
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if(slot==0) {
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*ulsch_in_slot_bitmap = 0x100;
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}
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else {
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*ulsch_in_slot_bitmap = 0x00;
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}
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}
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const uint64_t dlsch_in_slot_bitmap = (1 << 1);
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const uint64_t dlsch_in_slot_bitmap = (1 << 1);
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const uint64_t ulsch_in_slot_bitmap = (1 << 8);
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memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
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memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
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memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1
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memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1
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@@ -500,7 +490,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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// inside
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// inside
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if (UE_list->fiveG_connected[UE_id]) {
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if (UE_list->fiveG_connected[UE_id]) {
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int tda = 1; // time domain assignment hardcoded for now
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int tda = 1; // time domain assignment hardcoded for now
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schedule_fapi_ul_pdu(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, tda);
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schedule_fapi_ul_pdu(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, tda, ulsch_in_slot_bitmap);
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nr_schedule_pusch(module_idP, UE_id, num_slots_per_tdd, nr_ulmix_slots, frame, slot);
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nr_schedule_pusch(module_idP, UE_id, num_slots_per_tdd, nr_ulmix_slots, frame, slot);
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}
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}
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@@ -812,12 +812,26 @@ int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) {
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return -1;
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return -1;
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}
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}
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long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu) {
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DevAssert(ubwp);
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const NR_PUSCH_TimeDomainResourceAllocation_t *tda_list = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment];
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if (tda_list->k2)
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return *tda_list->k2;
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else if (mu < 2)
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return 1;
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else if (mu == 2)
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return 2;
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else
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return 3;
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}
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void schedule_fapi_ul_pdu(int Mod_idP,
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void schedule_fapi_ul_pdu(int Mod_idP,
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frame_t frameP,
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frame_t frameP,
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sub_frame_t slotP,
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sub_frame_t slotP,
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int num_slots_per_tdd,
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int num_slots_per_tdd,
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int ul_slots,
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int ul_slots,
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int time_domain_assignment) {
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int time_domain_assignment,
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uint64_t ulsch_in_slot_bitmap) {
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gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP];
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gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP];
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NR_COMMON_channels_t *cc = nr_mac->common_channels;
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NR_COMMON_channels_t *cc = nr_mac->common_channels;
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@@ -841,18 +855,14 @@ void schedule_fapi_ul_pdu(int Mod_idP,
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AssertFatal(time_domain_assignment<ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count,
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AssertFatal(time_domain_assignment<ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count,
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"time_domain_assignment %d>=%d\n",time_domain_assignment,ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count);
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"time_domain_assignment %d>=%d\n",time_domain_assignment,ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count);
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int K2;
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int K2 = get_K2(ubwp, time_domain_assignment,mu);
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if (ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->k2 != NULL)
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/* check if slot is UL, and for phy test verify that it is in first TDD
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K2 = *ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->k2;
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* period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE
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else {
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* limitations). Note that if K2 or the TDD configuration is changed, below
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if (mu<2) K2=1;
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* conditions might exclude each other and never be true */
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else if(mu==2) K2=2;
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const int slot_idx = (slotP + K2) % num_slots_per_tdd;
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else K2=3;
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if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot_idx)
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}
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&& (!get_softmodem_params()->phy_test || slotP == 6)) {
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if (is_xlsch_in_slot(UE_list->UE_sched_ctrl[UE_id].ulsch_in_slot_bitmap,(slotP+K2)%num_slots_per_tdd)) {
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//nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
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nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0];
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nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0];
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UL_dci_req->SFN = frameP;
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UL_dci_req->SFN = frameP;
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UL_dci_req->Slot = slotP;
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UL_dci_req->Slot = slotP;
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@@ -344,7 +344,8 @@ void schedule_fapi_ul_pdu(int Mod_idP,
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sub_frame_t slotP,
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sub_frame_t slotP,
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int num_slots_per_tdd,
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int num_slots_per_tdd,
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int ul_slots,
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int ul_slots,
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int time_domain_assignment);
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int time_domain_assignment,
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uint64_t ulsch_in_slot_bitmap);
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void nr_process_mac_pdu(
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void nr_process_mac_pdu(
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module_id_t module_idP,
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module_id_t module_idP,
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@@ -283,7 +283,6 @@ typedef struct NR_UE_ul_harq {
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/*! \brief scheduling control information set through an API */
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/*! \brief scheduling control information set through an API */
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typedef struct {
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typedef struct {
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uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
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NR_sched_pucch *sched_pucch;
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NR_sched_pucch *sched_pucch;
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NR_sched_pusch *sched_pusch;
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NR_sched_pusch *sched_pusch;
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uint16_t ta_timer;
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uint16_t ta_timer;
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