removing CellGroup dependance from MAC common functions
This commit is contained in:
@@ -573,6 +573,7 @@ typedef struct NR_UE_DL_BWP {
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long *pdsch_HARQ_ACK_Codebook;
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long *pdsch_HARQ_ACK_Codebook;
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uint8_t mcsTableIdx;
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uint8_t mcsTableIdx;
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nr_dci_format_t dci_format;
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nr_dci_format_t dci_format;
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int bw_tbslbrm;
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} NR_UE_DL_BWP_t;
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} NR_UE_DL_BWP_t;
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typedef struct NR_UE_UL_BWP {
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typedef struct NR_UE_UL_BWP {
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@@ -591,6 +592,7 @@ typedef struct NR_UE_UL_BWP {
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NR_PUSCH_Config_t *pusch_Config;
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NR_PUSCH_Config_t *pusch_Config;
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NR_PUCCH_Config_t *pucch_Config;
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NR_PUCCH_Config_t *pucch_Config;
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NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon;
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NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon;
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NR_UplinkConfig_t *supplementaryUplink;
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long *harq_ACK_SpatialBundlingPUCCH;
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long *harq_ACK_SpatialBundlingPUCCH;
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NR_CSI_MeasConfig_t *csi_MeasConfig;
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NR_CSI_MeasConfig_t *csi_MeasConfig;
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NR_SRS_Config_t *srs_Config;
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NR_SRS_Config_t *srs_Config;
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@@ -598,6 +600,7 @@ typedef struct NR_UE_UL_BWP {
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long transform_precoding;
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long transform_precoding;
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uint8_t mcs_table;
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uint8_t mcs_table;
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nr_dci_format_t dci_format;
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nr_dci_format_t dci_format;
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int bw_tbslbrm;
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int max_fb_time;
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int max_fb_time;
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} NR_UE_UL_BWP_t;
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} NR_UE_UL_BWP_t;
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@@ -3278,7 +3278,7 @@ uint16_t get_rb_bwp_dci(nr_dci_format_t format,
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uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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const NR_UE_UL_BWP_t *UL_BWP,
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const NR_UE_UL_BWP_t *UL_BWP,
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const NR_CellGroupConfig_t *cg,
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NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig,
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dci_pdu_rel15_t *dci_pdu,
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dci_pdu_rel15_t *dci_pdu,
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nr_dci_format_t format,
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nr_dci_format_t format,
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nr_rnti_type_t rnti_type,
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nr_rnti_type_t rnti_type,
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@@ -3328,12 +3328,12 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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/// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, ULSCH indicator 1 --16
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/// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, ULSCH indicator 1 --16
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size += 16;
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size += 16;
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// Carrier indicator
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// Carrier indicator
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if (cg->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig != NULL) {
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if (crossCarrierSchedulingConfig != NULL) {
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dci_pdu->carrier_indicator.nbits=3;
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dci_pdu->carrier_indicator.nbits=3;
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size += dci_pdu->carrier_indicator.nbits;
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size += dci_pdu->carrier_indicator.nbits;
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}
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}
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// UL/SUL indicator
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// UL/SUL indicator
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if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink != NULL) {
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if (UL_BWP->supplementaryUplink != NULL) {
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dci_pdu->carrier_indicator.nbits=1;
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dci_pdu->carrier_indicator.nbits=1;
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size += dci_pdu->ul_sul_indicator.nbits;
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size += dci_pdu->ul_sul_indicator.nbits;
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}
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}
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@@ -3416,7 +3416,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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size += dci_pdu->antenna_ports.nbits;
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size += dci_pdu->antenna_ports.nbits;
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LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits = %d\n",dci_pdu->antenna_ports.nbits);
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LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits = %d\n",dci_pdu->antenna_ports.nbits);
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// SRS request
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// SRS request
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if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL)
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if (UL_BWP->supplementaryUplink == NULL)
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dci_pdu->srs_request.nbits = 2;
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dci_pdu->srs_request.nbits = 2;
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else
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else
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dci_pdu->srs_request.nbits = 3;
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dci_pdu->srs_request.nbits = 3;
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@@ -3481,7 +3481,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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// Format identifier
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// Format identifier
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size = 1;
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size = 1;
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// Carrier indicator
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// Carrier indicator
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if (cg->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig != NULL) {
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if (crossCarrierSchedulingConfig != NULL) {
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dci_pdu->carrier_indicator.nbits=3;
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dci_pdu->carrier_indicator.nbits=3;
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size += dci_pdu->carrier_indicator.nbits;
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size += dci_pdu->carrier_indicator.nbits;
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}
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}
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@@ -3575,7 +3575,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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size += dci_pdu->transmission_configuration_indication.nbits;
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size += dci_pdu->transmission_configuration_indication.nbits;
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}
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}
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// SRS request
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// SRS request
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if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL)
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if (UL_BWP->supplementaryUplink == NULL)
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dci_pdu->srs_request.nbits = 2;
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dci_pdu->srs_request.nbits = 2;
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else
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else
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dci_pdu->srs_request.nbits = 3;
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dci_pdu->srs_request.nbits = 3;
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@@ -4734,11 +4734,10 @@ uint16_t compute_pucch_prb_size(uint8_t format,
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}
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}
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int get_dlbw_tbslbrm(int scc_bwpsize,
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int get_dlbw_tbslbrm(int scc_bwpsize,
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NR_CellGroupConfig_t *cg) {
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NR_ServingCellConfig_t *servingCellConfig)
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{
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int bw = scc_bwpsize;
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int bw = scc_bwpsize;
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if (cg && cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated) {
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if (servingCellConfig) {
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const NR_ServingCellConfig_t *servingCellConfig = cg->spCellConfig->spCellConfigDedicated;
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if(servingCellConfig->downlinkBWP_ToAddModList) {
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if(servingCellConfig->downlinkBWP_ToAddModList) {
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const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *BWP_list = servingCellConfig->downlinkBWP_ToAddModList;
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const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *BWP_list = servingCellConfig->downlinkBWP_ToAddModList;
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for (int i=0; i<BWP_list->list.count; i++) {
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for (int i=0; i<BWP_list->list.count; i++) {
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@@ -4753,11 +4752,10 @@ int get_dlbw_tbslbrm(int scc_bwpsize,
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}
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}
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int get_ulbw_tbslbrm(int scc_bwpsize,
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int get_ulbw_tbslbrm(int scc_bwpsize,
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NR_CellGroupConfig_t *cg) {
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NR_ServingCellConfig_t *servingCellConfig)
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{
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int bw = scc_bwpsize;
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int bw = scc_bwpsize;
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if (cg && cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated) {
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if (servingCellConfig) {
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const NR_ServingCellConfig_t *servingCellConfig = cg->spCellConfig->spCellConfigDedicated;
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if (servingCellConfig->uplinkConfig &&
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if (servingCellConfig->uplinkConfig &&
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servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList) {
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servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList) {
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const struct NR_UplinkConfig__uplinkBWP_ToAddModList *BWP_list = servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList;
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const struct NR_UplinkConfig__uplinkBWP_ToAddModList *BWP_list = servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList;
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@@ -95,7 +95,7 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda
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uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
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const NR_UE_UL_BWP_t *UL_BWP,
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const NR_UE_UL_BWP_t *UL_BWP,
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const NR_CellGroupConfig_t *cg,
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NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig,
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dci_pdu_rel15_t *dci_pdu,
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dci_pdu_rel15_t *dci_pdu,
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nr_dci_format_t format,
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nr_dci_format_t format,
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nr_rnti_type_t rnti_type,
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nr_rnti_type_t rnti_type,
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@@ -196,10 +196,10 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
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uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset);
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uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset);
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int get_dlbw_tbslbrm(int scc_bwpsize,
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int get_dlbw_tbslbrm(int scc_bwpsize,
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NR_CellGroupConfig_t *cg);
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NR_ServingCellConfig_t *servingCellConfig);
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int get_ulbw_tbslbrm(int scc_bwpsize,
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int get_ulbw_tbslbrm(int scc_bwpsize,
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NR_CellGroupConfig_t *cg);
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NR_ServingCellConfig_t *servingCellConfig);
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uint32_t nr_compute_tbslbrm(uint16_t table,
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uint32_t nr_compute_tbslbrm(uint16_t table,
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uint16_t nb_rb,
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uint16_t nb_rb,
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@@ -570,6 +570,8 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
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configure_ss_coreset(mac, mac->bwp_dlcommon->pdcch_ConfigCommon->choice.setup, NULL);
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configure_ss_coreset(mac, mac->bwp_dlcommon->pdcch_ConfigCommon->choice.setup, NULL);
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}
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}
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NR_ServingCellConfig_t *spCellConfigDedicated = NULL;
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if(cell_group_config) {
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if(cell_group_config) {
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if (cell_group_config->physicalCellGroupConfig) {
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if (cell_group_config->physicalCellGroupConfig) {
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DL_BWP->pdsch_HARQ_ACK_Codebook = &cell_group_config->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
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DL_BWP->pdsch_HARQ_ACK_Codebook = &cell_group_config->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
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@@ -577,7 +579,8 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
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}
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}
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if (cell_group_config->spCellConfig &&
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if (cell_group_config->spCellConfig &&
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cell_group_config->spCellConfig->spCellConfigDedicated) {
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cell_group_config->spCellConfig->spCellConfigDedicated) {
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struct NR_ServingCellConfig *spCellConfigDedicated = cell_group_config->spCellConfig->spCellConfigDedicated;
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spCellConfigDedicated = cell_group_config->spCellConfig->spCellConfigDedicated;
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UL_BWP->supplementaryUplink = spCellConfigDedicated->supplementaryUplink;
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UL_BWP->csi_MeasConfig = spCellConfigDedicated->csi_MeasConfig ? spCellConfigDedicated->csi_MeasConfig->choice.setup : NULL;
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UL_BWP->csi_MeasConfig = spCellConfigDedicated->csi_MeasConfig ? spCellConfigDedicated->csi_MeasConfig->choice.setup : NULL;
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UL_BWP->pusch_servingcellconfig =
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UL_BWP->pusch_servingcellconfig =
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spCellConfigDedicated->uplinkConfig && spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig ? spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
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spCellConfigDedicated->uplinkConfig && spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig ? spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
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@@ -673,6 +676,8 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
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DL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(mac->bwp_dlcommon->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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DL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(mac->bwp_dlcommon->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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UL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(mac->bwp_ulcommon->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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UL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(mac->bwp_ulcommon->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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DL_BWP->bw_tbslbrm = get_dlbw_tbslbrm(DL_BWP->initial_BWPSize, spCellConfigDedicated);
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UL_BWP->bw_tbslbrm = get_ulbw_tbslbrm(UL_BWP->initial_BWPSize, spCellConfigDedicated);
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}
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}
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void ue_init_config_request(NR_UE_MAC_INST_t *mac, int scs)
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void ue_init_config_request(NR_UE_MAC_INST_t *mac, int scs)
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@@ -762,7 +767,7 @@ void nr_rrc_mac_config_req_mcg(module_id_t module_id,
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mac->servCellIndex = cell_group_config->spCellConfig->servCellIndex ? *cell_group_config->spCellConfig->servCellIndex : 0;
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mac->servCellIndex = cell_group_config->spCellConfig->servCellIndex ? *cell_group_config->spCellConfig->servCellIndex : 0;
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else
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else
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mac->servCellIndex = 0;
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mac->servCellIndex = 0;
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mac->crossCarrierSchedulingConfig = cell_group_config->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig;
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mac->scheduling_info.periodicBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING;
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mac->scheduling_info.periodicBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING;
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mac->scheduling_info.retxBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING;
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mac->scheduling_info.retxBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING;
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mac->BSR_reporting_active = NR_BSR_TRIGGER_NONE;
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mac->BSR_reporting_active = NR_BSR_TRIGGER_NONE;
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@@ -803,6 +808,7 @@ void nr_rrc_mac_config_req_scg(module_id_t module_id,
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mac->cg = scell_group_config;
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mac->cg = scell_group_config;
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mac->servCellIndex = *scell_group_config->spCellConfig->servCellIndex;
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mac->servCellIndex = *scell_group_config->spCellConfig->servCellIndex;
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mac->crossCarrierSchedulingConfig = scell_group_config->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig;
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if (scell_group_config->spCellConfig->reconfigurationWithSync)
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if (scell_group_config->spCellConfig->reconfigurationWithSync)
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handle_reconfiguration_with_sync(mac, module_id, cc_idP, scell_group_config->spCellConfig->reconfigurationWithSync);
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handle_reconfiguration_with_sync(mac, module_id, cc_idP, scell_group_config->spCellConfig->reconfigurationWithSync);
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configure_current_BWP(mac, NULL, scell_group_config);
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configure_current_BWP(mac, NULL, scell_group_config);
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@@ -429,7 +429,6 @@ typedef struct {
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NR_UE_L2_STATE_t state;
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NR_UE_L2_STATE_t state;
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NR_CellGroupConfig_t *cg;
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NR_CellGroupConfig_t *cg;
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int servCellIndex;
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int servCellIndex;
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NR_CSI_ReportConfig_t *csirc;
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long physCellId;
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long physCellId;
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//// MAC config
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//// MAC config
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int first_sync_frame;
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int first_sync_frame;
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@@ -437,9 +436,6 @@ typedef struct {
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bool get_otherSI;
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bool get_otherSI;
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NR_DRX_Config_t *drx_Config;
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NR_DRX_Config_t *drx_Config;
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NR_SchedulingRequestConfig_t *schedulingRequestConfig;
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NR_SchedulingRequestConfig_t *schedulingRequestConfig;
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NR_BSR_Config_t *bsr_Config;
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NR_TAG_Config_t *tag_Config;
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NR_PHR_Config_t *phr_Config;
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NR_RNTI_Value_t *cs_RNTI;
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NR_RNTI_Value_t *cs_RNTI;
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NR_MIB_t *mib;
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NR_MIB_t *mib;
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struct NR_SI_SchedulingInfo *si_SchedulingInfo;
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struct NR_SI_SchedulingInfo *si_SchedulingInfo;
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@@ -462,6 +458,7 @@ typedef struct {
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NR_SearchSpace_t *search_space_zero;
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NR_SearchSpace_t *search_space_zero;
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NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon;
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NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon;
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NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig;
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bool phy_config_request_sent;
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bool phy_config_request_sent;
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frame_type_t frame_type;
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frame_type_t frame_type;
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@@ -186,15 +186,35 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
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dci_pdu_rel15_t temp_pdu;
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dci_pdu_rel15_t temp_pdu;
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if(dci_format == NR_DL_DCI_FORMAT_1_0)
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if(dci_format == NR_DL_DCI_FORMAT_1_0)
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alt_size =
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alt_size =
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nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
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nr_dci_size(current_DL_BWP,
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current_UL_BWP,
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mac->crossCarrierSchedulingConfig,
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&temp_pdu,
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NR_UL_DCI_FORMAT_0_0,
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rnti_type,
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coreset,
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dl_bwp_id,
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ss->searchSpaceType->present,
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mac->type0_PDCCH_CSS_config.num_rbs,
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0);
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if(dci_format == NR_UL_DCI_FORMAT_0_0)
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if(dci_format == NR_UL_DCI_FORMAT_0_0)
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alt_size =
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alt_size =
|
||||||
nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
|
nr_dci_size(current_DL_BWP,
|
||||||
|
current_UL_BWP,
|
||||||
|
mac->crossCarrierSchedulingConfig,
|
||||||
|
&temp_pdu,
|
||||||
|
NR_DL_DCI_FORMAT_1_0,
|
||||||
|
rnti_type,
|
||||||
|
coreset,
|
||||||
|
dl_bwp_id,
|
||||||
|
ss->searchSpaceType->present,
|
||||||
|
mac->type0_PDCCH_CSS_config.num_rbs,
|
||||||
|
0);
|
||||||
}
|
}
|
||||||
|
|
||||||
rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP,
|
rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP,
|
||||||
current_UL_BWP,
|
current_UL_BWP,
|
||||||
mac->cg,
|
mac->crossCarrierSchedulingConfig,
|
||||||
&mac->def_dci_pdu_rel15[dl_config->slot][dci_format],
|
&mac->def_dci_pdu_rel15[dl_config->slot][dci_format],
|
||||||
dci_format,
|
dci_format,
|
||||||
rnti_type,
|
rnti_type,
|
||||||
|
|||||||
@@ -735,11 +735,9 @@ static int nr_ue_process_dci_dl_10(module_id_t module_id,
|
|||||||
dlsch_pdu->TBS = current_harq->TBS;
|
dlsch_pdu->TBS = current_harq->TBS;
|
||||||
}
|
}
|
||||||
|
|
||||||
int bw_tbslbrm;
|
int bw_tbslbrm = current_DL_BWP->initial_BWPSize > 0 ?
|
||||||
if (current_DL_BWP->initial_BWPSize > 0)
|
current_DL_BWP->bw_tbslbrm :
|
||||||
bw_tbslbrm = get_dlbw_tbslbrm(current_DL_BWP->initial_BWPSize, mac->cg);
|
dlsch_pdu->BWPSize;
|
||||||
else
|
|
||||||
bw_tbslbrm = dlsch_pdu->BWPSize;
|
|
||||||
dlsch_pdu->tbslbrm = nr_compute_tbslbrm(dlsch_pdu->mcs_table, bw_tbslbrm, 1);
|
dlsch_pdu->tbslbrm = nr_compute_tbslbrm(dlsch_pdu->mcs_table, bw_tbslbrm, 1);
|
||||||
|
|
||||||
/* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
|
/* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
|
||||||
@@ -1164,8 +1162,7 @@ static int nr_ue_process_dci_dl_11(module_id_t module_id,
|
|||||||
long *maxMIMO_Layers = current_DL_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers;
|
long *maxMIMO_Layers = current_DL_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers;
|
||||||
AssertFatal(maxMIMO_Layers != NULL, "Option with max MIMO layers not configured is not supported\n");
|
AssertFatal(maxMIMO_Layers != NULL, "Option with max MIMO layers not configured is not supported\n");
|
||||||
int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4;
|
int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4;
|
||||||
int bw_tbslbrm = get_dlbw_tbslbrm(current_DL_BWP->initial_BWPSize, mac->cg);
|
dlsch_pdu->tbslbrm = nr_compute_tbslbrm(dlsch_pdu->mcs_table, current_DL_BWP->bw_tbslbrm, nl_tbslbrm);
|
||||||
dlsch_pdu->tbslbrm = nr_compute_tbslbrm(dlsch_pdu->mcs_table, bw_tbslbrm, nl_tbslbrm);
|
|
||||||
/*PTRS configuration */
|
/*PTRS configuration */
|
||||||
dlsch_pdu->pduBitmap = 0;
|
dlsch_pdu->pduBitmap = 0;
|
||||||
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) {
|
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) {
|
||||||
|
|||||||
@@ -667,9 +667,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
|
|||||||
if (!maxMIMO_Layers)
|
if (!maxMIMO_Layers)
|
||||||
maxMIMO_Layers = pusch_Config ? pusch_Config->maxRank : NULL;
|
maxMIMO_Layers = pusch_Config ? pusch_Config->maxRank : NULL;
|
||||||
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
|
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
|
||||||
int bw_tbslbrm = get_ulbw_tbslbrm(current_UL_BWP->initial_BWPSize, mac->cg);
|
|
||||||
pusch_config_pdu->tbslbrm = nr_compute_tbslbrm(pusch_config_pdu->mcs_table,
|
pusch_config_pdu->tbslbrm = nr_compute_tbslbrm(pusch_config_pdu->mcs_table,
|
||||||
bw_tbslbrm,
|
current_UL_BWP->bw_tbslbrm,
|
||||||
*maxMIMO_Layers);
|
*maxMIMO_Layers);
|
||||||
} else
|
} else
|
||||||
pusch_config_pdu->tbslbrm = 0;
|
pusch_config_pdu->tbslbrm = 0;
|
||||||
|
|||||||
@@ -1312,9 +1312,8 @@ static void nr_generate_Msg2(module_id_t module_idP,
|
|||||||
pdsch_pdu_rel15->TBSize[0] = TBS;
|
pdsch_pdu_rel15->TBSize[0] = TBS;
|
||||||
}
|
}
|
||||||
|
|
||||||
int bw_tbslbrm = get_dlbw_tbslbrm(dl_bwp->initial_BWPSize, ra->CellGroup);
|
|
||||||
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx,
|
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx,
|
||||||
bw_tbslbrm,
|
dl_bwp->bw_tbslbrm,
|
||||||
1);
|
1);
|
||||||
pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,R);
|
pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,R);
|
||||||
|
|
||||||
@@ -1522,9 +1521,8 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
|
|||||||
int x_Overhead = 0;
|
int x_Overhead = 0;
|
||||||
nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling);
|
nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling);
|
||||||
|
|
||||||
int bw_tbslbrm = get_dlbw_tbslbrm(dl_bwp->initial_BWPSize, ra->CellGroup);
|
|
||||||
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx,
|
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx,
|
||||||
bw_tbslbrm,
|
dl_bwp->bw_tbslbrm,
|
||||||
1);
|
1);
|
||||||
pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(tb_size<<3,R);
|
pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(tb_size<<3,R);
|
||||||
|
|
||||||
|
|||||||
@@ -1086,10 +1086,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
long maxMIMO_Layers = current_BWP->pdsch_servingcellconfig ? *current_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers : 1;
|
long maxMIMO_Layers = current_BWP->pdsch_servingcellconfig ? *current_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers : 1;
|
||||||
const int nl_tbslbrm = min(maxMIMO_Layers, 4);
|
const int nl_tbslbrm = min(maxMIMO_Layers, 4);
|
||||||
// Maximum number of PRBs across all configured DL BWPs
|
// Maximum number of PRBs across all configured DL BWPs
|
||||||
int scc_bwpsize = current_BWP->initial_BWPSize;
|
|
||||||
int bw_tbslbrm = get_dlbw_tbslbrm(scc_bwpsize, cg);
|
|
||||||
pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(current_BWP->mcsTableIdx,
|
pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(current_BWP->mcsTableIdx,
|
||||||
bw_tbslbrm,
|
current_BWP->bw_tbslbrm,
|
||||||
nl_tbslbrm);
|
nl_tbslbrm);
|
||||||
pdsch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,R);
|
pdsch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,R);
|
||||||
|
|
||||||
|
|||||||
@@ -1140,7 +1140,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
|||||||
NR_ControlResourceSet_t *coreset,
|
NR_ControlResourceSet_t *coreset,
|
||||||
uint16_t cset0_bwp_size)
|
uint16_t cset0_bwp_size)
|
||||||
{
|
{
|
||||||
|
NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig = NULL; // TODO configure
|
||||||
uint8_t fsize = 0, pos = 0;
|
uint8_t fsize = 0, pos = 0;
|
||||||
uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
|
uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
|
||||||
*dci_pdu = 0;
|
*dci_pdu = 0;
|
||||||
@@ -1158,16 +1158,46 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
|||||||
// computing alternative size for padding
|
// computing alternative size for padding
|
||||||
dci_pdu_rel15_t temp_pdu;
|
dci_pdu_rel15_t temp_pdu;
|
||||||
if(dci_format == NR_DL_DCI_FORMAT_1_0)
|
if(dci_format == NR_DL_DCI_FORMAT_1_0)
|
||||||
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
|
alt_size = nr_dci_size(current_DL_BWP,
|
||||||
|
current_UL_BWP,
|
||||||
|
crossCarrierSchedulingConfig,
|
||||||
|
&temp_pdu,
|
||||||
|
NR_UL_DCI_FORMAT_0_0,
|
||||||
|
rnti_type,
|
||||||
|
coreset,
|
||||||
|
bwp_id,
|
||||||
|
ss->searchSpaceType->present,
|
||||||
|
cset0_bwp_size,
|
||||||
|
0);
|
||||||
|
|
||||||
if(dci_format == NR_UL_DCI_FORMAT_0_0)
|
if(dci_format == NR_UL_DCI_FORMAT_0_0)
|
||||||
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
|
alt_size = nr_dci_size(current_DL_BWP,
|
||||||
|
current_UL_BWP,
|
||||||
|
crossCarrierSchedulingConfig,
|
||||||
|
&temp_pdu,
|
||||||
|
NR_DL_DCI_FORMAT_1_0,
|
||||||
|
rnti_type,
|
||||||
|
coreset,
|
||||||
|
bwp_id,
|
||||||
|
ss->searchSpaceType->present,
|
||||||
|
cset0_bwp_size,
|
||||||
|
0);
|
||||||
|
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
N_RB = cset0_bwp_size;
|
N_RB = cset0_bwp_size;
|
||||||
|
|
||||||
int dci_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, alt_size);
|
int dci_size = nr_dci_size(current_DL_BWP,
|
||||||
|
current_UL_BWP,
|
||||||
|
crossCarrierSchedulingConfig,
|
||||||
|
dci_pdu_rel15,
|
||||||
|
dci_format,
|
||||||
|
rnti_type,
|
||||||
|
coreset,
|
||||||
|
bwp_id,
|
||||||
|
ss->searchSpaceType->present,
|
||||||
|
cset0_bwp_size,
|
||||||
|
alt_size);
|
||||||
pdcch_dci_pdu->PayloadSizeBits = dci_size;
|
pdcch_dci_pdu->PayloadSizeBits = dci_size;
|
||||||
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
|
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
|
||||||
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
|
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
|
||||||
@@ -2027,11 +2057,13 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
|
|||||||
if (CellGroup && CellGroup->physicalCellGroupConfig)
|
if (CellGroup && CellGroup->physicalCellGroupConfig)
|
||||||
DL_BWP->pdsch_HARQ_ACK_Codebook = &CellGroup->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
|
DL_BWP->pdsch_HARQ_ACK_Codebook = &CellGroup->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
|
||||||
|
|
||||||
|
NR_ServingCellConfig_t *servingCellConfig = NULL;
|
||||||
if (CellGroup &&
|
if (CellGroup &&
|
||||||
CellGroup->spCellConfig &&
|
CellGroup->spCellConfig &&
|
||||||
CellGroup->spCellConfig->spCellConfigDedicated) {
|
CellGroup->spCellConfig->spCellConfigDedicated) {
|
||||||
|
|
||||||
const NR_ServingCellConfig_t *servingCellConfig = CellGroup->spCellConfig->spCellConfigDedicated;
|
servingCellConfig = CellGroup->spCellConfig->spCellConfigDedicated;
|
||||||
|
UL_BWP->supplementaryUplink = servingCellConfig->supplementaryUplink;
|
||||||
DL_BWP->pdsch_servingcellconfig = servingCellConfig->pdsch_ServingCellConfig ? servingCellConfig->pdsch_ServingCellConfig->choice.setup : NULL;
|
DL_BWP->pdsch_servingcellconfig = servingCellConfig->pdsch_ServingCellConfig ? servingCellConfig->pdsch_ServingCellConfig->choice.setup : NULL;
|
||||||
UL_BWP->pusch_servingcellconfig = servingCellConfig->uplinkConfig && servingCellConfig->uplinkConfig->pusch_ServingCellConfig ?
|
UL_BWP->pusch_servingcellconfig = servingCellConfig->uplinkConfig && servingCellConfig->uplinkConfig->pusch_ServingCellConfig ?
|
||||||
servingCellConfig->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
|
servingCellConfig->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
|
||||||
@@ -2144,6 +2176,9 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
|
|||||||
UL_BWP->initial_BWPSize = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
UL_BWP->initial_BWPSize = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||||
UL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
UL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||||
|
|
||||||
|
DL_BWP->bw_tbslbrm = get_dlbw_tbslbrm(DL_BWP->initial_BWPSize, servingCellConfig);
|
||||||
|
UL_BWP->bw_tbslbrm = get_ulbw_tbslbrm(UL_BWP->initial_BWPSize, servingCellConfig);
|
||||||
|
|
||||||
if (UL_BWP->bwp_id > 0) {
|
if (UL_BWP->bwp_id > 0) {
|
||||||
UL_BWP->pucch_ConfigCommon = ul_bwp->bwp_Common->pucch_ConfigCommon ? ul_bwp->bwp_Common->pucch_ConfigCommon->choice.setup : NULL;
|
UL_BWP->pucch_ConfigCommon = ul_bwp->bwp_Common->pucch_ConfigCommon ? ul_bwp->bwp_Common->pucch_ConfigCommon->choice.setup : NULL;
|
||||||
UL_BWP->rach_ConfigCommon = ul_bwp->bwp_Common->rach_ConfigCommon ? ul_bwp->bwp_Common->rach_ConfigCommon->choice.setup : NULL;
|
UL_BWP->rach_ConfigCommon = ul_bwp->bwp_Common->rach_ConfigCommon ? ul_bwp->bwp_Common->rach_ConfigCommon->choice.setup : NULL;
|
||||||
|
|||||||
@@ -2288,10 +2288,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
|
|||||||
if (!maxMIMO_Layers)
|
if (!maxMIMO_Layers)
|
||||||
maxMIMO_Layers = current_BWP->pusch_Config->maxRank;
|
maxMIMO_Layers = current_BWP->pusch_Config->maxRank;
|
||||||
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
|
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
|
||||||
const int scc_bwpsize = current_BWP->initial_BWPSize;
|
|
||||||
int bw_tbslbrm = get_ulbw_tbslbrm(scc_bwpsize, cg);
|
|
||||||
pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(current_BWP->mcs_table,
|
pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(current_BWP->mcs_table,
|
||||||
bw_tbslbrm,
|
current_BWP->bw_tbslbrm,
|
||||||
*maxMIMO_Layers);
|
*maxMIMO_Layers);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|||||||
Reference in New Issue
Block a user