From 8530b9c2c2fc00843a8304271913981fb6c27b1e Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Tue, 9 Aug 2022 08:24:37 +0200 Subject: [PATCH] fixed issue with default CPU cores for RU in CI (now defaults to 2 TP cores and O/S controlled scheduling) --- executables/nr-ru.c | 2 +- openair2/ENB_APP/enb_paramdef.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/executables/nr-ru.c b/executables/nr-ru.c index 2a683147df..2597b3f50c 100644 --- a/executables/nr-ru.c +++ b/executables/nr-ru.c @@ -63,7 +63,7 @@ unsigned short config_frames[4] = {2,9,11,13}; static int DEFBANDS[] = {7}; static int DEFENBS[] = {0}; static int DEFBFW[] = {0x00007fff}; -static int DEFRUTPCORES[] = {2,4,6,8}; +static int DEFRUTPCORES[] = {-1,-1,-1,-1}; //static int DEFNRBANDS[] = {7}; //static int DEFGNBS[] = {0}; diff --git a/openair2/ENB_APP/enb_paramdef.h b/openair2/ENB_APP/enb_paramdef.h index 1e04d03548..0f7e762810 100644 --- a/openair2/ENB_APP/enb_paramdef.h +++ b/openair2/ENB_APP/enb_paramdef.h @@ -201,7 +201,7 @@ typedef enum { {CONFIG_STRING_RU_RXFH_CORE_ID, HLP_RU_RXFH_CORE_ID, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \ {CONFIG_STRING_RU_TXFH_CORE_ID, HLP_RU_TXFH_CORE_ID, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \ {CONFIG_STRING_RU_TP_CORES, HLP_RU_TP_CORES, 0, uptr:NULL, defintarrayval:DEFRUTPCORES, TYPE_INTARRAY, 8}, \ - {CONFIG_STRING_RU_NUM_TP_CORES, HLP_RU_NUM_TP_CORES, 0, uptr:NULL, defintval:4, TYPE_UINT, 0}, \ + {CONFIG_STRING_RU_NUM_TP_CORES, HLP_RU_NUM_TP_CORES, 0, uptr:NULL, defintval:2, TYPE_UINT, 0}, \ {CONFIG_STRING_RU_NUM_INTERFACES, HLP_RU_NUM_INTERFACES, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \ {CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION, HLP_RU_HALF_SLOT_PARALLELIZATION, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \ }