Fix data race in NR UE MSG3 scheduling

Fixed a data race between DL processing of RAR and UL scheduler, which
might result in dropping MSG3.

It was possible that the UL scheduler for the UL slot which RAR
indicates as MSG3 slot was already run by the time the RAR was decoded.

Therefore when DCI for RAR is decoded, assume worst case and halt the
earliest corresponding UL scheduler call until RAR is decoded solving
the data race. This also in turn halts all later scheduling due to
sequential nature of the UL scheduler calls.
This commit is contained in:
Bartosz Podrygajlo
2025-06-03 14:41:06 +02:00
parent bab05384a4
commit 85f3e62caf
8 changed files with 36 additions and 25 deletions
+2 -1
View File
@@ -728,7 +728,8 @@ static int UE_dl_preprocessing(PHY_VARS_NR_UE *UE,
}
sampleShift = pbch_pdcch_processing(UE, proc, phy_data);
if (phy_data->dlsch[0].active && phy_data->dlsch[0].rnti_type == TYPE_C_RNTI_) {
if (phy_data->dlsch[0].active
&& (phy_data->dlsch[0].rnti_type == TYPE_C_RNTI_ || phy_data->dlsch[0].rnti_type == TYPE_RA_RNTI_)) {
// indicate to tx thread to wait for DLSCH decoding
if (phy_data->dlsch[0].dlsch_config.k1_feedback) { // if feedback is 0 there is no HARQ associated with this DLSCH
const int ack_nack_slot = (proc->nr_slot_rx + phy_data->dlsch[0].dlsch_config.k1_feedback) % fp->slots_per_frame;