Merge remote-tracking branch 'origin/NR_2port_CSIRS' into integration_2022_wk08

This commit is contained in:
Robert Schmidt
2022-02-20 19:48:34 +01:00
34 changed files with 1072 additions and 577 deletions
+1 -1
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@@ -231,7 +231,6 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
} }
} }
void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) {
uint8_t count=0, start=0, start_set=0; uint8_t count=0, start=0, start_set=0;
@@ -483,6 +482,7 @@ int get_nr_table_idx(int nr_bandP, uint8_t scs_index) {
return i; return i;
} }
int get_subband_size(int NPRB,int size) { int get_subband_size(int NPRB,int size) {
// implements table 5.2.1.4-2 from 36.214 // implements table 5.2.1.4-2 from 36.214
// //
@@ -444,7 +444,7 @@ typedef struct {
uint8_t pucch_resource_id; uint8_t pucch_resource_id;
uint8_t pdsch_to_harq_feedback_time_ind; uint8_t pdsch_to_harq_feedback_time_ind;
uint8_t n_dmrs_cdm_groups; uint8_t n_dmrs_cdm_groups;
uint8_t dmrs_ports[10]; uint16_t dmrs_ports;
uint8_t n_front_load_symb; uint8_t n_front_load_symb;
uint8_t tci_state; uint8_t tci_state;
fapi_nr_dl_srs_config_t srs_config; fapi_nr_dl_srs_config_t srs_config;
+16 -16
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@@ -124,32 +124,32 @@ int nr_phy_init_RU(RU_t *ru) {
ru->num_gNB,NUMBER_OF_gNB_MAX); ru->num_gNB,NUMBER_OF_gNB_MAX);
LOG_I(PHY,"[INIT] %s() ru->num_gNB:%d \n", __FUNCTION__, ru->num_gNB); LOG_I(PHY,"[INIT] %s() ru->num_gNB:%d \n", __FUNCTION__, ru->num_gNB);
if (ru->do_precoding == 1) {
if (ru->do_precoding == 1) {
int beam_count = 0; int beam_count = 0;
if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1 if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1
for (p=0;p<ru->nb_log_antennas;p++) { for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0 //if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0
beam_count++; beam_count++;
} }
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx)); AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
for (i=0; i<ru->num_gNB; i++) { for (i=0; i<ru->num_gNB; i++) {
int l_ind = 0; int l_ind = 0;
for (p=0;p<ru->nb_log_antennas;p++) { for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01) { //if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*)); ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) { for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t)); ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
AssertFatal(ru->bw_list[i],"ru->bw_list[%d] is null\n",i); AssertFatal(ru->bw_list[i],"ru->bw_list[%d] is null\n",i);
for (re=0; re<fp->ofdm_symbol_size; re++) for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind]; ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j); //printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++; l_ind++;
} // for j } // for j
//} //}
} // for p } // for p
} //for i } //for i
} }
ru->common.beam_id = (uint8_t**)malloc16_clear(ru->nb_tx*sizeof(uint8_t*)); ru->common.beam_id = (uint8_t**)malloc16_clear(ru->nb_tx*sizeof(uint8_t*));
+42 -40
View File
@@ -224,21 +224,23 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n", printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers); start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
#endif #endif
start_meas(&gNB->dlsch_resource_mapping_stats);
for (int ap=0; ap<rel15->nrOfLayers; ap++) {
// DMRS params for this ap start_meas(&gNB->dlsch_resource_mapping_stats);
get_Wt(Wt, ap, dmrs_Type); for (int nl=0; nl<rel15->nrOfLayers; nl++) {
get_Wf(Wf, ap, dmrs_Type);
delta = get_delta(ap, dmrs_Type); int dmrs_port = get_dmrs_port(nl,rel15->dmrsPorts);
l_prime = 0; // single symbol ap 0 // DMRS params for this dmrs port
get_Wt(Wt, dmrs_port, dmrs_Type);
get_Wf(Wf, dmrs_port, dmrs_Type);
delta = get_delta(dmrs_port, dmrs_Type);
l_prime = 0; // single symbol nl 0
l0 = get_l0(rel15->dlDmrsSymbPos); l0 = get_l0(rel15->dlDmrsSymbPos);
l_overline = l0; l_overline = l0;
#ifdef DEBUG_DLSCH_MAPPING #ifdef DEBUG_DLSCH_MAPPING
uint8_t dmrs_symbol = l0+l_prime; uint8_t dmrs_symbol = l0+l_prime;
printf("DMRS Type %d params for ap %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n", printf("DMRS Type %d params for nl %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n",
1+dmrs_Type,ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime, l0, dmrs_symbol); 1+dmrs_Type,nl, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime, l0, dmrs_symbol);
#endif #endif
uint16_t m=0, dmrs_idx=0; uint16_t m=0, dmrs_idx=0;
@@ -307,7 +309,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
if (ptrs_symbol) if (ptrs_symbol)
is_ptrs_re = is_ptrs_subcarrier(k, is_ptrs_re = is_ptrs_subcarrier(k,
rel15->rnti, rel15->rnti,
ap, nl,
rel15->dmrsConfigType, rel15->dmrsConfigType,
rel15->PTRSFreqDensity, rel15->PTRSFreqDensity,
rel15->rbSize, rel15->rbSize,
@@ -317,12 +319,12 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
/* Map DMRS Symbol */ /* Map DMRS Symbol */
if ( (dmrs_symbol_map & (1 << l)) && if ( (dmrs_symbol_map & (1 << l)) &&
(k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) { (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 ] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 ] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING #ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1)], dmrs_idx, l, k, k_prime, n, txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]); txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]);
#endif #endif
dmrs_idx++; dmrs_idx++;
k_prime++; k_prime++;
@@ -330,30 +332,30 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
n+=(k_prime)?0:1; n+=(k_prime)?0:1;
} }
else if(is_ptrs_re){ else if(is_ptrs_re){
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15;
#ifdef DEBUG_DLSCH_MAPPING #ifdef DEBUG_DLSCH_MAPPING
printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d, mod_ptrs: %d %d\n", printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d, mod_ptrs: %d %d\n",
ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF_precoding[nl])[((l*frame_parms->ofdm_symbol_size + k)<<1)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)],mod_ptrs[ptrs_idx<<1],mod_ptrs[(ptrs_idx<<1)+1]); ((int16_t*)txdataF_precoding[nl])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1],mod_ptrs[ptrs_idx<<1],mod_ptrs[(ptrs_idx<<1)+1]);
#endif #endif
ptrs_idx++; ptrs_idx++;
} }
/* Map DATA Symbol */ /* Map DATA Symbol */
else if( ptrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) { else if( ptrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (amp * tx_layers[ap][m<<1]) >> 15; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (amp * tx_layers[nl][m<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * tx_layers[nl][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING #ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1)], m, l, k, txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]); txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]);
#endif #endif
m++; m++;
} }
/* mute RE */ /* mute RE */
else { else {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
} }
if (++k >= frame_parms->ofdm_symbol_size) if (++k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size; k -= frame_parms->ofdm_symbol_size;
@@ -369,26 +371,26 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
} }
// fix the alignment issues later, use 64-bit SIMD below instead of 128. // fix the alignment issues later, use 64-bit SIMD below instead of 128.
if (0/*(frame_parms->N_RB_DL&1)==0*/) { if (0/*(frame_parms->N_RB_DL&1)==0*/) {
__m128i *txF=(__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc)<<1)]; __m128i *txF=(__m128i*)&txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size+start_sc)<<1)];
__m128i *txl = (__m128i*)&tx_layers[ap][m<<1]; __m128i *txl = (__m128i*)&tx_layers[nl][m<<1];
__m128i amp128=_mm_set1_epi16(amp); __m128i amp128=_mm_set1_epi16(amp);
for (int i=0; i<(upper_limit>>2); i++) { for (int i=0; i<(upper_limit>>2); i++) {
txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); txF[i] = _mm_mulhrs_epi16(amp128,txl[i]);
} //RE loop, first part } //RE loop, first part
m+=upper_limit; m+=upper_limit;
if (remaining_re > 0) { if (remaining_re > 0) {
txF = (__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size)<<1)]; txF = (__m128i*)&txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size)<<1)];
txl = (__m128i*)&tx_layers[ap][m<<1]; txl = (__m128i*)&tx_layers[nl][m<<1];
for (int i=0; i<(remaining_re>>2); i++) { for (int i=0; i<(remaining_re>>2); i++) {
txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); txF[i] = _mm_mulhrs_epi16(amp128,txl[i]);
} }
} }
} }
else { else {
__m64 *txF=(__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc)<<1)]; __m64 *txF=(__m64*)&txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size+start_sc)<<1)];
__m64 *txl = (__m64*)&tx_layers[ap][m<<1]; __m64 *txl = (__m64*)&tx_layers[nl][m<<1];
__m64 amp64=_mm_set1_pi16(amp); __m64 amp64=_mm_set1_pi16(amp);
for (int i=0; i<(upper_limit>>1); i++) { for (int i=0; i<(upper_limit>>1); i++) {
@@ -396,31 +398,31 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
#ifdef DEBUG_DLSCH_MAPPING #ifdef DEBUG_DLSCH_MAPPING
if ((i&1) > 0) if ((i&1) > 0)
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, start_sc+(i>>1), txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1)], m, l, start_sc+(i>>1), txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1]); txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1]);
#endif #endif
/* handle this, mute RE */ /* handle this, mute RE */
/*else { /*else {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0; txdataF_precoding[anl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}*/ }*/
} //RE loop, first part } //RE loop, first part
m+=upper_limit; m+=upper_limit;
if (remaining_re > 0) { if (remaining_re > 0) {
txF = (__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size)<<1)]; txF = (__m64*)&txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size)<<1)];
txl = (__m64*)&tx_layers[ap][m<<1]; txl = (__m64*)&tx_layers[nl][m<<1];
for (int i=0; i<(remaining_re>>1); i++) { for (int i=0; i<(remaining_re>>1); i++) {
txF[i] = _mm_mulhrs_pi16(amp64,txl[i]); txF[i] = _mm_mulhrs_pi16(amp64,txl[i]);
#ifdef DEBUG_DLSCH_MAPPING #ifdef DEBUG_DLSCH_MAPPING
if ((i&1) > 0) if ((i&1) > 0)
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, i>>1, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) ], m, l, i>>1, txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) ],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1]); txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1]);
#endif #endif
/* handle this, mute RE */ /* handle this, mute RE */
/*else { /*else {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0; txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}*/ }*/
} //RE loop, second part } //RE loop, second part
} // } //
@@ -328,8 +328,8 @@ void nr_processULSegment(void* arg) {
rv_index, rv_index,
ulsch_harq->new_rx, ulsch_harq->new_rx,
E, E,
ulsch_harq->F, ulsch_harq->F,
Kr-ulsch_harq->F-2*(p_decoderParms->Z))==-1) { Kr-ulsch_harq->F-2*(p_decoderParms->Z))==-1) {
stop_meas(&phy_vars_gNB->ulsch_rate_unmatching_stats); stop_meas(&phy_vars_gNB->ulsch_rate_unmatching_stats);
@@ -272,6 +272,8 @@ typedef struct {
uint8_t dmrsConfigType; uint8_t dmrsConfigType;
// Number of DMRS CDM groups with no data // Number of DMRS CDM groups with no data
uint8_t n_dmrs_cdm_groups; uint8_t n_dmrs_cdm_groups;
/// DMRS ports bitmap
uint16_t dmrs_ports;
/// Starting Symbol number /// Starting Symbol number
uint16_t start_symbol; uint16_t start_symbol;
/// Current subband PMI allocation /// Current subband PMI allocation
+2 -2
View File
@@ -88,7 +88,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
nr_generate_pss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_pss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_sss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4) if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
@@ -189,7 +189,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
//apply the OFDM symbol rotation here //apply the OFDM symbol rotation here
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) { for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
apply_nr_rotation(fp,(int16_t*) &gNB->common_vars.txdataF[aa][txdataF_offset],slot,0,fp->Ncp==EXTENDED?12:14,fp->ofdm_symbol_size); apply_nr_rotation(fp,(int16_t*) &gNB->common_vars.txdataF[aa][txdataF_offset],slot,0,fp->Ncp==EXTENDED?12:14,fp->ofdm_symbol_size);
} }
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX+offset,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX+offset,0);
+5 -3
View File
@@ -284,13 +284,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos; dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType; dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->n_dmrs_cdm_groups = dlsch_config_pdu->n_dmrs_cdm_groups; dlsch0_harq->n_dmrs_cdm_groups = dlsch_config_pdu->n_dmrs_cdm_groups;
dlsch0_harq->dmrs_ports = dlsch_config_pdu->dmrs_ports;
dlsch0_harq->mcs = dlsch_config_pdu->mcs; dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv; dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
//get nrOfLayers from DCI info //get nrOfLayers from DCI info
uint8_t Nl = 0; uint8_t Nl = 0;
for (i = 0; i < 4; i++) { for (i = 0; i < 12; i++) { // max 12 ports
if (dlsch_config_pdu->dmrs_ports[i] >= i) Nl += 1; if ((dlsch_config_pdu->dmrs_ports>>i)&0x01) Nl += 1;
} }
dlsch0_harq->Nl = Nl; dlsch0_harq->Nl = Nl;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table; dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
@@ -308,7 +309,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS; dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS;
dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset; dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset;
dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap; dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs); LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n",
dlsch0->g_pucch, dlsch0_harq->mcs);
} }
} }
} }
+4 -5
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@@ -561,23 +561,23 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
uint16_t s1 = dlsch0_harq->nb_symbols; uint16_t s1 = dlsch0_harq->nb_symbols;
bool is_SI = dlsch0->rnti_type == _SI_RNTI_; bool is_SI = dlsch0->rnti_type == _SI_RNTI_;
LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x\n", LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x, Nl %d\n",
ue->Mod_id,pdsch,nr_slot_rx,harq_pid,dlsch0_harq->status,pdsch_start_rb,pdsch_nb_rb,s0,s1,dlsch0_harq->dlDmrsSymbPos); ue->Mod_id,pdsch,nr_slot_rx,harq_pid,dlsch0_harq->status,pdsch_start_rb,pdsch_nb_rb,s0,s1,dlsch0_harq->dlDmrsSymbPos, dlsch0_harq->Nl);
for (m = s0; m < (s0 +s1); m++) { for (m = s0; m < (s0 +s1); m++) {
if (dlsch0_harq->dlDmrsSymbPos & (1 << m)) { if (dlsch0_harq->dlDmrsSymbPos & (1 << m)) {
for (uint8_t aatx=0; aatx<dlsch0_harq->Nl; aatx++) {//for MIMO Config: it shall loop over no_layers for (uint8_t aatx=0; aatx<dlsch0_harq->Nl; aatx++) {//for MIMO Config: it shall loop over no_layers
LOG_D(PHY,"PDSCH Channel estimation gNB id %d, PDSCH antenna port %d, slot %d, symbol %d\n",0,aatx,nr_slot_rx,m);
nr_pdsch_channel_estimation(ue, nr_pdsch_channel_estimation(ue,
proc, proc,
gNB_id, gNB_id,
is_SI, is_SI,
nr_slot_rx, nr_slot_rx,
aatx /*p*/, get_dmrs_port(aatx,dlsch0_harq->dmrs_ports),
m, m,
BWPStart, BWPStart,
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12, ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
pdsch_nb_rb); pdsch_nb_rb);
LOG_D(PHY,"PDSCH Channel estimation gNB id %d, PDSCH antenna port %d, slot %d, symbol %d\n",0,aatx,nr_slot_rx,m);
#if 0 #if 0
///LOG_M: the channel estimation ///LOG_M: the channel estimation
int nr_frame_rx = proc->frame_rx; int nr_frame_rx = proc->frame_rx;
@@ -1528,7 +1528,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
// do procedures for C-RNTI // do procedures for C-RNTI
int ret_pdsch = 0; int ret_pdsch = 0;
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1) { if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C, VCD_FUNCTION_IN);
ret_pdsch = nr_ue_pdsch_procedures(ue, ret_pdsch = nr_ue_pdsch_procedures(ue,
proc, proc,
+5 -8
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@@ -276,17 +276,13 @@ void nr_dlsim_preprocessor(module_id_t module_id,
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
ps->nrOfLayers = g_nrOfLayers;
int dci_format = sched_ctrl->search_space && sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats ?
NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
nr_set_pdsch_semi_static(scc, nr_set_pdsch_semi_static(scc,
UE_info->CellGroup[0], UE_info->CellGroup[0],
sched_ctrl->active_bwp, sched_ctrl->active_bwp,
NULL, NULL,
/* tda = */ 2, /* tda = */ 2,
dci_format, g_nrOfLayers,
sched_ctrl,
ps); ps);
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch; NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
@@ -782,7 +778,8 @@ int main(int argc, char **argv)
prepare_scd(scd); prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 6, 0, 0, 0, 0); fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 6, 0, 0, 0);
/* RRC parameter validation for secondaryCellGroup */ /* RRC parameter validation for secondaryCellGroup */
fix_scd(scd); fix_scd(scd);
@@ -1221,7 +1218,7 @@ int main(int argc, char **argv)
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
nr_ue_scheduled_response(&scheduled_response); nr_ue_scheduled_response(&scheduled_response);
phy_procedures_nrUE_RX(UE, phy_procedures_nrUE_RX(UE,
&UE_proc, &UE_proc,
0, 0,
+1 -1
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@@ -725,7 +725,7 @@ int main(int argc, char **argv)
prepare_scd(scd); prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0, 0, 0); fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0, 0);
// xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup); // xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
+6 -17
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@@ -2328,11 +2328,6 @@ static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8
} }
/* returns the total DMRS symbols in a slot*/
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype){
return get_num_dmrs(fill_dmrs_mask(pdsch_Config,dmrs_TypeA_Position,NrOfSymbols, startSymbol, mappingtype));
}
// Table 5.1.2.2.1-1 38.214 // Table 5.1.2.2.1-1 38.214
uint8_t getRBGSize(uint16_t bwp_size, long rbg_size_config) { uint8_t getRBGSize(uint16_t bwp_size, long rbg_size_config) {
@@ -3115,9 +3110,9 @@ int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, sl
else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0); else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
} }
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI) { int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI, int length) {
int l0;int dmrs_AdditionalPosition = 0;int maxLength = 0; int l0;int dmrs_AdditionalPosition = 0;
NR_DMRS_DownlinkConfig_t *dmrs_config = NULL; NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype_fromDCI, dmrs_TypeA_Position); LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype_fromDCI, dmrs_TypeA_Position);
@@ -3129,7 +3124,6 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
// in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used // in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used
// referred to section 5.1.6.2 in 38.214 // referred to section 5.1.6.2 in 38.214
dmrs_AdditionalPosition = 2; dmrs_AdditionalPosition = 2;
maxLength = 1;
if (pdsch_Config != NULL) { if (pdsch_Config != NULL) {
if (mappingtype_fromDCI == typeA) { // Type A if (mappingtype_fromDCI == typeA) { // Type A
@@ -3144,8 +3138,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
AssertFatal(dmrs_config != NULL," DMRS configs not present in PDSCH DMRS Downlink config\n"); AssertFatal(dmrs_config != NULL," DMRS configs not present in PDSCH DMRS Downlink config\n");
// default values of maxlength = len2, additionalposition is pos2 // default values of additionalposition is pos2
if (dmrs_config->maxLength != NULL) maxLength = 2;
if (dmrs_config->dmrs_AdditionalPosition != NULL) dmrs_AdditionalPosition = *dmrs_config->dmrs_AdditionalPosition; if (dmrs_config->dmrs_AdditionalPosition != NULL) dmrs_AdditionalPosition = *dmrs_config->dmrs_AdditionalPosition;
} }
@@ -3160,11 +3153,6 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
// For TypeB, ld is the duration of the scheduled PDSCH resources // For TypeB, ld is the duration of the scheduled PDSCH resources
ld = (mappingtype_fromDCI == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols; ld = (mappingtype_fromDCI == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols;
// Section 7.4.1.1.2 in Spec 38.211
//For PDSCH Mapping typeB, if PDSCH duration ld <=4, only single symbol DMRS is supported
if (mappingtype_fromDCI == typeB && ld <= 4)
maxLength = 1;
AssertFatal(ld > 2 && ld < 15,"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d\n",ld); AssertFatal(ld > 2 && ld < 15,"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d\n",ld);
AssertFatal((NrOfSymbols + startSymbol) < 15,"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d\n",startSymbol, NrOfSymbols); AssertFatal((NrOfSymbols + startSymbol) < 15,"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d\n",startSymbol, NrOfSymbols);
@@ -3181,7 +3169,8 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
} }
if (maxLength == 1) { // number of front loaded symbols
if (length == 1) {
row = ld - 2; row = ld - 2;
l_prime = table_7_4_1_1_2_3_pdsch_dmrs_positions_l[row][column]; l_prime = table_7_4_1_1_2_3_pdsch_dmrs_positions_l[row][column];
l0 = 1 << l0; l0 = 1 << l0;
@@ -3192,7 +3181,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
l0 = 1<<l0 | 1<<(l0+1); l0 = 1<<l0 | 1<<(l0+1);
} }
LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, maxLength); LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, length);
AssertFatal(l_prime>=0,"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d\n", row, column); AssertFatal(l_prime>=0,"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d\n", row, column);
l_prime = (mappingtype_fromDCI == typeA) ? (l_prime | l0) : (l_prime << startSymbol); l_prime = (mappingtype_fromDCI == typeA) ? (l_prime | l0) : (l_prime << startSymbol);
@@ -41,7 +41,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw); uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI); int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI,int length);
int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slotP); int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slotP);
@@ -177,8 +177,6 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
uint8_t *reOffset, uint8_t *maxNumPorts, uint8_t *ulPower, uint8_t *reOffset, uint8_t *maxNumPorts, uint8_t *ulPower,
uint8_t NrOfSymbols); uint8_t NrOfSymbols);
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype);
/* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16 /* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16
@param *pusch_config, pointer to pusch config @param *pusch_config, pointer to pusch config
@param *ubwp pointer to uplink bwp @param *ubwp pointer to uplink bwp
+4 -4
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@@ -57,12 +57,12 @@ extern const uint8_t table_7_3_1_1_2_21[19][4];
extern const uint8_t table_7_3_1_1_2_22[6][5]; extern const uint8_t table_7_3_1_1_2_22[6][5];
extern const uint8_t table_7_3_1_1_2_23[5][6]; extern const uint8_t table_7_3_1_1_2_23[5][6];
extern const uint8_t table_7_3_2_3_3_1[12][5]; extern const uint8_t table_7_3_2_3_3_1[12][5];
extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6]; extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10];
extern const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10]; extern const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10];
extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5]; extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7];
extern const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7]; extern const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7];
extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6]; extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14];
extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10]; extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14];
extern const uint16_t table_7_2_1[16]; extern const uint16_t table_7_2_1[16];
+137 -137
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@@ -257,161 +257,161 @@ const uint8_t table_7_3_1_1_2_23[5][6] = {
}; };
const uint8_t table_7_3_2_3_3_1[12][5] = { const uint8_t table_7_3_2_3_3_1[12][5] = {
{1,0,0,0,0},
{1,1,0,0,0}, {1,1,0,0,0},
{1,0,1,0,0}, {1,0,1,0,0},
{2,0,0,0,0}, {1,1,1,0,0},
{2,1,0,0,0}, {2,1,0,0,0},
{2,2,0,0,0},
{2,3,0,0,0},
{2,0,1,0,0}, {2,0,1,0,0},
{2,2,3,0,0}, {2,0,0,1,0},
{2,0,1,2,0}, {2,0,0,0,1},
{2,0,1,2,3}, {2,1,1,0,0},
{2,0,2,0,0} {2,0,0,1,1},
{2,1,1,1,0},
{2,1,1,1,1},
{2,1,0,1,0}
}; };
const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6] = { const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10] = {
{1,0,0,0,0,1}, {1,1,0,0,0,0,0,0,0,1},
{1,1,0,0,0,1}, {1,0,1,0,0,0,0,0,0,1},
{1,0,1,0,0,1}, {1,1,1,0,0,0,0,0,0,1},
{2,0,0,0,0,1}, {2,1,0,0,0,0,0,0,0,1},
{2,1,0,0,0,1}, {2,0,1,0,0,0,0,0,0,1},
{2,2,0,0,0,1}, {2,0,0,1,0,0,0,0,0,1},
{2,3,0,0,0,1}, {2,0,0,0,1,0,0,0,0,1},
{2,0,1,0,0,1}, {2,1,1,0,0,0,0,0,0,1},
{2,2,3,0,0,1}, {2,0,0,1,1,0,0,0,0,1},
{2,0,1,2,0,1}, {2,1,1,1,0,0,0,0,0,1},
{2,0,1,2,3,1}, {2,1,1,1,1,0,0,0,0,1},
{2,0,2,0,0,1}, {2,1,0,1,0,0,0,0,0,1},
{2,0,0,0,0,2}, {2,1,0,0,0,0,0,0,0,2},
{2,1,0,0,0,2}, {2,0,1,0,0,0,0,0,0,2},
{2,2,0,0,0,2}, {2,0,0,1,0,0,0,0,0,2},
{2,3,0,0,0,2}, {2,0,0,0,1,0,0,0,0,2},
{2,4,0,0,0,2}, {2,0,0,0,0,1,0,0,0,2},
{2,5,0,0,0,2}, {2,0,0,0,0,0,1,0,0,2},
{2,6,0,0,0,2}, {2,0,0,0,0,0,0,1,0,2},
{2,7,0,0,0,2}, {2,0,0,0,0,0,0,0,1,2},
{2,0,1,0,0,2}, {2,1,1,0,0,0,0,0,0,2},
{2,2,3,0,0,2}, {2,0,0,1,1,0,0,0,0,2},
{2,4,5,0,0,2}, {2,0,0,0,0,1,1,0,0,2},
{2,6,7,0,0,2}, {2,0,0,0,0,0,0,1,1,2},
{2,0,4,0,0,2}, {2,1,0,0,0,1,0,0,0,2},
{2,2,6,0,0,2}, {2,0,0,1,0,0,0,1,0,2},
{2,0,1,4,0,2}, {2,1,1,0,0,1,0,0,0,2},
{2,2,3,6,0,2}, {2,0,0,1,1,0,0,1,0,2},
{2,0,1,4,5,2}, {2,1,1,0,0,1,1,0,0,2},
{2,2,3,6,7,2}, {2,0,0,1,1,0,0,1,1,2},
{2,0,2,4,6,2} {2,1,0,1,0,1,0,1,0,2}
}; };
const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = { const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = {
{2,0,1,2,3,4,0,0,0,2}, {2,1,1,1,1,1,0,0,0,2},
{2,0,1,2,3,4,6,0,0,2}, {2,1,1,1,1,1,0,1,0,2},
{2,0,1,2,3,4,5,6,0,2}, {2,1,1,1,1,1,1,1,0,2},
{2,0,1,2,3,4,5,6,7,2} {2,1,1,1,1,1,1,1,1,2}
}; };
const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5] = { const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7] = {
{1,0,0,0,0}, {1,1,0,0,0,0,0},
{1,1,0,0,0}, {1,0,1,0,0,0,0},
{1,0,1,0,0}, {1,1,1,0,0,0,0},
{2,0,0,0,0}, {2,1,0,0,0,0,0},
{2,1,0,0,0}, {2,0,1,0,0,0,0},
{2,2,0,0,0}, {2,0,0,1,0,0,0},
{2,3,0,0,0}, {2,0,0,0,1,0,0},
{2,0,1,0,0}, {2,1,1,0,0,0,0},
{2,2,3,0,0}, {2,0,0,1,1,0,0},
{2,0,1,2,0}, {2,1,1,1,0,0,0},
{2,0,1,2,3}, {2,1,1,1,1,0,0},
{3,0,0,0,0}, {3,1,0,0,0,0,0},
{3,1,0,0,0}, {3,0,1,0,0,0,0},
{3,2,0,0,0}, {3,0,0,1,0,0,0},
{3,3,0,0,0}, {3,0,0,0,1,0,0},
{3,4,0,0,0}, {3,0,0,0,0,1,0},
{3,5,0,0,0}, {3,0,0,0,0,0,1},
{3,0,1,0,0}, {3,1,1,0,0,0,0},
{3,2,3,0,0}, {3,0,0,1,1,0,0},
{3,4,5,0,0}, {3,0,0,0,0,1,1},
{3,0,1,2,0}, {3,1,1,1,0,0,0},
{3,3,4,5,0}, {3,0,0,0,1,1,1},
{3,0,1,2,3}, {3,1,1,1,1,0,0},
{2,0,2,0,0} {3,1,0,1,0,0,0}
}; };
const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = { const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = {
{3,0,1,2,3,4,0}, {3,1,1,1,1,1,0},
{3,0,1,2,3,4,5} {3,1,1,1,1,1,1}
}; };
const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6] = { const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14] = {
{1,0,0,0,0,1}, {1,1,0,0,0,0,0,0,0,0,0,0,0,1},
{1,1,0,0,0,1}, {1,0,1,0,0,0,0,0,0,0,0,0,0,1},
{1,0,1,0,0,1}, {1,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,0,0,0,0,1}, {2,1,0,0,0,0,0,0,0,0,0,0,0,1},
{2,1,0,0,0,1}, {2,0,1,0,0,0,0,0,0,0,0,0,0,1},
{2,2,0,0,0,1}, {2,0,0,1,0,0,0,0,0,0,0,0,0,1},
{2,3,0,0,0,1}, {2,0,0,0,1,0,0,0,0,0,0,0,0,1},
{2,0,1,0,0,1}, {2,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,2,3,0,0,1}, {2,0,0,1,1,0,0,0,0,0,0,0,0,1},
{2,0,1,2,0,1}, {2,1,1,1,0,0,0,0,0,0,0,0,0,1},
{2,0,1,2,3,1}, {2,1,1,1,1,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,1}, {3,1,0,0,0,0,0,0,0,0,0,0,0,1},
{3,1,0,0,0,1}, {3,0,1,0,0,0,0,0,0,0,0,0,0,1},
{3,2,0,0,0,1}, {3,0,0,1,0,0,0,0,0,0,0,0,0,1},
{3,3,0,0,0,1}, {3,0,0,0,1,0,0,0,0,0,0,0,0,1},
{3,4,0,0,0,1}, {3,0,0,0,0,1,0,0,0,0,0,0,0,1},
{3,5,0,0,0,1}, {3,0,0,0,0,0,1,0,0,0,0,0,0,1},
{3,0,1,0,0,1}, {3,1,1,0,0,0,0,0,0,0,0,0,0,1},
{3,2,3,0,0,1}, {3,0,0,1,1,0,0,0,0,0,0,0,0,1},
{3,4,5,0,0,1}, {3,0,0,0,0,1,1,0,0,0,0,0,0,1},
{3,0,1,2,0,1}, {3,1,1,1,0,0,0,0,0,0,0,0,0,1},
{3,3,4,5,0,1}, {3,0,0,0,1,1,1,0,0,0,0,0,0,1},
{3,0,1,2,3,1}, {3,1,1,1,1,0,0,0,0,0,0,0,0,1},
{2,0,2,0,0,1}, {2,1,0,1,0,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,2}, {3,1,0,0,0,0,0,0,0,0,0,0,0,2},
{3,1,0,0,0,2}, {3,0,1,0,0,0,0,0,0,0,0,0,0,2},
{3,2,0,0,0,2}, {3,0,0,1,0,0,0,0,0,0,0,0,0,2},
{3,3,0,0,0,2}, {3,0,0,0,1,0,0,0,0,0,0,0,0,2},
{3,4,0,0,0,2}, {3,0,0,0,0,1,0,0,0,0,0,0,0,2},
{3,5,0,0,0,2}, {3,0,0,0,0,0,1,0,0,0,0,0,0,2},
{3,6,0,0,0,2}, {3,0,0,0,0,0,0,1,0,0,0,0,0,2},
{3,7,0,0,0,2}, {3,0,0,0,0,0,0,0,1,0,0,0,0,2},
{3,8,0,0,0,2}, {3,0,0,0,0,0,0,0,0,1,0,0,0,2},
{3,9,0,0,0,2}, {3,0,0,0,0,0,0,0,0,0,1,0,0,2},
{3,10,0,0,0,2}, {3,0,0,0,0,0,0,0,0,0,0,1,0,2},
{3,11,0,0,0,2}, {3,0,0,0,0,0,0,0,0,0,0,0,1,2},
{3,0,1,0,0,2}, {3,1,1,0,0,0,0,0,0,0,0,0,0,2},
{3,2,3,0,0,2}, {3,0,0,1,1,0,0,0,0,0,0,0,0,2},
{3,4,5,0,0,2}, {3,0,0,0,0,1,1,0,0,0,0,0,0,2},
{3,6,7,0,0,2}, {3,0,0,0,0,0,0,1,1,0,0,0,0,2},
{3,8,9,0,0,2}, {3,0,0,0,0,0,0,0,0,1,1,0,0,2},
{3,10,11,0,0,2}, {3,0,0,0,0,0,0,0,0,0,0,1,1,2},
{3,0,1,6,0,2}, {3,1,1,0,0,0,0,1,0,0,0,0,0,2},
{3,2,3,8,0,2}, {3,0,0,1,1,0,0,0,0,1,0,0,0,2},
{3,4,5,10,0,2}, {3,0,0,0,0,1,1,0,0,0,0,1,0,2},
{3,0,1,6,7,2}, {3,1,1,0,0,0,0,1,1,0,0,0,0,2},
{3,2,3,8,9,2}, {3,0,0,1,1,0,0,0,0,1,1,0,0,2},
{3,4,5,10,11,2}, {3,0,0,0,0,1,1,0,0,0,0,1,1,2},
{1,0,0,0,0,2}, {1,1,0,0,0,0,0,0,0,0,0,0,0,2},
{1,1,0,0,0,2}, {1,0,1,0,0,0,0,0,0,0,0,0,0,2},
{1,6,0,0,0,2}, {1,0,0,0,0,0,0,1,0,0,0,0,0,2},
{1,7,0,0,0,2}, {1,0,0,0,0,0,0,0,1,0,0,0,0,2},
{1,0,1,0,0,2}, {1,1,1,0,0,0,0,0,0,0,0,0,0,2},
{1,6,7,0,0,2}, {1,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,0,1,0,0,2}, {2,1,1,0,0,0,0,0,0,0,0,0,0,2},
{2,2,3,0,0,2}, {2,0,0,1,1,0,0,0,0,0,0,0,0,2},
{2,6,7,0,0,2}, {2,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,8,9,0,0,2} {2,0,0,0,0,0,0,0,0,1,1,0,0,2}
}; };
const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = { const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14] = {
{3,0,1,2,3,4,0,0,0,1}, {3,1,1,1,1,1,0,0,0,0,0,0,0,1},
{3,0,1,2,3,4,5,0,0,1}, {3,1,1,1,1,1,1,0,0,0,0,0,0,1},
{2,0,1,2,3,6,0,0,0,2}, {2,1,1,1,1,0,0,1,0,0,0,0,0,2},
{2,0,1,2,3,6,8,0,0,2}, {2,1,1,1,1,0,0,1,0,1,0,0,0,2},
{2,0,1,2,3,6,7,8,0,2}, {2,1,1,1,1,0,0,1,1,1,0,0,0,2},
{2,0,1,2,3,6,7,8,9,2} {2,1,1,1,1,0,0,1,1,1,1,0,0,2},
}; };
// table 7.2-1 TS 38.321 // table 7.2-1 TS 38.321
+71 -48
View File
@@ -871,14 +871,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
(get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position, (get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_0->number_symbols, dlsch_config_pdu_1_0->number_symbols,
dlsch_config_pdu_1_0->start_symbol, dlsch_config_pdu_1_0->start_symbol,
mappingtype); mappingtype, 1);
dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ? dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ?
(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0; (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
if (dlsch_config_pdu_1_0->number_symbols == 2) if (dlsch_config_pdu_1_0->number_symbols == 2)
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
else else
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2; dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2;
dlsch_config_pdu_1_0->dmrs_ports = 1; // only port 0 in case of DCI 1_0
/* VRB_TO_PRB_MAPPING */ /* VRB_TO_PRB_MAPPING */
dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
/* MCS TABLE INDEX */ /* MCS TABLE INDEX */
@@ -1062,13 +1064,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB); int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB);
/* dmrs symbol positions*/
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol,
mappingtype);
dlsch_config_pdu_1_1->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2; dlsch_config_pdu_1_1->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214, /* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
@@ -1132,6 +1127,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
uint8_t n_codewords = 1; // FIXME!!! uint8_t n_codewords = 1; // FIXME!!!
long *max_length = NULL; long *max_length = NULL;
long *dmrs_type = NULL; long *dmrs_type = NULL;
dlsch_config_pdu_1_1->n_front_load_symb = 1; // default value
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA) { if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA) {
max_length = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength; max_length = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength;
dmrs_type = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type; dmrs_type = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type;
@@ -1143,31 +1139,35 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if ((dmrs_type == NULL) && (max_length == NULL)){ if ((dmrs_type == NULL) && (max_length == NULL)){
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports.val][1]; dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_1[dci->antenna_ports.val][1] +
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports.val][2]; (table_7_3_2_3_3_1[dci->antenna_ports.val][2]<<1) +
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports.val][3]; (table_7_3_2_3_3_1[dci->antenna_ports.val][3]<<2) +
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports.val][4]; (table_7_3_2_3_3_1[dci->antenna_ports.val][4]<<3));
} }
if ((dmrs_type == NULL) && (max_length != NULL)){ if ((dmrs_type == NULL) && (max_length != NULL)){
// Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2 // Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2
if (n_codewords == 1) { if (n_codewords == 1) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1]; dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1] +
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2]; (table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2]<<1) +
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3]; (table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3]<<2) +
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4]; (table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4]<<3) +
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5]; (table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5]<<4) +
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][6]<<5) +
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][7]<<6) +
(table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][8]<<7));
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][9];
} }
if (n_codewords == 2) { if (n_codewords == 2) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1]; dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1] +
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2]; (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2]<<1) +
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3]; (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3]<<2) +
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4]; (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4]<<3) +
dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5]; (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5]<<4) +
dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6]; (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6]<<5) +
dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7]; (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7]<<6) +
dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8]; (table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8]<<7));
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][9]; dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][9];
} }
} }
@@ -1175,44 +1175,67 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1 // Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1
if (n_codewords == 1) { if (n_codewords == 1) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1]; dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1] +
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2]; (table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2]<<1) +
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3]; (table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3]<<2) +
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4]; (table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4]<<3) +
(table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][5]<<4) +
(table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][6]<<5));
} }
if (n_codewords == 2) { if (n_codewords == 2) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1]; dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1] +
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2]; (table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2]<<1) +
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3]; (table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3]<<2) +
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4]; (table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4]<<3) +
dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5]; (table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5]<<4) +
dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6]; (table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6]<<5));
} }
} }
if ((dmrs_type != NULL) && (max_length != NULL)){ if ((dmrs_type != NULL) && (max_length != NULL)){
// Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2 // Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2
if (n_codewords == 1) { if (n_codewords == 1) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1]; dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1] +
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2]; (table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2]<<1) +
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3]; (table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3]<<2) +
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4]; (table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4]<<3) +
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5]; (table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5]<<4) +
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][6]<<5) +
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][7]<<6) +
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][8]<<7) +
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][9]<<8) +
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][10]<<9) +
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][11]<<10) +
(table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][12]<<11));
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][13];
} }
if (n_codewords == 2) { if (n_codewords == 2) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1]; dlsch_config_pdu_1_1->dmrs_ports = (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1] +
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2]; (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2]<<1) +
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3]; (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3]<<2) +
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4]; (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4]<<3) +
dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5]; (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5]<<4) +
dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6]; (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6]<<5) +
dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7]; (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7]<<6) +
dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8]; (table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8]<<7) +
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9]<<8) +
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][10]<<9) +
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][11]<<10) +
(table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][12]<<11));
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9]; dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9];
} }
} }
/* dmrs symbol positions*/
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol,
mappingtype,
dlsch_config_pdu_1_1->n_front_load_symb);
/* TCI */ /* TCI */
if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){ if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){
// 0 bit if higher layer parameter tci-PresentInDCI is not enabled // 0 bit if higher layer parameter tci-PresentInDCI is not enabled
+2 -1
View File
@@ -365,8 +365,9 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts
cfg->ssb_table.ssb_mask_list[1].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG; cfg->ssb_table.ssb_mask_list[1].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv+=2; cfg->num_tlv+=2;
// logical antenna ports
cfg->carrier_config.num_tx_ant.value = pdsch_AntennaPorts; cfg->carrier_config.num_tx_ant.value = pdsch_AntennaPorts;
AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 13, "pdsch_AntennaPorts in 1...12\n"); AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 33, "pdsch_AntennaPorts in 1...32\n");
cfg->carrier_config.num_tx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_TX_ANT_TAG; cfg->carrier_config.num_tx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_TX_ANT_TAG;
int num_ssb=0; int num_ssb=0;
@@ -1360,7 +1360,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols, nrOfSymbols,
startSymbolIndex, startSymbolIndex,
mappingtype); mappingtype, 1);
int x_Overhead = 0; int x_Overhead = 0;
uint8_t tb_scaling = 0; uint8_t tb_scaling = 0;
@@ -1609,7 +1609,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
scc->dmrs_TypeA_Position, scc->dmrs_TypeA_Position,
nrOfSymbols, nrOfSymbols,
startSymbolIndex, startSymbolIndex,
mappingtype); mappingtype, 1);
uint16_t N_DMRS_SLOT = get_num_dmrs(dlDmrsSymbPos); uint16_t N_DMRS_SLOT = get_num_dmrs(dlDmrsSymbPos);
@@ -388,7 +388,6 @@ uint32_t schedule_control_sib1(module_id_t module_id,
// Calculate number of PRB_DMRS // Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6; uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos); uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos); LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos);
int rbSize = 0; int rbSize = 0;
uint32_t TBS = 0; uint32_t TBS = 0;
@@ -621,8 +620,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C) // TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB; int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype, 1);
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
// Configure sched_ctrlCommon for SIB1 // Configure sched_ctrlCommon for SIB1
uint32_t TBS = schedule_control_sib1(module_idP, CC_id, uint32_t TBS = schedule_control_sib1(module_idP, CC_id,
@@ -563,7 +563,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
int rbStart = 0; // start wrt BWPstart int rbStart = 0; // start wrt BWPstart
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = (sched_ctrl->active_bwp ||bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
int rbSize = 0; int rbSize = 0;
const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
@@ -587,23 +587,25 @@ bool allocate_dl_retransmission(module_id_t module_id,
/* check whether we need to switch the TDA allocation since the last /* check whether we need to switch the TDA allocation since the last
* (re-)transmission */ * (re-)transmission */
if (ps->time_domain_allocation != tda) if (ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, ps); nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, ps->nrOfLayers, sched_ctrl, ps);
} else { } else {
/* the retransmission will use a different time domain allocation, check /* the retransmission will use a different time domain allocation, check
* that we have enough resources */ * that we have enough resources */
NR_pdsch_semi_static_t temp_ps;
temp_ps.nrOfLayers = 1; NR_pdsch_semi_static_t temp_ps = *ps;
nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps); nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, ps->nrOfLayers, sched_ctrl, &temp_ps);
while (rbStart < bwpSize && while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols))) !(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbStart++; rbStart++;
while (rbStart + rbSize < bwpSize && while (rbStart + rbSize < bwpSize &&
(rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols))) (rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbSize++; rbSize++;
uint32_t new_tbs; uint32_t new_tbs;
uint16_t new_rbSize; uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm, bool success = nr_find_nb_rb(retInfo->Qm,
retInfo->R, retInfo->R,
temp_ps.nrOfLayers,
temp_ps.nrOfSymbols, temp_ps.nrOfSymbols,
temp_ps.N_PRB_DMRS * temp_ps.N_DMRS_SLOT, temp_ps.N_PRB_DMRS * temp_ps.N_DMRS_SLOT,
retInfo->tb_size, retInfo->tb_size,
@@ -702,6 +704,7 @@ void pf_dl(module_id_t module_id,
float coeff_ue[MAX_MOBILES_PER_GNB]; float coeff_ue[MAX_MOBILES_PER_GNB];
// UEs that could be scheduled // UEs that could be scheduled
int ue_array[MAX_MOBILES_PER_GNB]; int ue_array[MAX_MOBILES_PER_GNB];
int layers[MAX_MOBILES_PER_GNB];
NR_list_t UE_sched = { .head = -1, .next = ue_array, .tail = -1, .len = MAX_MOBILES_PER_GNB }; NR_list_t UE_sched = { .head = -1, .next = ue_array, .tail = -1, .len = MAX_MOBILES_PER_GNB };
/* Loop UE_info->list to check retransmission */ /* Loop UE_info->list to check retransmission */
@@ -714,6 +717,8 @@ void pf_dl(module_id_t module_id,
/* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */ /* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
sched_pdsch->dl_harq_pid = sched_ctrl->retrans_dl_harq.head; sched_pdsch->dl_harq_pid = sched_ctrl->retrans_dl_harq.head;
layers[UE_id] = ps->nrOfLayers; // initialization of layers to the previous value in the strcuture
/* Calculate Throughput */ /* Calculate Throughput */
const float a = 0.0005f; // corresponds to 200ms window const float a = 0.0005f; // corresponds to 200ms window
const uint32_t b = UE_info->mac_stats[UE_id].dlsch_current_bytes; const uint32_t b = UE_info->mac_stats[UE_id].dlsch_current_bytes;
@@ -737,9 +742,19 @@ void pf_dl(module_id_t module_id,
continue; continue;
/* Calculate coeff */ /* Calculate coeff */
ps->nrOfLayers = 1; set_dl_mcs(sched_pdsch,sched_ctrl,&mac->dl_max_mcs,ps->mcsTableIdx);
sched_pdsch->mcs = get_mcs_from_bler(module_id, /* CC_id = */ 0, frame, slot, UE_id); sched_pdsch->mcs = get_mcs_from_bler(module_id, /* CC_id = */ 0, frame, slot, UE_id);
uint32_t tbs = pf_tbs[ps->mcsTableIdx][sched_pdsch->mcs]; layers[UE_id] = set_dl_nrOfLayers(sched_ctrl);
const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
const uint16_t R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
uint32_t tbs = nr_compute_tbs(Qm,
R,
1, /* rbSize */
10, /* hypothetical number of slots */
0, /* N_PRB_DMRS * N_DMRS_SLOT */
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
layers[UE_id]) >> 3;
coeff_ue[UE_id] = (float) tbs / thr_ue[UE_id]; coeff_ue[UE_id] = (float) tbs / thr_ue[UE_id];
LOG_D(NR_MAC,"b %d, thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n", LOG_D(NR_MAC,"b %d, thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n",
b, UE_id, thr_ue[UE_id], tbs, UE_id, coeff_ue[UE_id]); b, UE_id, thr_ue[UE_id], tbs, UE_id, coeff_ue[UE_id]);
@@ -842,9 +857,10 @@ void pf_dl(module_id_t module_id,
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch; NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
if (ps->time_domain_allocation != tda) if (ps->nrOfLayers != layers[UE_id] ||
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps); ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, layers[UE_id], sched_ctrl, ps);
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
// Freq-demain allocation // Freq-demain allocation
@@ -865,6 +881,7 @@ void pf_dl(module_id_t module_id,
const int oh = 3 + 2 * (frame == (sched_ctrl->ta_frame + 10) % 1024); const int oh = 3 + 2 * (frame == (sched_ctrl->ta_frame + 10) % 1024);
nr_find_nb_rb(sched_pdsch->Qm, nr_find_nb_rb(sched_pdsch->Qm,
sched_pdsch->R, sched_pdsch->R,
ps->nrOfLayers,
ps->nrOfSymbols, ps->nrOfSymbols,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT, ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
sched_ctrl->num_total_bytes + oh, sched_ctrl->num_total_bytes + oh,
@@ -1048,8 +1065,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
harq->is_waiting = true; harq->is_waiting = true;
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++; UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
LOG_D(NR_MAC, LOG_D(NR_MAC,"%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d nrOfLayers %d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) PUCCH allocation %d TPC %d\n",
"%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) PUCCH allocation %d TPC %d\n",
frame, frame,
slot, slot,
UE_id, UE_id,
@@ -1061,6 +1077,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
ps->nrOfSymbols, ps->nrOfSymbols,
ps->dl_dmrs_symb_pos, ps->dl_dmrs_symb_pos,
sched_pdsch->mcs, sched_pdsch->mcs,
nrOfLayers,
TBS, TBS,
current_harq_pid, current_harq_pid,
harq->round, harq->round,
@@ -165,7 +165,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
scc->dmrs_TypeA_Position, scc->dmrs_TypeA_Position,
NrOfSymbols, NrOfSymbols,
StartSymbolIndex, StartSymbolIndex,
mappingtype); mappingtype, 1);
/* /*
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n"); AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
@@ -278,12 +278,11 @@ void nr_preprocessor_phytest(module_id_t module_id,
UE_id); UE_id);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1; const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
ps->nrOfLayers = target_dl_Nl; ps->nrOfLayers = target_dl_Nl;
if (ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static( if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl)
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps); nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, target_dl_Nl, sched_ctrl, ps);
/* find largest unallocated chunk */ /* find largest unallocated chunk */
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -520,12 +519,14 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl->coreset, sched_ctrl->coreset,
Y); Y);
if (sched_ctrl->cce_index < 0) { if (CCEIndex < 0) {
LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__);
nr_mac->pdcch_cand[cid]--; nr_mac->pdcch_cand[cid]--;
return false; return false;
} }
sched_ctrl->cce_index = CCEIndex;
const int mcs = target_ul_mcs; const int mcs = target_ul_mcs;
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = mcs; sched_pusch->mcs = mcs;
@@ -113,6 +113,20 @@ uint8_t nr_ss_first_symb_idx_scs_120_120_mux3[4] = {4,8,2,6};
uint8_t nr_max_number_of_candidates_per_slot[4] = {44, 36, 22, 20}; uint8_t nr_max_number_of_candidates_per_slot[4] = {44, 36, 22, 20};
uint8_t nr_max_number_of_cces_per_slot[4] = {56, 56, 48, 32}; uint8_t nr_max_number_of_cces_per_slot[4] = {56, 56, 48, 32};
// CQI TABLES
// Table 1 (38.214 5.2.2.1-2)
uint16_t cqi_table1[16][2] = {{0,0},{2,78},{2,120},{2,193},{2,308},{2,449},{2,602},{4,378},
{4,490},{4,616},{6,466},{6,567},{6,666},{6,772},{6,873},{6,948}};
// Table 2 (38.214 5.2.2.1-3)
uint16_t cqi_table2[16][2] = {{0,0},{2,78},{2,193},{2,449},{4,378},{4,490},{4,616},{6,466},
{6,567},{6,666},{6,772},{6,873},{8,711},{8,797},{8,885},{8,948}};
// Table 2 (38.214 5.2.2.1-4)
uint16_t cqi_table3[16][2] = {{0,0},{2,30},{2,50},{2,78},{2,120},{2,193},{2,308},{2,449},
{2,602},{4,378},{4,490},{4,616},{6,466},{6,567},{6,666},{6,772}};
static inline uint8_t get_max_candidates(uint8_t scs) { static inline uint8_t get_max_candidates(uint8_t scs) {
AssertFatal(scs<4, "Invalid PDCCH subcarrier spacing %d\n", scs); AssertFatal(scs<4, "Invalid PDCCH subcarrier spacing %d\n", scs);
return (nr_max_number_of_candidates_per_slot[scs]); return (nr_max_number_of_candidates_per_slot[scs]);
@@ -123,6 +137,59 @@ static inline uint8_t get_max_cces(uint8_t scs) {
return (nr_max_number_of_cces_per_slot[scs]); return (nr_max_number_of_cces_per_slot[scs]);
} }
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl) {
// TODO check this but it should be enough for now
// if there is not csi report RI is 0 from initialization
return (sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri + 1);
}
void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
NR_UE_sched_ctrl_t *sched_ctrl,
uint8_t *target_mcs,
uint8_t mcs_table_idx) {
if (sched_ctrl->set_mcs) {
// TODO for wideband case and multiple TB
int cqi_idx = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb;
uint16_t target_coderate,target_qm;
if (cqi_idx>0) {
int cqi_table = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cqi_table;
AssertFatal(cqi_table == mcs_table_idx, "Indices of MCS tables don't correspond\n");
switch (cqi_table) {
case 0:
target_qm = cqi_table1[cqi_idx][0];
target_coderate = cqi_table1[cqi_idx][1];
break;
case 1:
target_qm = cqi_table2[cqi_idx][0];
target_coderate = cqi_table2[cqi_idx][1];
break;
case 2:
target_qm = cqi_table3[cqi_idx][0];
target_coderate = cqi_table3[cqi_idx][1];
break;
default:
AssertFatal(1==0,"Invalid cqi table index %d\n",cqi_table);
}
int max_mcs = 28;
int R,Qm;
if (mcs_table_idx == 1)
max_mcs = 27;
for (int i=0; i<=max_mcs; i++) {
R = nr_get_code_rate_dl(i, mcs_table_idx);
Qm = nr_get_Qm_dl(i, mcs_table_idx);
if ((Qm == target_qm) && (target_coderate <= R)) {
*target_mcs = i;
break;
}
}
}
sched_ctrl->set_mcs = FALSE;
}
}
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) { void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) {
//TODO first basic implementation of dmrs port selection //TODO first basic implementation of dmrs port selection
@@ -130,23 +197,29 @@ void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) {
// for now it assumes a selection of Nl consecutive dmrs ports // for now it assumes a selection of Nl consecutive dmrs ports
// and a single front loaded symbol // and a single front loaded symbol
// dmrs_ports_id is the index of Tables 7.3.1.2.2-1/2/3/4 // dmrs_ports_id is the index of Tables 7.3.1.2.2-1/2/3/4
// number of front loaded symbols need to be consistent with maxLength
// when a more complete implementation is done
switch (ps->nrOfLayers) { switch (ps->nrOfLayers) {
case 1: case 1:
ps->dmrs_ports_id = 0; ps->dmrs_ports_id = 0;
ps->numDmrsCdmGrpsNoData = 1; ps->numDmrsCdmGrpsNoData = 1;
ps->frontloaded_symb = 1;
break; break;
case 2: case 2:
ps->dmrs_ports_id = 2; ps->dmrs_ports_id = 2;
ps->numDmrsCdmGrpsNoData = 1; ps->numDmrsCdmGrpsNoData = 1;
ps->frontloaded_symb = 1;
break; break;
case 3: case 3:
ps->dmrs_ports_id = 9; ps->dmrs_ports_id = 9;
ps->numDmrsCdmGrpsNoData = 2; ps->numDmrsCdmGrpsNoData = 2;
ps->frontloaded_symb = 1;
break; break;
case 4: case 4:
ps->dmrs_ports_id = 10; ps->dmrs_ports_id = 10;
ps->numDmrsCdmGrpsNoData = 2; ps->numDmrsCdmGrpsNoData = 2;
ps->frontloaded_symb = 1;
break; break;
default: default:
AssertFatal(1==0,"Number of layers %d\n not supported or not valid\n",ps->nrOfLayers); AssertFatal(1==0,"Number of layers %d\n not supported or not valid\n",ps->nrOfLayers);
@@ -385,6 +458,7 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac,
bool nr_find_nb_rb(uint16_t Qm, bool nr_find_nb_rb(uint16_t Qm,
uint16_t R, uint16_t R,
uint8_t nrOfLayers,
uint16_t nb_symb_sch, uint16_t nb_symb_sch,
uint16_t nb_dmrs_prb, uint16_t nb_dmrs_prb,
uint32_t bytes, uint32_t bytes,
@@ -394,7 +468,7 @@ bool nr_find_nb_rb(uint16_t Qm,
{ {
/* is the maximum (not even) enough? */ /* is the maximum (not even) enough? */
*nb_rb = nb_rb_max; *nb_rb = nb_rb_max;
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3; *tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
/* check whether it does not fit, or whether it exactly fits. Some algorithms /* check whether it does not fit, or whether it exactly fits. Some algorithms
* might depend on the return value! */ * might depend on the return value! */
if (bytes > *tbs) if (bytes > *tbs)
@@ -404,7 +478,7 @@ bool nr_find_nb_rb(uint16_t Qm,
/* is the minimum enough? */ /* is the minimum enough? */
*nb_rb = 5; *nb_rb = 5;
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3; *tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
if (bytes <= *tbs) if (bytes <= *tbs)
return true; return true;
@@ -413,7 +487,7 @@ bool nr_find_nb_rb(uint16_t Qm,
int hi = nb_rb_max; int hi = nb_rb_max;
int lo = 1; int lo = 1;
for (int p = (hi + lo) / 2; lo + 1 < hi; p = (hi + lo) / 2) { for (int p = (hi + lo) / 2; lo + 1 < hi; p = (hi + lo) / 2) {
const uint32_t TBS = nr_compute_tbs(Qm, R, p, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3; const uint32_t TBS = nr_compute_tbs(Qm, R, p, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
if (bytes == TBS) { if (bytes == TBS) {
hi = p; hi = p;
break; break;
@@ -424,7 +498,7 @@ bool nr_find_nb_rb(uint16_t Qm,
} }
} }
*nb_rb = hi; *nb_rb = hi;
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3; *tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, nrOfLayers) >> 3;
/* return whether we could allocate all bytes and stay below nb_rb_max */ /* return whether we could allocate all bytes and stay below nb_rb_max */
return *tbs >= bytes && *nb_rb <= nb_rb_max; return *tbs >= bytes && *nb_rb <= nb_rb_max;
} }
@@ -434,18 +508,12 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_BWP_Downlink_t *bwp, const NR_BWP_Downlink_t *bwp,
const NR_BWP_DownlinkDedicated_t *bwpd0, const NR_BWP_DownlinkDedicated_t *bwpd0,
int tda, int tda,
const long dci_format, uint8_t layers,
NR_UE_sched_ctrl_t *sched_ctrl,
NR_pdsch_semi_static_t *ps) NR_pdsch_semi_static_t *ps)
{ {
ps->time_domain_allocation = tda; bool reset_dmrs = false;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = bwp ?
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList :
scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
const int mapping_type = tdaList->list.array[tda]->mappingType;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
NR_BWP_DownlinkDedicated_t *bwpd; NR_BWP_DownlinkDedicated_t *bwpd;
if (bwp && bwp->bwp_Dedicated) { if (bwp && bwp->bwp_Dedicated) {
@@ -454,7 +522,6 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
bwpd = (NR_BWP_DownlinkDedicated_t*)bwpd0; bwpd = (NR_BWP_DownlinkDedicated_t*)bwpd0;
} }
ps->mcsTableIdx = 0;
if (bwpd->pdsch_Config && if (bwpd->pdsch_Config &&
bwpd->pdsch_Config->choice.setup && bwpd->pdsch_Config->choice.setup &&
bwpd->pdsch_Config->choice.setup->mcs_Table) { bwpd->pdsch_Config->choice.setup->mcs_Table) {
@@ -465,15 +532,67 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
} }
else ps->mcsTableIdx = 0; else ps->mcsTableIdx = 0;
if(dci_format == 0) // format 1_0 NR_PDSCH_Config_t *pdsch_Config;
ps->numDmrsCdmGrpsNoData = (ps->nrOfSymbols == 2 ? 1 : 2); if (bwp &&
bwp->bwp_Dedicated &&
bwp->bwp_Dedicated->pdsch_Config &&
bwp->bwp_Dedicated->pdsch_Config->choice.setup)
pdsch_Config = bwp->bwp_Dedicated->pdsch_Config->choice.setup;
else else
set_dl_dmrs_ports(ps); pdsch_Config = NULL;
ps->dmrsConfigType = bwp!=NULL ? (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
if (ps->time_domain_allocation != tda) {
reset_dmrs = true;
ps->time_domain_allocation = tda;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = bwp ?
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList :
scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
ps->mapping_type = tdaList->list.array[tda]->mappingType;
if (pdsch_Config) {
if (ps->mapping_type == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB)
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type == NULL ? 0 : 1;
else
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
}
else
ps->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
}
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
int dci_format;
if (sched_ctrl->search_space) {
dci_format = f ? NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
}
else {
dci_format = NR_DL_DCI_FORMAT_1_0;
}
if (dci_format == NR_DL_DCI_FORMAT_1_0) {
if (ps->nrOfSymbols == 2)
ps->numDmrsCdmGrpsNoData = 1;
else
ps->numDmrsCdmGrpsNoData = 2;
ps->dmrs_ports_id = 0;
ps->frontloaded_symb = 1;
ps->nrOfLayers = 1;
}
else {
if (ps->nrOfLayers != layers ||
ps->numDmrsCdmGrpsNoData == 0) {
reset_dmrs = true;
ps->nrOfLayers = layers;
set_dl_dmrs_ports(ps);
}
}
ps->N_PRB_DMRS = ps->numDmrsCdmGrpsNoData * (ps->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4); ps->N_PRB_DMRS = ps->numDmrsCdmGrpsNoData * (ps->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
ps->dl_dmrs_symb_pos = fill_dmrs_mask(bwpd ? bwpd->pdsch_Config->choice.setup : NULL, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex, mapping_type);
ps->N_DMRS_SLOT = get_num_dmrs(ps->dl_dmrs_symb_pos); if (reset_dmrs) {
ps->dl_dmrs_symb_pos = fill_dmrs_mask(bwpd ? bwpd->pdsch_Config->choice.setup : NULL, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex, ps->mapping_type, ps->frontloaded_symb);
ps->N_DMRS_SLOT = get_num_dmrs(ps->dl_dmrs_symb_pos);
}
LOG_D(NR_MAC,"bwpd0 %p, bwpd %p : Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",bwpd0,bwpd,ps->N_PRB_DMRS,ps->dl_dmrs_symb_pos,ps->N_DMRS_SLOT); LOG_D(NR_MAC,"bwpd0 %p, bwpd %p : Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",bwpd0,bwpd,ps->N_PRB_DMRS,ps->dl_dmrs_symb_pos,ps->N_DMRS_SLOT);
} }
@@ -2027,6 +2146,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, mod_idP); compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, mod_idP);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
memset(sched_ctrl, 0, sizeof(*sched_ctrl)); memset(sched_ctrl, 0, sizeof(*sched_ctrl));
sched_ctrl->set_mcs = TRUE;
sched_ctrl->lcid_mask = 0; sched_ctrl->lcid_mask = 0;
if (!get_softmodem_params()->phy_test && !get_softmodem_params()->do_ra && !get_softmodem_params()->sa) { if (!get_softmodem_params()->phy_test && !get_softmodem_params()->do_ra && !get_softmodem_params()->sa) {
sched_ctrl->lcid_mask = 1<<DL_SCH_LCID_DTCH; sched_ctrl->lcid_mask = 1<<DL_SCH_LCID_DTCH;
+497 -164
View File
@@ -161,7 +161,7 @@ void nr_schedule_pucch(int Mod_idP,
//! Calculating number of bits set //! Calculating number of bits set
uint8_t number_of_bits_set (uint8_t buf,uint8_t * max_ri){ uint8_t number_of_bits_set (uint8_t buf){
uint8_t nb_of_bits_set = 0; uint8_t nb_of_bits_set = 0;
uint8_t mask = 0xff; uint8_t mask = 0xff;
uint8_t index = 0; uint8_t index = 0;
@@ -172,14 +172,13 @@ uint8_t number_of_bits_set (uint8_t buf,uint8_t * max_ri){
mask>>=1; mask>>=1;
} }
*max_ri = 8-index;
return nb_of_bits_set; return nb_of_bits_set;
} }
void compute_rsrp_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig, void compute_rsrp_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
uint8_t nb_resources, uint8_t nb_resources,
nr_csi_report_t *csi_report){ nr_csi_report_t *csi_report) {
if (NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled == csi_reportconfig->groupBasedBeamReporting.present) { if (NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled == csi_reportconfig->groupBasedBeamReporting.present) {
if (NULL != csi_reportconfig->groupBasedBeamReporting.choice.disabled->nrofReportedRS) if (NULL != csi_reportconfig->groupBasedBeamReporting.choice.disabled->nrofReportedRS)
@@ -211,42 +210,24 @@ uint8_t compute_ri_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
nr_csi_report_t *csi_report){ nr_csi_report_t *csi_report){
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig; struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
uint8_t nb_allowed_ri, ri_restriction,ri_bitlen; uint8_t nb_allowed_ri, ri_bitlen;
uint8_t max_ri = 0; uint8_t ri_restriction = 0;
if (codebookConfig == NULL) { if (codebookConfig == NULL) {
csi_report->csi_meas_bitlen.ri_bitlen=0; csi_report->csi_meas_bitlen.ri_bitlen=0;
return max_ri; return ri_restriction;
} }
// codebook type1 single panel // codebook type1 single panel
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel==codebookConfig->codebookType.choice.type1->subType.present){ if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel==codebookConfig->codebookType.choice.type1->subType.present){
struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel *type1single = codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel; struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel *type1single = codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel;
if (type1single->nrOfAntennaPorts.present == NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_two){ if (type1single->nrOfAntennaPorts.present == NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_two){
// two antenna ports case
/* From Spec 38.212
* If the higher layer parameter nrofCQIsPerReport=1, nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator
* values in the 4 LSBs of the higher layer parameter typeI-SinglePanel-ri-Restriction according to Subclause 5.2.2.2.1 [6,
* TS 38.214]; otherwise nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator values according to Subclause
* 5.2.2.2.1 [6, TS 38.214].
*
* But from Current RRC ASN structures nrofCQIsPerReport is not present. Present a dummy variable is present so using it to
* calculate RI for antennas equal or more than two.
* */
AssertFatal (NULL!=csi_reportconfig->dummy, "nrofCQIsPerReport is not present");
ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0]; ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0];
/* Replace dummy with the nrofCQIsPerReport from the CSIreport nb_allowed_ri = number_of_bits_set(ri_restriction);
config when equalent ASN structure present */ ri_bitlen = ceil(log2(nb_allowed_ri));
if (0==*(csi_reportconfig->dummy)){
nb_allowed_ri = number_of_bits_set((ri_restriction & 0xf0), &max_ri);
ri_bitlen = ceil(log2(nb_allowed_ri));
}
else{
nb_allowed_ri = number_of_bits_set(ri_restriction, &max_ri);
ri_bitlen = ceil(log2(nb_allowed_ri));
}
ri_bitlen = ri_bitlen<1?ri_bitlen:1; //from the spec 38.212 and table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel ri_bitlen = ri_bitlen<1?ri_bitlen:1; //from the spec 38.212 and table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel
csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen; csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen;
} }
@@ -254,43 +235,27 @@ uint8_t compute_ri_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
if (type1single->nrOfAntennaPorts.choice.moreThanTwo->n1_n2.present == if (type1single->nrOfAntennaPorts.choice.moreThanTwo->n1_n2.present ==
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction) { NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction) {
// 4 ports // 4 ports
AssertFatal (NULL!=csi_reportconfig->dummy, "nrofCQIsPerReport is not present");
ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0]; ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0];
/* Replace dummy with the nrofCQIsPerReport from the CSIreport nb_allowed_ri = number_of_bits_set(ri_restriction);
config when equalent ASN structure present*/ ri_bitlen = ceil(log2(nb_allowed_ri));
if (0==*(csi_reportconfig->dummy)){
nb_allowed_ri = number_of_bits_set((ri_restriction & 0xf0), &max_ri);
ri_bitlen = ceil(log2(nb_allowed_ri));
}
else{
nb_allowed_ri = number_of_bits_set(ri_restriction,&max_ri);
ri_bitlen = ceil(log2(nb_allowed_ri));
}
ri_bitlen = ri_bitlen<2?ri_bitlen:2; //from the spec 38.212 and table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel ri_bitlen = ri_bitlen<2?ri_bitlen:2; //from the spec 38.212 and table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel
csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen; csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen;
} }
else { else {
// more than 4 ports // more than 4 ports
AssertFatal (NULL!=csi_reportconfig->dummy, "nrofCQIsPerReport is not present");
ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0]; ri_restriction = csi_reportconfig->codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->typeI_SinglePanel_ri_Restriction.buf[0];
/* Replace dummy with the nrofCQIsPerReport from the CSIreport nb_allowed_ri = number_of_bits_set(ri_restriction);
config when equalent ASN structure present */ ri_bitlen = ceil(log2(nb_allowed_ri));
if (0==*(csi_reportconfig->dummy)){
nb_allowed_ri = number_of_bits_set((ri_restriction & 0xf0),&max_ri);
ri_bitlen = ceil(log2(nb_allowed_ri));
}
else{
nb_allowed_ri = number_of_bits_set(ri_restriction, &max_ri);
ri_bitlen = ceil(log2(nb_allowed_ri));
}
csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen; csi_report->csi_meas_bitlen.ri_bitlen=ri_bitlen;
} }
} }
return max_ri; return ri_restriction;
} }
else else
AssertFatal(1==0,"Other configurations not yet implemented\n"); AssertFatal(1==0,"Other configurations not yet implemented\n");
@@ -298,66 +263,295 @@ uint8_t compute_ri_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
} }
void compute_li_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig, void compute_li_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
uint8_t max_ri, uint8_t ri_restriction,
nr_csi_report_t *csi_report){ nr_csi_report_t *csi_report){
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig; struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
if (codebookConfig == NULL) { for(int i=0; i<8; i++) {
csi_report->csi_meas_bitlen.li_bitlen=0; if (codebookConfig == NULL || ((ri_restriction>>i)&0x01) == 0)
return; csi_report->csi_meas_bitlen.li_bitlen[i]=0;
else {
// codebook type1 single panel
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel==codebookConfig->codebookType.choice.type1->subType.present)
csi_report->csi_meas_bitlen.li_bitlen[i]=ceil(log2(i+1))<2?ceil(log2(i+1)):2;
else
AssertFatal(1==0,"Other configurations not yet implemented\n");
}
} }
// codebook type1 single panel
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel==codebookConfig->codebookType.choice.type1->subType.present){
/* From Spec 38.212
* If the higher layer parameter nrofCQIsPerReport=1, nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator
* values in the 4 LSBs of the higher layer parameter typeI-SinglePanel-ri-Restriction according to Subclause 5.2.2.2.1 [6,
* TS 38.214]; otherwise nRI in Table 6.3.1.1.2-3 is the number of allowed rank indicator values according to Subclause
* 5.2.2.2.1 [6, TS 38.214].
*
* But from Current RRC ASN structures nrofCQIsPerReport is not present. Present a dummy variable is present so using it to
* calculate RI for antennas equal or more than two.
*/
//! TODO: The bit length of LI is as follows LI = log2(RI), Need to confirm wheather we should consider maximum RI can be reported from ri_restricted
// or we should consider reported RI. If we need to consider reported RI for calculating LI bit length then we need to modify the code.
csi_report->csi_meas_bitlen.li_bitlen=ceil(log2(max_ri))<2?ceil(log2(max_ri)):2;
}
else
AssertFatal(1==0,"Other configurations not yet implemented\n");
} }
void get_n1n2_o1o2_singlepanel(int *n1, int *n2, int *o1, int *o2,
struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo *morethantwo) {
// Table 5.2.2.2.1-2 in 38.214 for supported configurations
switch(morethantwo->n1_n2.present){
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction):
*n1 = 2;
*n2 = 1;
*o1 = 4;
*o2 = 1;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_two_TypeI_SinglePanel_Restriction):
*n1 = 2;
*n2 = 2;
*o1 = 4;
*o2 = 4;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_one_TypeI_SinglePanel_Restriction):
*n1 = 4;
*n2 = 1;
*o1 = 4;
*o2 = 1;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_three_two_TypeI_SinglePanel_Restriction):
*n1 = 3;
*n2 = 2;
*o1 = 4;
*o2 = 4;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_six_one_TypeI_SinglePanel_Restriction):
*n1 = 6;
*n2 = 1;
*o1 = 4;
*o2 = 1;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_two_TypeI_SinglePanel_Restriction):
*n1 = 4;
*n2 = 2;
*o1 = 4;
*o2 = 4;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_eight_one_TypeI_SinglePanel_Restriction):
*n1 = 8;
*n2 = 1;
*o1 = 4;
*o2 = 1;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_three_TypeI_SinglePanel_Restriction):
*n1 = 4;
*n2 = 3;
*o1 = 4;
*o2 = 4;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_six_two_TypeI_SinglePanel_Restriction):
*n1 = 4;
*n2 = 2;
*o1 = 4;
*o2 = 4;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_twelve_one_TypeI_SinglePanel_Restriction):
*n1 = 12;
*n2 = 1;
*o1 = 4;
*o2 = 1;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_four_four_TypeI_SinglePanel_Restriction):
*n1 = 4;
*n2 = 4;
*o1 = 4;
*o2 = 4;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_eight_two_TypeI_SinglePanel_Restriction):
*n1 = 8;
*n2 = 2;
*o1 = 4;
*o2 = 4;
break;
case (NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_sixteen_one_TypeI_SinglePanel_Restriction):
*n1 = 16;
*n2 = 1;
*o1 = 4;
*o2 = 1;
break;
default:
AssertFatal(1==0,"Not supported configuration for n1_n2 in codebook configuration");
}
}
void get_x1x2_bitlen_singlepanel(int n1, int n2, int o1, int o2,
int *x1, int *x2, int rank, int codebook_mode) {
// Table 6.3.1.1.2-1 in 38.212
switch(rank){
case 1:
if(n2>1) {
if (codebook_mode == 1) {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 2;
}
else {
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2/2));
*x2 = 4;
}
}
else{
if (codebook_mode == 1) {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 2;
}
else {
*x1 = ceil(log2(n1*o1/2));
*x2 = 4;
}
}
break;
case 2:
if(n1*n2 == 2) {
if (codebook_mode == 1) {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 1;
}
else {
*x1 = ceil(log2(n1*o1/2));
*x2 = 3;
}
*x1 += 1;
}
else {
if(n2>1) {
if (codebook_mode == 1) {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 3;
}
else {
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2/2));
*x2 = 3;
}
}
else{
if (codebook_mode == 1) {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 1;
}
else {
*x1 = ceil(log2(n1*o1/2));
*x2 = 3;
}
}
*x1 += 2;
}
break;
case 3:
case 4:
if(n1*n2 == 2) {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 1;
}
else {
if(n1*n2 >= 8) {
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2)) + 2;
*x2 = 1;
}
else {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2)) + 2;
*x2 = 1;
}
}
break;
case 5:
case 6:
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 1;
break;
case 7:
case 8:
if(n1 == 4 && n2 == 1) {
*x1 = ceil(log2(n1*o1/2)) + ceil(log2(n2*o2));
*x2 = 1;
}
else {
if(n1 > 2 && n2 == 2) {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2/2));
*x2 = 1;
}
else {
*x1 = ceil(log2(n1*o1)) + ceil(log2(n2*o2));
*x2 = 1;
}
}
break;
default:
AssertFatal(1==0,"Invalid rank in x1 x2 bit length computation\n");
}
}
void compute_pmi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
uint8_t ri_restriction,
nr_csi_report_t *csi_report){
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
for(int i=0; i<8; i++) {
csi_report->csi_meas_bitlen.pmi_x1_bitlen[i]=0;
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=0;
if (codebookConfig == NULL || ((ri_restriction>>i)&0x01) == 0)
return;
else {
if(codebookConfig->codebookType.present == NR_CodebookConfig__codebookType_PR_type1) {
if(codebookConfig->codebookType.choice.type1->subType.present == NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel) {
if(codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.present ==
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_two) {
if (i==0)
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=2;
if (i==1)
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=1;
}
else { // more than two
int n1,n2,o1,o2,x1,x2;
get_n1n2_o1o2_singlepanel(&n1,&n2,&o1,&o2,codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.moreThanTwo);
get_x1x2_bitlen_singlepanel(n1,n2,o1,o2,&x1,&x2,i+1,codebookConfig->codebookType.choice.type1->codebookMode);
csi_report->csi_meas_bitlen.pmi_x1_bitlen[i]=x1;
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=x2;
}
}
else
AssertFatal(1==0,"Type1 Multi-panel Codebook Config not yet implemented\n");
}
else
AssertFatal(1==0,"Type2 Codebook Config not yet implemented\n");
}
}
}
void compute_cqi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig, void compute_cqi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
uint8_t max_ri, uint8_t ri_restriction,
nr_csi_report_t *csi_report){ nr_csi_report_t *csi_report){
struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig; struct NR_CodebookConfig *codebookConfig = csi_reportconfig->codebookConfig;
struct NR_CSI_ReportConfig__reportFreqConfiguration *freq_config = csi_reportconfig->reportFreqConfiguration; struct NR_CSI_ReportConfig__reportFreqConfiguration *freq_config = csi_reportconfig->reportFreqConfiguration;
if (*freq_config->cqi_FormatIndicator == NR_CSI_ReportConfig__reportFreqConfiguration__cqi_FormatIndicator_widebandCQI) { if (*freq_config->cqi_FormatIndicator == NR_CSI_ReportConfig__reportFreqConfiguration__cqi_FormatIndicator_widebandCQI) {
csi_report->csi_meas_bitlen.cqi_bitlen = 4; for(int i=0; i<8; i++) {
if(codebookConfig != NULL) { if ((ri_restriction>>i)&0x01) {
if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel == codebookConfig->codebookType.choice.type1->subType.present){ csi_report->csi_meas_bitlen.cqi_bitlen[i] = 4;
struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel *type1single = codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel; if(codebookConfig != NULL) {
if (type1single->nrOfAntennaPorts.present == NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_moreThanTwo) { if (NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel == codebookConfig->codebookType.choice.type1->subType.present){
if (type1single->nrOfAntennaPorts.choice.moreThanTwo->n1_n2.present > struct NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel *type1single = codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel;
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction) { if (type1single->nrOfAntennaPorts.present == NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_moreThanTwo) {
// more than 4 antenna ports if (type1single->nrOfAntennaPorts.choice.moreThanTwo->n1_n2.present >
if (max_ri > 4) NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts__moreThanTwo__n1_n2_PR_two_one_TypeI_SinglePanel_Restriction) {
csi_report->csi_meas_bitlen.cqi_bitlen += 4; // CQI for second TB // more than 4 antenna ports
if (i > 4)
csi_report->csi_meas_bitlen.cqi_bitlen[i] += 4; // CQI for second TB
}
}
} }
} }
} }
else
csi_report->csi_meas_bitlen.cqi_bitlen[i] = 0;
} }
} }
else else
AssertFatal(1==0,"Sub-band CQI reporting not yet supported"); AssertFatal(1==0,"Sub-band CQI reporting not yet supported");
} }
//!TODO : same function can be written to handle csi_resources //!TODO : same function can be written to handle csi_resources
void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_info, int UE_id, module_id_t Mod_idP){ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_info, int UE_id, module_id_t Mod_idP){
uint8_t csi_report_id = 0; uint8_t csi_report_id = 0;
uint8_t nb_resources = 0; uint8_t nb_resources = 0;
uint8_t max_ri = 0;
NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type; NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type;
NR_CSI_ResourceConfigId_t csi_ResourceConfigId; NR_CSI_ResourceConfigId_t csi_ResourceConfigId;
struct NR_CSI_ResourceConfig *csi_resourceconfig; struct NR_CSI_ResourceConfig *csi_resourceconfig;
@@ -428,8 +622,21 @@ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_in
break; break;
case (NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI): case (NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI):
csi_report->csi_meas_bitlen.cri_bitlen=ceil(log2(nb_resources)); csi_report->csi_meas_bitlen.cri_bitlen=ceil(log2(nb_resources));
max_ri = compute_ri_bitlen(csi_reportconfig, csi_report); csi_report->csi_meas_bitlen.ri_restriction = compute_ri_bitlen(csi_reportconfig, csi_report);
compute_cqi_bitlen(csi_reportconfig, max_ri, csi_report); compute_cqi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
break;
case (NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI):
csi_report->csi_meas_bitlen.cri_bitlen=ceil(log2(nb_resources));
csi_report->csi_meas_bitlen.ri_restriction = compute_ri_bitlen(csi_reportconfig, csi_report);
compute_cqi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
compute_pmi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
break;
case (NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_LI_PMI_CQI):
csi_report->csi_meas_bitlen.cri_bitlen=ceil(log2(nb_resources));
csi_report->csi_meas_bitlen.ri_restriction = compute_ri_bitlen(csi_reportconfig, csi_report);
compute_li_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
compute_cqi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
compute_pmi_bitlen(csi_reportconfig, csi_report->csi_meas_bitlen.ri_restriction, csi_report);
break; break;
default: default:
AssertFatal(1==0,"Not yet supported CSI report quantity type"); AssertFatal(1==0,"Not yet supported CSI report quantity type");
@@ -442,7 +649,8 @@ uint16_t nr_get_csi_bitlen(int Mod_idP,
int UE_id, int UE_id,
uint8_t csi_report_id) { uint8_t csi_report_id) {
uint16_t csi_bitlen =0; uint16_t csi_bitlen = 0;
uint16_t max_bitlen = 0;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
L1_RSRP_bitlen_t * CSI_report_bitlen = NULL; L1_RSRP_bitlen_t * CSI_report_bitlen = NULL;
CSI_Meas_bitlen_t * csi_meas_bitlen = NULL; CSI_Meas_bitlen_t * csi_meas_bitlen = NULL;
@@ -455,7 +663,18 @@ uint16_t nr_get_csi_bitlen(int Mod_idP,
(CSI_report_bitlen->nb_ssbri_cri -1 ))); (CSI_report_bitlen->nb_ssbri_cri -1 )));
} else{ } else{
csi_meas_bitlen = &(UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen); //This might need to be moodif for Aperiodic CSI-RS measurements csi_meas_bitlen = &(UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen); //This might need to be moodif for Aperiodic CSI-RS measurements
csi_bitlen+= (csi_meas_bitlen->cri_bitlen +csi_meas_bitlen->ri_bitlen+csi_meas_bitlen->li_bitlen+csi_meas_bitlen->cqi_bitlen+csi_meas_bitlen->pmi_x1_bitlen+csi_meas_bitlen->pmi_x2_bitlen); uint16_t temp_bitlen;
for (int i=0; i<8; i++) {
temp_bitlen = (csi_meas_bitlen->cri_bitlen+
csi_meas_bitlen->ri_bitlen+
csi_meas_bitlen->li_bitlen[i]+
csi_meas_bitlen->cqi_bitlen[i]+
csi_meas_bitlen->pmi_x1_bitlen[i]+
csi_meas_bitlen->pmi_x2_bitlen[i]);
if(temp_bitlen>max_bitlen)
max_bitlen = temp_bitlen;
}
csi_bitlen += max_bitlen;
} }
return csi_bitlen; return csi_bitlen;
@@ -718,36 +937,32 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
idx: resource set index idx: resource set index
*/ */
//for all reported SSB nr_ssbri_cri = sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri;
for (idx = 0; idx < nb_of_csi_ssb_report; idx++) { //extracting the ssb indexes
nr_ssbri_cri = sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri; for (ssb_idx = 0; ssb_idx < nr_ssbri_cri; ssb_idx++) {
//extracting the ssb indexes ssb_index[idx * nb_of_csi_ssb_report + ssb_idx] = sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[ssb_idx];
for (ssb_idx = 0; ssb_idx < nr_ssbri_cri; ssb_idx++) {
ssb_index[idx * nb_of_csi_ssb_report + ssb_idx] = sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[ssb_idx];
}
//if strongest measured RSRP is configured
strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP);
ssb_rsrp[idx * nb_of_csi_ssb_report] = strongest_ssb_rsrp;
LOG_D(NR_MAC,"ssb_rsrp = %d\n",strongest_ssb_rsrp);
//if current ssb rsrp is greater than better rsrp
if(ssb_rsrp[idx * nb_of_csi_ssb_report] > better_rsrp_reported) {
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report];
target_ssb_beam_index = idx * nb_of_csi_ssb_report;
}
for(diff_rsrp_idx =1; diff_rsrp_idx < nr_ssbri_cri; diff_rsrp_idx++) {
ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] = get_diff_rsrp(sched_ctrl->CSI_report[idx].choice.ssb_cri_report.diff_RSRP[diff_rsrp_idx-1], strongest_ssb_rsrp);
//if current reported rsrp is greater than better rsrp
if(ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] > better_rsrp_reported) {
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx];
target_ssb_beam_index = idx * nb_of_csi_ssb_report + diff_rsrp_idx;
}
}
} }
//if strongest measured RSRP is configured
strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report.ssb_cri_report.RSRP);
ssb_rsrp[idx * nb_of_csi_ssb_report] = strongest_ssb_rsrp;
LOG_D(NR_MAC,"ssb_rsrp = %d\n",strongest_ssb_rsrp);
//if current ssb rsrp is greater than better rsrp
if(ssb_rsrp[idx * nb_of_csi_ssb_report] > better_rsrp_reported) {
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report];
target_ssb_beam_index = idx * nb_of_csi_ssb_report;
}
for(diff_rsrp_idx =1; diff_rsrp_idx < nr_ssbri_cri; diff_rsrp_idx++) {
ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] = get_diff_rsrp(sched_ctrl->CSI_report.ssb_cri_report.diff_RSRP[diff_rsrp_idx-1], strongest_ssb_rsrp);
//if current reported rsrp is greater than better rsrp
if(ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx] > better_rsrp_reported) {
better_rsrp_reported = ssb_rsrp[idx * nb_of_csi_ssb_report + diff_rsrp_idx];
target_ssb_beam_index = idx * nb_of_csi_ssb_report + diff_rsrp_idx;
}
}
if(ssb_index[target_ssb_beam_index] != ssb_index[curr_ssb_beam_index] && ssb_rsrp[target_ssb_beam_index] > ssb_rsrp[curr_ssb_beam_index]) { if(ssb_index[target_ssb_beam_index] != ssb_index[curr_ssb_beam_index] && ssb_rsrp[target_ssb_beam_index] > ssb_rsrp[curr_ssb_beam_index]) {
if( ssb_rsrp[target_ssb_beam_index] - ssb_rsrp[curr_ssb_beam_index] > L1_RSRP_HYSTERIS) { if( ssb_rsrp[target_ssb_beam_index] - ssb_rsrp[curr_ssb_beam_index] > L1_RSRP_HYSTERIS) {
@@ -876,7 +1091,8 @@ void evaluate_rsrp_report(NR_UE_info_t *UE_info,
int *cumul_bits, int *cumul_bits,
NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type){ NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type){
uint8_t cri_ssbri_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen.cri_ssbri_bitlen; nr_csi_report_t *csi_report = &UE_info->csi_report_template[UE_id][csi_report_id];
uint8_t cri_ssbri_bitlen = csi_report->CSI_report_bitlen.cri_ssbri_bitlen;
uint16_t curr_payload; uint16_t curr_payload;
/*! As per the spec 38.212 and table: 6.3.1.1.2-12 in a single UCI sequence we can have multiple CSI_report /*! As per the spec 38.212 and table: 6.3.1.1.2-12 in a single UCI sequence we can have multiple CSI_report
@@ -897,44 +1113,43 @@ void evaluate_rsrp_report(NR_UE_info_t *UE_info,
multiple simultaneous spatial domain receive filter multiple simultaneous spatial domain receive filter
*/ */
int idx = 0; //Since for SSB RSRP reporting in RRC can configure only one ssb resource set per one report config sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri = csi_report->CSI_report_bitlen.nb_ssbri_cri;
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri = UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen.nb_ssbri_cri;
for (int csi_ssb_idx = 0; csi_ssb_idx < sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri ; csi_ssb_idx++) { for (int csi_ssb_idx = 0; csi_ssb_idx < sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri ; csi_ssb_idx++) {
curr_payload = pickandreverse_bits(payload, cri_ssbri_bitlen, *cumul_bits); curr_payload = pickandreverse_bits(payload, cri_ssbri_bitlen, *cumul_bits);
if (NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP == reportQuantity_type) if (NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP == reportQuantity_type) {
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] = sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] =
*(UE_info->csi_report_template[UE_id][csi_report_id].SSB_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]); *(csi_report->SSB_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]);
else LOG_D(MAC,"SSB_index = %d\n",sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] = }
*(UE_info->csi_report_template[UE_id][csi_report_id].CSI_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]); else {
sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx] =
*(csi_report->CSI_Index_list[cri_ssbri_bitlen>0?((curr_payload)&~(~1<<(cri_ssbri_bitlen-1))):cri_ssbri_bitlen]);
LOG_D(MAC,"CSI-RS Resource Indicator = %d\n",sched_ctrl->CSI_report.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
}
*cumul_bits += cri_ssbri_bitlen; *cumul_bits += cri_ssbri_bitlen;
if(UE_info->csi_report_template[UE_id][csi_report_id].reportQuantity_type == NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP)
LOG_D(MAC,"CSI-RS Resource Indicator = %d\n",sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
else
LOG_D(MAC,"SSB Resource Indicator = %d\n",sched_ctrl->CSI_report[idx].choice.ssb_cri_report.CRI_SSBRI[csi_ssb_idx]);
} }
curr_payload = pickandreverse_bits(payload, 7, *cumul_bits); curr_payload = pickandreverse_bits(payload, 7, *cumul_bits);
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP = curr_payload & 0x7f; sched_ctrl->CSI_report.ssb_cri_report.RSRP = curr_payload & 0x7f;
*cumul_bits += 7; *cumul_bits += 7;
for (int diff_rsrp_idx =0; diff_rsrp_idx < sched_ctrl->CSI_report[idx].choice.ssb_cri_report.nr_ssbri_cri - 1; diff_rsrp_idx++ ) { for (int diff_rsrp_idx =0; diff_rsrp_idx < sched_ctrl->CSI_report.ssb_cri_report.nr_ssbri_cri - 1; diff_rsrp_idx++ ) {
curr_payload = pickandreverse_bits(payload, 4, *cumul_bits); curr_payload = pickandreverse_bits(payload, 4, *cumul_bits);
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.diff_RSRP[diff_rsrp_idx] = curr_payload & 0x0f; sched_ctrl->CSI_report.ssb_cri_report.diff_RSRP[diff_rsrp_idx] = curr_payload & 0x0f;
*cumul_bits += 4; *cumul_bits += 4;
} }
UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report++; csi_report->nb_of_csi_ssb_report++;
int strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP); int strongest_ssb_rsrp = get_measured_rsrp(sched_ctrl->CSI_report.ssb_cri_report.RSRP);
NR_mac_stats_t *stats = &UE_info->mac_stats[UE_id]; NR_mac_stats_t *stats = &UE_info->mac_stats[UE_id];
// including ssb rsrp in mac stats // including ssb rsrp in mac stats
stats->cumul_rsrp += strongest_ssb_rsrp; stats->cumul_rsrp += strongest_ssb_rsrp;
stats->num_rsrp_meas++; stats->num_rsrp_meas++;
LOG_D(MAC,"rsrp_id = %d rsrp = %d\n", LOG_D(MAC,"rsrp_id = %d rsrp = %d\n",
sched_ctrl->CSI_report[idx].choice.ssb_cri_report.RSRP, sched_ctrl->CSI_report.ssb_cri_report.RSRP,
strongest_ssb_rsrp); get_measured_rsrp(sched_ctrl->CSI_report.ssb_cri_report.RSRP));
} }
@@ -943,39 +1158,122 @@ void evaluate_cri_report(uint8_t *payload,
int cumul_bits, int cumul_bits,
NR_UE_sched_ctrl_t *sched_ctrl){ NR_UE_sched_ctrl_t *sched_ctrl){
int idx = 0; // FIXME not sure about this index. Should it be the same as csi_report_id?
uint8_t temp_cri = pickandreverse_bits(payload, cri_bitlen, cumul_bits); uint8_t temp_cri = pickandreverse_bits(payload, cri_bitlen, cumul_bits);
sched_ctrl->CSI_report[idx].choice.cri_ri_li_pmi_cqi_report.cri = temp_cri; sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cri = temp_cri;
} }
void evaluate_ri_report(uint8_t *payload, int evaluate_ri_report(uint8_t *payload,
uint8_t ri_bitlen, uint8_t ri_bitlen,
NR_UE_sched_ctrl_t *sched_ctrl){ uint8_t ri_restriction,
int cumul_bits,
NR_UE_sched_ctrl_t *sched_ctrl){
AssertFatal(1==0,"Evaluation of RI report not yet implemented\n"); uint8_t ri_index = pickandreverse_bits(payload, ri_bitlen, cumul_bits);
int count=0;
for (int i=0; i<8; i++) {
if ((ri_restriction>>i)&0x01) {
if(count == ri_index) {
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri = i;
LOG_I(MAC,"CSI Reported Rank %d\n", i+1);
return i;
}
count++;
}
}
AssertFatal(1==0, "Decoded ri %d does not correspond to any valid value in ri_restriction %d\n",ri_index,ri_restriction);
} }
void evaluate_cqi_report(uint8_t *payload, void evaluate_cqi_report(uint8_t *payload,
uint8_t cqi_bitlen, nr_csi_report_t *csi_report,
int *cumul_bits, int cumul_bits,
NR_UE_sched_ctrl_t *sched_ctrl){ uint8_t ri,
NR_UE_sched_ctrl_t *sched_ctrl,
long *cqi_Table){
//TODO sub-band CQI report not yet implemented //TODO sub-band CQI report not yet implemented
int idx = 0; // FIXME not sure about this index. Should it be the same as csi_report_id? int cqi_bitlen = csi_report->csi_meas_bitlen.cqi_bitlen[ri];
uint8_t temp_cqi = pickandreverse_bits(payload, 4, *cumul_bits); uint8_t temp_cqi = pickandreverse_bits(payload, 4, cumul_bits);
sched_ctrl->CSI_report[idx].choice.cri_ri_li_pmi_cqi_report.wb_cqi_1tb = temp_cqi;
*cumul_bits += 4; // NR_CSI_ReportConfig__cqi_Table_table1 = 0
// NR_CSI_ReportConfig__cqi_Table_table2 = 1
// NR_CSI_ReportConfig__cqi_Table_table3 = 2
if (cqi_Table)
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cqi_table = *cqi_Table;
else
AssertFatal(1==0,"CQI Table not present in RRC configuration\n");
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_1tb = temp_cqi;
LOG_I(MAC,"Wide-band CQI for the first TB %d\n", temp_cqi); LOG_I(MAC,"Wide-band CQI for the first TB %d\n", temp_cqi);
if (cqi_bitlen > 4) { if (cqi_bitlen > 4) {
temp_cqi = pickandreverse_bits(payload, 4, *cumul_bits); temp_cqi = pickandreverse_bits(payload, 4, cumul_bits);
sched_ctrl->CSI_report[idx].choice.cri_ri_li_pmi_cqi_report.wb_cqi_2tb = temp_cqi; sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_2tb = temp_cqi;
LOG_D(MAC,"Wide-band CQI for the second TB %d\n", temp_cqi); LOG_D(MAC,"Wide-band CQI for the second TB %d\n", temp_cqi);
} }
sched_ctrl->set_mcs = TRUE;
} }
uint8_t evaluate_pmi_report(uint8_t *payload,
nr_csi_report_t *csi_report,
int cumul_bits,
uint8_t ri,
NR_UE_sched_ctrl_t *sched_ctrl){
int x1_bitlen = csi_report->csi_meas_bitlen.pmi_x1_bitlen[ri];
int x2_bitlen = csi_report->csi_meas_bitlen.pmi_x2_bitlen[ri];
int tot_bitlen = x1_bitlen + x2_bitlen;
//in case of 2 port CSI configuration x1 is empty and the information bits are in x2
int temp_pmi = pickandreverse_bits(payload, tot_bitlen, cumul_bits);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1 = temp_pmi&((1<<x1_bitlen)-1);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2 = (temp_pmi>>x1_bitlen)&((1<<x2_bitlen)-1);
LOG_I(MAC,"PMI Report: X1 %d X2 %d\n",
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
return tot_bitlen;
}
int evaluate_li_report(uint8_t *payload,
nr_csi_report_t *csi_report,
int cumul_bits,
uint8_t ri,
NR_UE_sched_ctrl_t *sched_ctrl){
int li_bitlen = csi_report->csi_meas_bitlen.li_bitlen[ri];
if (li_bitlen>0) {
int temp_li = pickandreverse_bits(payload, li_bitlen, cumul_bits);
LOG_I(MAC,"LI %d\n",temp_li);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.li = temp_li;
}
return li_bitlen;
}
void skip_zero_padding(int *cumul_bits,
nr_csi_report_t *csi_report,
uint8_t ri,
uint16_t max_bitlen) {
// actual number of reported bits depends on the reported rank
// zero padding bits are added to have a predetermined max bit length to decode
uint16_t reported_bitlen = csi_report->csi_meas_bitlen.cri_bitlen+
csi_report->csi_meas_bitlen.ri_bitlen+
csi_report->csi_meas_bitlen.li_bitlen[ri]+
csi_report->csi_meas_bitlen.cqi_bitlen[ri]+
csi_report->csi_meas_bitlen.pmi_x1_bitlen[ri]+
csi_report->csi_meas_bitlen.pmi_x2_bitlen[ri];
*cumul_bits+=(max_bitlen-reported_bitlen);
}
void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig, void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu, const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu,
frame_t frame, frame_t frame,
@@ -988,21 +1286,25 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
uint8_t *payload = uci_pdu->csi_part1.csi_part1_payload; uint8_t *payload = uci_pdu->csi_part1.csi_part1_payload;
uint16_t bitlen = uci_pdu->csi_part1.csi_part1_bit_len;
NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type = NR_CSI_ReportConfig__reportQuantity_PR_NOTHING; NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type = NR_CSI_ReportConfig__reportQuantity_PR_NOTHING;
NR_UE_info_t *UE_info = &(RC.nrmac[Mod_idP]->UE_info); NR_UE_info_t *UE_info = &(RC.nrmac[Mod_idP]->UE_info);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
int cumul_bits = 0; int cumul_bits = 0;
int r_index = -1;
for (int csi_report_id = 0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++ ) { for (int csi_report_id = 0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++ ) {
UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report = 0; nr_csi_report_t *csi_report = &UE_info->csi_report_template[UE_id][csi_report_id];
csi_report->nb_of_csi_ssb_report = 0;
uint8_t cri_bitlen = 0; uint8_t cri_bitlen = 0;
uint8_t ri_bitlen = 0; uint8_t ri_bitlen = 0;
uint8_t cqi_bitlen = 0; uint8_t li_bitlen = 0;
uint8_t pmi_bitlen = 0;
NR_CSI_ReportConfig_t *csirep = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; NR_CSI_ReportConfig_t *csirep = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
int period, offset; int period, offset;
csi_period_offset(csirep, NULL, &period, &offset); csi_period_offset(csirep, NULL, &period, &offset);
// verify if report with current id has been scheduled for this frame and slot // verify if report with current id has been scheduled for this frame and slot
if ((n_slots_frame*frame + slot - offset)%period == 0) { if ((n_slots_frame*frame + slot - offset)%period == 0) {
reportQuantity_type = UE_info->csi_report_template[UE_id][csi_report_id].reportQuantity_type; reportQuantity_type = csi_report->reportQuantity_type;
LOG_D(MAC,"SFN/SF:%d/%d reportQuantity type = %d\n",frame,slot,reportQuantity_type); LOG_D(MAC,"SFN/SF:%d/%d reportQuantity type = %d\n",frame,slot,reportQuantity_type);
switch(reportQuantity_type){ switch(reportQuantity_type){
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP:
@@ -1012,18 +1314,49 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
evaluate_rsrp_report(UE_info,sched_ctrl,UE_id,csi_report_id,payload,&cumul_bits,reportQuantity_type); evaluate_rsrp_report(UE_info,sched_ctrl,UE_id,csi_report_id,payload,&cumul_bits,reportQuantity_type);
break; break;
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI:
cri_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen.cri_bitlen; cri_bitlen = csi_report->csi_meas_bitlen.cri_bitlen;
if(cri_bitlen) if(cri_bitlen)
evaluate_cri_report(payload,cri_bitlen,cumul_bits,sched_ctrl); evaluate_cri_report(payload,cri_bitlen,cumul_bits,sched_ctrl);
cumul_bits += cri_bitlen; cumul_bits += cri_bitlen;
ri_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen.ri_bitlen; ri_bitlen = csi_report->csi_meas_bitlen.ri_bitlen;
if(ri_bitlen) if(ri_bitlen)
evaluate_ri_report(payload,ri_bitlen,sched_ctrl); r_index = evaluate_ri_report(payload,ri_bitlen,csi_report->csi_meas_bitlen.ri_restriction,cumul_bits,sched_ctrl);
cumul_bits += ri_bitlen; cumul_bits += ri_bitlen;
//TODO add zero padding bits when needed if (r_index != -1)
cqi_bitlen = UE_info->csi_report_template[UE_id][csi_report_id].csi_meas_bitlen.cqi_bitlen; skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
if(cqi_bitlen) evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
evaluate_cqi_report(payload,cqi_bitlen,&cumul_bits,sched_ctrl); break;
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI:
cri_bitlen = csi_report->csi_meas_bitlen.cri_bitlen;
if(cri_bitlen)
evaluate_cri_report(payload,cri_bitlen,cumul_bits,sched_ctrl);
cumul_bits += cri_bitlen;
ri_bitlen = csi_report->csi_meas_bitlen.ri_bitlen;
if(ri_bitlen)
r_index = evaluate_ri_report(payload,ri_bitlen,csi_report->csi_meas_bitlen.ri_restriction,cumul_bits,sched_ctrl);
cumul_bits += ri_bitlen;
if (r_index != -1)
skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
cumul_bits += pmi_bitlen;
evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
break;
case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_LI_PMI_CQI:
cri_bitlen = csi_report->csi_meas_bitlen.cri_bitlen;
if(cri_bitlen)
evaluate_cri_report(payload,cri_bitlen,cumul_bits,sched_ctrl);
cumul_bits += cri_bitlen;
ri_bitlen = csi_report->csi_meas_bitlen.ri_bitlen;
if(ri_bitlen)
r_index = evaluate_ri_report(payload,ri_bitlen,csi_report->csi_meas_bitlen.ri_restriction,cumul_bits,sched_ctrl);
cumul_bits += ri_bitlen;
li_bitlen = evaluate_li_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
cumul_bits += li_bitlen;
if (r_index != -1)
skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
cumul_bits += pmi_bitlen;
evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
break; break;
default: default:
AssertFatal(1==0, "Invalid or not supported CSI measurement report\n"); AssertFatal(1==0, "Invalid or not supported CSI measurement report\n");
@@ -720,7 +720,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt++; UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt++;
UE_info->mac_stats[UE_id].ulsch_DTX++; UE_info->mac_stats[UE_id].ulsch_DTX++;
} }
if (UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt >= pusch_failure_thres) { if (!get_softmodem_params()->phy_test && UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt >= pusch_failure_thres) {
LOG_W(NR_MAC,"Detected UL Failure on PUSCH after %d PUSCH DTX, stopping scheduling\n", LOG_W(NR_MAC,"Detected UL Failure on PUSCH after %d PUSCH DTX, stopping scheduling\n",
UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt); UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt);
UE_info->UE_sched_ctrl[UE_id].ul_failure = 1; UE_info->UE_sched_ctrl[UE_id].ul_failure = 1;
@@ -1010,6 +1010,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
uint16_t new_rbSize; uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm, bool success = nr_find_nb_rb(retInfo->Qm,
retInfo->R, retInfo->R,
1, // layers
temp_ps.nrOfSymbols, temp_ps.nrOfSymbols,
temp_ps.N_PRB_DMRS * temp_ps.num_dmrs_symb, temp_ps.N_PRB_DMRS * temp_ps.num_dmrs_symb,
retInfo->tb_size, retInfo->tb_size,
@@ -1355,6 +1356,7 @@ void pf_ul(module_id_t module_id,
uint32_t TBS = 0; uint32_t TBS = 0;
nr_find_nb_rb(sched_pusch->Qm, nr_find_nb_rb(sched_pusch->Qm,
sched_pusch->R, sched_pusch->R,
1, // layers
ps->nrOfSymbols, ps->nrOfSymbols,
ps->N_PRB_DMRS * ps->num_dmrs_symb, ps->N_PRB_DMRS * ps->num_dmrs_symb,
B, B,
+11 -2
View File
@@ -245,7 +245,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
uint16_t O_csi, uint16_t O_csi,
uint16_t O_ack, uint16_t O_ack,
uint8_t O_sr, uint8_t O_sr,
int r_pucch); int r_pucch);
void find_search_space(int ss_type, void find_search_space(int ss_type,
NR_BWP_Downlink_t *bwp, NR_BWP_Downlink_t *bwp,
@@ -310,7 +310,8 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_BWP_Downlink_t *bwp, const NR_BWP_Downlink_t *bwp,
const NR_BWP_DownlinkDedicated_t *bwpd0, const NR_BWP_DownlinkDedicated_t *bwpd0,
int tda, int tda,
const long dci_format, uint8_t layers,
NR_UE_sched_ctrl_t *sched_ctrl,
NR_pdsch_semi_static_t *ps); NR_pdsch_semi_static_t *ps);
void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc, void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
@@ -454,6 +455,13 @@ void find_SSB_and_RO_available(module_id_t module_idP);
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps); void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps);
void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
NR_UE_sched_ctrl_t *sched_ctrl,
uint8_t *target_mcs,
uint8_t mcs_table_idx);
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl);
void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp); void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp);
void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ubwp); void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ubwp);
@@ -461,6 +469,7 @@ bool find_free_CCE(module_id_t module_id, sub_frame_t slot, int UE_id);
bool nr_find_nb_rb(uint16_t Qm, bool nr_find_nb_rb(uint16_t Qm,
uint16_t R, uint16_t R,
uint8_t nrOfLayers,
uint16_t nb_symb_sch, uint16_t nb_symb_sch,
uint16_t nb_dmrs_prb, uint16_t nb_dmrs_prb,
uint32_t bytes, uint32_t bytes,
+12 -13
View File
@@ -391,7 +391,8 @@ typedef struct NR_sched_srs {
typedef struct NR_pdsch_semi_static { typedef struct NR_pdsch_semi_static {
int time_domain_allocation; int time_domain_allocation;
uint8_t numDmrsCdmGrpsNoData; uint8_t numDmrsCdmGrpsNoData;
uint8_t frontloaded_symb;
int mapping_type;
int startSymbolIndex; int startSymbolIndex;
int nrOfSymbols; int nrOfSymbols;
uint8_t nrOfLayers; uint8_t nrOfLayers;
@@ -477,6 +478,7 @@ struct CRI_RI_LI_PMI_CQI {
uint8_t pmi_x2; uint8_t pmi_x2;
uint8_t wb_cqi_1tb; uint8_t wb_cqi_1tb;
uint8_t wb_cqi_2tb; uint8_t wb_cqi_2tb;
uint8_t cqi_table;
}; };
typedef struct CRI_SSB_RSRP { typedef struct CRI_SSB_RSRP {
@@ -487,11 +489,8 @@ typedef struct CRI_SSB_RSRP {
} CRI_SSB_RSRP_t; } CRI_SSB_RSRP_t;
struct CSI_Report { struct CSI_Report {
NR_CSI_Report_Config_PR present; struct CRI_RI_LI_PMI_CQI cri_ri_li_pmi_cqi_report;
union Config_CSI_Report { struct CRI_SSB_RSRP ssb_cri_report;
struct CRI_RI_LI_PMI_CQI cri_ri_li_pmi_cqi_report;
struct CRI_SSB_RSRP ssb_cri_report;
} choice;
}; };
#define MAX_SR_BITLEN 8 #define MAX_SR_BITLEN 8
@@ -504,12 +503,13 @@ typedef struct {
}L1_RSRP_bitlen_t; }L1_RSRP_bitlen_t;
typedef struct{ typedef struct{
uint8_t ri_restriction;
uint8_t cri_bitlen; uint8_t cri_bitlen;
uint8_t ri_bitlen; uint8_t ri_bitlen;
uint8_t li_bitlen; uint8_t li_bitlen[8];
uint8_t pmi_x1_bitlen; uint8_t pmi_x1_bitlen[8];
uint8_t pmi_x2_bitlen; uint8_t pmi_x2_bitlen[8];
uint8_t cqi_bitlen; uint8_t cqi_bitlen[8];
} CSI_Meas_bitlen_t; } CSI_Meas_bitlen_t;
typedef struct nr_csi_report { typedef struct nr_csi_report {
@@ -618,9 +618,9 @@ typedef struct {
int pusch_consecutive_dtx_cnt; int pusch_consecutive_dtx_cnt;
int pucch_consecutive_dtx_cnt; int pucch_consecutive_dtx_cnt;
int ul_failure; int ul_failure;
struct CSI_Report CSI_report[MAX_CSI_REPORTS]; struct CSI_Report CSI_report;
bool SR; bool SR;
bool set_mcs;
/// information about every HARQ process /// information about every HARQ process
NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES]; NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
/// HARQ processes that are free /// HARQ processes that are free
@@ -673,7 +673,6 @@ typedef struct {
NR_mac_stats_t mac_stats[MAX_MOBILES_PER_GNB]; NR_mac_stats_t mac_stats[MAX_MOBILES_PER_GNB];
NR_list_t list; NR_list_t list;
int num_UEs; int num_UEs;
bool active[MAX_MOBILES_PER_GNB]; bool active[MAX_MOBILES_PER_GNB];
rnti_t rnti[MAX_MOBILES_PER_GNB]; rnti_t rnti[MAX_MOBILES_PER_GNB];
NR_CellGroupConfig_t *CellGroup[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *CellGroup[MAX_MOBILES_PER_GNB];
+1 -1
View File
@@ -1103,7 +1103,7 @@ boolean_t nr_rrc_pdcp_config_asn1_req(
if (kRRCint != NULL) { if (kRRCint != NULL) {
/* todo */ /* todo */
} }
if (drb2release_list != NULL) { if (drb2release_list != NULL) {
// TODO // TODO
} }
+4 -4
View File
@@ -361,10 +361,10 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
} }
void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP, void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP,
const int CC_idP, const int CC_idP,
const frame_t frameP, const frame_t frameP,
const sub_frame_t subframeP, const sub_frame_t subframeP,
const rnti_t rntiP) { const rnti_t rntiP) {
struct rrc_gNB_ue_context_s *ue_context_p = NULL; struct rrc_gNB_ue_context_s *ue_context_p = NULL;
ue_context_p = rrc_gNB_get_ue_context( ue_context_p = rrc_gNB_get_ue_context(
RC.nrrrc[Mod_instP], RC.nrrrc[Mod_instP],
-1
View File
@@ -458,7 +458,6 @@ typedef struct {
NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS]; NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS];
NR_SRB_INFO SI; NR_SRB_INFO SI;
NR_SRB_INFO Srb0; NR_SRB_INFO Srb0;
int initial_csi_index[MAX_NR_RRC_UE_CONTEXTS];
int p_gNB; int p_gNB;
} rrc_gNB_carrier_data_t; } rrc_gNB_carrier_data_t;
+5 -3
View File
@@ -82,10 +82,13 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
int minRXTXTIMEpdsch, int minRXTXTIMEpdsch,
int do_csirs, int do_csirs,
int do_srs, int do_srs,
int initial_csi_index,
int uid); int uid);
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_MeasConfig_t *csi_MeasConfig, int dl_antenna_ports, int do_csirs); void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int dl_antenna_ports,
int curr_bwp,
int do_csirs);
void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon, void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_ServingCellConfig_t *servingcellconfigdedicated, NR_ServingCellConfig_t *servingcellconfigdedicated,
@@ -95,7 +98,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
int minRXTXTIMEpdsch, int minRXTXTIMEpdsch,
int do_csirs, int do_csirs,
int do_srs, int do_srs,
int initial_csi_index,
int uid); int uid);
void fill_default_rbconfig(NR_RadioBearerConfig_t *rbconfig, void fill_default_rbconfig(NR_RadioBearerConfig_t *rbconfig,
+10 -9
View File
@@ -3257,20 +3257,20 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
RB_FOREACH(ue_context_p, rrc_nr_ue_tree_s, &(RC.nrrrc[ctxt_pP->module_id]->rrc_ue_head)) { RB_FOREACH(ue_context_p, rrc_nr_ue_tree_s, &(RC.nrrrc[ctxt_pP->module_id]->rrc_ue_head)) {
ctxt_pP->rnti = ue_context_p->ue_id_rnti; ctxt_pP->rnti = ue_context_p->ue_id_rnti;
if (fd) { if (fd) {
if (ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.presence == TRUE) { if (ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.presence == TRUE) {
fprintf(fd,"NR RRC UE rnti %x: S-TMSI %x failure timer %d/8\n", fprintf(fd,"NR RRC UE rnti %x: S-TMSI %x failure timer %d/8\n",
ue_context_p->ue_id_rnti, ue_context_p->ue_id_rnti,
ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.fiveg_tmsi, ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.fiveg_tmsi,
ue_context_p->ue_context.ul_failure_timer); ue_context_p->ue_context.ul_failure_timer);
} else { } else {
fprintf(fd,"NR RRC UE rnti %x failure timer %d/8\n", fprintf(fd,"NR RRC UE rnti %x failure timer %d/8\n",
ue_context_p->ue_id_rnti, ue_context_p->ue_id_rnti,
ue_context_p->ue_context.ul_failure_timer); ue_context_p->ue_context.ul_failure_timer);
} }
if (ue_context_p->ue_context.UE_Capability_nr) { if (ue_context_p->ue_context.UE_Capability_nr) {
fprintf(fd,"NR RRC UE cap: BW DL %x. BW UL %x, 256 QAM DL %s, 256 QAM UL %s, DL MIMO Layers %d UL MIMO Layers (CB) %d UL MIMO Layers (nonCB) %d\n", fprintf(fd,"NR RRC UE cap: BW DL %x. BW UL %x, 256 QAM DL %s, 256 QAM UL %s, DL MIMO Layers %d UL MIMO Layers (CB) %d UL MIMO Layers (nonCB) %d\n",
get_dl_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr), get_dl_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
get_ul_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr), get_ul_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
is_dl_256QAM_supported(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr) == 1 ? "yes" : "no", is_dl_256QAM_supported(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr) == 1 ? "yes" : "no",
@@ -3278,7 +3278,7 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
get_dl_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr), get_dl_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
get_ul_mimo_layersCB(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr), get_ul_mimo_layersCB(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
get_ul_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr)); get_ul_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr));
} }
} }
if (ue_context_p->ue_context.ul_failure_timer > 0) { if (ue_context_p->ue_context.ul_failure_timer > 0) {
ue_context_p->ue_context.ul_failure_timer++; ue_context_p->ue_context.ul_failure_timer++;
@@ -3339,6 +3339,7 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
if (fd) fclose(fd); if (fd) fclose(fd);
/* send a tick to x2ap */ /* send a tick to x2ap */
if (is_x2ap_enabled()){ if (is_x2ap_enabled()){
msg = itti_alloc_new_message(TASK_RRC_ENB, 0, X2AP_SUBFRAME_PROCESS); msg = itti_alloc_new_message(TASK_RRC_ENB, 0, X2AP_SUBFRAME_PROCESS);
-3
View File
@@ -177,7 +177,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
ue_context_p->ue_context.reconfig->criticalExtensions.present = NR_RRCReconfiguration__criticalExtensions_PR_rrcReconfiguration; ue_context_p->ue_context.reconfig->criticalExtensions.present = NR_RRCReconfiguration__criticalExtensions_PR_rrcReconfiguration;
NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t)); NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t));
ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies; ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies;
carrier->initial_csi_index[ue_context_p->local_uid + 1] = 0;
ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t)); ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t));
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1 || get_softmodem_params()->sa == 1){ if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1 || get_softmodem_params()->sa == 1){
fill_default_rbconfig(ue_context_p->ue_context.rb_config, fill_default_rbconfig(ue_context_p->ue_context.rb_config,
@@ -270,7 +269,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
carrier->minRXTXTIME, carrier->minRXTXTIME,
carrier->do_CSIRS, carrier->do_CSIRS,
carrier->do_SRS, carrier->do_SRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid); ue_context_p->local_uid);
} else { } else {
fill_default_reconfig(carrier->servingcellconfigcommon, fill_default_reconfig(carrier->servingcellconfigcommon,
@@ -281,7 +279,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
carrier->minRXTXTIME, carrier->minRXTXTIME,
carrier->do_CSIRS, carrier->do_CSIRS,
carrier->do_SRS, carrier->do_SRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid); ue_context_p->local_uid);
} }
ue_context_p->ue_id_rnti = ue_context_p->ue_context.secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity; ue_context_p->ue_id_rnti = ue_context_p->ue_context.secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity;
+15 -10
View File
@@ -58,8 +58,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
int minRXTXTIME, int minRXTXTIME,
int do_csirs, int do_csirs,
int do_srs, int do_srs,
int initial_csi_index,
int uid) { int uid) {
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n"); AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
AssertFatal(secondaryCellGroup!=NULL,"secondaryCellGroup is null\n"); AssertFatal(secondaryCellGroup!=NULL,"secondaryCellGroup is null\n");
@@ -560,7 +560,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
} }
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL; bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
if (dl_antenna_ports > 1)// for MIMO, we use DMRS Config Type 2 if ((get_softmodem_params()->do_ra ||
get_softmodem_params()->phy_test) &&
dl_antenna_ports > 1) // for MIMO, we use DMRS Config Type 2 but only with OAI UE
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type)); bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
else else
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL; bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
@@ -1056,7 +1058,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
pdsch_servingcellconfig->pucch_Cell= NULL; pdsch_servingcellconfig->pucch_Cell= NULL;
pdsch_servingcellconfig->ext1=calloc(1,sizeof(*pdsch_servingcellconfig->ext1)); pdsch_servingcellconfig->ext1=calloc(1,sizeof(*pdsch_servingcellconfig->ext1));
pdsch_servingcellconfig->ext1->maxMIMO_Layers = calloc(1,sizeof(*pdsch_servingcellconfig->ext1->maxMIMO_Layers)); pdsch_servingcellconfig->ext1->maxMIMO_Layers = calloc(1,sizeof(*pdsch_servingcellconfig->ext1->maxMIMO_Layers));
*pdsch_servingcellconfig->ext1->maxMIMO_Layers = 2; *pdsch_servingcellconfig->ext1->maxMIMO_Layers = dl_antenna_ports;
pdsch_servingcellconfig->ext1->processingType2Enabled = NULL; pdsch_servingcellconfig->ext1->processingType2Enabled = NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig=NULL; secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig=NULL;
@@ -1077,7 +1079,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
imres0->csi_IM_ResourceElementPattern->choice.pattern1->symbolLocation_p1 = 6; imres0->csi_IM_ResourceElementPattern->choice.pattern1->symbolLocation_p1 = 6;
imres0->freqBand = calloc(1,sizeof(*imres0->freqBand)); imres0->freqBand = calloc(1,sizeof(*imres0->freqBand));
imres0->freqBand->startingRB = 0; imres0->freqBand->startingRB = 0;
imres0->freqBand->nrofRBs = 108; imres0->freqBand->nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
imres0->periodicityAndOffset = calloc(1,sizeof(*imres0->periodicityAndOffset)); imres0->periodicityAndOffset = calloc(1,sizeof(*imres0->periodicityAndOffset));
imres0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320; imres0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
imres0->periodicityAndOffset->choice.slots320 = 0; imres0->periodicityAndOffset->choice.slots320 = 0;
@@ -1096,7 +1098,6 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
} }
csi_MeasConfig->csi_IM_ResourceToReleaseList = NULL; csi_MeasConfig->csi_IM_ResourceToReleaseList = NULL;
csi_MeasConfig->csi_IM_ResourceSetToAddModList = NULL;
csi_MeasConfig->csi_IM_ResourceSetToReleaseList = NULL; csi_MeasConfig->csi_IM_ResourceSetToReleaseList = NULL;
if (do_csirs) { if (do_csirs) {
@@ -1116,7 +1117,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
csi_MeasConfig->nzp_CSI_RS_ResourceSetToReleaseList = NULL; csi_MeasConfig->nzp_CSI_RS_ResourceSetToReleaseList = NULL;
config_csirs(servingcellconfigcommon, csi_MeasConfig,dl_antenna_ports,do_csirs); config_csirs(servingcellconfigcommon, csi_MeasConfig,dl_antenna_ports,curr_bwp,do_csirs);
csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList)); csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList));
csi_MeasConfig->csi_SSB_ResourceSetToReleaseList = NULL; csi_MeasConfig->csi_SSB_ResourceSetToReleaseList = NULL;
@@ -1171,6 +1172,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
NR_CSI_IM_ResourceSetId_t *csiim00 = calloc(1,sizeof(*csiim00)); NR_CSI_IM_ResourceSetId_t *csiim00 = calloc(1,sizeof(*csiim00));
*csiim00 = 0; *csiim00 = 0;
ASN_SEQUENCE_ADD(&csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList->list,csiim00); ASN_SEQUENCE_ADD(&csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList->list,csiim00);
csires2->bwp_Id = 1;
csires2->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ResourceConfigToAddModList->list,csires2); ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ResourceConfigToAddModList->list,csires2);
} }
@@ -1315,7 +1318,11 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
} }
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_MeasConfig_t *csi_MeasConfig, int dl_antenna_ports, int do_csirs) { void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int dl_antenna_ports,
int curr_bwp,
int do_csirs) {
if (do_csirs) { if (do_csirs) {
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList)); csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList));
@@ -1350,7 +1357,7 @@ void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_
resourceMapping.density.present = NR_CSI_RS_ResourceMapping__density_PR_one; resourceMapping.density.present = NR_CSI_RS_ResourceMapping__density_PR_one;
resourceMapping.density.choice.one = (NULL_t)0; resourceMapping.density.choice.one = (NULL_t)0;
resourceMapping.freqBand.startingRB = 0; resourceMapping.freqBand.startingRB = 0;
resourceMapping.freqBand.nrofRBs = 108; resourceMapping.freqBand.nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
nzpcsi0->resourceMapping = resourceMapping; nzpcsi0->resourceMapping = resourceMapping;
nzpcsi0->powerControlOffset = 0; nzpcsi0->powerControlOffset = 0;
nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS)); nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS));
@@ -1375,7 +1382,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
int minRXTXTIME, int minRXTXTIME,
int do_csirs, int do_csirs,
int do_srs, int do_srs,
int initial_csi_index,
int uid) { int uid) {
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n"); AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
AssertFatal(reconfig!=NULL,"reconfig is null\n"); AssertFatal(reconfig!=NULL,"reconfig is null\n");
@@ -1392,7 +1398,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
minRXTXTIME, minRXTXTIME,
do_csirs, do_csirs,
do_srs, do_srs,
initial_csi_index,
uid); uid);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup); xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
+33 -34
View File
@@ -648,57 +648,56 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
AssertFatal(1==0,"Shouldn't be here\n"); AssertFatal(1==0,"Shouldn't be here\n");
} }
samples_received=0; samples_received=0;
while (samples_received != nsamps) { while (samples_received != nsamps) {
if (cc>1) { if (cc>1) {
// receive multiple channels (e.g. RF A and RF B) // receive multiple channels (e.g. RF A and RF B)
std::vector<void *> buff_ptrs; std::vector<void *> buff_ptrs;
for (int i=0; i<cc; i++) buff_ptrs.push_back(buff_tmp[i]+samples_received); for (int i=0; i<cc; i++) buff_ptrs.push_back(buff_tmp[i]+samples_received);
samples_received += s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
samples_received += s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md); } else {
} else {
// receive a single channel (e.g. from connector RF A) // receive a single channel (e.g. from connector RF A)
samples_received += s->rx_stream->recv((void*)((int32_t*)buff_tmp[0]+samples_received), samples_received += s->rx_stream->recv((void*)((int32_t*)buff_tmp[0]+samples_received),
nsamps-samples_received, s->rx_md); nsamps-samples_received, s->rx_md);
}
if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE))
break;
if ((s->wait_for_first_pps == 1) && (samples_received != nsamps)) {
printf("sleep...\n"); //usleep(100);
}
} }
if (samples_received == nsamps) s->wait_for_first_pps=0; if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE))
break;
// bring RX data into 12 LSBs for softmodem RX if ((s->wait_for_first_pps == 1) && (samples_received != nsamps)) {
for (int i=0; i<cc; i++) { printf("sleep...\n"); //usleep(100);
for (int j=0; j<nsamps2; j++) { }
}
if (samples_received == nsamps) s->wait_for_first_pps=0;
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__) #if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__ #ifdef __AVX2__
// FK: in some cases the buffer might not be 32 byte aligned, so we cannot use avx2 // FK: in some cases the buffer might not be 32 byte aligned, so we cannot use avx2
if ((((uintptr_t) buff[i])&0x1F)==0) { if ((((uintptr_t) buff[i])&0x1F)==0) {
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],rxshift); ((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],rxshift);
} else { } else {
((__m128i *)buff[i])[2*j] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j],rxshift); ((__m128i *)buff[i])[2*j] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j],rxshift);
((__m128i *)buff[i])[2*j+1] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j+1],rxshift); ((__m128i *)buff[i])[2*j+1] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j+1],rxshift);
} }
#else #else
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],rxshift); ((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],rxshift);
#endif #endif
#elif defined(__arm__) #elif defined(__arm__)
((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],rxshift); ((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],rxshift);
#endif #endif
}
} }
}
if (samples_received < nsamps) { if (samples_received < nsamps) {
LOG_E(HW,"[recv] received %d samples out of %d\n",samples_received,nsamps); LOG_E(HW,"[recv] received %d samples out of %d\n",samples_received,nsamps);
} }
if ( s->rx_md.error_code != uhd::rx_metadata_t::ERROR_CODE_NONE) if ( s->rx_md.error_code != uhd::rx_metadata_t::ERROR_CODE_NONE)
LOG_E(HW, "%s\n", s->rx_md.to_pp_string(true).c_str()); LOG_E(HW, "%s\n", s->rx_md.to_pp_string(true).c_str());