maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merged latest develop to nfapi

Browse Source
This commit is contained in:
Mahesh
2020-11-19 22:33:39 +05:30
parent 7c110d7745 40141270e3
commit 87105d77cf
424 changed files with 26528 additions and 12403 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair1/SIMULATION/LTE_PHY/common_sim.h
-4
View File
@@ -1,8 +1,4 @@
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
double median(varArray_t *input) {
return *(double *)((uint8_t *)(input+1)+(input->size/2)*input->atomSize);
}
openair1/SIMULATION/LTE_PHY/dlsim.c
+3
View File
@@ -79,6 +79,9 @@ int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
double DS_TDL = .03;
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
int emulate_rf = 0;
int split73=0;
openair1/SIMULATION/LTE_PHY/ulsim.c
+4 -1
View File
@@ -80,6 +80,9 @@ double t_tx_min = 1000000000; /*!< \brief initial min process time for tx */
double t_rx_min = 1000000000; /*!< \brief initial min process time for tx */
int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
int split73=0;
@@ -345,7 +348,7 @@ int main(int argc, char **argv) {
unsigned short input_buffer_length;
unsigned int ret;
unsigned int coded_bits_per_codeword,nsymb;
unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
unsigned int tx_lev=0,tx_lev_dB,trials,errs[5]= {0,0,0,0,0},round_trials[4]= {0,0,0,0};
FILE *bler_fd=NULL;
char bler_fname[512];
FILE *time_meas_fd=NULL;
openair1/SIMULATION/NR_PHY/dlsim.c
+105 -72
View File
@@ -66,7 +66,11 @@
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
@@ -78,14 +82,11 @@ double cpuf;
int sf_ahead=4 ;
int sl_ahead=0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
// dummy functions
int dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info) { return(0); }
void pdcp_run (const protocol_ctxt_t *const ctxt_pP) { return;}
int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id,
const int CC_id,
const uint8_t gNB_index,
@@ -96,19 +97,33 @@ int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id,
return 0;
}
void pdcp_layer_init(void) {}
boolean_t
pdcp_data_ind(
void
rrc_data_ind(
const protocol_ctxt_t *const ctxt_pP,
const srb_flag_t srb_flagP,
const MBMS_flag_t MBMS_flagP,
const rb_id_t rb_idP,
const sdu_size_t sdu_buffer_sizeP,
mem_block_t *const sdu_buffer_pP
) { return(false);}
const rb_id_t Srb_id,
const sdu_size_t sdu_sizeP,
const uint8_t *const buffer_pP
)
{
}
int rrc_init_nr_global_param(void){return(0);}
int
gtpv1u_create_s1u_tunnel(
const instance_t instanceP,
const gtpv1u_enb_create_tunnel_req_t *const create_tunnel_req_pP,
gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP
) {
return 0;
}
int
rrc_gNB_process_GTPV1U_CREATE_TUNNEL_RESP(
const protocol_ctxt_t *const ctxt_pP,
const gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP,
uint8_t *inde_list
) {
return 0;
}
void config_common(int Mod_idP,
int pdsch_AntennaPorts,
@@ -124,12 +139,53 @@ int generate_dlsch_header(unsigned char *mac_header,
unsigned char *ue_cont_res_id,
unsigned char short_padding,
unsigned short post_padding){return 0;}
void nr_DRB_preconfiguration(void){}
// Dummy function to avoid linking error at compilation of nr-dlsim
int is_x2ap_enabled(void)
{
return 0;
}
// needed for some functions
openair0_config_t openair0_cfg[MAX_CARDS];
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
int g_mcsIndex = -1, g_rbStart = -1, g_rbSize = -1;
void nr_dlsim_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
AssertFatal(UE_info->num_UEs == 1, "can have only a single UE\n");
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[0];
/* manually set free CCE to 0 */
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
uint8_t nr_of_candidates;
find_aggregation_candidates(&sched_ctrl->aggregation_level,
&nr_of_candidates,
sched_ctrl->search_space);
sched_ctrl->coreset = get_coreset(
sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
sched_ctrl->cce_index = 0;
/* set "any" value for PUCCH (simulator evaluates PDSCH only) */
sched_ctrl->pucch_sched_idx = 0;
sched_ctrl->pucch_occ_idx = 0;
sched_ctrl->rbStart = g_rbStart;
sched_ctrl->rbSize = g_rbSize;
sched_ctrl->mcs = g_mcsIndex;
sched_ctrl->time_domain_allocation = 2;
sched_ctrl->mcsTableIdx = 0;
AssertFatal(sched_ctrl->rbStart >= 0, "invalid rbStart %d\n", sched_ctrl->rbStart);
AssertFatal(sched_ctrl->rbSize > 0, "invalid rbSize %d\n", sched_ctrl->rbSize);
AssertFatal(sched_ctrl->mcs >= 0, "invalid sched_ctrl->mcs %d\n", sched_ctrl->mcs);
sched_ctrl->numDmrsCdmGrpsNoData = 1;
}
int main(int argc, char **argv)
@@ -174,17 +230,16 @@ int main(int argc, char **argv)
SCM_t channel_model=AWGN;//Rayleigh1_anticorr;
NB_UE_INST = 1;
//double pbch_sinr;
//int pbch_tx_ant;
int N_RB_DL=106,mu=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config;
NR_sched_pucch pucch_sched;
//unsigned char frame_type = 0;
int frame=1,slot=1;
int frame_length_complex_samples;
int frame_length_complex_samples_no_prefix;
//int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
UE_nr_rxtx_proc_t UE_proc;
NR_Sched_Rsp_t Sched_INFO;
@@ -192,12 +247,11 @@ int main(int argc, char **argv)
NR_UE_MAC_INST_t *UE_mac;
int cyclic_prefix_type = NFAPI_CP_NORMAL;
int run_initial_sync=0;
int do_pdcch_flag=1;
int pusch_tgt_snrx10 = 200;
int pucch_tgt_snrx10 = 200;
int loglvl=OAILOG_INFO;
float target_error_rate = 0.01;
//float target_error_rate = 0.01;
int css_flag=0;
cpuf = get_cpu_freq_GHz();
@@ -208,7 +262,6 @@ int main(int argc, char **argv)
randominit(0);
int mcsIndex_set=0,rbStart_set=0,rbSize_set=0;
int print_perf = 0;
FILE *scg_fd=NULL;
@@ -359,7 +412,7 @@ int main(int argc, char **argv)
case 'I':
run_initial_sync=1;
target_error_rate=0.1;
//target_error_rate=0.1;
slot = 0;
break;
@@ -374,18 +427,15 @@ int main(int argc, char **argv)
case 'a':
dlsch_config.rbStart = atoi(optarg);
rbStart_set=1;
g_rbStart = atoi(optarg);
break;
case 'b':
dlsch_config.rbSize = atoi(optarg);
rbSize_set=1;
g_rbSize = atoi(optarg);
break;
case 'e':
dlsch_config.mcsIndex[0] = atoi(optarg);
mcsIndex_set=1;
g_mcsIndex = atoi(optarg);
break;
case 'm':
@@ -464,6 +514,7 @@ int main(int argc, char **argv)
RC.nb_nr_mac_CC[i] = 1;
mac_top_init_gNB();
gNB_mac = RC.nrmac[0];
gNB_mac->pre_processor_dl = nr_dlsim_preprocessor;
gNB_RRC_INST rrc;
memset((void*)&rrc,0,sizeof(rrc));
@@ -518,13 +569,14 @@ int main(int argc, char **argv)
uint64_t ssb_bitmap;
fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
fix_scc(scc,ssb_bitmap);
fill_default_secondaryCellGroup(scc,
secondaryCellGroup,
0,
1,
n_tx,
0);
fix_scc(scc,ssb_bitmap);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
@@ -540,6 +592,12 @@ int main(int argc, char **argv)
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
// call MAC to configure common parameters
/* rrc_mac_config_req_gNB() has created one user, so set the scheduling
* parameters from command line in global variables that will be picked up by
* scheduling preprocessor */
if (g_mcsIndex < 0) g_mcsIndex = 9;
if (g_rbStart < 0) g_rbStart=0;
if (g_rbSize < 0) g_rbSize = N_RB_DL - g_rbStart;
double fs,bw;
@@ -585,7 +643,7 @@ int main(int argc, char **argv)
}
frame_length_complex_samples = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
//frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
s_re = malloc(2*sizeof(double*));
s_im = malloc(2*sizeof(double*));
@@ -667,11 +725,6 @@ int main(int argc, char **argv)
AssertFatal(input_fd==NULL,"Not ready for input signal file\n");
gNB->pbch_configured = 1;
gNB->ssb_pdu.ssb_pdu_rel15.bchPayload=0x001234;
if (mcsIndex_set==0) dlsch_config.mcsIndex[0]=9;
if (rbStart_set==0) dlsch_config.rbStart=0;
if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL-dlsch_config.rbStart;
//Configure UE
rrc.carrier.MIB = (uint8_t*) malloc(4);
@@ -698,7 +751,7 @@ int main(int argc, char **argv)
nr_ue_phy_config_request(&UE_mac->phy_config);
NR_UE_list_t *UE_list = &RC.nrmac[0]->UE_list;
NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info;
//NR_COMMON_channels_t *cc = RC.nrmac[0]->common_channels;
snrRun = 0;
@@ -759,15 +812,23 @@ int main(int argc, char **argv)
memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int));
clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
UE_list->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1);
UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1);
UE_list->UE_sched_ctrl[0].harq_processes[harq_pid].round = round;
UE_list->UE_sched_ctrl[0].current_harq_pid = harq_pid;
UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round;
UE_info->UE_sched_ctrl[0].current_harq_pid = harq_pid;
gNB->dlsch[0][0]->harq_processes[harq_pid]->round = round;
for (int i=0; i<MAX_NUM_CORESET; i++)
gNB_mac->UE_info.num_pdcch_cand[0][i] = 0;
if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&pucch_sched,&dlsch_config);
else nr_schedule_css_dlsch_phytest(0,frame,slot);
if (css_flag == 0) {
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const NR_TDD_UL_DL_Pattern_t *tdd_pattern = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int num_slots_per_tdd = slots_per_frame[*scc->ssbSubcarrierSpacing] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
nr_schedule_ue_spec(0, frame, slot, num_slots_per_tdd);
} else {
nr_schedule_css_dlsch_phytest(0,frame,slot);
}
Sched_INFO.module_id = 0;
Sched_INFO.CC_id = 0;
Sched_INFO.frame = frame;
@@ -803,38 +864,11 @@ int main(int argc, char **argv)
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
} else {/*
} else {
nr_normal_prefix_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
&txdata[aa][tx_offset],
14,
frame_parms);
*/
PHY_ofdm_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
(int*)&txdata[aa][tx_offset],
frame_parms->ofdm_symbol_size,
1,
frame_parms->nb_prefix_samples0,
CYCLIC_PREFIX);
apply_nr_rotation(frame_parms,
(int16_t*)&txdata[aa][tx_offset],
slot,
0,
1,
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples0);
PHY_ofdm_mod(&gNB->common_vars.txdataF[aa][txdataF_offset+frame_parms->ofdm_symbol_size],
(int*)&txdata[aa][tx_offset+frame_parms->nb_prefix_samples0+frame_parms->ofdm_symbol_size],
frame_parms->ofdm_symbol_size,
13,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
apply_nr_rotation(frame_parms,
(int16_t*)&txdata[aa][tx_offset+frame_parms->nb_prefix_samples0+frame_parms->ofdm_symbol_size],
slot,
1,
13,
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
}
}
@@ -883,7 +917,6 @@ int main(int argc, char **argv)
phy_procedures_nrUE_RX(UE,
&UE_proc,
0,
do_pdcch_flag,
normal_txrx);
//printf("dlsim round %d ends\n",round);
@@ -965,7 +998,7 @@ int main(int argc, char **argv)
if (print_perf==1) {
printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))\n",
1000>>*scc->ssbSubcarrierSpacing,dlsch_config.rbSize,dlsch_config.mcsIndex[0],
1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex,
gNB->dlsch[0][0]->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3,
gNB->dlsch[0][0]->harq_processes[0]->K,
gNB->dlsch[0][0]->harq_processes[0]->K/((gNB->dlsch[0][0]->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3)>3824?22:10));
@@ -1026,7 +1059,7 @@ int main(int argc, char **argv)
}
//if ((float)n_errors/(float)n_trials <= target_error_rate) {
if (effRate >= (eff_tp_check*TBS)) {
if (effRate > (eff_tp_check*TBS)) {
printf("PDSCH test OK\n");
break;
}
openair1/SIMULATION/NR_PHY/pbchsim.c
+2
View File
@@ -35,6 +35,7 @@
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/MODULATION/modulation_eNB.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
@@ -45,6 +46,7 @@
#include "openair1/SIMULATION/RF/rf.h"
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
#include "openair1/PHY/MODULATION/nr_modulation.h"
//#define DEBUG_NR_PBCHSIM
openair1/SIMULATION/NR_PHY/prachsim.c
+99 -69
View File
@@ -45,17 +45,22 @@
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "nr_unitary_defs.h"
#include "OCG_vars.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
#define NR_PRACH_DEBUG 1
#define PRACH_WRITE_OUTPUT_DEBUG 1
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
RU_t *ru;
double cpuf;
extern uint16_t prach_root_sequence_map0_3[838];
uint16_t NB_UE_INST=1;
openair0_config_t openair0_cfg[MAX_CARDS];
uint8_t nfapi_mode=0;
int sl_ahead = 0;
@@ -66,19 +71,42 @@ int sl_ahead = 0;
uint64_t get_softmodem_optmask(void) {return 0;}
softmodem_params_t *get_softmodem_params(void) {return 0;}
void pdcp_run (const protocol_ctxt_t *const ctxt_pP) { return;}
void
rrc_data_ind(
const protocol_ctxt_t *const ctxt_pP,
const rb_id_t Srb_id,
const sdu_size_t sdu_sizeP,
const uint8_t *const buffer_pP
)
{
}
boolean_t pdcp_data_ind(const protocol_ctxt_t *const ctxt_pP,
const srb_flag_t srb_flagP,
const MBMS_flag_t MBMS_flagP,
const rb_id_t rb_idP,
const sdu_size_t sdu_buffer_sizeP,
mem_block_t *const sdu_buffer_pP) {return(false);}
int
gtpv1u_create_s1u_tunnel(
const instance_t instanceP,
const gtpv1u_enb_create_tunnel_req_t *const create_tunnel_req_pP,
gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP
) {
return 0;
}
int
rrc_gNB_process_GTPV1U_CREATE_TUNNEL_RESP(
const protocol_ctxt_t *const ctxt_pP,
const gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP,
uint8_t *inde_list
) {
return 0;
}
void nr_DRB_preconfiguration(void){}
void pdcp_layer_init(void) {}
int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id, const int CC_id, const uint8_t gNB_index, const int8_t channel, const uint8_t* pduP, const sdu_size_t pdu_len) {return 0;}
// Dummy function to avoid linking error at compilation of nr-prachsim
int is_x2ap_enabled(void)
{
return 0;
}
int main(int argc, char **argv){
char c;
@@ -88,11 +116,16 @@ int main(int argc, char **argv){
int i, aa, aarx, **txdata, trial, n_frames = 1, prach_start, rx_prach_start; //, ntrials=1;
int N_RB_UL = 106, delay = 0, NCS_config = 13, rootSequenceIndex = 1, threequarter_fs = 0, mu = 1, fd_occasion = 0, loglvl = OAILOG_INFO, numRA = 0, prachStartSymbol = 0;
uint8_t snr1set = 0, ue_speed1set = 0, transmission_mode = 1, n_tx = 1, n_rx = 1, awgn_flag = 0, msg1_frequencystart = 0, num_prach_fd_occasions = 1, prach_format=0;
uint8_t frame = 1, subframe = 9, slot=19, slot_gNB=19, config_index = 98, prach_sequence_length = 1, num_root_sequences = 16, restrictedSetConfig = 0, N_dur, N_t_slot, start_symbol;
uint8_t frame = 1, subframe = 9, slot=19, slot_gNB=19, config_index = 98, prach_sequence_length = 1, restrictedSetConfig = 0, N_dur, N_t_slot, start_symbol;
uint16_t Nid_cell = 0, preamble_tx = 0, preamble_delay, format, format0, format1;
uint32_t tx_lev = 10000, prach_errors = 0, samp_count; //,tx_lev_dB;
uint32_t tx_lev = 10000, prach_errors = 0; //,tx_lev_dB;
uint64_t SSB_positions = 0x01, absoluteFrequencyPointA = 640000;
uint16_t RA_sfn_index;
uint8_t N_RA_slot;
uint8_t config_period;
int prachOccasion = 0;
double DS_TDL = .03;
NB_UE_INST=1;
// int8_t interf1=-19,interf2=-19;
// uint8_t abstraction_flag=0,calibration_flag=0;
@@ -407,15 +440,18 @@ int main(int argc, char **argv){
gNB->proc.slot_rx = slot;
int ret = get_nr_prach_info_from_index(config_index,
(int)frame,
(int)slot_gNB,
absoluteFrequencyPointA,
mu,
frame_parms->frame_type,
&format,
&start_symbol,
&N_t_slot,
&N_dur);
(int)frame,
(int)slot_gNB,
absoluteFrequencyPointA,
mu,
frame_parms->frame_type,
&format,
&start_symbol,
&N_t_slot,
&N_dur,
&RA_sfn_index,
&N_RA_slot,
&config_period);
if (ret == 0) {printf("No prach in %d.%d, mu %d, config_index %d\n",frame,slot,mu,config_index); exit(-1);}
format0 = format&0xff; // first column of format from table
@@ -424,60 +460,54 @@ int main(int argc, char **argv){
if (format1 != 0xff) {
switch(format0) {
case 0xa1:
prach_format = 9;
prach_format = 11;
break;
case 0xa2:
prach_format = 10;
prach_format = 12;
break;
case 0xa3:
prach_format = 11;
prach_format = 13;
break;
default:
AssertFatal(1==0, "Only formats A1/B1 A2/B2 A3/B3 are valid for dual format");
}
} else {
switch(format0) {
case 0xa1:
prach_format = 0;
break;
case 0xa2:
prach_format = 1;
break;
case 0xa3:
prach_format = 2;
break;
case 0xb1:
prach_format = 3;
break;
case 0xb2:
prach_format = 4;
break;
case 0xb3:
prach_format = 5;
break;
case 0xb4:
prach_format = 6;
break;
case 0xc0:
prach_format = 7;
break;
case 0xc2:
prach_format = 8;
break;
case 0:
// long formats are handled @ PHY
break;
case 1:
// long formats are handled @ PHY
break;
case 2:
// long formats are handled @ PHY
break;
case 3:
// long formats are handled @ PHY
break;
switch(format0) { // single PRACH format
case 0:
prach_format = 0;
break;
case 1:
prach_format = 1;
break;
case 2:
prach_format = 2;
break;
case 3:
prach_format = 3;
break;
case 0xa1:
prach_format = 4;
break;
case 0xa2:
prach_format = 5;
break;
case 0xa3:
prach_format = 6;
break;
case 0xb1:
prach_format = 7;
break;
case 0xb4:
prach_format = 8;
break;
case 0xc0:
prach_format = 9;
break;
case 0xc2:
prach_format = 10;
break;
default:
AssertFatal(1==0, "Invalid PRACH format");
AssertFatal(1 == 0, "Invalid PRACH format");
}
}
@@ -675,7 +705,7 @@ int main(int argc, char **argv){
// printf("Sigma2 %f (sigma2_dB %f)\n",sigma2,sigma2_dB);
if (awgn_flag == 0) {
multipath_tv_channel(UE2gNB, s_re, s_im, r_re, r_im, frame_parms->samples_per_tti<<1, 0);
multipath_tv_channel(UE2gNB, s_re, s_im, r_re, r_im, frame_parms->samples_per_frame, 0);
}
if (n_frames==1) {
@@ -700,11 +730,11 @@ int main(int argc, char **argv){
}
rx_nr_prach_ru(ru, prach_format, numRA, prachStartSymbol, frame, slot);
rx_nr_prach_ru(ru, prach_format, numRA, prachStartSymbol, prachOccasion, frame, slot);
gNB->prach_vars.rxsigF = ru->prach_rxsigF;
gNB->prach_vars.rxsigF = ru->prach_rxsigF[prachOccasion];
if (n_frames == 1) printf("ncs %d,num_seq %d\n",prach_pdu->num_cs, prach_config->num_prach_fd_occasions_list[fd_occasion].num_root_sequences.value);
rx_nr_prach(gNB, prach_pdu, frame, subframe, &preamble_rx, &preamble_energy, &preamble_delay);
rx_nr_prach(gNB, prach_pdu, prachOccasion, frame, subframe, &preamble_rx, &preamble_energy, &preamble_delay);
// printf(" preamble_energy %d preamble_rx %d preamble_tx %d \n", preamble_energy, preamble_rx, preamble_tx);
openair1/SIMULATION/NR_PHY/ulschsim.c
+54 -5
View File
@@ -45,6 +45,7 @@
#include "openair1/SIMULATION/RF/rf.h"
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
#include "common/utils/threadPool/thread-pool.h"
//#define DEBUG_NR_ULSCHSIM
@@ -67,6 +68,44 @@ PHY_VARS_NR_UE *PHY_vars_UE_g[1][1] = { { NULL } };
uint16_t n_rnti = 0x1234;
openair0_config_t openair0_cfg[MAX_CARDS];
int nr_postDecode_sim(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
ldpcDecode_t *rdata = (ldpcDecode_t*) NotifiedFifoData(req);
NR_UL_gNB_HARQ_t *ulsch_harq = rdata->ulsch_harq;
NR_gNB_ULSCH_t *ulsch = rdata->ulsch;
int r = rdata->segment_r;
bool decodeSuccess = (rdata->decodeIterations <= rdata->decoderParms.numMaxIter);
ulsch_harq->processedSegments++;
gNB->nbDecode--;
if (decodeSuccess) {
memcpy(ulsch_harq->b+rdata->offset,
ulsch_harq->c[r],
rdata->Kr_bytes- - (ulsch_harq->F>>3) -((ulsch_harq->C>1)?3:0));
} else {
if ( rdata->nbSegments != ulsch_harq->processedSegments ) {
int nb=abortTpool(gNB->threadPool, req->key);
nb+=abortNotifiedFIFO(gNB->respDecode, req->key);
gNB->nbDecode-=nb;
AssertFatal(ulsch_harq->processedSegments+nb == rdata->nbSegments,"processed: %d, aborted: %d, total %d\n",
ulsch_harq->processedSegments, nb, rdata->nbSegments);
ulsch_harq->processedSegments=rdata->nbSegments;
return 1;
}
}
// if all segments are done
if (rdata->nbSegments == ulsch_harq->processedSegments) {
if (decodeSuccess) {
return 0;
} else {
return 1;
}
}
ulsch->last_iteration_cnt = rdata->decodeIterations;
return 0;
}
int main(int argc, char **argv)
{
char c;
@@ -92,7 +131,7 @@ int main(int argc, char **argv)
NR_DL_FRAME_PARMS *frame_parms;
double sigma;
unsigned char qbits = 8;
int ret;
int ret=0;
int loglvl = OAILOG_WARNING;
uint64_t SSB_positions=0x01;
uint16_t nb_symb_sch = 12;
@@ -338,6 +377,11 @@ int main(int argc, char **argv)
gNB = RC.gNB[0];
//gNB_config = &gNB->gNB_config;
gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t));
gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
char tp_param[] = "n";
initTpool(tp_param, gNB->threadPool, true);
initNotifiedFIFO(gNB->respDecode);
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->nb_antennas_tx = n_tx;
frame_parms->nb_antennas_rx = n_rx;
@@ -408,7 +452,7 @@ int main(int argc, char **argv)
rel15_ul->pusch_data.rv_index = rvidx;
rel15_ul->nrOfLayers = Nl;
rel15_ul->target_code_rate = code_rate;
rel15_ul->pusch_data.tb_size = TBS>>3;
rel15_ul->pusch_data.tb_size = TBS/8;
///////////////////////////////////////////////////
double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384); // [hna] 16 segments, 68*Zc
@@ -444,7 +488,7 @@ int main(int argc, char **argv)
harq_process_ul_ue->pusch_pdu.nr_of_symbols = nb_symb_sch;
harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb*nb_codewords;
harq_process_ul_ue->pusch_pdu.pusch_data.rv_index = rvidx;
harq_process_ul_ue->pusch_pdu.pusch_data.tb_size = TBS;
harq_process_ul_ue->pusch_pdu.pusch_data.tb_size = TBS/8;
harq_process_ul_ue->a = &test_input[0];
}
@@ -531,10 +575,15 @@ int main(int argc, char **argv)
rel15_ul->qam_mod_order,
rel15_ul->nrOfLayers);
ret = nr_ulsch_decoding(gNB, UE_id, channel_output_fixed, frame_parms, rel15_ul,
nr_ulsch_decoding(gNB, UE_id, channel_output_fixed, frame_parms, rel15_ul,
frame, subframe, harq_pid, G);
while (gNB->nbDecode > 0) {
notifiedFIFO_elt_t *req=pullTpool(gNB->respDecode, gNB->threadPool);
ret = nr_postDecode_sim(gNB, req);
delNotifiedFIFO_elt(req);
}
if (ret > ulsch_gNB->max_ldpc_iterations)
if (ret)
n_errors++;
//count errors
openair1/SIMULATION/NR_PHY/ulsim.c
+439 -47
View File
@@ -55,11 +55,22 @@
//#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
#include "openair2/LAYER2/NR_MAC_gNB/mac_proto.h"
#include "common/utils/threadPool/thread-pool.h"
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
<<<<<<< HEAD
=======
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
>>>>>>> fork_develop_new
//#define DEBUG_ULSIM
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
@@ -70,7 +81,6 @@ int slot_ahead=6 ;
int sl_ahead=0;
double cpuf;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
@@ -85,20 +95,46 @@ int generate_dlsch_header(unsigned char *mac_header,
unsigned char *ue_cont_res_id,
unsigned char short_padding,
unsigned short post_padding){return 0;}
void pdcp_layer_init (void) {}
boolean_t pdcp_data_ind(
const protocol_ctxt_t *const ctxt_pP,
const srb_flag_t srb_flagP,
const MBMS_flag_t MBMS_flagP,
const rb_id_t rb_idP,
const sdu_size_t sdu_buffer_sizeP,
mem_block_t *const sdu_buffer_pP
) { return(false);}
void
rrc_data_ind(
const protocol_ctxt_t *const ctxt_pP,
const rb_id_t Srb_id,
const sdu_size_t sdu_sizeP,
const uint8_t *const buffer_pP
)
{
}
<<<<<<< HEAD
void pdcp_run (const protocol_ctxt_t *const ctxt_pP) { return;}
void nr_DRB_preconfiguration(void){}
int rrc_init_nr_global_param(void){return(0);}
=======
int
gtpv1u_create_s1u_tunnel(
const instance_t instanceP,
const gtpv1u_enb_create_tunnel_req_t *const create_tunnel_req_pP,
gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP
) {
return 0;
}
>>>>>>> fork_develop_new
int
rrc_gNB_process_GTPV1U_CREATE_TUNNEL_RESP(
const protocol_ctxt_t *const ctxt_pP,
const gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP,
uint8_t *inde_list
) {
return 0;
}
// Dummy function to avoid linking error at compilation of nr-ulsim
int is_x2ap_enabled(void)
{
return 0;
}
// needed for some functions
uint16_t n_rnti = 0x1234;
@@ -139,6 +175,10 @@ int main(int argc, char **argv)
uint16_t N_RB_DL = 106, N_RB_UL = 106, mu = 1;
double tx_gain=1.0;
double N0=30;
<<<<<<< HEAD
=======
NB_UE_INST = 1;
>>>>>>> fork_develop_new
//unsigned char frame_type = 0;
NR_DL_FRAME_PARMS *frame_parms;
@@ -165,6 +205,16 @@ int main(int argc, char **argv)
float effRate;
//float eff_tp_check = 0.7;
uint8_t snrRun;
<<<<<<< HEAD
=======
int enable_ptrs = 0;
int modify_dmrs = 0;
/* L_PTRS = ptrs_arg[0], K_PTRS = ptrs_arg[1] */
int ptrs_arg[2] = {-1,-1};// Invalid values
/* DMRS TYPE = dmrs_arg[0], Add Pos = dmrs_arg[1] */
int dmrs_arg[2] = {-1,-1};// Invalid values
>>>>>>> fork_develop_new
UE_nr_rxtx_proc_t UE_proc;
FILE *scg_fd=NULL;
@@ -175,6 +225,10 @@ int main(int argc, char **argv)
int pucch_tgt_snrx10 = 200;
int ibwps=24;
int ibwp_rboffset=41;
<<<<<<< HEAD
=======
int params_from_file = 0;
>>>>>>> fork_develop_new
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0 ) {
exit_fun("[NR_ULSIM] Error, configuration module init failed\n");
}
@@ -182,7 +236,11 @@ int main(int argc, char **argv)
//logInit();
randominit(0);
<<<<<<< HEAD
while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:i:j:kl:m:n:p:r:s:y:z:F:M:N:PR:S:L:G:H:")) != -1) {
=======
while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:i:j:kl:m:n:p:r:s:y:z:F:G:H:M:N:PR:S:T:U:L:")) != -1) {
>>>>>>> fork_develop_new
printf("handling optarg %c\n",c);
switch (c) {
@@ -360,6 +418,7 @@ int main(int argc, char **argv)
}
break;
<<<<<<< HEAD
case 'M':
// SSB_positions = atoi(optarg);
@@ -388,15 +447,71 @@ int main(int argc, char **argv)
case 'L':
loglvl = atoi(optarg);
break;
=======
>>>>>>> fork_develop_new
case 'G':
file_offset = atoi(optarg);
break;
<<<<<<< HEAD
case 'H':
slot = atoi(optarg);
break;
=======
case 'H':
slot = atoi(optarg);
break;
case 'M':
// SSB_positions = atoi(optarg);
break;
case 'N':
// Nid_cell = atoi(optarg);
break;
case 'R':
N_RB_DL = atoi(optarg);
N_RB_UL = N_RB_DL;
break;
case 'S':
snr1 = atof(optarg);
snr1set = 1;
printf("Setting SNR1 to %f\n", snr1);
break;
case 'P':
print_perf=1;
opp_enabled=1;
break;
case 'L':
loglvl = atoi(optarg);
break;
case 'T':
enable_ptrs=1;
for(i=0; i < atoi(optarg); i++){
ptrs_arg[i] = atoi(argv[optind++]);
}
break;
case 'U':
modify_dmrs = 1;
for(i=0; i < atoi(optarg); i++){
dmrs_arg[i] = atoi(argv[optind++]);
}
break;
case 'Q':
params_from_file = 1;
break;
>>>>>>> fork_develop_new
default:
case 'h':
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
@@ -418,7 +533,11 @@ int main(int argc, char **argv)
printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
//printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
printf("-F Input filename (.txt format) for RX conformance testing\n");
<<<<<<< HEAD
printf("-G raw file containing RRC configuration (generated by gNB)\n");
=======
printf("-G Offset of samples to read from file (0 default)\n");
>>>>>>> fork_develop_new
printf("-M Multiple SSB positions in burst\n");
printf("-N Nid_cell\n");
printf("-O oversampling factor (1,2,4,8,16)\n");
@@ -426,6 +545,12 @@ int main(int argc, char **argv)
printf("-t Acceptable effective throughput (in percentage)\n");
printf("-S Ending SNR, runs from SNR0 to SNR1\n");
printf("-P Print ULSCH performances\n");
<<<<<<< HEAD
=======
printf("-T Enable PTRS, arguments list L_PTRS{0,1,2} K_PTRS{2,4}, e.g. -T 2 0 2 \n");
printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:3}, e.g. -U 2 0 2 \n");
printf("-Q If -F used, read parameters from file\n");
>>>>>>> fork_develop_new
exit(-1);
break;
@@ -470,8 +595,13 @@ int main(int argc, char **argv)
UE2gNB->max_Doppler = maxDoppler;
RC.gNB = (PHY_VARS_gNB **) malloc(sizeof(PHY_VARS_gNB *));
RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB));
RC.gNB[0] = calloc(1,sizeof(PHY_VARS_gNB));
gNB = RC.gNB[0];
gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t));
gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
char tp_param[] = "n";
initTpool(tp_param, gNB->threadPool, true);
initNotifiedFIFO(gNB->respDecode);
//gNB_config = &gNB->gNB_config;
//memset((void *)&gNB->UL_INFO,0,sizeof(gNB->UL_INFO));
@@ -506,15 +636,16 @@ int main(int argc, char **argv)
uint64_t ssb_bitmap;
fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
fix_scc(scc,ssb_bitmap);
fill_default_secondaryCellGroup(scc,
secondaryCellGroup,
0,
1,
n_tx,
0);
fix_scc(scc,ssb_bitmap);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
// xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
AssertFatal((gNB->if_inst = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
@@ -608,13 +739,8 @@ int main(int argc, char **argv)
nr_scheduled_response_t scheduled_response;
fapi_nr_ul_config_request_t ul_config;
unsigned int TBS;
uint16_t number_dmrs_symbols = 0;
unsigned int available_bits;
uint8_t nb_re_dmrs;
unsigned char mod_order;
uint16_t code_rate;
fapi_nr_tx_request_t tx_req;
uint8_t ptrs_mcs1 = 2;
uint8_t ptrs_mcs2 = 4;
uint8_t ptrs_mcs3 = 10;
@@ -624,29 +750,94 @@ int main(int argc, char **argv)
uint16_t pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; // | PUSCH_PDU_BITMAP_PUSCH_PTRS;
uint8_t max_rounds = 4;
uint8_t crc_status = 0;
<<<<<<< HEAD
=======
unsigned char mod_order = nr_get_Qm_ul(Imcs, 0);
uint16_t code_rate = nr_get_code_rate_ul(Imcs, 0);
uint8_t mapping_type = typeB; // Default Values
pusch_dmrs_type_t dmrs_config_type = pusch_dmrs_type1; // Default Values
pusch_dmrs_AdditionalPosition_t add_pos = pusch_dmrs_pos0; // Default Values
/* validate parameters othwerwise default values are used */
/* -U flag can be used to set DMRS parameters*/
if(modify_dmrs)
{
if(dmrs_arg[0] == 0)
{
mapping_type = typeA;
}
else if (dmrs_arg[0] == 1)
{
mapping_type = typeB;
}
/* Additional DMRS positions */
if(dmrs_arg[1] >= 0 && dmrs_arg[1] <=3 )
{
add_pos = dmrs_arg[1];
}
printf("NOTE: DMRS config is modified with Mapping Type %d , Additional Position %d \n", mapping_type, add_pos );
}
uint8_t length_dmrs = pusch_len1;
uint16_t l_prime_mask = get_l_prime(nb_symb_sch, mapping_type, add_pos, length_dmrs);
uint16_t number_dmrs_symbols = get_dmrs_symbols_in_slot(l_prime_mask, nb_symb_sch);
uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4;
unsigned int available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, number_dmrs_symbols, mod_order, 1);
unsigned int TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs * number_dmrs_symbols, 0, 0, precod_nbr_layers);
uint8_t ulsch_input_buffer[TBS/8];
ulsch_input_buffer[0] = 0x31;
for (i = 1; i < TBS/8; i++) {
ulsch_input_buffer[i] = (unsigned char) rand();
}
>>>>>>> fork_develop_new
uint8_t length_dmrs = pusch_len1; // [hna] remove dmrs struct
uint16_t l_prime_mask = get_l_prime(nb_symb_sch, typeB, pusch_dmrs_pos0, length_dmrs); // [hna] remove dmrs struct
uint8_t ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, Imcs, mcs_table);
uint8_t ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, nb_rb);
int ptrs_symbols = 0; // to calculate total PTRS RE's in a slot
<<<<<<< HEAD
if (input_fd != NULL) max_rounds=1;
if(1<<ptrs_time_density >= nb_symb_sch)
pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
=======
double ts = 1.0/(frame_parms->subcarrier_spacing * frame_parms->ofdm_symbol_size);
>>>>>>> fork_develop_new
/* -T option enable PTRS */
if(enable_ptrs)
{
/* validate parameters othwerwise default values are used */
if(ptrs_arg[0] == 0 || ptrs_arg[0] == 1 || ptrs_arg[0] == 2 )
{
ptrs_time_density = ptrs_arg[0];
}
if(ptrs_arg[1] == 2 || ptrs_arg[1] == 4 )
{
ptrs_freq_density = ptrs_arg[1];
}
pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS;
printf("NOTE: PTRS Enabled with L %d, K %d \n", ptrs_time_density, ptrs_freq_density );
}
if (input_fd != NULL) max_rounds=1;
if(1<<ptrs_time_density >= nb_symb_sch)
pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
for (i = 0; i < nb_symb_sch; i++) {
number_dmrs_symbols += (l_prime_mask >> i) & 0x01;
}
mod_order = nr_get_Qm_ul(Imcs, 0);
code_rate = nr_get_code_rate_ul(Imcs, 0);
printf("\n");
//for (int i=0;i<16;i++) printf("%f\n",gaussdouble(0.0,1.0));
snrRun = 0;
int n_errs = 0;
<<<<<<< HEAD
=======
int read_errors=0;
>>>>>>> fork_develop_new
int slot_offset = frame_parms->get_samples_slot_timestamp(slot,frame_parms,0);
int slot_length = slot_offset - frame_parms->get_samples_slot_timestamp(slot-1,frame_parms,0);
@@ -656,6 +847,7 @@ int main(int argc, char **argv)
// 800 samples is N_TA_OFFSET for FR1 @ 30.72 Ms/s,
AssertFatal(frame_parms->subcarrier_spacing==30000,"only 30 kHz for file input for now (%d)\n",frame_parms->subcarrier_spacing);
<<<<<<< HEAD
fseek(input_fd,file_offset*((slot_length<<2)+4000+16),SEEK_SET);
fread((void*)&n_rnti,sizeof(int16_t),1,input_fd);
printf("rnti %x\n",n_rnti);
@@ -685,6 +877,41 @@ int main(int argc, char **argv)
slot_offset,
((int16_t*)&gNB->common_vars.rxdata[0][slot_offset])[i],
((int16_t*)&gNB->common_vars.rxdata[0][slot_offset])[1+i]);
=======
if (params_from_file) {
fseek(input_fd,file_offset*((slot_length<<2)+4000+16),SEEK_SET);
read_errors+=fread((void*)&n_rnti,sizeof(int16_t),1,input_fd);
printf("rnti %x\n",n_rnti);
read_errors+=fread((void*)&nb_rb,sizeof(int16_t),1,input_fd);
printf("nb_rb %d\n",nb_rb);
int16_t dummy;
read_errors+=fread((void*)&start_rb,sizeof(int16_t),1,input_fd);
//fread((void*)&dummy,sizeof(int16_t),1,input_fd);
printf("rb_start %d\n",start_rb);
read_errors+=fread((void*)&nb_symb_sch,sizeof(int16_t),1,input_fd);
//fread((void*)&dummy,sizeof(int16_t),1,input_fd);
printf("nb_symb_sch %d\n",nb_symb_sch);
read_errors+=fread((void*)&start_symbol,sizeof(int16_t),1,input_fd);
printf("start_symbol %d\n",start_symbol);
read_errors+=fread((void*)&Imcs,sizeof(int16_t),1,input_fd);
printf("mcs %d\n",Imcs);
read_errors+=fread((void*)&rv_index,sizeof(int16_t),1,input_fd);
printf("rv_index %d\n",rv_index);
// fread((void*)&harq_pid,sizeof(int16_t),1,input_fd);
read_errors+=fread((void*)&dummy,sizeof(int16_t),1,input_fd);
printf("harq_pid %d\n",harq_pid);
}
fseek(input_fd,file_offset*sizeof(int16_t)*2,SEEK_SET);
read_errors+=fread((void*)&gNB->common_vars.rxdata[0][slot_offset-delay],
sizeof(int16_t),
slot_length<<1,
input_fd);
if (read_errors==0) exit(1);
for (int i=0;i<16;i+=2) printf("slot_offset %d : %d,%d\n",
slot_offset,
((int16_t*)&gNB->common_vars.rxdata[0][slot_offset])[i],
((int16_t*)&gNB->common_vars.rxdata[0][slot_offset])[1+i]);
>>>>>>> fork_develop_new
}
for (SNR = snr0; SNR < snr1; SNR += snr_step) {
@@ -695,6 +922,20 @@ int main(int argc, char **argv)
int n_errors[4] = {0,0,0,0};;
int round_trials[4]={0,0,0,0};
uint32_t errors_scrambling[4] = {0,0,0,0};
<<<<<<< HEAD
=======
reset_meas(&gNB->phy_proc_rx);
reset_meas(&gNB->rx_pusch_stats);
reset_meas(&gNB->ulsch_decoding_stats);
reset_meas(&gNB->ulsch_deinterleaving_stats);
reset_meas(&gNB->ulsch_rate_unmatching_stats);
reset_meas(&gNB->ulsch_ldpc_decoding_stats);
reset_meas(&gNB->ulsch_unscrambling_stats);
reset_meas(&gNB->ulsch_channel_estimation_stats);
reset_meas(&gNB->ulsch_llr_stats);
reset_meas(&gNB->ulsch_channel_compensation_stats);
reset_meas(&gNB->ulsch_rbs_extraction_stats);
>>>>>>> fork_develop_new
clear_pusch_stats(gNB);
for (trial = 0; trial < n_trials; trial++) {
@@ -708,6 +949,7 @@ int main(int argc, char **argv)
ulsch_ue[0]->harq_processes[harq_pid]->round = round;
gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
rv_index = nr_rv_round_map[round];
<<<<<<< HEAD
reset_meas(&gNB->phy_proc_rx);
reset_meas(&gNB->rx_pusch_stats);
reset_meas(&gNB->ulsch_decoding_stats);
@@ -720,27 +962,12 @@ int main(int argc, char **argv)
reset_meas(&gNB->ulsch_mrc_stats);
reset_meas(&gNB->ulsch_channel_compensation_stats);
reset_meas(&gNB->ulsch_rbs_extraction_stats);
=======
>>>>>>> fork_develop_new
UE_proc.nr_tti_tx = slot;
UE_proc.frame_tx = frame;
// --------- setting parameters for gNB --------
/*
rel15_ul->rnti = n_rnti;
rel15_ul->ulsch_pdu_rel15.start_rb = start_rb;
rel15_ul->ulsch_pdu_rel15.number_rbs = nb_rb;
rel15_ul->ulsch_pdu_rel15.start_symbol = start_symbol;
rel15_ul->ulsch_pdu_rel15.number_symbols = nb_symb_sch;
rel15_ul->ulsch_pdu_rel15.length_dmrs = length_dmrs;
rel15_ul->ulsch_pdu_rel15.Qm = mod_order;
rel15_ul->ulsch_pdu_rel15.mcs = Imcs;
rel15_ul->ulsch_pdu_rel15.rv = 0;
rel15_ul->ulsch_pdu_rel15.ndi = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = precod_nbr_layers;
rel15_ul->ulsch_pdu_rel15.R = code_rate;
///////////////////////////////////////////////////
*/
UL_tti_req->SFN = frame;
UL_tti_req->Slot = slot;
UL_tti_req->n_pdus = 1;
@@ -767,6 +994,10 @@ int main(int argc, char **argv)
pusch_pdu->bwp_size = abwp_size;
}
<<<<<<< HEAD
=======
pusch_pdu->pusch_data.tb_size = TBS/8;
>>>>>>> fork_develop_new
pusch_pdu->pdu_bit_map = pdu_bit_map;
pusch_pdu->rnti = n_rnti;
pusch_pdu->mcs_index = Imcs;
@@ -777,7 +1008,11 @@ int main(int argc, char **argv)
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << start_symbol;
<<<<<<< HEAD
pusch_pdu->dmrs_config_type = 0;
=======
pusch_pdu->dmrs_config_type = dmrs_config_type;
>>>>>>> fork_develop_new
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId;
pusch_pdu->scid = 0;
pusch_pdu->dmrs_ports = 1;
@@ -810,31 +1045,56 @@ int main(int argc, char **argv)
scheduled_response.slot = slot;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
<<<<<<< HEAD
scheduled_response.tx_request = (fapi_nr_tx_request_t *) malloc(sizeof(fapi_nr_tx_request_t));
scheduled_response.tx_request->tx_request_body = (fapi_nr_tx_request_body_t *) malloc(sizeof(fapi_nr_tx_request_body_t));
=======
scheduled_response.tx_request = &tx_req;
// Config UL TX PDU
tx_req.slot = slot;
tx_req.sfn = frame;
// tx_req->tx_config // TbD
tx_req.number_of_pdus = 1;
tx_req.tx_request_body[0].pdu_length = TBS/8;
tx_req.tx_request_body[0].pdu_index = 0;
tx_req.tx_request_body[0].pdu = &ulsch_input_buffer[0];
>>>>>>> fork_develop_new
ul_config.slot = slot;
ul_config.number_pdus = 1;
ul_config.ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config.ul_config_list[0].pusch_config_pdu.rnti = n_rnti;
ul_config.ul_config_list[0].pusch_config_pdu.pdu_bit_map = pdu_bit_map;
ul_config.ul_config_list[0].pusch_config_pdu.qam_mod_order = mod_order;
ul_config.ul_config_list[0].pusch_config_pdu.rb_size = nb_rb;
ul_config.ul_config_list[0].pusch_config_pdu.rb_start = start_rb;
ul_config.ul_config_list[0].pusch_config_pdu.nr_of_symbols = nb_symb_sch;
ul_config.ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol;
ul_config.ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask << start_symbol;
ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type = 0;
ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type;
ul_config.ul_config_list[0].pusch_config_pdu.mcs_index = Imcs;
ul_config.ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
<<<<<<< HEAD
ul_config.ul_config_list[0].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 1;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = trial & 0x1;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index;
=======
ul_config.ul_config_list[0].pusch_config_pdu.num_dmrs_cdm_grps_no_data = msg3_flag == 0 ? 1 : 2;
>>>>>>> fork_develop_new
ul_config.ul_config_list[0].pusch_config_pdu.nrOfLayers = precod_nbr_layers;
ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.tb_size = TBS/8;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = trial & 0x1;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.harq_process_id = harq_pid;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_time_density = ptrs_time_density;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_freq_density = ptrs_freq_density;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list = (nfapi_nr_ue_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ue_ptrs_ports_t));
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
<<<<<<< HEAD
//there are plenty of other parameters that we don't seem to be using for now. e.g.
ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0;
@@ -848,6 +1108,12 @@ int main(int argc, char **argv)
nr_fill_ulsch(gNB,frame,slot,pusch_pdu);
for (int i=0;i<(TBS>>3);i++) ulsch_ue[0]->harq_processes[harq_pid]->a[i]=i&0xff;
=======
nr_fill_ulsch(gNB,frame,slot,pusch_pdu);
for (int i=0;i<(TBS/8);i++) ulsch_ue[0]->harq_processes[harq_pid]->a[i]=i&0xff;
>>>>>>> fork_develop_new
double scale = 1;
if (input_fd == NULL) {
@@ -906,10 +1172,22 @@ int main(int argc, char **argv)
for (ap=0; ap<frame_parms->nb_antennas_rx; ap++) {
((int16_t*) &gNB->common_vars.rxdata[ap][slot_offset])[(2*i) + (delay*2)] = (int16_t)((tx_gain*r_re[ap][i]) + (sqrt(sigma/2)*gaussdouble(0.0,1.0))); // convert to fixed point
((int16_t*) &gNB->common_vars.rxdata[ap][slot_offset])[(2*i)+1 + (delay*2)] = (int16_t)((tx_gain*r_im[ap][i]) + (sqrt(sigma/2)*gaussdouble(0.0,1.0)));
<<<<<<< HEAD
}
}
}
=======
/* Add phase noise if enabled */
if (pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
phase_noise(ts, &((int16_t*)&gNB->common_vars.rxdata[ap][slot_offset])[(2*i)],
&((int16_t*)&gNB->common_vars.rxdata[ap][slot_offset])[(2*i)+1]);
}
}
}
}
>>>>>>> fork_develop_new
////////////////////////////////////////////////////////////
@@ -964,6 +1242,7 @@ int main(int argc, char **argv)
}
if(n_trials==1) printf("end of round %d rv_index %d\n",round, rv_index);
<<<<<<< HEAD
for (i = 0; i < available_bits; i++) {
if(((ulsch_ue[0]->g[i] == 0) && (gNB->pusch_vars[UE_id]->llr[i] <= 0)) ||
@@ -978,10 +1257,13 @@ int main(int argc, char **argv)
} // round
=======
>>>>>>> fork_develop_new
//----------------------------------------------------------
//----------------- count and print errors -----------------
//----------------------------------------------------------
<<<<<<< HEAD
if (n_trials == 1 && errors_scrambling[0] > 0) {
@@ -1067,6 +1349,116 @@ int main(int argc, char **argv)
break;
}
=======
if ((pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) && (SNR==snr0) && (trial==0) && (round==0)) {
ptrs_symbols = 0;
for (int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++){
ptrs_symbols += ((gNB->pusch_vars[UE_id]->ptrs_symbols) >> i) & 1;
}
/* 2*5*(50/2), for RB = 50,K = 2 for 5 OFDM PTRS symbols */
available_bits -= 2 * ptrs_symbols * ((nb_rb + ptrs_freq_density - 1) /ptrs_freq_density);
printf("After PTRS subtraction available_bits are : %u \n", available_bits);
}
for (i = 0; i < available_bits; i++) {
if(((ulsch_ue[0]->g[i] == 0) && (gNB->pusch_vars[UE_id]->llr[i] <= 0)) ||
((ulsch_ue[0]->g[i] == 1) && (gNB->pusch_vars[UE_id]->llr[i] >= 0)))
{
/*if(errors_scrambling == 0)
printf("\x1B[34m" "[frame %d][trial %d]\t1st bit in error in unscrambling = %d\n" "\x1B[0m", frame, trial, i);*/
errors_scrambling[round]++;
}
}
round++;
} // round
if (n_trials == 1 && errors_scrambling[0] > 0) {
printf("\x1B[31m""[frame %d][trial %d]\tnumber of errors in unscrambling = %u\n" "\x1B[0m", frame, trial, errors_scrambling[0]);
}
for (i = 0; i < TBS; i++) {
estimated_output_bit[i] = (ulsch_gNB->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
test_input_bit[i] = (ulsch_ue[0]->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
if (estimated_output_bit[i] != test_input_bit[i]) {
/*if(errors_decoding == 0)
printf("\x1B[34m""[frame %d][trial %d]\t1st bit in error in decoding = %d\n" "\x1B[0m", frame, trial, i);*/
errors_decoding++;
}
}
if (n_trials == 1) {
for (int r=0;r<ulsch_ue[0]->harq_processes[harq_pid]->C;r++)
for (int i=0;i<ulsch_ue[0]->harq_processes[harq_pid]->K>>3;i++) {
/*if ((ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]) != 0) printf("************");
printf("r %d: in[%d] %x, out[%d] %x (%x)\n",r,
i,ulsch_ue[0]->harq_processes[harq_pid]->c[r][i],
i,ulsch_gNB->harq_processes[harq_pid]->c[r][i],
ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]);*/
}
}
if (errors_decoding > 0 && error_flag == 0) {
n_false_positive++;
if (n_trials==1)
printf("\x1B[31m""[frame %d][trial %d]\tnumber of errors in decoding = %u\n" "\x1B[0m", frame, trial, errors_decoding);
}
roundStats[snrRun] += ((float)round);
if (!crc_status) effRate += ((float)TBS)/round;
} // trial loop
roundStats[snrRun]/=((float)n_trials);
effRate /= n_trials;
printf("*****************************************\n");
printf("SNR %f: n_errors (%d/%d,%d/%d,%d/%d,%d/%d) (negative CRC), false_positive %d/%d, errors_scrambling (%u/%u,%u/%u,%u/%u,%u/%u\n", SNR, n_errors[0], round_trials[0],n_errors[1], round_trials[1],n_errors[2], round_trials[2],n_errors[3], round_trials[3], n_false_positive, n_trials, errors_scrambling[0],available_bits*n_trials,errors_scrambling[1],available_bits*n_trials,errors_scrambling[2],available_bits*n_trials,errors_scrambling[3],available_bits*n_trials);
printf("\n");
printf("SNR %f: Channel BLER (%e,%e,%e,%e), Channel BER (%e,%e,%e,%e) Avg round %.2f, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %u bits/slot\n",
SNR,
(double)n_errors[0]/round_trials[0],
(double)n_errors[1]/round_trials[0],
(double)n_errors[2]/round_trials[0],
(double)n_errors[3]/round_trials[0],
(double)errors_scrambling[0]/available_bits/round_trials[0],
(double)errors_scrambling[1]/available_bits/round_trials[0],
(double)errors_scrambling[2]/available_bits/round_trials[0],
(double)errors_scrambling[3]/available_bits/round_trials[0],
roundStats[snrRun],effRate,effRate/TBS*100,TBS);
dump_pusch_stats(gNB);
printf("*****************************************\n");
printf("\n");
if (print_perf==1) {
printDistribution(&gNB->phy_proc_rx,table_rx,"Total PHY proc rx");
printStatIndent(&gNB->rx_pusch_stats,"RX PUSCH time");
printStatIndent2(&gNB->ulsch_channel_estimation_stats,"ULSCH channel estimation time");
printStatIndent2(&gNB->ulsch_ptrs_processing_stats,"ULSCH PTRS Processing time");
printStatIndent2(&gNB->ulsch_rbs_extraction_stats,"ULSCH rbs extraction time");
printStatIndent2(&gNB->ulsch_channel_compensation_stats,"ULSCH channel compensation time");
printStatIndent2(&gNB->ulsch_mrc_stats,"ULSCH mrc computation");
printStatIndent2(&gNB->ulsch_llr_stats,"ULSCH llr computation");
printStatIndent(&gNB->ulsch_unscrambling_stats,"ULSCH unscrambling");
printStatIndent(&gNB->ulsch_decoding_stats,"ULSCH total decoding time");
//printStatIndent2(&gNB->ulsch_deinterleaving_stats,"ULSCH deinterleaving");
//printStatIndent2(&gNB->ulsch_rate_unmatching_stats,"ULSCH rate matching rx");
//printStatIndent2(&gNB->ulsch_ldpc_decoding_stats,"ULSCH ldpc decoding");
printf("\n");
}
if(n_trials==1)
break;
if ((float)n_errors[0]/(float)n_trials <= target_error_rate) {
printf("*************\n");
printf("PUSCH test OK\n");
printf("*************\n");
break;
}
>>>>>>> fork_develop_new
snrRun++;
n_errs = n_errors[0];
} // SNR loop
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c
+7 -6
View File
@@ -51,16 +51,16 @@
void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->ttis_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->slots_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
frame_parms->p_tdd_UL_DL_Configuration->nrofUplinkSlots, frame_parms->p_tdd_UL_DL_Configuration->dl_UL_TransmissionPeriodicity);
int k = (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int tti = 0;
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME; j++) {
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->slots_per_frame; j++) {
int frame = 0;
if (j != 0) {
frame = (frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/j;
tti = (j)%(frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME);
frame = j / frame_parms->slots_per_frame;
tti = j % frame_parms->slots_per_frame;
}
else {
frame = 0;
@@ -99,9 +99,10 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
*
*********************************************************************/
void set_tti_test(NR_DL_FRAME_PARMS *frame_parms, int ttis_per_subframe)
void set_tti_test(NR_DL_FRAME_PARMS *frame_parms, int slots_per_subframe)
{
frame_parms->ttis_per_subframe = ttis_per_subframe;
frame_parms->slots_per_subframe = slots_per_subframe;
frame_parms->slots_per_frame = slots_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
/*******************************************************************
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c
+18 -14
View File
@@ -182,7 +182,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
/* set a tx slot with no ack */
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
printf("\n => Test : Error due to acknownlegment not set \n");
@@ -300,7 +300,7 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 2;
harq_status->ack = DL_ACK;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
printf("\n => Test : PUCCH format from common config in dedicated mode: two positive downlink ACKnowledgments \n");
@@ -567,7 +567,7 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 1;
harq_status->ack = DL_ACK;
@@ -586,7 +586,7 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -620,7 +620,7 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -684,7 +684,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -727,7 +727,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -761,7 +761,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -980,7 +980,7 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 1;
harq_status->ack = DL_ACK;
@@ -1019,7 +1019,7 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 2;
harq_status->ack = DL_ACK;
@@ -1094,7 +1094,7 @@ int test_csi_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *proc)
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 1;
harq_status->ack = DL_ACK;
@@ -1168,9 +1168,13 @@ int test_pucch(PHY_VARS_NR_UE *ue)
assert(0);
}
proc->frame_tx = 0;
proc->nr_tti_rx = 0;
proc->nr_tti_tx = (proc->nr_tti_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX)%(ue->frame_parms.ttis_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
proc->frame_rx = 0;
proc->nr_slot_rx = 0;
proc->nr_tti_rx = 0;
proc->frame_tx = proc->frame_rx + (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) / ue->frame_parms.slots_per_frame;
proc->nr_slot_tx = (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) % ue->frame_parms.slots_per_frame;
proc->nr_tti_tx = proc->nr_slot_tx % ue->frame_parms.slots_per_subframe;
init_pucch_power_configuration( ue, gNB_id);
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/srs_test.c
+5 -4
View File
@@ -223,12 +223,13 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
}
printf("srs period %d offset %d \n", srs_current_period, p_srs_resource->SRS_Offset);
int duration = (10 * srs_current_period)/(NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe);
int duration = (10 * srs_current_period) / frame_parms->slots_per_frame;
for (int frame_tx = 0; frame_tx < duration; frame_tx++) {
for (int slot_tx = 0; slot_tx < (NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe); slot_tx++) {
proc->frame_tx = frame_tx;
proc->nr_tti_tx = slot_tx;
for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) {
proc->frame_tx = frame_tx;
proc->nr_slot_tx = slot_tx;
proc->nr_tti_tx = slot_tx % frame_parms->slots_per_subframe;
if (ue_srs_procedure_nr( ue, proc, 0) == 0) {
printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx);
}
openair1/SIMULATION/TOOLS/phase_noise.c
+42
View File
@@ -0,0 +1,42 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#include "sim.h"
/* linear phase noise model */
void phase_noise(double ts, int16_t * InRe, int16_t * InIm)
{
double fd = 300;//0.01*30000
static double i=0;
double real, imag,x ,y;
i++;
real = cos(fd * 2 * M_PI * i * ts);
imag = sin (fd * 2 * M_PI * i * ts);
x = ((real * (double)InRe[0]) - (imag * (double)InIm[0])) ;
y= ((real * (double)InIm[0]) + (imag * (double)InRe[0])) ;
InRe[0]= (int16_t)(x);
InIm[0]= (int16_t)(y);
}
openair1/SIMULATION/TOOLS/sim.h
+8
View File
@@ -460,6 +460,14 @@ void init_channelmod(void) ;
double N_RB2sampling_rate(uint16_t N_RB);
double N_RB2channel_bandwidth(uint16_t N_RB);
/* Linear phase noise model */
/*!
\brief This function produce phase noise and add to input signal
\param ts Sampling time
\param *Re *Im Real and Imag part of the signal
*/
void phase_noise(double ts, int16_t * InRe, int16_t * InIm);
#include "targets/RT/USER/rfsim.h"
void do_DL_sig(sim_t *sim,