From 8756a561211396a4f770b34b2e35cfd2be731bfa Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 4 Mar 2021 17:48:10 +0100 Subject: [PATCH] tentative fix for scheduling multiple sib1 instances --- openair2/LAYER2/NR_MAC_COMMON/nr_mac.h | 2 + .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 39 ++++++++++++++----- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 3 +- 3 files changed, 32 insertions(+), 12 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index 10b31930de..67cf5051ef 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -36,6 +36,7 @@ #include #include #include +#include #define TABLE_38213_13_1_NUM_INDEXES 15 #define TABLE_38213_13_2_NUM_INDEXES 14 @@ -454,6 +455,7 @@ typedef struct Type0_PDCCH_CSS_config_s { uint32_t ssb_length; uint32_t ssb_index; uint32_t cset_start_rb; + bool active; } NR_Type0_PDCCH_CSS_config_t; #endif /*__LAYER2_MAC_H__ */ diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 6bd68b0300..f6b1797cb5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -159,8 +159,6 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, gNB_MAC_INST *gNB = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc; - gNB->num_css_config = 0; - nfapi_nr_dl_tti_request_t *dl_tti_request; nfapi_nr_dl_tti_request_body_t *dl_req; NR_MIB_t *mib = RC.nrrrc[module_idP]->carrier.mib.message.choice.mib; @@ -226,7 +224,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, schedule_ssb(scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1)); fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); if (get_softmodem_params()->sa == 1) { - get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[gNB->num_css_config], + get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb], frameP, mib, slots_per_frame, @@ -235,7 +233,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, FR1, i_ssb, offset_pointa); - gNB->num_css_config++; + gNB->type0_PDCCH_CSS_config[i_ssb].active = true; } } } @@ -251,7 +249,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, schedule_ssb(scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1)); fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); if (get_softmodem_params()->sa == 1) { - get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[gNB->num_css_config], + get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb], frameP, mib, slots_per_frame, @@ -260,7 +258,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, FR1, i_ssb, offset_pointa); - gNB->num_css_config++; + gNB->type0_PDCCH_CSS_config[i_ssb].active = true; } } } @@ -276,7 +274,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, schedule_ssb(scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1)); fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); if (get_softmodem_params()->sa == 1) { - get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[gNB->num_css_config], + get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb], frameP, mib, slots_per_frame, @@ -285,7 +283,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, FR2, i_ssb, offset_pointa); - gNB->num_css_config++; + gNB->type0_PDCCH_CSS_config[i_ssb].active = true; } } } @@ -559,11 +557,30 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) uint8_t mcs = 6; gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP]; + NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[CC_id].ServingCellConfigCommon; - for (int i=0; inum_css_config; i++) { + int L_max; + switch (scc->ssb_PositionsInBurst->present) { + case 1: + L_max = 4; + break; + case 2: + L_max = 8; + case 3: + L_max = 64; + default: + AssertFatal(0,"SSB bitmap size value %d undefined (allowed values 1,2,3)\n", + scc->ssb_PositionsInBurst->present); + } + + for (int i=0; itype0_PDCCH_CSS_config[i]; - if( (frameP%2 == type0_PDCCH_CSS_config->sfn_c) && (slotP == type0_PDCCH_CSS_config->n_0) && (type0_PDCCH_CSS_config->num_rbs > 0) ) { + + if((frameP%2 == type0_PDCCH_CSS_config->sfn_c) && + (slotP == type0_PDCCH_CSS_config->n_0) && + (type0_PDCCH_CSS_config->num_rbs > 0) && + (type0_PDCCH_CSS_config->active == true)) { LOG_D(MAC,"> SIB1 transmission\n"); @@ -610,6 +627,8 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) gNB_mac->TX_req[CC_id].Number_of_PDUs++; gNB_mac->TX_req[CC_id].SFN = frameP; gNB_mac->TX_req[CC_id].Slot = slotP; + + type0_PDCCH_CSS_config->active = false; } } } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 7485b3715b..7af7793801 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -603,8 +603,7 @@ typedef struct gNB_MAC_INST_s { NR_UE_sched_ctrl_t *sched_ctrlCommon; NR_CellGroupConfig_t *secondaryCellGroupCommon; - NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[3]; - uint8_t num_css_config; + NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[64]; } gNB_MAC_INST;