Merge remote-tracking branch 'origin/develop' into feature-21-TM7
Conflicts: cmake_targets/CMakeLists.txt openair1/PHY/INIT/lte_init.c openair1/PHY/INIT/lte_param_init.c openair1/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c openair1/PHY/LTE_ESTIMATION/lte_ue_measurements.c openair1/PHY/LTE_REFSIG/lte_dl_uespec.c openair1/PHY/LTE_TRANSPORT/dci.c openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c openair1/PHY/LTE_TRANSPORT/dlsch_modulation.c openair1/PHY/LTE_TRANSPORT/initial_sync.c openair1/PHY/LTE_TRANSPORT/pbch.c openair1/PHY/LTE_TRANSPORT/pilots.c openair1/PHY/LTE_TRANSPORT/pmch.c openair1/PHY/LTE_TRANSPORT/proto.h openair1/PHY/defs.h openair1/SCHED/phy_procedures_lte_eNb.c openair1/SCHED/phy_procedures_lte_ue.c openair1/SIMULATION/LTE_PHY/dlsim.c openair1/SIMULATION/LTE_PHY/mbmssim.c openair1/SIMULATION/LTE_PHY/pdcchsim.c openair1/SIMULATION/LTE_PHY/ulsim.c openair2/ENB_APP/enb_config.c openair2/RRC/LITE/rrc_eNB.c targets/ARCH/EXMIMO/USERSPACE/LIB/openair0_lib.c targets/RT/USER/lte-softmodem.c targets/RT/USER/lte-ue.c targets/RT/USER/sched_rx_pdsch.c targets/SIMU/USER/init_lte.c targets/SIMU/USER/oaisim_functions.c
This commit is contained in:
Florian Kaltenberger
+109
-109
@@ -1,31 +1,23 @@
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||||
/*******************************************************************************
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||||
OpenAirInterface
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||||
Copyright(c) 1999 - 2014 Eurecom
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||||
|
||||
OpenAirInterface is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
|
||||
OpenAirInterface is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with OpenAirInterface.The full GNU General Public License is
|
||||
included in this distribution in the file called "COPYING". If not,
|
||||
see <http://www.gnu.org/licenses/>.
|
||||
|
||||
Contact Information
|
||||
OpenAirInterface Admin: openair_admin@eurecom.fr
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||||
OpenAirInterface Tech : openair_tech@eurecom.fr
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||||
OpenAirInterface Dev : openair4g-devel@lists.eurecom.fr
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||||
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Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
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*******************************************************************************/
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||||
/*
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||||
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.0 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
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||||
* http://www.openairinterface.org/?page_id=698
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||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
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||||
*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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||||
* contact@openairinterface.org
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||||
*/
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/*! \file phy_mac_stub.c
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* \brief stimulates the phy without mac
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@@ -48,18 +40,18 @@
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#include "SCHED/phy_procedures_emos.h"
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#endif
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void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_eNB)
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void fill_dci(DCI_PDU *DCI_pdu,PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
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{
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//uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
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uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
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//uint8_t cooperation_flag = eNB->cooperation_flag;
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uint8_t transmission_mode = eNB->transmission_mode[0];
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uint32_t rballoc = 0x7FFF;
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//uint32_t rballoc2 = 0x000F;
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uint32_t rballoc_test = 0xFFFF;
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int subframe = phy_vars_eNB->proc[sched_subframe].subframe_tx;
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LTE_eNB_DLSCH_t *DLSCH_ptr = phy_vars_eNB->dlsch_eNB[0][0];
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int subframe = proc->subframe_tx;
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/*
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uint32_t rand = taus();
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@@ -82,14 +74,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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DCI_pdu->dci_alloc[0].format = format1A;
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DCI_pdu->dci_alloc[0].ra_flag = 0;
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switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
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switch (eNB->frame_parms.N_RB_DL) {
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case 6:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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if (eNB->frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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@@ -100,7 +92,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
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@@ -112,12 +104,12 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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case 25:
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default:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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if (eNB->frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_FDD_t;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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@@ -128,7 +120,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
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@@ -139,12 +131,12 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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break;
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case 50:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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if (eNB->frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_FDD_t;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(50,10,3);
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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@@ -166,12 +158,12 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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break;
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case 100:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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if (eNB->frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_FDD_t;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(100,10,3);
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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@@ -182,7 +174,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(100,10,3);
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->ndi = proc->frame_tx&1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
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@@ -226,16 +218,16 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
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if (transmission_mode<3 || transmission_mode == 7) {
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//user 1
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switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
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switch (eNB->frame_parms.N_RB_DL) {
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case 25:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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if (eNB->frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3);
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
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//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
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//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
|
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
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@@ -254,8 +246,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
|
||||
@@ -267,8 +259,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -286,8 +278,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -299,14 +291,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
|
||||
case 50:
|
||||
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
|
||||
if (eNB->frame_parms.frame_type == FDD) {
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_FDD_t;
|
||||
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -325,8 +317,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -339,8 +331,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -358,8 +350,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -370,20 +362,28 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
break;
|
||||
|
||||
case 100:
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
|
||||
if (eNB->frame_parms.frame_type == FDD) {
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_20MHz_FDD_t;
|
||||
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3);
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
||||
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_FDD_t));
|
||||
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = subframe/5;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
|
||||
/*
|
||||
//user2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
|
||||
@@ -396,8 +396,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -410,8 +410,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->frame%1024)%28);
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -429,8 +429,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = eNB->target_ue_dl_mcs;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0;
|
||||
@@ -452,14 +452,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = subframe / 5;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = eNB->target_ue_dl_mcs;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = subframe / 5;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = eNB->target_ue_dl_mcs;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = subframe % 5;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = eNB->ue_dl_rb_alloc;
|
||||
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
|
||||
|
||||
} else if (transmission_mode==5) {
|
||||
@@ -474,15 +474,15 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
|
||||
DLSCH_alloc_pdu1E.rv = 0;
|
||||
DLSCH_alloc_pdu1E.ndi = subframe / 5;
|
||||
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
|
||||
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[eNB->UE_stats->DL_cqi[0]];
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
|
||||
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
|
||||
DLSCH_alloc_pdu1E.mcs = eNB->target_ue_dl_mcs;
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((eNB->proc[subframe].frame%1024)%28);
|
||||
eNB->UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
|
||||
DLSCH_alloc_pdu1E.harq_pid = subframe % 5;
|
||||
DLSCH_alloc_pdu1E.dai = 0;
|
||||
DLSCH_alloc_pdu1E.TPC = 0;
|
||||
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu1E.rballoc = eNB->ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu1E.rah = 0;
|
||||
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
@@ -493,16 +493,16 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
//DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//DLSCH_alloc_pdu1E.mcs = eNB->target_ue_dl_mcs;
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28);
|
||||
phy_vars_eNB->eNB_UE_stats[1].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((eNB->frame%1024)%28);
|
||||
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((proc->frame_tx%1024)/3)%28);
|
||||
eNB->UE_stats[1].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
|
||||
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
|
||||
// set the precoder of the second UE orthogonal to the first
|
||||
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
|
||||
eNB->UE_stats[1].DL_pmi_single = (eNB->UE_stats[0].DL_pmi_single ^ 0x1555);
|
||||
}
|
||||
|
||||
break; //subframe switch
|
||||
@@ -533,7 +533,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
DCI_pdu->Num_ue_spec_dci = 1;
|
||||
|
||||
//user 1
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD)
|
||||
if (eNB->frame_parms.frame_type == FDD)
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_FDD_t ;
|
||||
else
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
|
||||
@@ -545,9 +545,9 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2,eNB->ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = eNB->target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = proc->frame_tx&1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
UL_alloc_pdu.cshift = 0;
|
||||
UL_alloc_pdu.dai = 0;
|
||||
@@ -565,11 +565,11 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
if (cooperation_flag==0)
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2+eNB->ue_ul_nb_rb,eNB->ue_ul_nb_rb);
|
||||
else
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,eNB->ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = eNB->target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = proc->frame_tx&1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
if ((cooperation_flag==0) || (cooperation_flag==1))
|
||||
UL_alloc_pdu.cshift = 0;
|
||||
@@ -594,11 +594,11 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
|
||||
*/
|
||||
}
|
||||
|
||||
void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eNB)
|
||||
void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *eNB)
|
||||
{
|
||||
|
||||
//uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
|
||||
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
|
||||
//uint8_t cooperation_flag = eNB->cooperation_flag;
|
||||
uint8_t transmission_mode = eNB->transmission_mode[0];
|
||||
|
||||
//uint32_t rballoc = 0x00F0;
|
||||
//uint32_t rballoc2 = 0x000F;
|
||||
@@ -625,11 +625,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
|
||||
DCI_pdu->dci_alloc[0].format = format1;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 0;
|
||||
|
||||
DLSCH_alloc_pdu.rballoc = openair_daq_vars.ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu.rballoc = eNB->ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu.TPC = 0;
|
||||
DLSCH_alloc_pdu.dai = 0;
|
||||
DLSCH_alloc_pdu.harq_pid = 1;
|
||||
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu.mcs = eNB->target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu.ndi = 1;
|
||||
DLSCH_alloc_pdu.rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
|
||||
@@ -646,7 +646,7 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
|
||||
DLSCH_alloc_pdu.TPC = 0;
|
||||
DLSCH_alloc_pdu.dai = 0;
|
||||
DLSCH_alloc_pdu.harq_pid = 1;
|
||||
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu.mcs = eNB->target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu.ndi = 1;
|
||||
DLSCH_alloc_pdu.rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
|
||||
@@ -663,11 +663,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
|
||||
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
|
||||
DLSCH_alloc_pdu1E.rv = 0;
|
||||
DLSCH_alloc_pdu1E.ndi = 1;
|
||||
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu1E.mcs = eNB->target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu1E.harq_pid = 1;
|
||||
DLSCH_alloc_pdu1E.dai = 0;
|
||||
DLSCH_alloc_pdu1E.TPC = 0;
|
||||
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu1E.rballoc = eNB->ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu1E.rah = 0;
|
||||
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
@@ -682,7 +682,7 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
|
||||
// set the precoder of the second UE orthogonal to the first
|
||||
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
|
||||
eNB->UE_stats[1].DL_pmi_single = (eNB->UE_stats[0].DL_pmi_single ^ 0x1555);
|
||||
}
|
||||
|
||||
break;
|
||||
@@ -719,8 +719,8 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
|
||||
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,eNB->ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = eNB->target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = 1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
UL_alloc_pdu.cshift = 0;
|
||||
@@ -739,10 +739,10 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
if (cooperation_flag==0)
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2+eNB->ue_ul_nb_rb,eNB->ue_ul_nb_rb);
|
||||
else
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,eNB->ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = eNB->target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = 1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
if ((cooperation_flag==0) || (cooperation_flag==1))
|
||||
|
||||
Reference in New Issue
Block a user