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Fix FAPI CoreSetType enumeration options after the fix on the description made by SCF

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SCF FAPI 222.10.02 had a bug on the description of CoreSetType:
0: CORESET is configured by the PBCH or SIB1
(subcarrier 0 of CRB0 for DMRS mapping)
1: otherwise (subcarrier 0 of CORESET)

That was fixed in SCF 222.10.04:
0: CORESET is configured by the PBCH or SIB1
(subcarrier 0 of the CORESET)
1: otherwise (subcarrier 0 of CRB0 for DMRS mapping)

That wrong description created a misunderstanding, to overcome it we "wrongly" added a third value. This commit fixes that and aligns the CoreSetType with FAPI 222.10.04
This commit is contained in:
luis_pereira87
2024-01-04 09:32:18 +00:00
parent c37974ca5f
commit 87e8ba0ba1
7 changed files with 6 additions and 13 deletions
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nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
-1
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@@ -286,7 +286,6 @@ typedef enum {
typedef enum {
NFAPI_NR_CSET_CONFIG_MIB_SIB1=0,
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG, // implicit assumption of coreset Id other than 0
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0
} nfapi_nr_coreset_config_type_e;
typedef enum {