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Fix FAPI CoreSetType enumeration options after the fix on the description made by SCF

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SCF FAPI 222.10.02 had a bug on the description of CoreSetType:
0: CORESET is configured by the PBCH or SIB1
(subcarrier 0 of CRB0 for DMRS mapping)
1: otherwise (subcarrier 0 of CORESET)

That was fixed in SCF 222.10.04:
0: CORESET is configured by the PBCH or SIB1
(subcarrier 0 of the CORESET)
1: otherwise (subcarrier 0 of CRB0 for DMRS mapping)

That wrong description created a misunderstanding, to overcome it we "wrongly" added a third value. This commit fixes that and aligns the CoreSetType with FAPI 222.10.04
This commit is contained in:
luis_pereira87
2024-01-04 09:32:18 +00:00
parent c37974ca5f
commit 87e8ba0ba1
7 changed files with 6 additions and 13 deletions
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openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+1 -1
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@@ -2345,7 +2345,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
ul_dci_req->numPdus += 1;
nr_configure_pdcch(pdcch_pdu, coreset, false, &sched_ctrl->sched_pdcch);
nr_configure_pdcch(pdcch_pdu, coreset, &sched_ctrl->sched_pdcch);
pdcch_pdu_coreset[coresetid] = pdcch_pdu;
}