Merge remote-tracking branch 'origin/develop' into NR_DL_TBSLBRM

This commit is contained in:
francescomani
2022-04-12 09:55:57 +02:00
51 changed files with 744 additions and 544 deletions
+28 -22
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@@ -757,9 +757,13 @@ class Containerize():
cmd = 'cd ' + self.yamlPath[0] + ' && docker-compose -f docker-compose-ci.yml config | grep com.docker.network.bridge.name | sed -e "s@^.*name: @@"' cmd = 'cd ' + self.yamlPath[0] + ' && docker-compose -f docker-compose-ci.yml config | grep com.docker.network.bridge.name | sed -e "s@^.*name: @@"'
networkNames = subprocess.check_output(cmd, shell=True, stderr=subprocess.STDOUT, universal_newlines=True, timeout=10) networkNames = subprocess.check_output(cmd, shell=True, stderr=subprocess.STDOUT, universal_newlines=True, timeout=10)
if re.search('4g.*rfsimulator', self.yamlPath[0]) is not None: if re.search('4g.*rfsimulator', self.yamlPath[0]) is not None:
# Excluding any traffic from LTE-UE container (192.168.61.30)
# From the trf-gen, keeping only PING traffic
cmd = 'sudo nohup tshark -f "(host 192.168.61.11 and icmp) or (not host 192.168.61.11 and not host 192.168.61.30 and not arp and not port 53 and not port 2152)"' cmd = 'sudo nohup tshark -f "(host 192.168.61.11 and icmp) or (not host 192.168.61.11 and not host 192.168.61.30 and not arp and not port 53 and not port 2152)"'
elif re.search('5g.*rfsimulator', self.yamlPath[0]) is not None: elif re.search('5g.*rfsimulator', self.yamlPath[0]) is not None:
cmd = 'sudo nohup tshark -f "(host 192.168.72.135 and icmp) or (not host 192.168.72.135 and not host 192.168.71.150 and not arp and not port 53 and not port 2152 and not port 2153)"' # Excluding any traffic from NR-UE containers (192.168.71.150 and 192.168.71.151)
# From the ext-dn, keeping only PING traffic
cmd = 'sudo nohup tshark -f "(host 192.168.72.135 and icmp) or (not host 192.168.72.135 and not host 192.168.71.150 and not host 192.168.71.151 and not arp and not port 53 and not port 2152 and not port 2153)"'
elif re.search('5g_l2sim', self.yamlPath[0]) is not None: elif re.search('5g_l2sim', self.yamlPath[0]) is not None:
cmd = 'sudo nohup tshark -f "(host 192.168.72.135 and icmp) or (not host 192.168.72.135 and not arp and not port 53 and not port 2152 and not port 2153)"' cmd = 'sudo nohup tshark -f "(host 192.168.72.135 and icmp) or (not host 192.168.72.135 and not arp and not port 53 and not port 2152 and not port 2153)"'
else: else:
@@ -817,46 +821,48 @@ class Containerize():
# Analyzing log file(s)! # Analyzing log file(s)!
listOfPossibleRanContainers = ['enb', 'gnb', 'cu', 'du'] listOfPossibleRanContainers = ['enb', 'gnb', 'cu', 'du']
for container in listOfPossibleRanContainers: for container in listOfPossibleRanContainers:
filename = self.yamlPath[0] + '/*-oai-' + container + '.log' filenames = self.yamlPath[0] + '/*-oai-' + container + '.log'
cmd = 'ls ' + filename cmd = 'ls ' + filenames
containerStatus = True containerStatus = True
try: try:
lsStatus = subprocess.check_output(cmd, shell=True, stderr=subprocess.STDOUT, universal_newlines=True, timeout=10) lsStatus = subprocess.check_output(cmd, shell=True, stderr=subprocess.STDOUT, universal_newlines=True, timeout=10)
filename = str(lsStatus).strip() filenames = str(lsStatus).strip()
except: except:
containerStatus = False containerStatus = False
if not containerStatus: if not containerStatus:
continue continue
logging.debug('\u001B[1m Analyzing xNB logfile ' + filename + ' \u001B[0m') for filename in filenames.split('\n'):
logStatus = RAN.AnalyzeLogFile_eNB(filename, HTML, self.ran_checkers) logging.debug('\u001B[1m Analyzing xNB logfile ' + filename + ' \u001B[0m')
if (logStatus < 0): logStatus = RAN.AnalyzeLogFile_eNB(filename, HTML, self.ran_checkers)
fullStatus = False if (logStatus < 0):
self.exitStatus = 1 fullStatus = False
HTML.CreateHtmlTestRow(RAN.runtime_stats, 'KO', logStatus) self.exitStatus = 1
else: HTML.CreateHtmlTestRow(RAN.runtime_stats, 'KO', logStatus)
HTML.CreateHtmlTestRow(RAN.runtime_stats, 'OK', CONST.ALL_PROCESSES_OK) else:
HTML.CreateHtmlTestRow(RAN.runtime_stats, 'OK', CONST.ALL_PROCESSES_OK)
listOfPossibleUeContainers = ['lte-ue*', 'nr-ue*'] listOfPossibleUeContainers = ['lte-ue*', 'nr-ue*']
for container in listOfPossibleUeContainers: for container in listOfPossibleUeContainers:
filename = self.yamlPath[0] + '/*-oai-' + container + '.log' filenames = self.yamlPath[0] + '/*-oai-' + container + '.log'
cmd = 'ls ' + filename cmd = 'ls ' + filenames
containerStatus = True containerStatus = True
try: try:
lsStatus = subprocess.check_output(cmd, shell=True, stderr=subprocess.STDOUT, universal_newlines=True, timeout=10) lsStatus = subprocess.check_output(cmd, shell=True, stderr=subprocess.STDOUT, universal_newlines=True, timeout=10)
filename = str(lsStatus).strip() filenames = str(lsStatus).strip()
except: except:
containerStatus = False containerStatus = False
if not containerStatus: if not containerStatus:
continue continue
logging.debug('\u001B[1m Analyzing UE logfile ' + filename + ' \u001B[0m') for filename in filenames.split('\n'):
logStatus = UE.AnalyzeLogFile_UE(filename, HTML, RAN) logging.debug('\u001B[1m Analyzing UE logfile ' + filename + ' \u001B[0m')
if (logStatus < 0): logStatus = UE.AnalyzeLogFile_UE(filename, HTML, RAN)
fullStatus = False if (logStatus < 0):
HTML.CreateHtmlTestRow('UE log Analysis', 'KO', logStatus) fullStatus = False
else: HTML.CreateHtmlTestRow('UE log Analysis', 'KO', logStatus)
HTML.CreateHtmlTestRow('UE log Analysis', 'OK', CONST.ALL_PROCESSES_OK) else:
HTML.CreateHtmlTestRow('UE log Analysis', 'OK', CONST.ALL_PROCESSES_OK)
cmd = 'rm ' + self.yamlPath[0] + '/*.log' cmd = 'rm ' + self.yamlPath[0] + '/*.log'
logging.debug(cmd) logging.debug(cmd)
-3
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@@ -45,10 +45,7 @@ gNBs =
remote_s_portc = 500; remote_s_portc = 500;
remote_s_portd = 2152; remote_s_portd = 2152;
ssb_SubcarrierOffset = 0; ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
min_rxtxtime = 6; min_rxtxtime = 6;
sib1_tda = 0;
pdcch_ConfigSIB1 = ( pdcch_ConfigSIB1 = (
{ {
-1
View File
@@ -38,7 +38,6 @@ gNBs =
ssb_SubcarrierOffset = 0; ssb_SubcarrierOffset = 0;
min_rxtxtime = 6; min_rxtxtime = 6;
sib1_tda = 0;
pdcch_ConfigSIB1 = ( pdcch_ConfigSIB1 = (
{ {
@@ -42,7 +42,6 @@ gNBs =
////////// Physical parameters: ////////// Physical parameters:
ssb_SubcarrierOffset = 0; ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 2; pusch_AntennaPorts = 2;
ul_prbblacklist = "51,52,53,54" ul_prbblacklist = "51,52,53,54"
do_SRS = 1; do_SRS = 1;
@@ -33,10 +33,7 @@ gNBs =
////////// Physical parameters: ////////// Physical parameters:
ssb_SubcarrierOffset = 0; ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
min_rxtxtime = 6; min_rxtxtime = 6;
sib1_tda = 0;
pdcch_ConfigSIB1 = ( pdcch_ConfigSIB1 = (
{ {
+11 -1
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@@ -997,8 +997,18 @@ class RANManagement():
for k in keys: for k in keys:
result = re.search(k, line) result = re.search(k, line)
if result is not None: if result is not None:
ue_prefix = 'ue0'
ue_res = re.search('UE ID 1|UE 1:', line)
if ue_res is not None:
ue_prefix = 'ue1'
ue_res = re.search('UE ID 2|UE 2:', line)
if ue_res is not None:
ue_prefix = 'ue2'
ue_res = re.search('UE ID 3|UE 3:', line)
if ue_res is not None:
ue_prefix = 'ue3'
#remove 1- all useless char before relevant info (ulsch or dlsch) 2- trailing char #remove 1- all useless char before relevant info (ulsch or dlsch) 2- trailing char
dlsch_ulsch_stats[k]=re.sub(r'^.*\]\s+', r'' , line.rstrip()) dlsch_ulsch_stats[ue_prefix+k]=re.sub(r'^.*\]\s+', r'' , line.rstrip())
result = re.search('Received NR_RRCReconfigurationComplete from UE', str(line)) result = re.search('Received NR_RRCReconfigurationComplete from UE', str(line))
if result is not None: if result is not None:
@@ -31,8 +31,11 @@
000001 000001
000002 000002
000003 000003
000004
020001 020001
020002 020002
020003
020004
030001 030001
030002 030002
100001 100001
@@ -71,6 +74,14 @@
<nb_healthy>8</nb_healthy> <nb_healthy>8</nb_healthy>
</testCase> </testCase>
<testCase id="000004">
<class>DeployGenObject</class>
<desc>Deploy Second OAI 5G NR-UE RF sim SA</desc>
<yaml_path>yaml_files/5g_rfsimulator</yaml_path>
<services>oai-nr-ue2</services>
<nb_healthy>9</nb_healthy>
</testCase>
<testCase id="020001"> <testCase id="020001">
<class>PingFromContainer</class> <class>PingFromContainer</class>
<desc>Ping ext-dn from NR-UE</desc> <desc>Ping ext-dn from NR-UE</desc>
@@ -87,6 +98,22 @@
<loss_threshold>5</loss_threshold> <loss_threshold>5</loss_threshold>
</testCase> </testCase>
<testCase id="020003">
<class>PingFromContainer</class>
<desc>Ping ext-dn from Second NR-UE</desc>
<container_name>rfsim5g-oai-nr-ue2</container_name>
<options>-I oaitun_ue1 -c 20 192.168.72.135</options>
<loss_threshold>5</loss_threshold>
</testCase>
<testCase id="020004">
<class>PingFromContainer</class>
<desc>Ping Second NR-UE from ext-dn</desc>
<container_name>rfsim5g-oai-ext-dn</container_name>
<options>-c 20 12.1.1.3</options>
<loss_threshold>5</loss_threshold>
</testCase>
<testCase id="030001"> <testCase id="030001">
<class>IperfFromContainer</class> <class>IperfFromContainer</class>
<desc>Iperf UDP Downlink</desc> <desc>Iperf UDP Downlink</desc>
+1
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@@ -1868,6 +1868,7 @@ set(NR_L2_SRC_UE
${NR_RRC_DIR}/nr_rrc_config.c ${NR_RRC_DIR}/nr_rrc_config.c
${NR_UE_RRC_DIR}/rrc_UE.c ${NR_UE_RRC_DIR}/rrc_UE.c
${NR_UE_RRC_DIR}/rrc_nsa.c ${NR_UE_RRC_DIR}/rrc_nsa.c
${NR_RRC_DIR}/nr_rrc_config.c
) )
set (MAC_SRC set (MAC_SRC
@@ -465,6 +465,8 @@ typedef struct {
/// MCS table for this DLSCH /// MCS table for this DLSCH
uint8_t mcs_table; uint8_t mcs_table;
uint32_t tbslbrm; uint32_t tbslbrm;
uint8_t nscid;
uint16_t dlDmrsScramblingId;
uint16_t pduBitmap; uint16_t pduBitmap;
} fapi_nr_dl_config_dlsch_pdu_rel15_t; } fapi_nr_dl_config_dlsch_pdu_rel15_t;
+24 -20
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@@ -536,6 +536,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
} }
nr_generate_modulation_table(); nr_generate_modulation_table();
gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value); nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver); nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
@@ -549,28 +550,30 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **)); pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot); AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *)); pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<nb_codewords; q++) { for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t)); pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q); AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
} }
} }
} }
nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) {
gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_init_pdsch_dmrs(gNB, nscid, cfg->cell_config.phy_cell_id.value);
}
//PUSCH DMRS init //PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(2*sizeof(uint32_t ***)); gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs; uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1; int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for(int nscid=0; nscid<2; nscid++) { for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **)); pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid); AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
@@ -585,9 +588,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
} }
} }
uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value}; for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]); gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_gold_pusch(gNB, &Nid_pusch[0]); nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
}
//CSI RS init //CSI RS init
gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **)); gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
@@ -607,6 +611,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
} }
} }
gNB->csi_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_csi_rs(gNB, cfg->cell_config.phy_cell_id.value); nr_init_csi_rs(gNB, cfg->cell_config.phy_cell_id.value);
for (int id=0; id<NUMBER_OF_NR_SRS_MAX; id++) { for (int id=0; id<NUMBER_OF_NR_SRS_MAX; id++) {
@@ -644,12 +649,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
common_vars->beam_id = (uint8_t **)malloc16(Ptx*sizeof(uint8_t*)); common_vars->beam_id = (uint8_t **)malloc16(Ptx*sizeof(uint8_t*));
for (i=0;i<Ptx;i++){ for (i=0;i<Ptx;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n", LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i], i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t)); fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t)); common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame); memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
} }
for (i=0;i<Prx;i++){ for (i=0;i<Prx;i++){
common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
@@ -740,10 +745,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pdcch_dmrs); free_and_zero(pdcch_dmrs);
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs; uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) { for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) { for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q = 0; q < nb_codewords; q++) for (int q = 0; q < NR_NB_NSCID; q++)
free_and_zero(pdsch_dmrs[slot][symb][q]); free_and_zero(pdsch_dmrs[slot][symb][q]);
free_and_zero(pdsch_dmrs[slot][symb]); free_and_zero(pdsch_dmrs[slot][symb]);
} }
@@ -771,7 +775,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(csi_rs); free_and_zero(csi_rs);
for (int id = 0; id < NUMBER_OF_NR_SRS_MAX; id++) { for (int id = 0; id < NUMBER_OF_NR_SRS_MAX; id++) {
for (int i = 0; i < Prx; i++){ for (int i = 0; i < Prx; i++) {
free_and_zero(gNB->nr_srs_info[id]->srs_received_signal[i]); free_and_zero(gNB->nr_srs_info[id]->srs_received_signal[i]);
free_and_zero(gNB->nr_srs_info[id]->srs_ls_estimated_channel[i]); free_and_zero(gNB->nr_srs_info[id]->srs_ls_estimated_channel[i]);
free_and_zero(gNB->nr_srs_info[id]->srs_estimated_channel_freq[i]); free_and_zero(gNB->nr_srs_info[id]->srs_estimated_channel_freq[i]);
+34 -29
View File
@@ -210,18 +210,21 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK) // ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1; int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
ue->nr_gold_pusch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **)); uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
for (slot=0; slot<fp->slots_per_frame; slot++) { for (slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *)); pusch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot); AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
for (symb=0; symb<fp->symbols_per_slot; symb++) { for (symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t)); pusch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) {
pusch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
}
} }
} }
@@ -298,24 +301,38 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **)); pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot); AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *)); pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<nb_codewords; q++) { for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t)); pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q); AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
} }
} }
} }
// DLSCH // DLSCH
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) { for (gNB_id = 0; gNB_id < ue->n_connected_gNB+1; gNB_id++) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdsch_vars[th_id][gNB_id] = (NR_UE_PDSCH *)malloc16_clear(sizeof(NR_UE_PDSCH)); ue->pdsch_vars[th_id][gNB_id] = (NR_UE_PDSCH *)malloc16_clear(sizeof(NR_UE_PDSCH));
} }
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
phy_init_nr_ue_PDSCH( ue->pdsch_vars[th_id][gNB_id], fp );
}
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
for (i=0; i<nb_codewords; i++) {
ue->pdsch_vars[th_id][gNB_id]->llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
for (i=0; i<NR_MAX_NB_LAYERS; i++) {
ue->pdsch_vars[th_id][gNB_id]->layer_llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
}
}
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdcch_vars[th_id][gNB_id] = (NR_UE_PDCCH *)malloc16_clear(sizeof(NR_UE_PDCCH)); ue->pdcch_vars[th_id][gNB_id] = (NR_UE_PDCCH *)malloc16_clear(sizeof(NR_UE_PDCCH));
} }
@@ -342,21 +359,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
ue->nr_srs_info->srs_estimated_channel_time_shifted[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t)); ue->nr_srs_info->srs_estimated_channel_time_shifted[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
} }
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
phy_init_nr_ue_PDSCH( ue->pdsch_vars[th_id][gNB_id], fp );
}
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
for (i=0; i<nb_codewords; i++) {
ue->pdsch_vars[th_id][gNB_id]->llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
for (i=0; i<NR_MAX_NB_LAYERS; i++) {
ue->pdsch_vars[th_id][gNB_id]->layer_llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
}
}
// 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE // 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdcch_vars[th_id][gNB_id]->llr = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) ); ue->pdcch_vars[th_id][gNB_id]->llr = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
@@ -424,6 +426,8 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
for (int slot = 0; slot < fp->slots_per_frame; slot++) { for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) { for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q=0; q<NR_NB_NSCID; q++)
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb][q]);
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]); free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]);
} }
free_and_zero(ue->nr_gold_pusch_dmrs[slot]); free_and_zero(ue->nr_gold_pusch_dmrs[slot]);
@@ -457,10 +461,9 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
} }
free_and_zero(ue->nr_gold_pdcch[0]); free_and_zero(ue->nr_gold_pdcch[0]);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int slot=0; slot<fp->slots_per_frame; slot++) { for (int slot=0; slot<fp->slots_per_frame; slot++) {
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
for (int q=0; q<nb_codewords; q++) for (int q=0; q<NR_NB_NSCID; q++)
free_and_zero(ue->nr_gold_pdsch[0][slot][symb][q]); free_and_zero(ue->nr_gold_pdsch[0][slot][symb][q]);
free_and_zero(ue->nr_gold_pdsch[0][slot][symb]); free_and_zero(ue->nr_gold_pdsch[0][slot][symb]);
} }
@@ -468,16 +471,18 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
} }
free_and_zero(ue->nr_gold_pdsch[0]); free_and_zero(ue->nr_gold_pdsch[0]);
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) { for (int gNB_id = 0; gNB_id < ue->n_connected_gNB+1; gNB_id++) {
// PDSCH // PDSCH
for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr_shifts); free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr_shifts);
free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream); free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream);
phy_term_nr_ue__PDSCH(ue->pdsch_vars[th_id][gNB_id], fp); phy_term_nr_ue__PDSCH(ue->pdsch_vars[th_id][gNB_id], fp);
free_and_zero(ue->pdsch_vars[th_id][gNB_id]); free_and_zero(ue->pdsch_vars[th_id][gNB_id]);
} }
}
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (int i = 0; i < fp->nb_antennas_rx; i++) { for (int i = 0; i < fp->nb_antennas_rx; i++) {
@@ -155,8 +155,6 @@ typedef struct {
uint8_t h[MAX_NUM_CHANNEL_BITS]; uint8_t h[MAX_NUM_CHANNEL_BITS];
/// Scrambled "b"-sequences (for definition see 36-211 V8.6 2009-03, p.14) /// Scrambled "b"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
uint8_t b_tilde[MAX_NUM_CHANNEL_BITS]; uint8_t b_tilde[MAX_NUM_CHANNEL_BITS];
/// Modulated "d"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
int32_t d[MAX_NUM_RE];
/// Transform-coded "z"-sequences (for definition see 36-211 V8.6 2009-03, p.14-15) /// Transform-coded "z"-sequences (for definition see 36-211 V8.6 2009-03, p.14-15)
int32_t z[MAX_NUM_RE]; int32_t z[MAX_NUM_RE];
/// "q" sequences for CQI/PMI (for definition see 36-212 V8.6 2009-03, p.27) /// "q" sequences for CQI/PMI (for definition see 36-212 V8.6 2009-03, p.27)
@@ -42,7 +42,7 @@
//#define DEBUG_ULSCH_MODULATION //#define DEBUG_ULSCH_MODULATION
void dft_lte(int32_t *z,int32_t *d, int32_t Msc_PUSCH, uint8_t Nsymb) void dft_lte(int32_t *z,struct complex16 *input, int32_t Msc_PUSCH, uint8_t Nsymb)
{ {
#if defined(__x86_64__) || defined(__i386__) #if defined(__x86_64__) || defined(__i386__)
@@ -66,7 +66,7 @@ void dft_lte(int32_t *z,int32_t *d, int32_t Msc_PUSCH, uint8_t Nsymb)
#endif #endif
// printf("Doing lte_dft for Msc_PUSCH %d\n",Msc_PUSCH); // printf("Doing lte_dft for Msc_PUSCH %d\n",Msc_PUSCH);
d0 = (uint32_t *)d; d0 = (uint32_t *)input;
d1 = d0+Msc_PUSCH; d1 = d0+Msc_PUSCH;
d2 = d1+Msc_PUSCH; d2 = d1+Msc_PUSCH;
d3 = d2+Msc_PUSCH; d3 = d2+Msc_PUSCH;
@@ -476,7 +476,8 @@ void ulsch_modulation(int32_t **txdataF,
// Modulation // Modulation
ulsch_Msymb = G/Q_m; ulsch_Msymb = G/Q_m;
/// Modulated "d"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
struct complex16 d[MAX_NUM_RE] __attribute__((aligned(32)));
if(ulsch->cooperation_flag == 2) if(ulsch->cooperation_flag == 2)
// For Distributed Alamouti Scheme in Collabrative Communication // For Distributed Alamouti Scheme in Collabrative Communication
{ {
@@ -488,14 +489,14 @@ void ulsch_modulation(int32_t **txdataF,
//UE1, -x1* //UE1, -x1*
((int16_t*)&ulsch->d[i])[0] = (ulsch->b_tilde[j] == 1) ? (gain_lin_QPSK) : -gain_lin_QPSK; d[i].r = (ulsch->b_tilde[j] == 1) ? (gain_lin_QPSK) : -gain_lin_QPSK;
((int16_t*)&ulsch->d[i])[1] = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK; d[i].i = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
// if (i<Msc_PUSCH) // if (i<Msc_PUSCH)
// printf("input %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]); // printf("input %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
// UE1, x0* // UE1, x0*
((int16_t*)&ulsch->d[i+1])[0] = (ulsch->b_tilde[j-2] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK; d[i+1].r = (ulsch->b_tilde[j-2] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
((int16_t*)&ulsch->d[i+1])[1] = (ulsch->b_tilde[j-1] == 1)? (gain_lin_QPSK) : -gain_lin_QPSK; d[i+1].i = (ulsch->b_tilde[j-1] == 1)? (gain_lin_QPSK) : -gain_lin_QPSK;
break; break;
@@ -521,8 +522,8 @@ void ulsch_modulation(int32_t **txdataF,
qam16_table_offset_im+=1; qam16_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15); d[i].r =-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15); d[i].i =(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
//UE1,x0* //UE1,x0*
qam16_table_offset_re = 0; qam16_table_offset_re = 0;
@@ -544,8 +545,8 @@ void ulsch_modulation(int32_t **txdataF,
// ((int16_t*)&ulsch->d[i+1])[0]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15); // ((int16_t*)&ulsch->d[i+1])[0]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
// ((int16_t*)&ulsch->d[i+1])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15); // ((int16_t*)&ulsch->d[i+1])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
((int16_t*)&ulsch->d[i+1])[0]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15); d[i+1].r=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
((int16_t*)&ulsch->d[i+1])[1]=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15); d[i+1].i=-(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
break; break;
@@ -578,8 +579,8 @@ void ulsch_modulation(int32_t **txdataF,
qam64_table_offset_im+=1; qam64_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15); d[i].r=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15); d[i].i=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
//UE1,x0* //UE1,x0*
qam64_table_offset_re = 0; qam64_table_offset_re = 0;
@@ -605,8 +606,8 @@ void ulsch_modulation(int32_t **txdataF,
qam64_table_offset_im+=1; qam64_table_offset_im+=1;
((int16_t*)&ulsch->d[i+1])[0]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15); d[i+1].r=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
((int16_t*)&ulsch->d[i+1])[1]=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15); d[i+1].i=-(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
break; break;
@@ -621,8 +622,8 @@ void ulsch_modulation(int32_t **txdataF,
case 2: case 2:
// TODO: this has to be updated!!! // TODO: this has to be updated!!!
((int16_t*)&ulsch->d[i])[0] = (ulsch->b_tilde[j] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK; d[i].r = (ulsch->b_tilde[j] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
((int16_t*)&ulsch->d[i])[1] = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK; d[i].i = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
// if (i<Msc_PUSCH) // if (i<Msc_PUSCH)
// printf("input %d/%d Msc_PUSCH %d (%p): %d,%d\n", i,Msymb,Msc_PUSCH,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]); // printf("input %d/%d Msc_PUSCH %d (%p): %d,%d\n", i,Msymb,Msc_PUSCH,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
@@ -646,8 +647,8 @@ void ulsch_modulation(int32_t **txdataF,
qam16_table_offset_im+=1; qam16_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15); d[i].r=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15); d[i].i=(int16_t)(((int32_t)amp*qam16_table[qam16_table_offset_im])>>15);
// printf("input(16qam) %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]); // printf("input(16qam) %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
break; break;
@@ -676,8 +677,8 @@ void ulsch_modulation(int32_t **txdataF,
qam64_table_offset_im+=1; qam64_table_offset_im+=1;
((int16_t*)&ulsch->d[i])[0]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15); d[i].r=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
((int16_t*)&ulsch->d[i])[1]=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15); d[i].i=(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
break; break;
@@ -688,7 +689,7 @@ void ulsch_modulation(int32_t **txdataF,
// Transform Precoding // Transform Precoding
dft_lte(ulsch->z,ulsch->d,Msc_PUSCH,ulsch->Nsymb_pusch); dft_lte(ulsch->z,d,Msc_PUSCH,ulsch->Nsymb_pusch);
DevAssert(txdataF); DevAssert(txdataF);
+1 -1
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@@ -91,7 +91,7 @@ int slot_fep(PHY_VARS_UE *ue,
} }
// subframe_offset_F = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_tti * (Ns>>1); // subframe_offset_F = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_tti * (Ns>>1);
if (l<0 || l>=7-frame_parms->Ncp) { if (l<0 || l>=7-frame_parms->Ncp) {
printf("slot_fep: l must be between 0 and %d\n",7-frame_parms->Ncp); printf("slot_fep: l must be between 0 and %d\n",7-frame_parms->Ncp);
return(-1); return(-1);
@@ -165,6 +165,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------// //------------------generate DMRS------------------//
if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
// transform precoding = 1 means disabled // transform precoding = 1 means disabled
if (pusch_pdu->transform_precoding == 1) { if (pusch_pdu->transform_precoding == 1) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
@@ -1247,4 +1252,4 @@ int nr_srs_channel_estimation(PHY_VARS_gNB *gNB,
#endif #endif
return 0; return 0;
} }
+19 -29
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@@ -78,57 +78,47 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
} }
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid) void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid) {
{
uint32_t x1, x2; uint32_t x1, x2;
uint8_t reset; uint8_t reset;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs; uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1; int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
uint16_t N_n_scid[2]={Nid, Nid};
uint8_t n_scid=0; // again works only for 1_0
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) { for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) { for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1; reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid)); x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) +((Nid<<1)+nscid));
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, N_n_scid %d,n_scid %d\n",slot,symb,x2,N_n_scid[n_scid],n_scid); LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, Nid %d,nscid %d\n",slot,symb,x2,Nid,nscid);
for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) { for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset); pdsch_dmrs[slot][symb][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0; reset = 0;
} }
if(nb_codewords>1)
memcpy(pdsch_dmrs[slot][symb][1],pdsch_dmrs[slot][symb][0],sizeof(uint32_t)*pdsch_dmrs_init_length);
} }
} }
} }
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) { void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid) {
unsigned char ns; unsigned char ns;
unsigned int n,x1,x2; unsigned int n,x1,x2;
int nscid, reset; int reset;
unsigned int nid;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
unsigned short l; unsigned short l;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1; int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for (nscid=0; nscid<2; nscid++) { for (ns=0; ns<fp->slots_per_frame; ns++) {
nid = Nid[nscid]; for (l=0; l<fp->symbols_per_slot; l++) {
for (ns=0; ns<fp->slots_per_frame; ns++) { reset = 1;
for (l=0; l<fp->symbols_per_slot; l++) { x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
reset = 1; LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
for (n=0; n<pusch_dmrs_init_length; n++) { for (n=0; n<pusch_dmrs_init_length; n++) {
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset); gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0; reset = 0;
}
} }
} }
} }
+16 -24
View File
@@ -76,46 +76,38 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
} }
void nr_gold_pdsch(PHY_VARS_NR_UE* ue, void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short *n_idDMRS) int nscid,
{ uint32_t nid) {
unsigned int x1,x2,x2tmp0; unsigned int x1,x2,x2tmp0;
unsigned int nid;
uint8_t reset; uint8_t reset;
int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL*12)>>5)+1; int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL*12)>>5)+1;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
/// to be updated from higher layer
//unsigned short lbar = 0;
for (int nscid=0; nscid<nb_codewords; nscid++) { for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
nid = n_idDMRS[nscid]; for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) { reset = 1;
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
reset = 1; for (int n=0; n<pdsch_dmrs_init_length; n++) {
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17; ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit reset = 0;
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
for (int n=0; n<pdsch_dmrs_init_length; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
} }
} }
} }
} }
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t *N_n_scid, uint16_t N_n_scid,
uint8_t n_scid) uint8_t n_scid)
{ {
uint32_t x1, x2, n; uint32_t x1, x2, n;
uint8_t reset, slot, symb; uint8_t reset, slot, symb;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms; NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs; uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1; int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for (slot=0; slot<fp->slots_per_frame; slot++) { for (slot=0; slot<fp->slots_per_frame; slot++) {
@@ -123,10 +115,10 @@ void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
for (symb=0; symb<fp->symbols_per_slot; symb++) { for (symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1; reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid)); x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid<<1)+1) +((N_n_scid<<1)+n_scid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",slot,symb,x2);
for (n=0; n<pusch_dmrs_init_length; n++) { for (n=0; n<pusch_dmrs_init_length; n++) {
pusch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset); pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0; reset = 0;
} }
} }
+2 -2
View File
@@ -37,10 +37,10 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID @param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
*/ */
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid); void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid); void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid); void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid); void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB, int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns, unsigned int Ns,
+3 -2
View File
@@ -61,10 +61,11 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short n_idDMRS); unsigned short n_idDMRS);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue, void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short *n_idDMRS); int nscid,
uint32_t nid);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t *N_n_scid, uint16_t N_n_scid,
uint8_t n_scid); uint8_t n_scid);
#endif #endif
+4 -15
View File
@@ -30,7 +30,6 @@
void nr_generate_csi_rs(PHY_VARS_gNB *gNB, void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp, int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params, nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot){ int slot){
NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms; NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms;
@@ -52,20 +51,10 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n"); AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
// pre-computed for scrambling id equel to cell id // if the scrambling id is not the one previously used to initialize we need to re-initialize the rs
// if the scrambling id is not the cell id we need to re-initialize the rs if (csi_params.scramb_id != gNB->csi_gold_init) {
if (csi_params.scramb_id != cell_id) { gNB->csi_gold_init = csi_params.scramb_id;
uint8_t reset; nr_init_csi_rs(gNB, csi_params.scramb_id);
uint32_t x1, x2;
uint32_t Nid = csi_params.scramb_id;
for (uint8_t symb=0; symb<frame_parms.symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<10) * (frame_parms.symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<(csi_rs_length>>5)+1; n++) {
gold_csi_rs[symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
} }
switch (csi_params.row) { switch (csi_params.row) {
+22 -13
View File
@@ -66,11 +66,12 @@ void nr_pdcch_scrambling(uint32_t *in,
} }
} }
void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, void nr_generate_dci(PHY_VARS_gNB *gNB,
uint32_t **gold_pdcch_dmrs, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) { NR_DL_FRAME_PARMS *frame_parms,
int slot) {
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
uint16_t cset_start_sc; uint16_t cset_start_sc;
@@ -81,7 +82,7 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int rb_offset; int rb_offset;
int n_rb; int n_rb;
// compute rb_offset and n_prb based on frequency allocation // compute rb_offset and n_prb based on frequency allocation
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL]; nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15); nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15);
@@ -95,6 +96,13 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
* in time: by its first slot and its first symbol*/ * in time: by its first slot and its first symbol*/
const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d]; const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
gNB->pdcch_gold_init = dci_pdu->ScramblingId;
nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
}
uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex; cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols; cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
dci_idx = 0; dci_idx = 0;
@@ -104,8 +112,8 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE) uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE) uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n", LOG_D(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n",
rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType, rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits); dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
/// DMRS QPSK modulation /// DMRS QPSK modulation
@@ -115,10 +123,10 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
#ifdef DEBUG_PDCCH_DMRS #ifdef DEBUG_PDCCH_DMRS
if(dci_pdu->RNTI!=0xFFFF) { if(dci_pdu->RNTI!=0xFFFF) {
for (int i=0; i<dmrs_length>>1; i++) for (int i=0; i<dmrs_length>>1; i++)
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i, printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] ); &gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
} }
#endif #endif
} }
@@ -248,15 +256,16 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
} }
void nr_generate_dci_top(processingData_L1tx_t *msgTx, void nr_generate_dci_top(processingData_L1tx_t *msgTx,
uint32_t **gold_pdcch_dmrs, int slot,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) { NR_DL_FRAME_PARMS *frame_parms) {
for (int i=0; i<msgTx->num_ul_pdcch; i++) for (int i=0; i<msgTx->num_ul_pdcch; i++)
nr_generate_dci(&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); nr_generate_dci(msgTx->gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
for (int i=0; i<msgTx->num_dl_pdcch; i++) for (int i=0; i<msgTx->num_dl_pdcch; i++)
nr_generate_dci(&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); nr_generate_dci(msgTx->gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
} }
+1 -1
View File
@@ -30,7 +30,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
uint16_t N_RB); uint16_t N_RB);
void nr_generate_dci_top(processingData_L1tx_t *msgTx, void nr_generate_dci_top(processingData_L1tx_t *msgTx,
uint32_t **gold_pdcch_dmrs, int slot,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
+47 -45
View File
@@ -58,7 +58,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
PHY_VARS_gNB *gNB = msgTx->gNB; PHY_VARS_gNB *gNB = msgTx->gNB;
NR_gNB_DLSCH_t *dlsch; NR_gNB_DLSCH_t *dlsch;
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
int32_t** txdataF = gNB->common_vars.txdataF; int32_t** txdataF = gNB->common_vars.txdataF;
int16_t amp = AMP; int16_t amp = AMP;
int xOverhead = 0; int xOverhead = 0;
@@ -93,12 +92,17 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
} }
n_dmrs = (rel15->BWPStart+rel15->rbStart+rel15->rbSize)*nb_re_dmrs; n_dmrs = (rel15->BWPStart+rel15->rbStart+rel15->rbSize)*nb_re_dmrs;
if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) {
gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId;
nr_init_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId);
}
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
uint16_t dmrs_symbol_map = rel15->dlDmrsSymbPos;//single DMRS: 010000100 Double DMRS 110001100 uint16_t dmrs_symbol_map = rel15->dlDmrsSymbPos;//single DMRS: 010000100 Double DMRS 110001100
uint8_t dmrs_len = get_num_dmrs(rel15->dlDmrsSymbPos); uint8_t dmrs_len = get_num_dmrs(rel15->dlDmrsSymbPos);
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers; uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
uint8_t Qm = rel15->qamModOrder[0]; uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm; uint32_t encoded_length = nb_re*Qm;
uint32_t scrambled_output[rel15->NrOfCodewords][(encoded_length>>5)+1];
int16_t mod_dmrs[n_dmrs<<1] __attribute__ ((aligned(16))); int16_t mod_dmrs[n_dmrs<<1] __attribute__ ((aligned(16)));
/* PTRS */ /* PTRS */
@@ -147,63 +151,61 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
printf("\n"); printf("\n");
#endif #endif
/// scrambling
start_meas(dlsch_scrambling_stats);
for (int q=0; q<rel15->NrOfCodewords; q++) { for (int q=0; q<rel15->NrOfCodewords; q++) {
memset((void*)scrambled_output[q], 0, ((encoded_length>>5)+1)*sizeof(uint32_t)); /// scrambling
start_meas(dlsch_scrambling_stats);
uint32_t scrambled_output[(encoded_length>>5)+4]; // modulator acces by 4 bytes in some cases
memset(scrambled_output, 0, sizeof(scrambled_output));
if ( encoded_length > rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * Qm * rel15->nrOfLayers) abort();
nr_pdsch_codeword_scrambling(output, nr_pdsch_codeword_scrambling(output,
encoded_length, encoded_length,
q, q,
rel15->dataScramblingId, rel15->dataScramblingId,
rel15->rnti, rel15->rnti,
scrambled_output[q]); scrambled_output);
}
stop_meas(dlsch_scrambling_stats);
#ifdef DEBUG_DLSCH #ifdef DEBUG_DLSCH
printf("PDSCH scrambling:\n"); printf("PDSCH scrambling:\n");
for (int i=0; i<encoded_length>>8; i++) { for (int i=0; i<encoded_length>>8; i++) {
for (int j=0; j<8; j++) for (int j=0; j<8; j++)
printf("0x%08x\t", scrambled_output[0][(i<<3)+j]); printf("0x%08x\t", scrambled_output[(i<<3)+j]);
printf("\n"); printf("\n");
}
#endif
/// Modulation
start_meas(dlsch_modulation_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 1);
for (int q=0; q<rel15->NrOfCodewords; q++)
nr_modulation(scrambled_output[q],
encoded_length,
Qm,
mod_symbs[q]);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 0);
stop_meas(dlsch_modulation_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
for (int i=0; i<nb_re>>3; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_symbs[0][((i<<3)+j)<<1], mod_symbs[0][(((i<<3)+j)<<1)+1]);
} }
printf("\n");
}
#endif #endif
stop_meas(dlsch_scrambling_stats);
/// Modulation
start_meas(dlsch_modulation_stats);
nr_modulation(scrambled_output,
encoded_length,
Qm,
mod_symbs[q]);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 0);
stop_meas(dlsch_modulation_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
for (int i=0; i<nb_re>>3; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_symbs[0][((i<<3)+j)<<1], mod_symbs[0][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
}
start_meas(&gNB->dlsch_layer_mapping_stats); start_meas(&gNB->dlsch_layer_mapping_stats);
/// Layer mapping /// Layer mapping
nr_layer_mapping(mod_symbs, nr_layer_mapping(mod_symbs,
rel15->nrOfLayers, rel15->nrOfLayers,
nb_re, nb_re,
tx_layers); tx_layers);
#ifdef DEBUG_DLSCH #ifdef DEBUG_DLSCH
printf("Layer mapping (%d layers):\n", rel15->nrOfLayers); printf("Layer mapping (%d layers):\n", rel15->nrOfLayers);
for (int l=0; l<rel15->nrOfLayers; l++) for (int l=0; l<rel15->nrOfLayers; l++)
for (int i=0; i<(nb_re/rel15->nrOfLayers)>>3; i++) { for (int i=0; i<(nb_re/rel15->nrOfLayers)>>3; i++) {
printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7); printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7);
for (int j=0; j<8; j++) { for (int j=0; j<8; j++) {
printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]); printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
} }
printf("\n"); printf("\n");
} }
#endif #endif
@@ -222,7 +224,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
#ifdef DEBUG_DLSCH_MAPPING #ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n", printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers); start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
#endif #endif
start_meas(&gNB->dlsch_resource_mapping_stats); start_meas(&gNB->dlsch_resource_mapping_stats);
@@ -275,7 +277,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
l_prime = 0; l_prime = 0;
} }
/// DMRS QPSK modulation /// DMRS QPSK modulation
nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated nr_modulation(pdsch_dmrs[l][rel15->SCID], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH #ifdef DEBUG_DLSCH
printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs, dmrs_Type); printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs, dmrs_Type);
@@ -296,7 +298,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
if(ptrs_symbol) { if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */ /* PTRS QPSK Modulation for each OFDM symbol in a slot */
LOG_D(PHY,"Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs); LOG_D(PHY,"Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs); nr_modulation(pdsch_dmrs[l][rel15->SCID], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
} }
} }
uint16_t k = start_sc; uint16_t k = start_sc;
@@ -338,7 +338,6 @@ uint8_t get_nr_prach_duration(uint8_t prach_format);
void nr_generate_csi_rs(PHY_VARS_gNB *gNB, void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp, int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params, nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot); int slot);
void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id); void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id);
@@ -466,6 +466,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t gNB_id, uint8_t gNB_id,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
unsigned short scrambling_id,
unsigned short coreset_start_subcarrier, unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset) unsigned short nb_rb_coreset)
{ {
@@ -493,13 +494,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fm = filt16a_m1; fm = filt16a_m1;
fr = filt16a_r1; fr = filt16a_r1;
// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC) // checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
/* if (( != ue->scramblingID_pdcch){ if (scrambling_id != ue->scramblingID_pdcch){
ue->scramblingID_pdcch=; ue->scramblingID_pdcch = scrambling_id;
nr_gold_pdsch(ue,ue->scramblingID_pdcch); nr_gold_pdcch(ue,ue->scramblingID_pdcch);
}*/ }
// generate pilot // generate pilot
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16))); int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
@@ -666,6 +665,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char Ns, unsigned char Ns,
unsigned short p, unsigned short p,
unsigned char symbol, unsigned char symbol,
unsigned char nscid,
unsigned short scrambling_id,
unsigned short BWPStart, unsigned short BWPStart,
uint8_t config_type, uint8_t config_type,
unsigned short bwp_start_subcarrier, unsigned short bwp_start_subcarrier,
@@ -703,11 +704,10 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int8_t delta = get_delta(p, config_type); int8_t delta = get_delta(p, config_type);
// checking if re-initialization of scrambling IDs is needed // checking if re-initialization of scrambling IDs is needed
/*if ((XXX.scramblingID0 != ue->scramblingID[0]) || (XXX.scramblingID1 != ue->scramblingID[1])){ if (scrambling_id != ue->scramblingID_dlsch[nscid]){
ue->scramblingID[0] = XXX.scramblingID0; ue->scramblingID_dlsch[nscid] = scrambling_id;
ue->scramblingID[1] = XXX.scramblingID1; nr_gold_pdsch(ue, nscid, scrambling_id);
nr_gold_pdsch(ue,ue->scramblingID); }
}*/
nr_pdsch_dmrs_rx(ue, Ns, ue->nr_gold_pdsch[gNB_id][Ns][symbol][0], &pilot[0], 1000+p, 0, nb_rb_pdsch+rb_offset, config_type); nr_pdsch_dmrs_rx(ue, Ns, ue->nr_gold_pdsch[gNB_id][Ns][symbol][0], &pilot[0], 1000+p, 0, nb_rb_pdsch+rb_offset, config_type);
@@ -44,6 +44,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t gNB_id, uint8_t gNB_id,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
unsigned short scrambling_id,
unsigned short coreset_start_subcarrier, unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset); unsigned short nb_rb_coreset);
@@ -74,6 +75,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char Ns, unsigned char Ns,
unsigned short p, unsigned short p,
unsigned char symbol, unsigned char symbol,
unsigned char nscid,
unsigned short scrambling_id,
unsigned short BWPStart, unsigned short BWPStart,
uint8_t config_type, uint8_t config_type,
unsigned short bwp_start_subcarrier, unsigned short bwp_start_subcarrier,
+10 -7
View File
@@ -352,15 +352,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
nr_gold_pdcch(ue,fp->Nid_cell); nr_gold_pdcch(ue,fp->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS // compute the scrambling IDs for PDSCH DMRS
for (int i=0; i<2; i++) for (int i=0; i<NR_NB_NSCID; i++) {
ue->scramblingID[i]=fp->Nid_cell; ue->scramblingID_dlsch[i]=fp->Nid_cell;
nr_gold_pdsch(ue, i, ue->scramblingID_dlsch[i]);
nr_gold_pdsch(ue,ue->scramblingID); }
// initialize the pusch dmrs // initialize the pusch dmrs
uint16_t N_n_scid[2] = {fp->Nid_cell,fp->Nid_cell}; for (int i=0; i<NR_NB_NSCID; i++) {
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization ue->scramblingID_ulsch[i]=fp->Nid_cell;
nr_init_pusch_dmrs(ue, N_n_scid, n_scid); nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
}
// we also need to take into account the shift by samples_per_frame in case the if is true // we also need to take into account the shift by samples_per_frame in case the if is true
if (ue->ssb_offset < sync_pos_frame){ if (ue->ssb_offset < sync_pos_frame){
@@ -551,6 +553,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
0, 0,
pdcch_vars->slot, pdcch_vars->slot,
l, l,
fp->Nid_cell,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12, fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb); coreset_nb_rb);
@@ -260,6 +260,8 @@ typedef struct {
// PTRS symbol index, to be updated every PTRS symbol within a slot. // PTRS symbol index, to be updated every PTRS symbol within a slot.
uint8_t ptrs_symbol_index; uint8_t ptrs_symbol_index;
uint32_t tbslbrm; uint32_t tbslbrm;
uint8_t nscid;
uint16_t dlDmrsScramblingId;
/// PDU BITMAP /// PDU BITMAP
uint16_t pduBitmap; uint16_t pduBitmap;
} NR_DL_UE_HARQ_t; } NR_DL_UE_HARQ_t;
+11 -3
View File
@@ -32,6 +32,7 @@
#include <stdint.h> #include <stdint.h>
#include "PHY/NR_REFSIG/dmrs_nr.h" #include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h" #include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/MODULATION/nr_modulation.h" #include "PHY/MODULATION/nr_modulation.h"
@@ -215,9 +216,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////DMRS Modulation///////////////////////// /////////////////////////DMRS Modulation/////////////////////////
/////////// ///////////
uint32_t **pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4); uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
int16_t mod_dmrs[n_dmrs<<1] __attribute((aligned(16))); int16_t mod_dmrs[n_dmrs<<1] __attribute((aligned(16)));
/////////// ///////////
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
@@ -382,7 +390,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part // TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
// Perform this on gold sequence, not required when SC FDMA operation is done, // Perform this on gold sequence, not required when SC FDMA operation is done,
LOG_D(PHY,"DMRS in symbol %d\n",l); LOG_D(PHY,"DMRS in symbol %d\n",l);
nr_modulation(pusch_dmrs[l], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated nr_modulation(pusch_dmrs[l][pusch_pdu->scid], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
} else { } else {
dmrs_idx = 0; dmrs_idx = 0;
} }
@@ -392,7 +400,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) { if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1; is_ptrs_sym = 1;
nr_modulation(pusch_dmrs[l], nb_rb, DMRS_MOD_ORDER, mod_ptrs); nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
} }
} }
+3
View File
@@ -558,6 +558,9 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric,
} }
//#endif //#endif
if (Nid1==N_ID_1_NUMBER)
return -1;
int re = 0; int re = 0;
int im = 0; int im = 0;
d = (int16_t *)&d_sss[Nid2][Nid1]; d = (int16_t *)&d_sss[Nid2][Nid1];
+58 -33
View File
@@ -7082,43 +7082,40 @@ static inline void dft12f(simd_q15_t *x0,
simd_q15_t tmp_dft12[12]; simd_q15_t tmp_dft12[12];
simd_q15_t *tmp_dft12_ptr = &tmp_dft12[0];
// msg("dft12\n"); // msg("dft12\n");
bfly4_tw1(x0, bfly4_tw1(x0,
x3, x3,
x6, x6,
x9, x9,
tmp_dft12_ptr, tmp_dft12,
tmp_dft12_ptr+3, tmp_dft12+3,
tmp_dft12_ptr+6, tmp_dft12+6,
tmp_dft12_ptr+9); tmp_dft12+9);
bfly4_tw1(x1, bfly4_tw1(x1,
x4, x4,
x7, x7,
x10, x10,
tmp_dft12_ptr+1, tmp_dft12+1,
tmp_dft12_ptr+4, tmp_dft12+4,
tmp_dft12_ptr+7, tmp_dft12+7,
tmp_dft12_ptr+10); tmp_dft12+10);
bfly4_tw1(x2, bfly4_tw1(x2,
x5, x5,
x8, x8,
x11, x11,
tmp_dft12_ptr+2, tmp_dft12+2,
tmp_dft12_ptr+5, tmp_dft12+5,
tmp_dft12_ptr+8, tmp_dft12+8,
tmp_dft12_ptr+11); tmp_dft12+11);
// k2=0; // k2=0;
bfly3_tw1(tmp_dft12_ptr, bfly3_tw1(tmp_dft12,
tmp_dft12_ptr+1, tmp_dft12+1,
tmp_dft12_ptr+2, tmp_dft12+2,
y0, y0,
y4, y4,
y8); y8);
@@ -7126,9 +7123,9 @@ static inline void dft12f(simd_q15_t *x0,
// k2=1; // k2=1;
bfly3(tmp_dft12_ptr+3, bfly3(tmp_dft12+3,
tmp_dft12_ptr+4, tmp_dft12+4,
tmp_dft12_ptr+5, tmp_dft12+5,
y1, y1,
y5, y5,
y9, y9,
@@ -7138,9 +7135,9 @@ static inline void dft12f(simd_q15_t *x0,
// k2=2; // k2=2;
bfly3(tmp_dft12_ptr+6, bfly3(tmp_dft12+6,
tmp_dft12_ptr+7, tmp_dft12+7,
tmp_dft12_ptr+8, tmp_dft12+8,
y2, y2,
y6, y6,
y10, y10,
@@ -7148,9 +7145,9 @@ static inline void dft12f(simd_q15_t *x0,
W4_12); W4_12);
// k2=3; // k2=3;
bfly3(tmp_dft12_ptr+9, bfly3(tmp_dft12+9,
tmp_dft12_ptr+10, tmp_dft12+10,
tmp_dft12_ptr+11, tmp_dft12+11,
y3, y3,
y7, y7,
y11, y11,
@@ -10606,15 +10603,43 @@ int dfts_autoinit(void)
#ifndef MR_MAIN #ifndef MR_MAIN
void dft(uint8_t sizeidx, int16_t *sigF,int16_t *sig,unsigned char scale_flag){ void dft(uint8_t sizeidx, int16_t *input,int16_t *output,unsigned char scale_flag){
AssertFatal((sizeidx>=0 && sizeidx<(int)DFT_SIZE_IDXTABLESIZE),"Invalid dft size index %i\n",sizeidx); AssertFatal((sizeidx >= 0 && sizeidx<DFT_SIZE_IDXTABLESIZE),"Invalid dft size index %i\n",sizeidx);
dft_ftab[sizeidx](sigF,sig,scale_flag); int algn=0xF;
#ifdef __AVX2__
if ( (dft_ftab[sizeidx].size%3) != 0 ) // there is no AVX2 implementation for multiples of 3 DFTs
algn=0x1F;
#endif
AssertFatal(((intptr_t)output&algn)==0,"Buffers should be aligned %p",output);
if (((intptr_t)input)&algn) {
LOG_D(PHY, "DFT called with input not aligned, add a memcpy, size %d\n", sizeidx);
int sz=dft_ftab[sizeidx].size;
if (sizeidx==DFT_12) // This case does 8 DFTs in //
sz*=8;
int16_t tmp[sz*2] __attribute__ ((aligned(32))); // input and output are not in right type (int16_t instead of c16_t)
memcpy(tmp, input, sizeof tmp);
dft_ftab[sizeidx].func(tmp,output,scale_flag);
} else
dft_ftab[sizeidx].func(input,output,scale_flag);
}; };
void idft(uint8_t sizeidx, int16_t *sigF,int16_t *sig,unsigned char scale_flag){ void idft(uint8_t sizeidx, int16_t *input,int16_t *output,unsigned char scale_flag){
AssertFatal((sizeidx>=0 && sizeidx<(int)IDFT_SIZE_IDXTABLESIZE),"Invalid idft size index %i\n",sizeidx); AssertFatal((sizeidx>=0 && sizeidx<DFT_SIZE_IDXTABLESIZE),"Invalid idft size index %i\n",sizeidx);
idft_ftab[sizeidx](sigF,sig,scale_flag); int algn=0xF;
#ifdef __AVX2__
algn=0x1F;
#endif
AssertFatal( ((intptr_t)output&algn)==0,"Buffers should be 16 bytes aligned %p",output);
if (((intptr_t)input)&algn ) {
LOG_D(PHY, "DFT called with input not aligned, add a memcpy\n");
int sz=idft_ftab[sizeidx].size;
int16_t tmp[sz*2] __attribute__ ((aligned(32))); // input and output are not in right type (int16_t instead of c16_t)
memcpy(tmp, input, sizeof tmp);
dft_ftab[sizeidx].func(tmp,output,scale_flag);
} else
idft_ftab[sizeidx].func(input,output,scale_flag);
}; };
#endif #endif
/*---------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------*/
+133 -136
View File
@@ -181,159 +181,156 @@ This function performs optimized fixed-point radix-2 FFT/IFFT.
); );
*/ */
#define FOREACH_DFTSZ(SZ_DEF) \
SZ_DEF(12) \
SZ_DEF(24) \
SZ_DEF(36) \
SZ_DEF(48) \
SZ_DEF(60) \
SZ_DEF(64) \
SZ_DEF(72) \
SZ_DEF(96) \
SZ_DEF(108) \
SZ_DEF(120) \
SZ_DEF(128) \
SZ_DEF(144) \
SZ_DEF(180) \
SZ_DEF(192) \
SZ_DEF(216) \
SZ_DEF(240) \
SZ_DEF(256) \
SZ_DEF(288) \
SZ_DEF(300) \
SZ_DEF(324) \
SZ_DEF(360) \
SZ_DEF(384) \
SZ_DEF(432) \
SZ_DEF(480) \
SZ_DEF(512) \
SZ_DEF(540) \
SZ_DEF(576) \
SZ_DEF(600) \
SZ_DEF(648) \
SZ_DEF(720) \
SZ_DEF(768) \
SZ_DEF(864) \
SZ_DEF(900) \
SZ_DEF(960) \
SZ_DEF(972) \
SZ_DEF(1024) \
SZ_DEF(1080) \
SZ_DEF(1152) \
SZ_DEF(1200) \
SZ_DEF(1296) \
SZ_DEF(1440) \
SZ_DEF(1500) \
SZ_DEF(1536) \
SZ_DEF(1620) \
SZ_DEF(1728) \
SZ_DEF(1800) \
SZ_DEF(1920) \
SZ_DEF(1944) \
SZ_DEF(2048) \
SZ_DEF(2160) \
SZ_DEF(2304) \
SZ_DEF(2400) \
SZ_DEF(2592) \
SZ_DEF(2700) \
SZ_DEF(2880) \
SZ_DEF(2916) \
SZ_DEF(3000) \
SZ_DEF(3072) \
SZ_DEF(3240) \
SZ_DEF(4096) \
SZ_DEF(6144) \
SZ_DEF(8192) \
SZ_DEF(9216) \
SZ_DEF(12288) \
SZ_DEF(18432) \
SZ_DEF(24576) \
SZ_DEF(36864) \
SZ_DEF(49152) \
SZ_DEF(73728) \
SZ_DEF(98304)
#define FOREACH_IDFTSZ(SZ_DEF)\
SZ_DEF(64) \
SZ_DEF(128) \
SZ_DEF(256) \
SZ_DEF(512) \
SZ_DEF(1024) \
SZ_DEF(1536) \
SZ_DEF(2048) \
SZ_DEF(3072) \
SZ_DEF(4096) \
SZ_DEF(6144) \
SZ_DEF(8192) \
SZ_DEF(9216) \
SZ_DEF(12288) \
SZ_DEF(18432) \
SZ_DEF(24576) \
SZ_DEF(36864) \
SZ_DEF(49152) \
SZ_DEF(73728) \
SZ_DEF(98304)
#ifdef OAIDFTS_MAIN #ifdef OAIDFTS_MAIN
typedef void(*adftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag); typedef void(*adftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*aidftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag); typedef void(*aidftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
void dft12(int16_t *x,int16_t *y,uint8_t scale_flag); #define SZ_FUNC(Sz) void dft ## Sz(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft24(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft36(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft48(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft60(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft64(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft72(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft96(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft108(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft120(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft128(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft144(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft180(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft192(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft216(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft240(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft256(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft288(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft300(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft324(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft360(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft384(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft432(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft480(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft512(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft540(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft576(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft600(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft648(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft720(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft768(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft864(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft900(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft960(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft972(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1024(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1080(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1152(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1200(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1296(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1440(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1500(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1536(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft1620(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1728(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1800(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1920(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1944(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2048(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2160(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2304(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2400(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2592(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2700(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2880(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2916(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft3000(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft3072(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft3240(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft4096(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft6144(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft8192(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft9216(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft12288(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft18432(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft24576(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft36864(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft49152(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft73728(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft98304(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft64(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft128(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft256(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft512(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft1024(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft1536(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft2048(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft3072(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft4096(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft6144(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft8192(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft9216(int16_t *x,int16_t *y,uint8_t scale_flag);
void idft12288(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft18432(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft24576(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft36864(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft49152(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft73728(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void idft98304(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
FOREACH_DFTSZ(SZ_FUNC)
#define SZ_iFUNC(Sz) void idft ## Sz(int16_t *x,int16_t *y,uint8_t scale_flag);
FOREACH_IDFTSZ(SZ_iFUNC)
#else #else
typedef void(*dftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag); typedef void(*dftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*idftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag); typedef void(*idftfunc_t)(uint8_t sizeidx,int16_t *sigF,int16_t *sig,unsigned char scale_flag);
# ifdef OAIDFTS_LOADER # ifdef OAIDFTS_LOADER
dftfunc_t dft; dftfunc_t dft;
idftfunc_t idft; idftfunc_t idft;
# else # else
extern dftfunc_t dft; extern dftfunc_t dft;
extern idftfunc_t idft; extern idftfunc_t idft;
extern int load_dftslib(void); extern int load_dftslib(void);
# endif # endif
#endif #endif
typedef enum DFT_size_idx { #define SZ_ENUM(Sz) DFT_ ## Sz,
DFT_12, DFT_24, DFT_36, DFT_48, DFT_60, DFT_72, DFT_96,
DFT_108, DFT_120, DFT_128, DFT_144, DFT_180, DFT_192, DFT_216, DFT_240,
DFT_256, DFT_288, DFT_300, DFT_324, DFT_360, DFT_384, DFT_432, DFT_480,
DFT_512, DFT_540, DFT_576, DFT_600, DFT_648, DFT_720, DFT_768, DFT_864,
DFT_900, DFT_960, DFT_972, DFT_1024, DFT_1080, DFT_1152, DFT_1200, DFT_1296,
DFT_1440, DFT_1500, DFT_1536, DFT_1620, DFT_1728, DFT_1800, DFT_1920, DFT_1944,
DFT_2048, DFT_2160, DFT_2304, DFT_2400, DFT_2592, DFT_2700, DFT_2880, DFT_2916,
DFT_3000, DFT_3072, DFT_3240, DFT_4096, DFT_6144, DFT_8192, DFT_9216, DFT_12288,
DFT_18432, DFT_24576, DFT_36864, DFT_49152, DFT_73728, DFT_98304,
DFT_SIZE_IDXTABLESIZE
} dft_size_idx_t;
#ifdef OAIDFTS_MAIN typedef enum dft_size_idx {
adftfunc_t dft_ftab[]={ FOREACH_DFTSZ(SZ_ENUM)
dft12, dft24, dft36, dft48, dft60, dft72, dft96, DFT_SIZE_IDXTABLESIZE
dft108, dft120, dft128, dft144, dft180, dft192, dft216, dft240, } dft_size_idx_t;
dft256, dft288, dft300, dft324, dft360, dft384, dft432, dft480,
dft512, dft540, dft576, dft600, dft648, dft720, dft768, dft864, #define SZ_iENUM(Sz) IDFT_ ## Sz,
dft900, dft960, dft972, dft1024, dft1080, dft1152, dft1200, dft1296,
dft1440, dft1500, dft1536, dft1620, dft1728, dft1800, dft1920, dft1944,
dft2048, dft2160, dft2304, dft2400, dft2592, dft2700, dft2880, dft2916,
dft3000, dft3072, dft3240, dft4096, dft6144, dft8192, dft9216, dft12288,
dft18432, dft24576, dft36864, dft49152, dft73728, dft98304
};
#endif
typedef enum idft_size_idx { typedef enum idft_size_idx {
IDFT_128, IDFT_256, IDFT_512, IDFT_1024, IDFT_1536, IDFT_2048, IDFT_3072, IDFT_4096, FOREACH_IDFTSZ(SZ_iENUM)
IDFT_6144, IDFT_8192, IDFT_9216, IDFT_12288, IDFT_18432, IDFT_24576, IDFT_36864, IDFT_49152, IDFT_SIZE_IDXTABLESIZE
IDFT_73728, IDFT_98304, } idft_size_idx_t;
IDFT_SIZE_IDXTABLESIZE
} idft_size_idx_t;
#ifdef OAIDFTS_MAIN #ifdef OAIDFTS_MAIN
aidftfunc_t idft_ftab[]={
idft128, idft256, idft512, idft1024, idft1536, idft2048, idft3072, idft4096, #define SZ_PTR(Sz) {dft ## Sz,Sz},
idft6144, idft8192, idft9216, idft12288, idft18432, idft24576, idft36864, idft49152, struct {
idft73728, idft98304 adftfunc_t func;
int size;
} dft_ftab[]= {
FOREACH_DFTSZ(SZ_PTR)
}; };
#define SZ_iPTR(Sz) {idft ## Sz,Sz},
struct {
adftfunc_t func;
int size;
} idft_ftab[]= {
FOREACH_IDFTSZ(SZ_iPTR)
};
#endif #endif
@@ -387,7 +384,7 @@ int32_t add_real_vector64(int16_t *x,
uint32_t N); uint32_t N);
int32_t sub_real_vector64(int16_t *x, int32_t sub_real_vector64(int16_t *x,
int16_t* y, int16_t *y,
int16_t *z, int16_t *z,
uint32_t N); uint32_t N);
@@ -444,7 +441,7 @@ int32_t signal_energy_amp_shift(int32_t *input, uint32_t length);
/*!\fn int32_t signal_energy(int *,uint32_t); /*!\fn int32_t signal_energy(int *,uint32_t);
\brief Computes the signal energy per subcarrier \brief Computes the signal energy per subcarrier
*/ */
int32_t subcarrier_energy(int32_t *,uint32_t, int32_t* subcarrier_energy, uint16_t rx_power_correction); int32_t subcarrier_energy(int32_t *,uint32_t, int32_t *subcarrier_energy, uint16_t rx_power_correction);
#endif #endif
/*!\fn int32_t signal_energy_nodc(int32_t *,uint32_t); /*!\fn int32_t signal_energy_nodc(int32_t *,uint32_t);
+6
View File
@@ -850,9 +850,15 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities /// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter; int prach_energy_counter;
int csi_gold_init;
int pdcch_gold_init;
int pdsch_gold_init[2];
int pusch_gold_init[2];
int ap_N1; int ap_N1;
int ap_N2; int ap_N2;
int ap_XP; int ap_XP;
int pucch0_thres; int pucch0_thres;
int pusch_thres; int pusch_thres;
int prach_thres; int prach_thres;
+5 -2
View File
@@ -789,7 +789,10 @@ typedef struct {
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX]; uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDSCH DMRS // Scrambling IDs used in PDSCH DMRS
uint16_t scramblingID[2]; uint16_t scramblingID_dlsch[2];
// Scrambling IDs used in PUSCH DMRS
uint16_t scramblingID_ulsch[2];
/// PDCCH DMRS /// PDCCH DMRS
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX]; uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
@@ -798,7 +801,7 @@ typedef struct {
uint16_t scramblingID_pdcch; uint16_t scramblingID_pdcch;
/// PUSCH DMRS sequence /// PUSCH DMRS sequence
uint32_t ***nr_gold_pusch_dmrs; uint32_t ****nr_gold_pusch_dmrs;
uint32_t X_u[64][839]; uint32_t X_u[64][839];
+2
View File
@@ -94,6 +94,8 @@
#define NR_RX_NB_TH 1 #define NR_RX_NB_TH 1
#define NR_NB_TH_SLOT 2 #define NR_NB_TH_SLOT 2
#define NR_NB_NSCID 2
extern const uint8_t nr_rv_round_map[4]; extern const uint8_t nr_rv_round_map[4];
static inline static inline
+2 -3
View File
@@ -158,8 +158,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
nr_generate_dci_top(msgTx, nr_generate_dci_top(msgTx, slot,
gNB->nr_gold_pdcch_dmrs[slot],
&gNB->common_vars.txdataF[0][txdataF_offset], &gNB->common_vars.txdataF[0][txdataF_offset],
AMP, fp); AMP, fp);
@@ -178,7 +177,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
if (csirs->active == 1) { if (csirs->active == 1) {
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot); LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15; nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15;
nr_generate_csi_rs(gNB, AMP, csi_params, gNB->gNB_config.cell_config.phy_cell_id.value, slot); nr_generate_csi_rs(gNB, AMP, csi_params, slot);
csirs->active = 0; csirs->active = 0;
} }
} }
+2
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@@ -316,6 +316,8 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
dlsch0_harq->rvidx = dlsch_config_pdu->rv; dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->tbslbrm = dlsch_config_pdu->tbslbrm; dlsch0_harq->tbslbrm = dlsch_config_pdu->tbslbrm;
dlsch0_harq->nscid = dlsch_config_pdu->nscid;
dlsch0_harq->dlDmrsScramblingId = dlsch_config_pdu->dlDmrsScramblingId;
//get nrOfLayers from DCI info //get nrOfLayers from DCI info
uint8_t Nl = 0; uint8_t Nl = 0;
for (int i = 0; i < 12; i++) { // max 12 ports for (int i = 0; i < 12; i++) { // max 12 ports
@@ -580,6 +580,8 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
nr_slot_rx, nr_slot_rx,
get_dmrs_port(aatx,dlsch0_harq->dmrs_ports), get_dmrs_port(aatx,dlsch0_harq->dmrs_ports),
m, m,
dlsch0_harq->nscid,
dlsch0_harq->dlDmrsScramblingId,
BWPStart, BWPStart,
dlsch0_harq->dmrsConfigType, dlsch0_harq->dmrsConfigType,
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12, ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
@@ -1482,6 +1484,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
gNB_id, gNB_id,
nr_slot_rx, nr_slot_rx,
l, l,
pdcch_vars->pdcch_config[n_ss].coreset.pdcch_dmrs_scrambling_id,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12, fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb); coreset_nb_rb);
+4 -4
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@@ -961,10 +961,10 @@ int main(int argc, char **argv)
nr_gold_pdcch(UE, frame_parms->Nid_cell); nr_gold_pdcch(UE, frame_parms->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS // compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < 2; i++) for (int i = 0; i < 2; i++) {
UE->scramblingID[i] = frame_parms->Nid_cell; UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
nr_gold_pdsch(UE, i, UE->scramblingID_dlsch[i]);
nr_gold_pdsch(UE, UE->scramblingID); }
nr_l2_init_ue(NULL); nr_l2_init_ue(NULL);
UE_mac = get_mac_inst(0); UE_mac = get_mac_inst(0);
+4 -4
View File
@@ -782,10 +782,10 @@ int main(int argc, char **argv)
init_nr_ue_transport(UE); init_nr_ue_transport(UE);
// initialize the pusch dmrs for(int n_scid = 0; n_scid<2; n_scid++) {
uint16_t N_n_scid[2] = {frame_parms->Nid_cell,frame_parms->Nid_cell}; UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
nr_init_pusch_dmrs(UE, N_n_scid, n_scid); }
//Configure UE //Configure UE
NR_UE_RRC_INST_t rrcue; NR_UE_RRC_INST_t rrcue;
+1 -1
View File
@@ -154,7 +154,7 @@ typedef enum {
{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N2, "vert. log. antenna ports", 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N2, "vert. log. antenna ports", 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_XP, "XP log. antenna ports", 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_PDSCHANTENNAPORTS_XP, "XP log. antenna ports", 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_DOSRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_DOSRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \ {GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \
+42 -14
View File
@@ -281,7 +281,6 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){
LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]); LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]);
return rnti_type; return rnti_type;
} }
@@ -874,14 +873,26 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if(pdsch_TimeDomainAllocationList && rnti!=SI_RNTI) if(pdsch_TimeDomainAllocationList && rnti!=SI_RNTI)
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType; mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
struct NR_DMRS_DownlinkConfig *dl_dmrs_config = NULL;
if(mac->DLbwp[0])
dl_dmrs_config = (mappingtype == typeA) ?
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
dlsch_config_pdu_1_0->nscid = 0;
if(dl_dmrs_config && dl_dmrs_config->scramblingID0)
dlsch_config_pdu_1_0->dlDmrsScramblingId = *dl_dmrs_config->scramblingID0;
else
dlsch_config_pdu_1_0->dlDmrsScramblingId = mac->physCellId;
/* dmrs symbol positions*/ /* dmrs symbol positions*/
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
(get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position, (get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_0->number_symbols, dlsch_config_pdu_1_0->number_symbols,
dlsch_config_pdu_1_0->start_symbol, dlsch_config_pdu_1_0->start_symbol,
mappingtype, 1); mappingtype, 1);
dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ? dlsch_config_pdu_1_0->dmrsConfigType = (dl_dmrs_config != NULL) ?
(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0; (dl_dmrs_config->dmrs_Type == NULL ? 0 : 1) : 0;
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
if (dlsch_config_pdu_1_0->number_symbols == 2) if (dlsch_config_pdu_1_0->number_symbols == 2)
@@ -1088,7 +1099,30 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if(pdsch_TimeDomainAllocationList) if(pdsch_TimeDomainAllocationList)
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType; mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
dlsch_config_pdu_1_1->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2; struct NR_DMRS_DownlinkConfig *dl_dmrs_config = (mappingtype == typeA) ?
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
switch (dci->dmrs_sequence_initialization.val) {
case 0:
dlsch_config_pdu_1_1->nscid = 0;
if(dl_dmrs_config->scramblingID0)
dlsch_config_pdu_1_1->dlDmrsScramblingId = *dl_dmrs_config->scramblingID0;
else
dlsch_config_pdu_1_1->dlDmrsScramblingId = mac->physCellId;
break;
case 1:
dlsch_config_pdu_1_1->nscid = 1;
if(dl_dmrs_config->scramblingID1)
dlsch_config_pdu_1_1->dlDmrsScramblingId = *dl_dmrs_config->scramblingID1;
else
dlsch_config_pdu_1_1->dlDmrsScramblingId = mac->physCellId;
break;
default:
AssertFatal(1==0,"Invalid dmrs sequence initialization value\n");
}
dlsch_config_pdu_1_1->dmrsConfigType = dl_dmrs_config->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214, /* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */ using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
@@ -1149,17 +1183,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* ANTENNA_PORTS */ /* ANTENNA_PORTS */
uint8_t n_codewords = 1; // FIXME!!! uint8_t n_codewords = 1; // FIXME!!!
long *max_length = NULL; long *max_length = dl_dmrs_config->maxLength;
long *dmrs_type = NULL; long *dmrs_type = dl_dmrs_config->dmrs_Type;
dlsch_config_pdu_1_1->n_front_load_symb = 1; // default value dlsch_config_pdu_1_1->n_front_load_symb = 1; // default value
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA) {
max_length = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength;
dmrs_type = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type;
}
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB) {
max_length = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength;
dmrs_type = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type;
}
if ((dmrs_type == NULL) && (max_length == NULL)){ if ((dmrs_type == NULL) && (max_length == NULL)){
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0]; dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0];
@@ -734,6 +734,11 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; ? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
} }
pusch_config_pdu->scid = 0;
pusch_config_pdu->ul_dmrs_scrambling_id = mac->physCellId;
if(*dci_format == NR_UL_DCI_FORMAT_0_1)
pusch_config_pdu->scid = dci->dmrs_sequence_initialization.val;
/* TRANSFORM PRECODING ------------------------------------------------------------------------------------------*/ /* TRANSFORM PRECODING ------------------------------------------------------------------------------------------*/
if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) { if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
@@ -759,6 +764,14 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d \n", pusch_config_pdu->num_dmrs_cdm_grps_no_data, LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d \n", pusch_config_pdu->num_dmrs_cdm_grps_no_data,
pusch_config_pdu->dfts_ofdm.low_papr_group_number); pusch_config_pdu->dfts_ofdm.low_papr_group_number);
} }
else {
if (pusch_config_pdu->scid == 0 &&
NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID0)
pusch_config_pdu->ul_dmrs_scrambling_id = *NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID0;
if (pusch_config_pdu->scid == 1 &&
NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID1)
pusch_config_pdu->ul_dmrs_scrambling_id = *NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID1;
}
/* TRANSFORM PRECODING --------------------------------------------------------------------------------------------------------*/ /* TRANSFORM PRECODING --------------------------------------------------------------------------------------------------------*/
@@ -625,6 +625,8 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
1, &is_typeA, 1, &is_typeA,
&startSymbolIndex, &nrOfSymbols); &startSymbolIndex, &nrOfSymbols);
AssertFatal((startSymbolIndex+nrOfSymbols)<14,"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",time_domain_allocation);
int mappingtype = is_typeA? typeA: typeB; int mappingtype = is_typeA? typeA: typeB;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype, 1); uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype, 1);
+3
View File
@@ -519,4 +519,7 @@ bool nr_find_nb_rb(uint16_t Qm,
void nr_sr_reporting(int Mod_idP, frame_t frameP, sub_frame_t slotP); void nr_sr_reporting(int Mod_idP, frame_t frameP, sub_frame_t slotP);
void dump_mac_stats(gNB_MAC_INST *gNB, char *output, int strlen, bool reset_rsrp); void dump_mac_stats(gNB_MAC_INST *gNB, char *output, int strlen, bool reset_rsrp);
void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sched_ctrl);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/ #endif /*__LAYER2_NR_MAC_PROTO_H__*/
+6 -6
View File
@@ -1452,15 +1452,15 @@ void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGr
ASN_SEQUENCE_ADD(&ue_context_mastercellGroup->rlc_BearerToAddModList->list, rlc_BearerConfig_drb); ASN_SEQUENCE_ADD(&ue_context_mastercellGroup->rlc_BearerToAddModList->list, rlc_BearerConfig_drb);
} }
void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
rrc_gNB_carrier_data_t *carrier,
NR_UE_NR_Capability_t *uecap, NR_UE_NR_Capability_t *uecap,
const gNB_RrcConfigurationReq* configuration) const gNB_RrcConfigurationReq* configuration) {
{
NR_SpCellConfig_t *SpCellConfig = cellGroupConfig->spCellConfig; NR_SpCellConfig_t *SpCellConfig = cellGroupConfig->spCellConfig;
if (SpCellConfig == NULL) return; if (SpCellConfig == NULL) return;
NR_ServingCellConfigCommon_t *scc = carrier->servingcellconfigcommon; NR_ServingCellConfigCommon_t *scc = configuration->scc;
NR_BWP_DownlinkDedicated_t *bwp_Dedicated = SpCellConfig->spCellConfigDedicated->initialDownlinkBWP; NR_BWP_DownlinkDedicated_t *bwp_Dedicated = SpCellConfig->spCellConfigDedicated->initialDownlinkBWP;
set_dl_mcs_table(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing, set_dl_mcs_table(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing,
@@ -1471,7 +1471,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
for (int i=0; i<DL_BWP_list->list.count; i++){ for (int i=0; i<DL_BWP_list->list.count; i++){
NR_BWP_Downlink_t *bwp = DL_BWP_list->list.array[i]; NR_BWP_Downlink_t *bwp = DL_BWP_list->list.array[i];
int scs = bwp->bwp_Common->genericParameters.subcarrierSpacing; int scs = bwp->bwp_Common->genericParameters.subcarrierSpacing;
set_dl_mcs_table(scs, configuration->force_256qam_off ? NULL : uecap, bwp->bwp_Dedicated, carrier->servingcellconfigcommon); set_dl_mcs_table(scs, configuration->force_256qam_off ? NULL : uecap, bwp->bwp_Dedicated, scc);
} }
} }
} }
@@ -1951,9 +1951,9 @@ int16_t do_RRCReconfiguration(
if(cellGroupConfig!=NULL){ if(cellGroupConfig!=NULL){
update_cellGroupConfig(cellGroupConfig, update_cellGroupConfig(cellGroupConfig,
carrier,
ue_context_pP->ue_context.UE_Capability_nr, ue_context_pP->ue_context.UE_Capability_nr,
configuration); configuration);
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig, enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig,
NULL, NULL,
(void *)cellGroupConfig, (void *)cellGroupConfig,
-1
View File
@@ -112,7 +112,6 @@ void fill_initial_cellGroupConfig(int uid,
const gNB_RrcConfigurationReq *configuration); const gNB_RrcConfigurationReq *configuration);
void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
rrc_gNB_carrier_data_t *carrier,
NR_UE_NR_Capability_t *uecap, NR_UE_NR_Capability_t *uecap,
const gNB_RrcConfigurationReq *configuration); const gNB_RrcConfigurationReq *configuration);
+139
View File
@@ -31,6 +31,145 @@
#include "nr_rrc_config.h" #include "nr_rrc_config.h"
#include "common/utils/nr/nr_common.h" #include "common/utils/nr/nr_common.h"
const uint8_t slotsperframe[5] = {10, 20, 40, 80, 160};
void set_csirs_periodicity(NR_NZP_CSI_RS_Resource_t *nzpcsi0, int uid, int nb_slots_per_period) {
nzpcsi0->periodicityAndOffset = calloc(1,sizeof(*nzpcsi0->periodicityAndOffset));
int ideal_period = nb_slots_per_period*MAX_MOBILES_PER_GNB;
if (ideal_period<5) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots4;
nzpcsi0->periodicityAndOffset->choice.slots4 = nb_slots_per_period*uid;
}
else if (ideal_period<6) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots5;
nzpcsi0->periodicityAndOffset->choice.slots5 = nb_slots_per_period*uid;
}
else if (ideal_period<9) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots8;
nzpcsi0->periodicityAndOffset->choice.slots8 = nb_slots_per_period*uid;
}
else if (ideal_period<11) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots10;
nzpcsi0->periodicityAndOffset->choice.slots10 = nb_slots_per_period*uid;
}
else if (ideal_period<17) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots16;
nzpcsi0->periodicityAndOffset->choice.slots16 = nb_slots_per_period*uid;
}
else if (ideal_period<21) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots20;
nzpcsi0->periodicityAndOffset->choice.slots20 = nb_slots_per_period*uid;
}
else if (ideal_period<41) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots40;
nzpcsi0->periodicityAndOffset->choice.slots40 = nb_slots_per_period*uid;
}
else if (ideal_period<81) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots80;
nzpcsi0->periodicityAndOffset->choice.slots80 = nb_slots_per_period*uid;
}
else if (ideal_period<161) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots160;
nzpcsi0->periodicityAndOffset->choice.slots160 = nb_slots_per_period*uid;
}
else {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
nzpcsi0->periodicityAndOffset->choice.slots320 = (nb_slots_per_period*uid)%320 + (nb_slots_per_period*uid)/320;
}
}
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int uid,
int num_dl_antenna_ports,
int curr_bwp,
int do_csirs) {
if (do_csirs) {
csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList));
NR_NZP_CSI_RS_ResourceSet_t *nzpcsirs0 = calloc(1,sizeof(*nzpcsirs0));
nzpcsirs0->nzp_CSI_ResourceSetId = 0;
NR_NZP_CSI_RS_ResourceId_t *nzpid0 = calloc(1,sizeof(*nzpid0));
*nzpid0 = 0;
ASN_SEQUENCE_ADD(&nzpcsirs0->nzp_CSI_RS_Resources,nzpid0);
nzpcsirs0->repetition = NULL;
nzpcsirs0->aperiodicTriggeringOffset = NULL;
nzpcsirs0->trs_Info = NULL;
ASN_SEQUENCE_ADD(&csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList->list,nzpcsirs0);
const NR_TDD_UL_DL_Pattern_t *tdd = servingcellconfigcommon->tdd_UL_DL_ConfigurationCommon ?
&servingcellconfigcommon->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
const int n_slots_frame = slotsperframe[*servingcellconfigcommon->ssbSubcarrierSpacing];
int nb_slots_per_period = n_slots_frame;
if (tdd)
nb_slots_per_period = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList));
NR_NZP_CSI_RS_Resource_t *nzpcsi0 = calloc(1,sizeof(*nzpcsi0));
nzpcsi0->nzp_CSI_RS_ResourceId = 0;
NR_CSI_RS_ResourceMapping_t resourceMapping;
switch (num_dl_antenna_ports) {
case 1:
resourceMapping.frequencyDomainAllocation.present = NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2;
resourceMapping.frequencyDomainAllocation.choice.row2.buf = calloc(2, sizeof(uint8_t));
resourceMapping.frequencyDomainAllocation.choice.row2.size = 2;
resourceMapping.frequencyDomainAllocation.choice.row2.bits_unused = 4;
resourceMapping.frequencyDomainAllocation.choice.row2.buf[0] = 0;
resourceMapping.frequencyDomainAllocation.choice.row2.buf[1] = 16;
resourceMapping.nrofPorts = NR_CSI_RS_ResourceMapping__nrofPorts_p1;
resourceMapping.cdm_Type = NR_CSI_RS_ResourceMapping__cdm_Type_noCDM;
break;
case 2:
resourceMapping.frequencyDomainAllocation.present = NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other;
resourceMapping.frequencyDomainAllocation.choice.other.buf = calloc(2, sizeof(uint8_t));
resourceMapping.frequencyDomainAllocation.choice.other.size = 1;
resourceMapping.frequencyDomainAllocation.choice.other.bits_unused = 2;
resourceMapping.frequencyDomainAllocation.choice.other.buf[0] = 4;
resourceMapping.nrofPorts = NR_CSI_RS_ResourceMapping__nrofPorts_p2;
resourceMapping.cdm_Type = NR_CSI_RS_ResourceMapping__cdm_Type_fd_CDM2;
break;
case 4:
resourceMapping.frequencyDomainAllocation.present = NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4;
resourceMapping.frequencyDomainAllocation.choice.row4.buf = calloc(2, sizeof(uint8_t));
resourceMapping.frequencyDomainAllocation.choice.row4.size = 1;
resourceMapping.frequencyDomainAllocation.choice.row4.bits_unused = 5;
resourceMapping.frequencyDomainAllocation.choice.row4.buf[0] = 32;
resourceMapping.nrofPorts = NR_CSI_RS_ResourceMapping__nrofPorts_p4;
resourceMapping.cdm_Type = NR_CSI_RS_ResourceMapping__cdm_Type_fd_CDM2;
break;
default:
AssertFatal(1==0,"Number of ports not yet supported\n");
}
resourceMapping.firstOFDMSymbolInTimeDomain = 13; // last symbol of slot
resourceMapping.firstOFDMSymbolInTimeDomain2 = NULL;
resourceMapping.density.present = NR_CSI_RS_ResourceMapping__density_PR_one;
resourceMapping.density.choice.one = (NULL_t)0;
resourceMapping.freqBand.startingRB = 0;
resourceMapping.freqBand.nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
nzpcsi0->resourceMapping = resourceMapping;
nzpcsi0->powerControlOffset = 0;
nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS));
*nzpcsi0->powerControlOffsetSS = NR_NZP_CSI_RS_Resource__powerControlOffsetSS_db0;
nzpcsi0->scramblingID = *servingcellconfigcommon->physCellId;
set_csirs_periodicity(nzpcsi0, uid, nb_slots_per_period);
nzpcsi0->qcl_InfoPeriodicCSI_RS = NULL;
ASN_SEQUENCE_ADD(&csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList->list,nzpcsi0);
}
else {
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = NULL;
csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList = NULL;
}
csi_MeasConfig->nzp_CSI_RS_ResourceSetToReleaseList = NULL;
csi_MeasConfig->nzp_CSI_RS_ResourceToReleaseList = NULL;
}
void prepare_sim_uecap(NR_UE_NR_Capability_t *cap, void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
int numerology, int numerology,
+6
View File
@@ -113,6 +113,12 @@ typedef struct physicalcellgroup_s{
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc); void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc);
void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay); void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay);
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int uid,
int num_dl_antenna_ports,
int curr_bwp,
int do_csirs);
void set_dl_mcs_table(int scs, NR_UE_NR_Capability_t *cap, void set_dl_mcs_table(int scs, NR_UE_NR_Capability_t *cap,
NR_BWP_DownlinkDedicated_t *bwp_Dedicated, NR_BWP_DownlinkDedicated_t *bwp_Dedicated,
NR_ServingCellConfigCommon_t *scc); NR_ServingCellConfigCommon_t *scc);
-6
View File
@@ -82,12 +82,6 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
const gNB_RrcConfigurationReq *configuration, const gNB_RrcConfigurationReq *configuration,
int uid); int uid);
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int dl_antenna_ports,
int curr_bwp,
int do_csirs);
void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon, void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_ServingCellConfig_t *servingcellconfigdedicated, NR_ServingCellConfig_t *servingcellconfigdedicated,
NR_RRCReconfiguration_IEs_t *reconfig, NR_RRCReconfiguration_IEs_t *reconfig,
+2 -75
View File
@@ -1066,24 +1066,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
csi_MeasConfig->csi_IM_ResourceToReleaseList = NULL; csi_MeasConfig->csi_IM_ResourceToReleaseList = NULL;
csi_MeasConfig->csi_IM_ResourceSetToReleaseList = NULL; csi_MeasConfig->csi_IM_ResourceSetToReleaseList = NULL;
if (do_csirs) { config_csirs(servingcellconfigcommon, csi_MeasConfig, uid, dl_antenna_ports, curr_bwp, do_csirs);
csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList));
NR_NZP_CSI_RS_ResourceSet_t *nzpcsirs0 = calloc(1,sizeof(*nzpcsirs0));
nzpcsirs0->nzp_CSI_ResourceSetId = 0;
NR_NZP_CSI_RS_ResourceId_t *nzpid0 = calloc(1,sizeof(*nzpid0));
*nzpid0 = 0;
ASN_SEQUENCE_ADD(&nzpcsirs0->nzp_CSI_RS_Resources,nzpid0);
nzpcsirs0->repetition = NULL;
nzpcsirs0->aperiodicTriggeringOffset = NULL;
nzpcsirs0->trs_Info = NULL;
ASN_SEQUENCE_ADD(&csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList->list,nzpcsirs0);
}
else
csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList = NULL;
csi_MeasConfig->nzp_CSI_RS_ResourceSetToReleaseList = NULL;
config_csirs(servingcellconfigcommon, csi_MeasConfig,dl_antenna_ports,curr_bwp,do_csirs);
csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList)); csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList));
csi_MeasConfig->csi_SSB_ResourceSetToReleaseList = NULL; csi_MeasConfig->csi_SSB_ResourceSetToReleaseList = NULL;
@@ -1102,9 +1085,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list,ssbresset0); ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list,ssbresset0);
csi_MeasConfig->csi_ResourceConfigToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_ResourceConfigToAddModList)); csi_MeasConfig->csi_ResourceConfigToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_ResourceConfigToAddModList));
csi_MeasConfig->csi_ResourceConfigToReleaseList = NULL;
if (do_csirs) { if (do_csirs) {
csi_MeasConfig->csi_ResourceConfigToReleaseList = NULL;
NR_CSI_ResourceConfig_t *csires0 = calloc(1,sizeof(*csires0)); NR_CSI_ResourceConfig_t *csires0 = calloc(1,sizeof(*csires0));
csires0->csi_ResourceConfigId=0; csires0->csi_ResourceConfigId=0;
csires0->csi_RS_ResourceSetList.present = NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR_nzp_CSI_RS_SSB; csires0->csi_RS_ResourceSetList.present = NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR_nzp_CSI_RS_SSB;
@@ -1315,62 +1298,6 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
} }
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int dl_antenna_ports,
int curr_bwp,
int do_csirs) {
if (do_csirs) {
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList));
NR_NZP_CSI_RS_Resource_t *nzpcsi0 = calloc(1,sizeof(*nzpcsi0));
nzpcsi0->nzp_CSI_RS_ResourceId = 0;
NR_CSI_RS_ResourceMapping_t resourceMapping;
switch (dl_antenna_ports) {
case 1:
resourceMapping.frequencyDomainAllocation.present = NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2;
resourceMapping.frequencyDomainAllocation.choice.row2.buf = calloc(2, sizeof(uint8_t));
resourceMapping.frequencyDomainAllocation.choice.row2.size = 2;
resourceMapping.frequencyDomainAllocation.choice.row2.bits_unused = 4;
resourceMapping.frequencyDomainAllocation.choice.row2.buf[0] = 0;
resourceMapping.frequencyDomainAllocation.choice.row2.buf[1] = 16;
resourceMapping.nrofPorts = NR_CSI_RS_ResourceMapping__nrofPorts_p1;
resourceMapping.cdm_Type = NR_CSI_RS_ResourceMapping__cdm_Type_noCDM;
break;
case 2:
resourceMapping.frequencyDomainAllocation.present = NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other;
resourceMapping.frequencyDomainAllocation.choice.other.buf = calloc(2, sizeof(uint8_t));
resourceMapping.frequencyDomainAllocation.choice.other.size = 1;
resourceMapping.frequencyDomainAllocation.choice.other.bits_unused = 2;
resourceMapping.frequencyDomainAllocation.choice.other.buf[0] = 4;
resourceMapping.nrofPorts = NR_CSI_RS_ResourceMapping__nrofPorts_p2;
resourceMapping.cdm_Type = NR_CSI_RS_ResourceMapping__cdm_Type_fd_CDM2;
break;
default:
AssertFatal(1==0,"Number of ports not yet supported\n");
}
resourceMapping.firstOFDMSymbolInTimeDomain = 6;
resourceMapping.firstOFDMSymbolInTimeDomain2 = NULL;
resourceMapping.density.present = NR_CSI_RS_ResourceMapping__density_PR_one;
resourceMapping.density.choice.one = (NULL_t)0;
resourceMapping.freqBand.startingRB = 0;
resourceMapping.freqBand.nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
nzpcsi0->resourceMapping = resourceMapping;
nzpcsi0->powerControlOffset = 0;
nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS));
*nzpcsi0->powerControlOffsetSS = NR_NZP_CSI_RS_Resource__powerControlOffsetSS_db0;
nzpcsi0->scramblingID = *servingcellconfigcommon->physCellId;
nzpcsi0->periodicityAndOffset = calloc(1,sizeof(*nzpcsi0->periodicityAndOffset));
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
nzpcsi0->periodicityAndOffset->choice.slots320 = 0;
nzpcsi0->qcl_InfoPeriodicCSI_RS = NULL;
ASN_SEQUENCE_ADD(&csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList->list,nzpcsi0);
}
else
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = NULL;
}
void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon, void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_ServingCellConfig_t *servingcellconfigdedicated, NR_ServingCellConfig_t *servingcellconfigdedicated,
NR_RRCReconfiguration_IEs_t *reconfig, NR_RRCReconfiguration_IEs_t *reconfig,