Merge NR_RRC_harq_hacks branch into NR_RRC_PDCP

This commit is contained in:
matzakos
2020-07-03 17:10:40 +02:00
306 changed files with 9093 additions and 10075 deletions
+8 -2
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@@ -1194,6 +1194,8 @@ void phy_procedures_eNB_TX_tosplit(uint8_t *bufferZone, PHY_VARS_eNB *eNB, L1_rx
for (int i=0; i<NUMBER_OF_UE_MAX; i++) {
int harq_pid;
LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[i];
if (ulsch == NULL)
continue;
if (ulsch->ue_type > NOCE)
harq_pid = 0;
@@ -1209,9 +1211,10 @@ void phy_procedures_eNB_TX_tosplit(uint8_t *bufferZone, PHY_VARS_eNB *eNB, L1_rx
for (int k=0; k<8; k++) {
ulsch_harq = ulsch->harq_processes[k];
if (ulsch_harq == NULL)
continue;
if (ulsch &&
(ulsch->rnti>0) &&
if ((ulsch->rnti>0) &&
(ulsch_harq->status == ACTIVE) &&
(ulsch_harq->frame == frame) &&
(ulsch_harq->subframe == subframe) &&
@@ -1510,6 +1513,7 @@ void *cu_fs6(void *arg) {
char remoteIP[1024];
strncpy(remoteIP,get_softmodem_params()->split73+3, 1023); //three first char should be cu: or du:
char port_def[256]=DU_PORT;
for (int i=0; i <1000; i++)
if (remoteIP[i]==':') {
strncpy(port_def,remoteIP+i+1,255);
@@ -1558,12 +1562,14 @@ void *du_fs6(void *arg) {
char remoteIP[1024];
strncpy(remoteIP,get_softmodem_params()->split73+3,1023); //three first char should be cu: or du:
char port_def[256]=CU_PORT;
for (int i=0; i <1000; i++)
if (remoteIP[i]==':') {
strncpy(port_def,remoteIP+i+1,255);
remoteIP[i]=0;
break;
}
AssertFatal(createUDPsock(NULL, DU_PORT, remoteIP, port_def, &sockFS6), "");
if (ru->rfdevice.trx_start_func(&ru->rfdevice) != 0)
+1 -5
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@@ -47,7 +47,7 @@
#include "SCHED/sched_eNB.h"
#include "SCHED_NR/sched_nr.h"
#include "SCHED_NR/fapi_nr_l1.h"
#include "PHY/NR_TRANSPORT/nr_transport.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
@@ -740,9 +740,7 @@ void init_gNB_proc(int inst) {
gNB_L1_rxtx_proc_t *L1_proc,*L1_proc_tx;
// LOG_I(PHY,"%s(inst:%d) RC.nb_nr_CC[inst]:%d \n",__FUNCTION__,inst,RC.nb_nr_CC[inst]);
gNB = RC.gNB[inst];
#ifndef OCP_FRAMEWORK
LOG_I(PHY,"Initializing gNB processes instance:%d CC_id %d \n",inst,CC_id);
#endif
proc = &gNB->proc;
L1_proc = &proc->L1_proc;
@@ -956,9 +954,7 @@ void init_gNB(int single_thread_flag,int wait_for_sync) {
NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL);*/
LOG_I(PHY,"Initializing gNB %d single_thread_flag:%d\n",inst,gNB->single_thread_flag);
#ifndef OCP_FRAMEWORK
LOG_I(PHY,"Initializing gNB %d\n",inst);
#endif
LOG_I(PHY,"Registering with MAC interface module (before %p)\n",gNB->if_inst);
AssertFatal((gNB->if_inst = NR_IF_Module_init(inst))!=NULL,"Cannot register interface");
+22 -6
View File
@@ -51,13 +51,12 @@
#include "PHY/defs_nr_common.h"
#include "PHY/phy_extern.h"
#include "PHY/LTE_TRANSPORT/transport_proto.h"
#include "PHY/NR_TRANSPORT/nr_transport.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/INIT/phy_init.h"
#include "SCHED/sched_eNB.h"
#include "SCHED_NR/sched_nr.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "RRC/LTE/rrc_extern.h"
#include "PHY_INTERFACE/phy_interface.h"
@@ -119,6 +118,7 @@ uint16_t sl_ahead;
extern int emulate_rf;
extern int numerology;
extern int usrp_tx_thread;
/*************************************************************/
/* Functions to attach and configure RRU */
@@ -775,7 +775,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d\n",ru->idx,
(long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
AssertFatal(txs == siglen+sf_extension,"TX : Timeout (sent %u/%d)\n", txs, siglen);
//AssertFatal(txs == 0,"trx write function error %d\n", txs);
}
}
@@ -1509,6 +1509,18 @@ void *ru_thread( void *param ) {
// if this is a slave RRU, try to synchronize on the DL frequency
if ((ru->is_slave) && (ru->if_south == LOCAL_RF)) do_ru_synch(ru);
// start trx write thread
if(usrp_tx_thread == 1){
if (ru->start_write_thread){
if(ru->start_write_thread(ru) != 0){
LOG_E(HW,"Could not start tx write thread\n");
}
else{
LOG_I(PHY,"tx write thread ready\n");
}
}
}
}
pthread_mutex_lock(&proc->mutex_FH1);
@@ -1729,14 +1741,15 @@ int stop_rf(RU_t *ru) {
return 0;
}
int start_write_thread(RU_t *ru) {
return(ru->rfdevice.trx_write_init(&ru->rfdevice));
}
void init_RU_proc(RU_t *ru) {
int i=0;
RU_proc_t *proc;
char name[100];
#ifndef OCP_FRAMEWORK
LOG_I(PHY,"Initializing RU proc %d (%s,%s),\n",ru->idx,NB_functions[ru->function],NB_timing[ru->if_timing]);
#endif
proc = &ru->proc;
memset((void *)proc,0,sizeof(RU_proc_t));
proc->ru = ru;
@@ -2124,6 +2137,7 @@ void set_function_spec_param(RU_t *ru) {
ru->fh_south_out = tx_rf; // local synchronous RF TX
ru->start_rf = start_rf; // need to start the local RF interface
ru->stop_rf = stop_rf;
ru->start_write_thread = start_write_thread; // starting RF TX in different thread
printf("configuring ru_id %u (start_rf %p)\n", ru->idx, start_rf);
/*
if (ru->function == gNodeB_3GPP) { // configure RF parameters only for 3GPP eNodeB, we need to get them from RAU otherwise
@@ -2149,6 +2163,7 @@ void set_function_spec_param(RU_t *ru) {
ru->fh_south_asynch_in = NULL; // no asynchronous UL
ru->start_rf = NULL; // no local RF
ru->stop_rf = NULL;
ru->start_write_thread = NULL;
ru->nr_start_if = nr_start_if; // need to start if interface for IF5
ru->ifdevice.host_type = RAU_HOST;
ru->ifdevice.eth_params = &ru->eth_params;
@@ -2175,6 +2190,7 @@ void set_function_spec_param(RU_t *ru) {
ru->fh_north_asynch_in = NULL;
ru->start_rf = NULL; // no local RF
ru->stop_rf = NULL;
ru->start_write_thread = NULL;
ru->nr_start_if = nr_start_if; // need to start if interface for IF4p5
ru->ifdevice.host_type = RAU_HOST;
ru->ifdevice.eth_params = &ru->eth_params;
+5
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@@ -90,6 +90,7 @@
#define CONFIG_HLP_EMULATE_RF "Emulated RF enabled(disable by defult)\n"
#define CONFIG_HLP_PARALLEL_CMD "three config for level of parallelism 'PARALLEL_SINGLE_THREAD', 'PARALLEL_RU_L1_SPLIT', or 'PARALLEL_RU_L1_TRX_SPLIT'\n"
#define CONFIG_HLP_WORKER_CMD "two option for worker 'WORKER_DISABLE' or 'WORKER_ENABLE'\n"
#define CONFIG_HLP_USRP_THREAD "having extra thead for usrp tx\n"
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
@@ -144,6 +145,10 @@ extern int sync_var;
extern int transmission_mode;
extern double cpuf;
extern int emulate_rf;
extern int numerology;
extern int usrp_tx_thread;
extern volatile int start_eNB;
extern volatile int start_UE;
+4 -1
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@@ -183,6 +183,7 @@ extern void *udp_eNB_task(void *args_p);
int transmission_mode=1;
int emulate_rf = 0;
int numerology = 0;
int usrp_tx_thread = 0;
static char *parallel_config = NULL;
@@ -963,7 +964,9 @@ if(!IS_SOFTMODEM_NOS1)
scopeParms_t p;
p.argc=&argc;
p.argv=argv;
startScope(&p);
p.gNB=RC.gNB[0];
p.ru=RC.ru[0];
gNBinitScope(&p);
}
if (nfapi_mode != 1 && nfapi_mode != 2) {
+1
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@@ -34,6 +34,7 @@
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
{"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr:&usrp_tx_thread, defstrval:0, TYPE_INT, 0}, \
{"s" , CONFIG_HLP_SNR, 0, dblptr:&snr_dB, defdblval:25, TYPE_DOUBLE, 0}, \
}
+56 -113
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@@ -157,6 +157,7 @@ void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
// initialize all signal buffers
init_nr_ue_signal(ue, nb_connected_gNB, abstraction_flag);
// intialize transport
init_nr_ue_transport(ue, abstraction_flag);
}
@@ -365,62 +366,31 @@ static void UE_synch(void *arg) {
}
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
uint32_t nb_rb, start_rb;
uint8_t nb_symb_sch, start_symbol, mcs, precod_nbr_layers, harq_pid, rvidx;
uint16_t n_rnti;
module_id_t mod_id;
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_tti_tx);
uint8_t gNB_id = 0;
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
// program PUSCH. this should actually be done by the MAC upon reception of an UL DCI
if (proc->nr_tti_tx == 8 || proc->nr_tti_tx == 7 || UE->frame_parms.frame_type == FDD){
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
nr_uplink_indication_t ul_indication;
memset((void*)&ul_indication, 0, sizeof(ul_indication));
mod_id = UE->Mod_id;
ul_indication.module_id = UE->Mod_id;
ul_indication.gNB_index = gNB_id;
ul_indication.cc_id = UE->CC_id;
ul_indication.frame_rx = proc->frame_rx;
ul_indication.slot_rx = proc->nr_tti_rx;
ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_tti_tx;
dcireq.module_id = mod_id;
dcireq.gNB_index = 0;
dcireq.cc_id = 0;
dcireq.frame = proc->frame_rx;
dcireq.slot = proc->nr_tti_rx;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &dcireq.ul_config_req;
scheduled_response.tx_request = NULL;
scheduled_response.module_id = mod_id;
scheduled_response.CC_id = 0;
scheduled_response.frame = proc->frame_rx;
scheduled_response.slot = proc->nr_tti_rx;
//--------------------------Temporary configuration-----------------------------//
n_rnti = 0x1234;
nb_rb = 50;
start_rb = 0;
nb_symb_sch = 12;
start_symbol = 2;
precod_nbr_layers = 1;
mcs = 9;
harq_pid = 0;
rvidx = 0;
//------------------------------------------------------------------------------//
scheduled_response.ul_config->slot = proc->nr_tti_tx;
scheduled_response.ul_config->number_pdus = 1;
scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = nb_rb;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = start_rb;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = nb_symb_sch;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = start_symbol;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.mcs = mcs;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = rvidx;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
nr_ue_scheduled_response(&scheduled_response);
UE->if_inst->ul_indication(&ul_indication);
}
if (UE->mode != loop_through_memory) {
uint8_t thread_id = PHY_vars_UE_g[mod_id][0]->current_thread_id[proc->nr_tti_rx];
uint8_t thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_rx];
phy_procedures_nrUE_TX(UE,proc,0,thread_id);
}
}
@@ -428,41 +398,26 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
uint8_t ssb_period = UE->nrUE_config.ssb_table.ssb_period;
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_tti_rx);
uint8_t gNB_id = 0;
//program DCI for slot 1
//TODO: all of this has to be moved to the MAC!!!
if (proc->nr_tti_rx == NR_DOWNLINK_SLOT || UE->frame_parms.frame_type == FDD){
dcireq.module_id = UE->Mod_id;
dcireq.gNB_index = 0;
dcireq.cc_id = 0;
dcireq.frame = proc->frame_rx;
dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){
// we should have received a DL DCI here, so configure DL accordingly
scheduled_response.dl_config = &dcireq.dl_config_req;
scheduled_response.ul_config = NULL;
scheduled_response.tx_request = NULL;
scheduled_response.module_id = UE->Mod_id;
scheduled_response.CC_id = 0;
if (!((proc->frame_rx)%(1<<(ssb_period-1)))) {
if(proc->frame_rx > dcireq.dl_config_req.sfn)
UE->frame_gap = proc->frame_rx - dcireq.dl_config_req.sfn;
if(proc->frame_rx < dcireq.dl_config_req.sfn)
UE->frame_gap = dcireq.dl_config_req.sfn - proc->frame_rx;
proc->frame_rx = dcireq.dl_config_req.sfn;
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
memset((void*)&dl_indication, 0, sizeof(dl_indication));
dl_indication.module_id = UE->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = UE->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_tti_rx;
UE->if_inst->dl_indication(&dl_indication, NULL);
}
scheduled_response.frame = proc->frame_rx;
scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&scheduled_response);
}
// Process Rx data for one sub-frame
if ( proc->nr_tti_rx >=0 && proc->nr_tti_rx <= 1 ) {
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
@@ -482,7 +437,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
}
}
// no UL for now
// no UL for now
/*
if (UE->mac_enabled==1) {
@@ -498,6 +452,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
}
}
*/
}
/*!
@@ -518,11 +473,7 @@ void UE_processing(void *arg) {
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE;
uint8_t gNB_id = 0, CC_id = 0;
module_id_t mod_id = 0;
nr_uplink_indication_t ul_indication;
memset((void*)&ul_indication, 0, sizeof(ul_indication));
uint8_t gNB_id = 0;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
@@ -538,7 +489,7 @@ void UE_processing(void *arg) {
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
LOG_D(PHY,"Applying timing advance -- frame %d -- slot %d\n", frame_tx, slot_tx);
//if (nfapi_mode!=3){
//if (nfapi_mode!=3){
nr_process_timing_advance(UE->Mod_id, UE->CC_id, ul_time_alignment->ta_command, numerology, bwp_ul_NB_RB);
ul_time_alignment->ta_frame = -1;
@@ -548,24 +499,7 @@ void UE_processing(void *arg) {
}
processSlotRX(UE, proc);
if (UE->mac_enabled == 1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
ul_indication.module_id = mod_id;
ul_indication.gNB_index = gNB_id;
ul_indication.cc_id = CC_id;
ul_indication.frame_rx = proc->frame_rx;
ul_indication.slot_rx = proc->nr_tti_rx;
ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_tti_tx;
UE->if_inst->ul_indication(&ul_indication);
}
}
processSlotTX(UE, proc);
}
void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockSize) {
@@ -620,8 +554,7 @@ void readFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp, bool toTrash)
void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
void *dummy_tx[UE->frame_parms.nb_antennas_tx];
LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
*timestamp += UE->frame_parms.get_samples_per_slot(1,&UE->frame_parms);
for ( int size=UE->rx_offset ; size > 0 ; size -= UE->frame_parms.samples_per_subframe ) {
@@ -642,6 +575,12 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
int computeSamplesShift(PHY_VARS_NR_UE *UE) {
if (IS_SOFTMODEM_RFSIM) {
LOG_D(PHY,"SET rx_offset %d \n",UE->rx_offset);
//UE->rx_offset_diff=0;
return 0;
}
// compute TO compensation that should be applied for this frame
if ( UE->rx_offset < UE->frame_parms.samples_per_frame/2 &&
UE->rx_offset > 0 ) {
@@ -707,8 +646,11 @@ void *UE_thread(void *arg) {
if (res) {
syncRunning=false;
syncData_t *tmp=(syncData_t *)NotifiedFifoData(res);
// shift the frame index with all the frames we trashed meanwhile we perform the synch search
decoded_frame_rx=(tmp->proc.decoded_frame_rx + (!UE->init_sync_frame) + trashed_frames) % MAX_FRAME_NUMBER;
if (UE->is_synchronized) {
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | tmp->proc.decoded_frame_rx);
// shift the frame index with all the frames we trashed meanwhile we perform the synch search
decoded_frame_rx=(decoded_frame_rx + (!UE->init_sync_frame) + trashed_frames) % MAX_FRAME_NUMBER;
}
delNotifiedFIFO_elt(res);
} else {
readFrame(UE, &timestamp, true);
@@ -753,6 +695,7 @@ void *UE_thread(void *arg) {
absolute_slot++;
// whatever means thread_idx
// Fix me: will be wrong when slot 1 is slow, as slot 2 finishes
// Slot 3 will overlap if RX_NB_TH is 2
@@ -765,20 +708,20 @@ void *UE_thread(void *arg) {
curMsg->UE=UE;
// update thread index for received subframe
curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = 0;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10);
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = ((absolute_slot/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = (((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
#ifdef OAI_ADRV9371_ZC706
/*uint32_t total_gain_dB_prev = 0;
if (total_gain_dB_prev != UE->rx_total_gain_dB) {
total_gain_dB_prev = UE->rx_total_gain_dB;
total_gain_dB_prev = UE->rx_total_gain_dB;
openair0_cfg[0].rx_gain[0] = UE->rx_total_gain_dB;
UE->rfdevice.trx_set_gains_func(&UE->rfdevice,&openair0_cfg[0]);
}*/
@@ -863,7 +806,7 @@ void *UE_thread(void *arg) {
if ( (decoded_frame_rx != curMsg->proc.frame_rx) &&
(((decoded_frame_rx+1) % MAX_FRAME_NUMBER) != curMsg->proc.frame_rx) &&
(((decoded_frame_rx+2) % MAX_FRAME_NUMBER) != curMsg->proc.frame_rx))
LOG_D(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
decoded_frame_rx, curMsg->proc.frame_rx );
nbSlotProcessing++;
+5 -57
View File
@@ -76,36 +76,11 @@ unsigned short config_frames[4] = {2,9,11,13};
#include <openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h>
#include <openair1/SCHED_NR_UE/fapi_nr_ue_l1.h>
#include <forms.h>
/* Callbacks, globals and object handlers */
extern void reset_stats( FL_OBJECT *, long );
//extern void initTpool(char *params, tpool_t *pool, bool performanceMeas);
/* Forms and Objects */
typedef struct {
FL_FORM *stats_form;
void *vdata;
char *cdata;
long ldata;
FL_OBJECT *stats_text;
FL_OBJECT *stats_button;
} FD_stats_form;
extern FD_stats_form *create_form_stats_form( void );
#include "PHY/TOOLS/nr_phy_scope.h"
//#include "stats.h"
// current status is that every UE has a DL scope for a SINGLE eNB (eNB_id=0)
#include "PHY/TOOLS/nr_phy_scope.h"
// at eNB 0, an UL scope for every UE
FD_phy_scope_nrue *form_nrue[NUMBER_OF_UE_MAX];
//FD_lte_phy_scope_enb *form_enb[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
//FD_stats_form *form_stats=NULL,*form_stats_l2=NULL;
char title[255];
static pthread_t forms_thread; //xforms
#include <executables/nr-uesoftmodem.h>
#include "executables/softmodem-common.h"
@@ -198,6 +173,7 @@ uint64_t num_missed_slots=0; // counter for the number of missed slots
int transmission_mode=1;
int numerology = 0;
int usrp_tx_thread = 0;
/* flag set by eNB conf file to specify if the radio head is local or remote (default option is local) */
//uint8_t local_remote_radio = BBU_LOCAL_RADIO_HEAD;
@@ -274,7 +250,7 @@ void exit_function(const char *file, const char *function, const int line, const
}
void reset_stats(FL_OBJECT *button, long arg) {
void reset_stats(long arg) {
//int i,j,k;
/*PHY_VARS_eNB *phy_vars_eNB = PHY_vars_eNB_g[0][0];
@@ -304,35 +280,6 @@ void reset_stats(FL_OBJECT *button, long arg) {
}*/
}
static void *scope_thread(void *arg) {
sleep(5);
while (!oai_exit) {
phy_scope_nrUE(form_nrue[0],
PHY_vars_UE_g[0][0],
0,0,1);
usleep(100*1000);
}
pthread_exit((void *)arg);
}
void init_scope(void) {
int fl_argc=1;
if (do_forms==1) {
char *name="5G-UE-scope";
fl_initialize (&fl_argc, &name, NULL, 0, 0);
int UE_id = 0;
form_nrue[UE_id] = create_phy_scope_nrue();
sprintf (title, "NR DL SCOPE UE");
fl_show_form (form_nrue[UE_id]->phy_scope_nrue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
threadCreate(&forms_thread, scope_thread, NULL, "scope", -1, OAI_PRIORITY_RT_LOW);
}
}
void *l2l1_task(void *arg) {
MessageDef *message_p = NULL;
int result;
@@ -814,7 +761,8 @@ int main( int argc, char **argv ) {
memset (&UE_PF_PO[0][0], 0, sizeof(UE_PF_PO_t)*NUMBER_OF_UE_MAX*MAX_NUM_CCs);
configure_linux();
mlockall(MCL_CURRENT | MCL_FUTURE);
init_scope();
if (do_forms)
nrUEinitScope(PHY_vars_UE_g[0][0]);
number_of_cards = 1;
for(int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {