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bad type multi casts with wrong meaning like cast to ** a array of 2D (wrong in C)

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This commit is contained in:
Laurent THOMAS
2025-07-24 13:48:36 +02:00
parent 3264eca6db
commit 8dd2119d4e
8 changed files with 181 additions and 277 deletions
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openair1/PHY/NR_ESTIMATION/nr_freq_equalization.c
+7 -7
View File
@@ -34,13 +34,13 @@ void nr_init_fde()
nr_inv_ch[i] = simde_mm_set1_epi16(4096/i); nr_inv_ch[i] = simde_mm_set1_epi16(4096/i);
} }
void nr_freq_equalization (NR_DL_FRAME_PARMS *frame_parms, void nr_freq_equalization(NR_DL_FRAME_PARMS *frame_parms,
int32_t *rxdataF_comp, c16_t *rxdataF_comp,
int32_t *ul_ch_mag, c16_t *ul_ch_mag,
int32_t *ul_ch_magb, c16_t *ul_ch_magb,
uint8_t symbol, uint8_t symbol,
uint16_t Msc_RS, uint16_t Msc_RS,
uint8_t Qm) uint8_t Qm)
{ {
simde__m128i *rxdataF_comp128 = (simde__m128i *)rxdataF_comp; simde__m128i *rxdataF_comp128 = (simde__m128i *)rxdataF_comp;
simde__m128i *ul_ch_mag128 = (simde__m128i *)ul_ch_mag; simde__m128i *ul_ch_mag128 = (simde__m128i *)ul_ch_mag;
openair1/PHY/NR_ESTIMATION/nr_ul_estimation.h
+3 -3
View File
@@ -90,9 +90,9 @@ int nr_srs_channel_estimation(
int8_t *snr); int8_t *snr);
void nr_freq_equalization(NR_DL_FRAME_PARMS *frame_parms, void nr_freq_equalization(NR_DL_FRAME_PARMS *frame_parms,
int *rxdataF_comp, c16_t *rxdataF_comp,
int *ul_ch_mag, c16_t *ul_ch_mag,
int *ul_ch_mag_b, c16_t *ul_ch_mag_b,
unsigned char symbol, unsigned char symbol,
unsigned short Msc_RS, unsigned short Msc_RS,
unsigned char Qm); unsigned char Qm);
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+6 -63
View File
@@ -159,63 +159,6 @@ void nr_ulsch_qam64_qam64(c16_t *stream0_in,
c16_t *rho01, c16_t *rho01,
uint32_t length); uint32_t length);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream QPSK received waveforms.
@param rxdataF_comp Compensated channel output
@param ulsch_llr llr output
@param nb_re number of REs for this allocation
@param symbol OFDM symbol index in sub-frame
*/
void nr_ulsch_qpsk_llr(int32_t *rxdataF_comp,
int16_t *ulsch_llr,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream 16 QAM received waveforms.
@param rxdataF_comp Compensated channel output
@param ul_ch_mag uplink channel magnitude multiplied by the 1st amplitude threshold in QAM 16
@param ulsch_llr llr output
@param nb_re number of RBs for this allocation
@param symbol OFDM symbol index in sub-frame
*/
void nr_ulsch_16qam_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int16_t *ulsch_llr,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream 64 QAM received waveforms.
@param rxdataF_comp Compensated channel output
@param ul_ch_mag uplink channel magnitude multiplied by the 1st amplitude threshold in QAM 64
@param ul_ch_magb uplink channel magnitude multiplied by the 2bd amplitude threshold in QAM 64
@param ulsch_llr llr output
@param nb_re number of REs for this allocation
@param symbol OFDM symbol index in sub-frame
*/
void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int16_t *ulsch_llr,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream 256 QAM received waveforms.
@param rxdataF_comp Compensated channel output
@param ul_ch_mag uplink channel magnitude multiplied by the 1st amplitude threshold in QAM 256
@param ul_ch_magb uplink channel magnitude multiplied by the 2bd amplitude threshold in QAM 256
@param ul_ch_magc uplink channel magnitude multiplied by the 3rd amplitude threshold in QAM 256
@param ulsch_llr llr output
@param nb_re number of REs for this allocation
@param symbol OFDM symbol index in sub-frame
*/
void nr_ulsch_256qam_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t **ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function computes the log-likelihood ratios for 4, 16, and 64 QAM /** \brief This function computes the log-likelihood ratios for 4, 16, and 64 QAM
@param rxdataF_comp Compensated channel output @param rxdataF_comp Compensated channel output
@param ul_ch_mag uplink channel magnitude multiplied by the 1st amplitude threshold in QAM 64 @param ul_ch_mag uplink channel magnitude multiplied by the 1st amplitude threshold in QAM 64
@@ -226,13 +169,13 @@ void nr_ulsch_256qam_llr(int32_t *rxdataF_comp,
@param mod_order modulation order @param mod_order modulation order
*/ */
void nr_ulsch_compute_llr(int32_t *rxdataF_comp, void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag, c16_t *ul_ch_mag,
int32_t *ul_ch_magb, c16_t *ul_ch_magb,
int32_t *ul_ch_magc, c16_t *ul_ch_magc,
int16_t *ulsch_llr, int16_t *ulsch_llr,
uint32_t nb_re, uint32_t nb_re,
uint8_t symbol, uint8_t symbol,
uint8_t mod_order); uint8_t mod_order);
void reset_active_stats(PHY_VARS_gNB *gNB, int frame); void reset_active_stats(PHY_VARS_gNB *gNB, int frame);
void reset_active_ulsch(PHY_VARS_gNB *gNB, int frame); void reset_active_ulsch(PHY_VARS_gNB *gNB, int frame);
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+60 -65
View File
@@ -225,22 +225,22 @@ static void nr_ulsch_channel_level(int size_est,
} }
static void nr_ulsch_channel_compensation(c16_t *rxFext, static void nr_ulsch_channel_compensation(uint32_t buffer_length,
c16_t *chFext, int nb_rx_ant,
c16_t *ul_ch_maga, c16_t rxFext[][buffer_length],
c16_t *ul_ch_magb, c16_t chFext[][nb_rx_ant][buffer_length],
c16_t *ul_ch_magc, c16_t ul_ch_maga[][buffer_length],
c16_t ul_ch_magb[][buffer_length],
c16_t ul_ch_magc[][buffer_length],
int32_t **rxComp, int32_t **rxComp,
c16_t *rho, int nb_layers,
NR_DL_FRAME_PARMS *frame_parms, c16_t rho[][nb_layers][buffer_length],
nfapi_nr_pusch_pdu_t* rel15_ul, nfapi_nr_pusch_pdu_t *rel15_ul,
uint32_t symbol, uint32_t symbol,
uint32_t buffer_length,
uint32_t output_shift) uint32_t output_shift)
{ {
int mod_order = rel15_ul->qam_mod_order; int mod_order = rel15_ul->qam_mod_order;
int nrOfLayers = rel15_ul->nrOfLayers; int nrOfLayers = rel15_ul->nrOfLayers;
int nb_rx_ant = frame_parms->nb_antennas_rx;
simde__m256i QAM_ampa_256 = simde_mm256_setzero_si256(); simde__m256i QAM_ampa_256 = simde_mm256_setzero_si256();
simde__m256i QAM_ampb_256 = simde_mm256_setzero_si256(); simde__m256i QAM_ampb_256 = simde_mm256_setzero_si256();
@@ -263,13 +263,13 @@ static void nr_ulsch_channel_compensation(c16_t *rxFext,
} }
for (int aatx = 0; aatx < nrOfLayers; aatx++) { for (int aatx = 0; aatx < nrOfLayers; aatx++) {
simde__m256i *rxComp_256 = (simde__m256i*)&rxComp[aatx * nb_rx_ant][symbol * buffer_length]; simde__m256i *rxComp_256 = (simde__m256i *)&rxComp[aatx * nb_rx_ant][symbol * buffer_length];
simde__m256i *rxF_ch_maga_256 = (simde__m256i*)&ul_ch_maga[aatx * buffer_length]; simde__m256i *rxF_ch_maga_256 = (simde__m256i *)ul_ch_maga[aatx];
simde__m256i *rxF_ch_magb_256 = (simde__m256i*)&ul_ch_magb[aatx * buffer_length]; simde__m256i *rxF_ch_magb_256 = (simde__m256i *)ul_ch_magb[aatx];
simde__m256i *rxF_ch_magc_256 = (simde__m256i*)&ul_ch_magc[aatx * buffer_length]; simde__m256i *rxF_ch_magc_256 = (simde__m256i *)ul_ch_magc[aatx];
for (int aarx = 0; aarx < nb_rx_ant; aarx++) { for (int aarx = 0; aarx < nb_rx_ant; aarx++) {
simde__m256i *rxF_256 = (simde__m256i*) &rxFext[aarx * buffer_length]; simde__m256i *rxF_256 = (simde__m256i *)rxFext[aarx];
simde__m256i *chF_256 = (simde__m256i*) &chFext[(aatx * nb_rx_ant + aarx) * buffer_length]; simde__m256i *chF_256 = (simde__m256i *)chFext[aatx][aarx];
for (int i = 0; i < buffer_length >> 3; i++) for (int i = 0; i < buffer_length >> 3; i++)
{ {
@@ -292,11 +292,11 @@ static void nr_ulsch_channel_compensation(c16_t *rxFext,
rxF_ch_magc_256[i] = simde_mm256_add_epi16(rxF_ch_magc_256[i], simde_mm256_mulhrs_epi16(mag, QAM_ampc_256)); rxF_ch_magc_256[i] = simde_mm256_add_epi16(rxF_ch_magc_256[i], simde_mm256_mulhrs_epi16(mag, QAM_ampc_256));
} }
} }
if (rho != NULL) { if (nb_layers > 1) {
for (int atx = 0; atx < nrOfLayers; atx++) { for (int atx = 0; atx < nrOfLayers; atx++) {
simde__m256i *rho_256 = (simde__m256i * )&rho[(aatx * nrOfLayers + atx) * buffer_length]; simde__m256i *rho_256 = (simde__m256i *)rho[aatx][atx];
simde__m256i *chF_256 = (simde__m256i *)&chFext[(aatx * nb_rx_ant + aarx) * buffer_length]; simde__m256i *chF_256 = (simde__m256i *)chFext[aatx][aarx];
simde__m256i *chF2_256 = (simde__m256i *)&chFext[ (atx * nb_rx_ant + aarx) * buffer_length]; simde__m256i *chF2_256 = (simde__m256i *)chFext[atx][aarx];
for (int i = 0; i < buffer_length >> 3; i++) { for (int i = 0; i < buffer_length >> 3; i++) {
rho_256[i] = simde_mm256_adds_epi16(rho_256[i], oai_mm256_cpx_mult_conj(chF_256[i], chF2_256[i], output_shift)); rho_256[i] = simde_mm256_adds_epi16(rho_256[i], oai_mm256_cpx_mult_conj(chF_256[i], chF2_256[i], output_shift));
} }
@@ -523,25 +523,20 @@ static void nr_ulsch_construct_HhH_elements(c16_t *conjch00_ch00,
} }
// MMSE Rx function: nr_ulsch_mmse_2layers() // MMSE Rx function: nr_ulsch_mmse_2layers()
static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms, static uint8_t nr_ulsch_mmse_2layers(int **rxdataF_comp,
int **rxdataF_comp,
int **ul_ch_mag,
int **ul_ch_magb,
int **ul_ch_magc,
int nb_layer,
int nb_rx_ant,
uint32_t buffer_length, uint32_t buffer_length,
c16_t ul_ch_estimates_ext[nb_layer][nb_rx_ant][buffer_length], int nb_rx_ant,
c16_t ul_ch_mag[][buffer_length],
c16_t ul_ch_magb[][buffer_length],
c16_t ul_ch_magc[][buffer_length],
c16_t ul_ch_estimates_ext[][nb_rx_ant][buffer_length],
unsigned short nb_rb, unsigned short nb_rb,
unsigned char n_rx,
unsigned char mod_order, unsigned char mod_order,
int shift, int shift,
unsigned char symbol, unsigned char symbol,
int length, int length,
uint32_t noise_var) uint32_t noise_var)
{ {
c16_t *ch00, *ch01, *ch10, *ch11;
c16_t *ch20, *ch30, *ch21, *ch31;
uint32_t nb_rb_0 = length/12 + ((length%12)?1:0); uint32_t nb_rb_0 = length/12 + ((length%12)?1:0);
/* we need at least alignment to 16 bytes, let's put 32 to be sure /* we need at least alignment to 16 bytes, let's put 32 to be sure
@@ -570,7 +565,9 @@ static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
c16_t af_mf_11[12 * nb_rb] __attribute__((aligned(32))); c16_t af_mf_11[12 * nb_rb] __attribute__((aligned(32)));
uint32_t determ_fin[12*nb_rb] __attribute__((aligned(32))); uint32_t determ_fin[12*nb_rb] __attribute__((aligned(32)));
switch (n_rx) { c16_t *ch00, *ch01, *ch10, *ch11;
c16_t *ch20, *ch30, *ch21, *ch31;
switch (nb_rx_ant) {
case 2:// case 2://
ch00 = ul_ch_estimates_ext[0][0]; ch00 = ul_ch_estimates_ext[0][0];
ch01 = ul_ch_estimates_ext[1][0]; ch01 = ul_ch_estimates_ext[1][0];
@@ -606,7 +603,7 @@ static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
* *
*/ */
if (n_rx>=2){ if (nb_rx_ant >= 2) {
// (1/2^log2_maxh)*conj_H_00xH_00: (1/(64*2))conjH_00*H_00*2^15 // (1/2^log2_maxh)*conj_H_00xH_00: (1/(64*2))conjH_00*H_00*2^15
nr_ulsch_conjch0_mult_ch1(ch00, nr_ulsch_conjch0_mult_ch1(ch00,
ch00, ch00,
@@ -656,7 +653,7 @@ static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
nb_rb_0, nb_rb_0,
shift); shift);
} }
if (n_rx==4){ if (nb_rx_ant == 4) {
// (1/2^log2_maxh)*conj_H_20xH_20: (1/(64*2*16))conjH_20*H_20*2^15 // (1/2^log2_maxh)*conj_H_20xH_20: (1/(64*2*16))conjH_20*H_20*2^15
nr_ulsch_conjch0_mult_ch1(ch20, nr_ulsch_conjch0_mult_ch1(ch20,
ch20, ch20,
@@ -732,7 +729,7 @@ static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
nb_rb_0, nb_rb_0,
symbol); symbol);
} }
if (n_rx==2){ if (nb_rx_ant == 2) {
nr_ulsch_construct_HhH_elements(conjch00_ch00, nr_ulsch_construct_HhH_elements(conjch00_ch00,
conjch01_ch01, conjch01_ch01,
conjch11_ch11, conjch11_ch11,
@@ -805,7 +802,7 @@ static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
simde__m128i *after_mf_d_128 = (simde__m128i *)af_mf_11; simde__m128i *after_mf_d_128 = (simde__m128i *)af_mf_11;
simde__m128i *rxdataF_comp128_0 = (simde__m128i *)&rxdataF_comp[0][symbol * buffer_length]; simde__m128i *rxdataF_comp128_0 = (simde__m128i *)&rxdataF_comp[0][symbol * buffer_length];
simde__m128i *rxdataF_comp128_1 = (simde__m128i *)&rxdataF_comp[n_rx][symbol * buffer_length]; simde__m128i *rxdataF_comp128_1 = (simde__m128i *)&rxdataF_comp[nb_rx_ant][symbol * buffer_length];
if (mod_order > 2) { if (mod_order > 2) {
if (mod_order == 4) { if (mod_order == 4) {
@@ -821,12 +818,12 @@ static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
QAM_amp128b = simde_mm_set1_epi16(QAM256_n2); QAM_amp128b = simde_mm_set1_epi16(QAM256_n2);
QAM_amp128c = simde_mm_set1_epi16(QAM256_n3); QAM_amp128c = simde_mm_set1_epi16(QAM256_n3);
} }
ul_ch_mag128_0 = (simde__m128i *) &ul_ch_mag[0]; ul_ch_mag128_0 = (simde__m128i *)&ul_ch_mag[0];
ul_ch_mag128b_0 = (simde__m128i *)&ul_ch_magb[0]; ul_ch_mag128b_0 = (simde__m128i *)&ul_ch_magb[0];
ul_ch_mag128c_0 = (simde__m128i *)&ul_ch_magc[0]; ul_ch_mag128c_0 = (simde__m128i *)&ul_ch_magc[0];
ul_ch_mag128_1 = (simde__m128i *) &((int *)ul_ch_mag)[1 * buffer_length]; ul_ch_mag128_1 = (simde__m128i *)&ul_ch_mag[1];
ul_ch_mag128b_1 = (simde__m128i *)&((int *)ul_ch_magb)[1 * buffer_length]; ul_ch_mag128b_1 = (simde__m128i *)&ul_ch_magb[1];
ul_ch_mag128c_1 = (simde__m128i *)&((int *)ul_ch_magc)[1 * buffer_length]; ul_ch_mag128c_1 = (simde__m128i *)&ul_ch_magc[1];
} }
for (int rb = 0; rb < 3 * nb_rb_0; rb++) { for (int rb = 0; rb < 3 * nb_rb_0; rb++) {
@@ -973,28 +970,29 @@ static void inner_rx(PHY_VARS_gNB *gNB,
for (int i = 0; i < nb_layer; i++) for (int i = 0; i < nb_layer; i++)
memset(&pusch_vars->rxdataF_comp[i*nb_rx_ant][symbol * buffer_length], 0, sizeof(int32_t) * buffer_length); memset(&pusch_vars->rxdataF_comp[i*nb_rx_ant][symbol * buffer_length], 0, sizeof(int32_t) * buffer_length);
nr_ulsch_channel_compensation((c16_t*)rxFext, nr_ulsch_channel_compensation(buffer_length,
(c16_t*)chFext, nb_rx_ant,
(c16_t*)rxF_ch_maga, rxFext,
(c16_t*)rxF_ch_magb, chFext,
(c16_t*)rxF_ch_magc, rxF_ch_maga,
rxF_ch_magb,
rxF_ch_magc,
pusch_vars->rxdataF_comp, pusch_vars->rxdataF_comp,
(nb_layer == 1) ? NULL : (c16_t*)rho, nb_layer,
frame_parms, rho,
rel15_ul, rel15_ul,
symbol, symbol,
buffer_length,
output_shift); output_shift);
if (nb_layer == 1 && rel15_ul->transform_precoding == transformPrecoder_enabled && rel15_ul->qam_mod_order <= 6) { if (nb_layer == 1 && rel15_ul->transform_precoding == transformPrecoder_enabled && rel15_ul->qam_mod_order <= 6) {
if (rel15_ul->qam_mod_order > 2) if (rel15_ul->qam_mod_order > 2)
nr_freq_equalization(frame_parms, nr_freq_equalization(frame_parms,
&pusch_vars->rxdataF_comp[0][symbol * buffer_length], (c16_t *)&pusch_vars->rxdataF_comp[0][symbol * buffer_length],
(int *)rxF_ch_maga, rxF_ch_maga[0],
(int *)rxF_ch_magb, rxF_ch_magb[0],
symbol, symbol,
pusch_vars->ul_valid_re_per_slot[symbol], pusch_vars->ul_valid_re_per_slot[symbol],
rel15_ul->qam_mod_order); rel15_ul->qam_mod_order);
nr_idft(&pusch_vars->rxdataF_comp[0][symbol * buffer_length], pusch_vars->ul_valid_re_per_slot[symbol]); nr_idft(&pusch_vars->rxdataF_comp[0][symbol * buffer_length], pusch_vars->ul_valid_re_per_slot[symbol]);
} }
if (rel15_ul->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) { if (rel15_ul->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
@@ -1024,17 +1022,14 @@ static void inner_rx(PHY_VARS_gNB *gNB,
rel15_ul->qam_mod_order); rel15_ul->qam_mod_order);
} }
else { else {
nr_ulsch_mmse_2layers(frame_parms, nr_ulsch_mmse_2layers((int32_t **)pusch_vars->rxdataF_comp,
(int32_t **)pusch_vars->rxdataF_comp,
(int **)rxF_ch_maga,
(int **)rxF_ch_magb,
(int **)rxF_ch_magc,
nb_layer,
nb_rx_ant,
buffer_length, buffer_length,
nb_rx_ant,
rxF_ch_maga,
rxF_ch_magb,
rxF_ch_magc,
chFext, chFext,
rel15_ul->rb_size, rel15_ul->rb_size,
frame_parms->nb_antennas_rx,
rel15_ul->qam_mod_order, rel15_ul->qam_mod_order,
pusch_vars->log2_maxh, pusch_vars->log2_maxh,
symbol, symbol,
@@ -1045,9 +1040,9 @@ static void inner_rx(PHY_VARS_gNB *gNB,
if (nb_layer != 2 || rel15_ul->qam_mod_order > 6) if (nb_layer != 2 || rel15_ul->qam_mod_order > 6)
for (int aatx = 0; aatx < nb_layer; aatx++) for (int aatx = 0; aatx < nb_layer; aatx++)
nr_ulsch_compute_llr((int32_t *)&pusch_vars->rxdataF_comp[aatx * nb_rx_ant][symbol * buffer_length], nr_ulsch_compute_llr((int32_t *)&pusch_vars->rxdataF_comp[aatx * nb_rx_ant][symbol * buffer_length],
(int32_t *)rxF_ch_maga[aatx], rxF_ch_maga[aatx],
(int32_t *)rxF_ch_magb[aatx], rxF_ch_magb[aatx],
(int32_t *)rxF_ch_magc[aatx], rxF_ch_magc[aatx],
llr[aatx], llr[aatx],
pusch_vars->ul_valid_re_per_slot[symbol], pusch_vars->ul_valid_re_per_slot[symbol],
symbol, symbol,
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
+3 -3
View File
@@ -39,9 +39,9 @@
#endif #endif
void nr_ulsch_compute_llr(int32_t *rxdataF_comp, void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag, c16_t *ul_ch_mag,
int32_t *ul_ch_magb, c16_t *ul_ch_magb,
int32_t *ul_ch_magc, c16_t *ul_ch_magc,
int16_t *ulsch_llr, int16_t *ulsch_llr,
uint32_t nb_re, uint32_t nb_re,
uint8_t symbol, uint8_t symbol,
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+30 -30
View File
@@ -82,9 +82,9 @@ static void nr_dlsch_mmse(uint32_t rx_size_symbol,
unsigned char n_rx, unsigned char n_rx,
unsigned char n_tx, // number of layer unsigned char n_tx, // number of layer
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[][n_rx][rx_size_symbol], c16_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol], c16_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol], c16_t dl_ch_magr[][n_rx][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol], int32_t dl_ch_estimates_ext[][rx_size_symbol],
unsigned short nb_rb, unsigned short nb_rb,
unsigned char mod_order, unsigned char mod_order,
@@ -109,9 +109,9 @@ static void nr_dlsch_llr(uint32_t rx_size_symbol,
uint sz, uint sz,
int16_t layer_llr[][sz], int16_t layer_llr[][sz],
int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[rx_size_symbol], c16_t dl_ch_mag[rx_size_symbol],
int32_t dl_ch_magb[rx_size_symbol], c16_t dl_ch_magb[rx_size_symbol],
int32_t dl_ch_magr[rx_size_symbol], c16_t dl_ch_magr[rx_size_symbol],
NR_DL_UE_HARQ_t *dlsch0_harq, NR_DL_UE_HARQ_t *dlsch0_harq,
NR_DL_UE_HARQ_t *dlsch1_harq, NR_DL_UE_HARQ_t *dlsch1_harq,
unsigned char symbol, unsigned char symbol,
@@ -178,9 +178,9 @@ static void nr_dlsch_channel_compensation(uint32_t rx_size_symbol,
int nbRx, int nbRx,
c16_t rxdataF_ext[][rx_size_symbol], c16_t rxdataF_ext[][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol], int32_t dl_ch_estimates_ext[][rx_size_symbol],
int32_t dl_ch_mag[][nbRx][rx_size_symbol], c16_t dl_ch_mag[][nbRx][rx_size_symbol],
int32_t dl_ch_magb[][nbRx][rx_size_symbol], c16_t dl_ch_magb[][nbRx][rx_size_symbol],
int32_t dl_ch_magr[][nbRx][rx_size_symbol], c16_t dl_ch_magr[][nbRx][rx_size_symbol],
int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int ***rho, int ***rho,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
@@ -221,9 +221,9 @@ static void nr_dlsch_detection_mrc(uint32_t rx_size_symbol,
short n_rx, short n_rx,
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int ***rho, int ***rho,
int32_t dl_ch_mag[][n_rx][rx_size_symbol], c16_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol], c16_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol], c16_t dl_ch_magr[][n_rx][rx_size_symbol],
unsigned char symbol, unsigned char symbol,
int length); int length);
@@ -331,13 +331,13 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
__attribute__((aligned(32))) int32_t dl_ch_estimates_ext[matrixSz][rx_size_symbol]; __attribute__((aligned(32))) int32_t dl_ch_estimates_ext[matrixSz][rx_size_symbol];
memset(dl_ch_estimates_ext, 0, sizeof(dl_ch_estimates_ext)); memset(dl_ch_estimates_ext, 0, sizeof(dl_ch_estimates_ext));
__attribute__((aligned(32))) int32_t dl_ch_mag[nl][ue->frame_parms.nb_antennas_rx][rx_size_symbol]; __attribute__((aligned(32))) c16_t dl_ch_mag[nl][ue->frame_parms.nb_antennas_rx][rx_size_symbol];
memset(dl_ch_mag, 0, sizeof(dl_ch_mag)); memset(dl_ch_mag, 0, sizeof(dl_ch_mag));
__attribute__((aligned(32))) int32_t dl_ch_magb[nl][nbRx][rx_size_symbol]; __attribute__((aligned(32))) c16_t dl_ch_magb[nl][nbRx][rx_size_symbol];
memset(dl_ch_magb, 0, sizeof(dl_ch_magb)); memset(dl_ch_magb, 0, sizeof(dl_ch_magb));
__attribute__((aligned(32))) int32_t dl_ch_magr[nl][nbRx][rx_size_symbol]; __attribute__((aligned(32))) c16_t dl_ch_magr[nl][nbRx][rx_size_symbol];
memset(dl_ch_magr, 0, sizeof(dl_ch_magr)); memset(dl_ch_magr, 0, sizeof(dl_ch_magr));
NR_UE_COMMON *common_vars = &ue->common_vars; NR_UE_COMMON *common_vars = &ue->common_vars;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
@@ -866,9 +866,9 @@ static void nr_dlsch_channel_compensation(uint32_t rx_size_symbol,
int nbRx, int nbRx,
c16_t rxdataF_ext[][rx_size_symbol], c16_t rxdataF_ext[][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol], int32_t dl_ch_estimates_ext[][rx_size_symbol],
int32_t dl_ch_mag[][nbRx][rx_size_symbol], c16_t dl_ch_mag[][nbRx][rx_size_symbol],
int32_t dl_ch_magb[][nbRx][rx_size_symbol], c16_t dl_ch_magb[][nbRx][rx_size_symbol],
int32_t dl_ch_magr[][nbRx][rx_size_symbol], c16_t dl_ch_magr[][nbRx][rx_size_symbol],
int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int ***rho, int ***rho,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
@@ -882,7 +882,7 @@ static void nr_dlsch_channel_compensation(uint32_t rx_size_symbol,
PHY_NR_MEASUREMENTS *measurements) PHY_NR_MEASUREMENTS *measurements)
{ {
simde__m128i *dl_ch128, *dl_ch128_2, *dl_ch_mag128, *dl_ch_mag128b, *dl_ch_mag128r, *rxdataF128, *rxdataF_comp128, *rho128; simde__m128i *dl_ch128, *dl_ch128_2, *dl_ch_mag128, *dl_ch_mag128b, *dl_ch_mag128r, *rxdataF128, *rxdataF_comp128, *rho128;
simde__m128i mmtmpD0, mmtmpD1, QAM_amp128 = {0}, QAM_amp128b = {0}, QAM_amp128r = {0}; simde__m128i QAM_amp128 = {0}, QAM_amp128b = {0}, QAM_amp128r = {0};
uint32_t nb_rb_0 = length / 12 + ((length % 12) ? 1 : 0); uint32_t nb_rb_0 = length / 12 + ((length % 12) ? 1 : 0);
@@ -913,10 +913,10 @@ static void nr_dlsch_channel_compensation(uint32_t rx_size_symbol,
if (mod_order > 2) { if (mod_order > 2) {
// get channel amplitude if not QPSK // get channel amplitude if not QPSK
mmtmpD0 = simde_mm_madd_epi16(dl_ch128[0], dl_ch128[0]); simde__m128i mmtmpD0 = simde_mm_madd_epi16(dl_ch128[0], dl_ch128[0]);
mmtmpD0 = simde_mm_srai_epi32(mmtmpD0, output_shift); mmtmpD0 = simde_mm_srai_epi32(mmtmpD0, output_shift);
mmtmpD1 = simde_mm_madd_epi16(dl_ch128[1], dl_ch128[1]); simde__m128i mmtmpD1 = simde_mm_madd_epi16(dl_ch128[1], dl_ch128[1]);
mmtmpD1 = simde_mm_srai_epi32(mmtmpD1, output_shift); mmtmpD1 = simde_mm_srai_epi32(mmtmpD1, output_shift);
mmtmpD0 = simde_mm_packs_epi32(mmtmpD0, mmtmpD1); //|H[0]|^2 |H[1]|^2 |H[2]|^2 |H[3]|^2 |H[4]|^2 |H[5]|^2 |H[6]|^2 |H[7]|^2 mmtmpD0 = simde_mm_packs_epi32(mmtmpD0, mmtmpD1); //|H[0]|^2 |H[1]|^2 |H[2]|^2 |H[3]|^2 |H[4]|^2 |H[5]|^2 |H[6]|^2 |H[7]|^2
@@ -1224,9 +1224,9 @@ static void nr_dlsch_detection_mrc(uint32_t rx_size_symbol,
short n_rx, short n_rx,
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int ***rho, int ***rho,
int32_t dl_ch_mag[][n_rx][rx_size_symbol], c16_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol], c16_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol], c16_t dl_ch_magr[][n_rx][rx_size_symbol],
unsigned char symbol, unsigned char symbol,
int length) int length)
{ {
@@ -1557,9 +1557,9 @@ static void nr_dlsch_mmse(uint32_t rx_size_symbol,
unsigned char n_rx, unsigned char n_rx,
unsigned char nl, // number of layer unsigned char nl, // number of layer
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[][n_rx][rx_size_symbol], c16_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol], c16_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol], c16_t dl_ch_magr[][n_rx][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol], int32_t dl_ch_estimates_ext[][rx_size_symbol],
unsigned short nb_rb, unsigned short nb_rb,
unsigned char mod_order, unsigned char mod_order,
@@ -1754,9 +1754,9 @@ static void nr_dlsch_llr(uint32_t rx_size_symbol,
uint sz, uint sz,
int16_t layer_llr[][sz], int16_t layer_llr[][sz],
int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT], int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[rx_size_symbol], c16_t dl_ch_mag[rx_size_symbol],
int32_t dl_ch_magb[rx_size_symbol], c16_t dl_ch_magb[rx_size_symbol],
int32_t dl_ch_magr[rx_size_symbol], c16_t dl_ch_magr[rx_size_symbol],
NR_DL_UE_HARQ_t *dlsch0_harq, NR_DL_UE_HARQ_t *dlsch0_harq,
NR_DL_UE_HARQ_t *dlsch1_harq, NR_DL_UE_HARQ_t *dlsch1_harq,
unsigned char symbol, unsigned char symbol,
openair1/PHY/nr_phy_common/inc/nr_phy_common.h
+3 -3
View File
@@ -47,9 +47,9 @@ typedef struct {
csi_mapping_parms_t get_csi_mapping_parms(int row, int b, int l0, int l1); csi_mapping_parms_t get_csi_mapping_parms(int row, int b, int l0, int l1);
int get_cdm_group_size(int cdm_type); int get_cdm_group_size(int cdm_type);
void nr_qpsk_llr(int32_t *rxdataF_comp, int16_t *llr, uint32_t nb_re); void nr_qpsk_llr(int32_t *rxdataF_comp, int16_t *llr, uint32_t nb_re);
void nr_16qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag_in, int16_t *llr, uint32_t nb_re); void nr_16qam_llr(int32_t *rxdataF_comp, c16_t *ch_mag_in, int16_t *llr, uint32_t nb_re);
void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int16_t *llr, uint32_t nb_re); void nr_64qam_llr(int32_t *rxdataF_comp, c16_t *ch_mag, c16_t *ch_mag2, int16_t *llr, uint32_t nb_re);
void nr_256qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int32_t *ch_mag3, int16_t *llr, uint32_t nb_re); void nr_256qam_llr(int32_t *rxdataF_comp, c16_t *ch_mag, c16_t *ch_mag2, c16_t *ch_mag3, int16_t *llr, uint32_t nb_re);
void freq2time(uint16_t ofdm_symbol_size, int16_t *freq_signal, int16_t *time_signal); void freq2time(uint16_t ofdm_symbol_size, int16_t *freq_signal, int16_t *time_signal);
void nr_est_delay(int ofdm_symbol_size, const c16_t *ls_est, c16_t *ch_estimates_time, delay_t *delay); void nr_est_delay(int ofdm_symbol_size, const c16_t *ls_est, c16_t *ch_estimates_time, delay_t *delay);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int total_nb_rb, int nb_rb); unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int total_nb_rb, int nb_rb);
openair1/PHY/nr_phy_common/src/nr_phy_common.c
+69 -103
View File
@@ -43,17 +43,17 @@ void init_byte2bit16(void)
} }
simde__m128i byte2m128i[256]; simde__m128i byte2m128i[256];
void init_byte2m128i(void) { void init_byte2m128i(void)
{
for (int s=0;s<256;s++) { for (int s = 0; s < 256; s++) {
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*(s&1)),0); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * (s & 1)), 0);
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*((s>>1)&1)),1); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * ((s >> 1) & 1)), 1);
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*((s>>2)&1)),2); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * ((s >> 2) & 1)), 2);
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*((s>>3)&1)),3); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * ((s >> 3) & 1)), 3);
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*((s>>4)&1)),4); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * ((s >> 4) & 1)), 4);
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*((s>>5)&1)),5); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * ((s >> 5) & 1)), 5);
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*((s>>6)&1)),6); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * ((s >> 6) & 1)), 6);
byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s],(1-2*((s>>7)&1)),7); byte2m128i[s] = simde_mm_insert_epi16(byte2m128i[s], (1 - 2 * ((s >> 7) & 1)), 7);
} }
} }
@@ -71,17 +71,12 @@ void init_delay_table(uint16_t ofdm_symbol_size,
} }
} }
int16_t saturating_sub(int16_t a, int16_t b) static inline c16_t saturating_sub(c16_t a, c16_t b)
{ {
int32_t result = (int32_t)a - (int32_t)b; c32_t tmp = {a.r - abs(b.r), a.i - abs(b.i)};
tmp = (c32_t){min(tmp.r, INT16_MAX), min(tmp.i, INT16_MAX)};
if (result < INT16_MIN) { c16_t tmp2 = (c16_t){max(tmp.r, -INT16_MAX), max(tmp.i, -INT16_MAX)};
return INT16_MIN; return tmp2;
} else if (result > INT16_MAX) {
return INT16_MAX;
} else {
return (int16_t)result;
}
} }
//---------------------------------------------------------------------------------------------- //----------------------------------------------------------------------------------------------
@@ -101,23 +96,21 @@ void nr_qpsk_llr(int32_t *rxdataF_comp, int16_t *llr, uint32_t nb_re)
// 16-QAM // 16-QAM
//---------------------------------------------------------------------------------------------- //----------------------------------------------------------------------------------------------
void nr_16qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag_in, int16_t *llr, uint32_t nb_re) void nr_16qam_llr(int32_t *rxdataF_comp, c16_t *ch_mag_in, int16_t *llr, uint32_t nb_re)
{ {
simde__m256i *rxF_256 = (simde__m256i *)rxdataF_comp; simde__m256i *rxF_256 = (simde__m256i *)rxdataF_comp;
simde__m256i *ch_mag = (simde__m256i *)ch_mag_in; simde__m256i *ch_mag256 = (simde__m256i *)ch_mag_in;
int64_t *llr_64 = (int64_t *)llr; int64_t *llr_64 = (int64_t *)llr;
#ifndef USE_128BIT #ifndef USE_128BIT
simde__m256i xmm0, xmm1, xmm2;
for (int i = 0; i < (nb_re >> 3); i++) { for (int i = 0; i < (nb_re >> 3); i++) {
// registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I| // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm256_abs_epi16(*rxF_256); simde__m256i xmm0 = protected_abs256(*rxF_256);
// registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2 // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
xmm0 = simde_mm256_subs_epi16(*ch_mag, xmm0); xmm0 = simde_mm256_subs_epi16(*ch_mag256, xmm0);
xmm1 = simde_mm256_unpacklo_epi32(*rxF_256, xmm0); simde__m256i xmm1 = simde_mm256_unpacklo_epi32(*rxF_256, xmm0);
xmm2 = simde_mm256_unpackhi_epi32(*rxF_256, xmm0); simde__m256i xmm2 = simde_mm256_unpackhi_epi32(*rxF_256, xmm0);
// xmm1 |1st 2ed 3rd 4th 9th 10th 13rd 14th| // xmm1 |1st 2ed 3rd 4th 9th 10th 13rd 14th|
// xmm2 |5th 6th 7th 8th 11st 12ed 15th 16th| // xmm2 |5th 6th 7th 8th 11st 12ed 15th 16th|
@@ -131,20 +124,20 @@ void nr_16qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag_in, int16_t *llr, uint3
*llr_64++ = simde_mm256_extract_epi64(xmm2, 2); *llr_64++ = simde_mm256_extract_epi64(xmm2, 2);
*llr_64++ = simde_mm256_extract_epi64(xmm2, 3); *llr_64++ = simde_mm256_extract_epi64(xmm2, 3);
rxF_256++; rxF_256++;
ch_mag++; ch_mag256++;
} }
nb_re &= 0x7; nb_re &= 0x7;
#endif #endif
simde__m128i *rxF_128 = (simde__m128i *)rxF_256; simde__m128i *rxF_128 = (simde__m128i *)rxF_256;
simde__m128i *ch_mag_128 = (simde__m128i *)ch_mag; simde__m128i *ch_mag_128 = (simde__m128i *)ch_mag256;
simde__m128i *llr_128 = (simde__m128i *)llr_64; simde__m128i *llr_128 = (simde__m128i *)llr_64;
// Each iteration does 4 RE (gives 16 16bit-llrs) // Each iteration does 4 RE (gives 16 16bit-llrs)
for (int i = 0; i < (nb_re >> 2); i++) { for (int i = 0; i < (nb_re >> 2); i++) {
// registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I| // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
simde__m128i xmm0 = simde_mm_abs_epi16(*rxF_128); simde__m128i xmm0 = protected_abs128(*rxF_128);
// registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2 // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
xmm0 = simde_mm_subs_epi16(*ch_mag_128, xmm0); xmm0 = simde_mm_subs_epi16(*ch_mag_128, xmm0);
@@ -157,18 +150,13 @@ void nr_16qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag_in, int16_t *llr, uint3
nb_re &= 0x3; nb_re &= 0x3;
int16_t *rxDataF_i16 = (int16_t *)rxF_128; c16_t *rxDataF = (c16_t *)rxF_128;
int16_t *ch_mag_i16 = (int16_t *)ch_mag_128; c16_t *ch_mag = (c16_t *)ch_mag_128;
int16_t *llr_i16 = (int16_t *)llr_128; c16_t *llr_tail = (c16_t *)llr_128;
for (uint i = 0U; i < nb_re; i++) { for (uint i = 0U; i < nb_re; i++) {
int16_t real = rxDataF_i16[2 * i]; c16_t tmp = *rxDataF++;
int16_t imag = rxDataF_i16[2 * i + 1]; *llr_tail++ = tmp;
int16_t mag_real = ch_mag_i16[2 * i]; *llr_tail++ = saturating_sub(*ch_mag++, tmp);
int16_t mag_imag = ch_mag_i16[2 * i + 1];
llr_i16[4 * i] = real;
llr_i16[4 * i + 1] = imag;
llr_i16[4 * i + 2] = saturating_sub(mag_real, abs(real));
llr_i16[4 * i + 3] = saturating_sub(mag_imag, abs(imag));
} }
} }
@@ -176,7 +164,7 @@ void nr_16qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag_in, int16_t *llr, uint3
// 64-QAM // 64-QAM
//---------------------------------------------------------------------------------------------- //----------------------------------------------------------------------------------------------
void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int16_t *llr, uint32_t nb_re) void nr_64qam_llr(int32_t *rxdataF_comp, c16_t *ch_mag, c16_t *ch_mag2, int16_t *llr, uint32_t nb_re)
{ {
simde__m256i *rxF = (simde__m256i *)rxdataF_comp; simde__m256i *rxF = (simde__m256i *)rxdataF_comp;
@@ -184,15 +172,14 @@ void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int1
simde__m256i *ch_magb = (simde__m256i *)ch_mag2; simde__m256i *ch_magb = (simde__m256i *)ch_mag2;
int32_t *llr_32 = (int32_t *)llr; int32_t *llr_32 = (int32_t *)llr;
#ifndef USE_128BIT #ifndef USE_128BIT
for (int i = 0; i < (nb_re >> 3); i++) { for (int i = 0; i < (nb_re >> 3); i++) {
simde__m256i xmm0 = simde_mm256_loadu_si256(rxF); simde__m256i xmm0 = simde_mm256_loadu_si256(rxF);
// registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I| // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
simde__m256i xmm1 = simde_mm256_abs_epi16(xmm0); simde__m256i xmm1 = protected_abs256(xmm0);
// registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2 // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
xmm1 = simde_mm256_subs_epi16(*ch_maga, xmm1); xmm1 = simde_mm256_subs_epi16(*ch_maga, xmm1);
simde__m256i xmm2 = simde_mm256_abs_epi16(xmm1); simde__m256i xmm2 = protected_abs256(xmm1);
xmm2 = simde_mm256_subs_epi16(*ch_magb, xmm2); xmm2 = simde_mm256_subs_epi16(*ch_magb, xmm2);
// xmm0 |1st 4th 7th 10th 13th 16th 19th 22ed| // xmm0 |1st 4th 7th 10th 13th 16th 19th 22ed|
// xmm1 |2ed 5th 8th 11th 14th 17th 20th 23rd| // xmm1 |2ed 5th 8th 11th 14th 17th 20th 23rd|
@@ -244,9 +231,9 @@ void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int1
for (int i = 0; i < (nb_re >> 2); i++) { for (int i = 0; i < (nb_re >> 2); i++) {
simde__m128i xmm0, xmm1, xmm2; simde__m128i xmm0, xmm1, xmm2;
xmm0 = *rxF_128; xmm0 = *rxF_128;
xmm1 = simde_mm_abs_epi16(xmm0); xmm1 = protected_abs128(xmm0);
xmm1 = simde_mm_subs_epi16(*ch_mag_128, xmm1); xmm1 = simde_mm_subs_epi16(*ch_mag_128, xmm1);
xmm2 = simde_mm_abs_epi16(xmm1); xmm2 = protected_abs128(xmm1);
xmm2 = simde_mm_subs_epi16(*ch_magb_128, xmm2); xmm2 = simde_mm_subs_epi16(*ch_magb_128, xmm2);
*llr_32++ = simde_mm_extract_epi32(xmm0, 0); *llr_32++ = simde_mm_extract_epi32(xmm0, 0);
@@ -268,27 +255,19 @@ void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int1
nb_re &= 0x3; nb_re &= 0x3;
int16_t *rxDataF_i16 = (int16_t *)rxF_128; c16_t *rxDataF = (c16_t *)rxF_128;
int16_t *ch_mag_i16 = (int16_t *)ch_mag_128; c16_t *ch_mag_tail = (c16_t *)ch_mag_128;
int16_t *ch_magb_i16 = (int16_t *)ch_magb_128; c16_t *ch_magb_tail = (c16_t *)ch_magb_128;
int16_t *llr_i16 = (int16_t *)llr_32; c16_t *llr_tail = (c16_t *)llr_32;
for (int i = 0; i < nb_re; i++) { for (int i = 0; i < nb_re; i++) {
int16_t real = rxDataF_i16[2 * i]; *llr_tail++ = *rxDataF;
int16_t imag = rxDataF_i16[2 * i + 1]; c16_t tmp = saturating_sub(*ch_mag_tail++, *rxDataF++);
int16_t mag_real = ch_mag_i16[2 * i]; *llr_tail++ = tmp;
int16_t mag_imag = ch_mag_i16[2 * i + 1]; *llr_tail++ = saturating_sub(*ch_magb_tail++, tmp);
llr_i16[6 * i] = real;
llr_i16[6 * i + 1] = imag;
llr_i16[6 * i + 2] = saturating_sub(mag_real, abs(real));
llr_i16[6 * i + 3] = saturating_sub(mag_imag, abs(imag));
int16_t mag_realb = ch_magb_i16[2 * i];
int16_t mag_imagb = ch_magb_i16[2 * i + 1];
llr_i16[6 * i + 4] = saturating_sub(mag_realb, abs(llr_i16[6 * i + 2]));
llr_i16[6 * i + 5] = saturating_sub(mag_imagb, abs(llr_i16[6 * i + 3]));
} }
} }
void nr_256qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int32_t *ch_mag3, int16_t *llr, uint32_t nb_re) void nr_256qam_llr(int32_t *rxdataF_comp, c16_t *ch_mag, c16_t *ch_mag2, c16_t *ch_mag3, int16_t *llr, uint32_t nb_re)
{ {
simde__m256i *rxF_256 = (simde__m256i *)rxdataF_comp; simde__m256i *rxF_256 = (simde__m256i *)rxdataF_comp;
simde__m256i *llr256 = (simde__m256i *)llr; simde__m256i *llr256 = (simde__m256i *)llr;
@@ -297,26 +276,24 @@ void nr_256qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int
simde__m256i *ch_magb = (simde__m256i *)ch_mag2; simde__m256i *ch_magb = (simde__m256i *)ch_mag2;
simde__m256i *ch_magc = (simde__m256i *)ch_mag3; simde__m256i *ch_magc = (simde__m256i *)ch_mag3;
#ifndef USE_128BIT #ifndef USE_128BIT
simde__m256i xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6;
for (int i = 0; i < (nb_re >> 3); i++) { for (int i = 0; i < (nb_re >> 3); i++) {
// registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I| // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm256_abs_epi16(*rxF_256); simde__m256i xmm0 = protected_abs256(*rxF_256);
// registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2 // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
xmm0 = simde_mm256_subs_epi16(*ch_maga, xmm0); xmm0 = simde_mm256_subs_epi16(*ch_maga, xmm0);
// xmmtmpD2 contains 16 LLRs // xmmtmpD2 contains 16 LLRs
xmm1 = simde_mm256_abs_epi16(xmm0); simde__m256i xmm1 = protected_abs256(xmm0);
xmm1 = simde_mm256_subs_epi16(*ch_magb, xmm1); // contains 16 LLRs xmm1 = simde_mm256_subs_epi16(*ch_magb, xmm1); // contains 16 LLRs
xmm2 = simde_mm256_abs_epi16(xmm1); simde__m256i xmm2 = protected_abs256(xmm1);
xmm2 = simde_mm256_subs_epi16(*ch_magc, xmm2); // contains 16 LLRs xmm2 = simde_mm256_subs_epi16(*ch_magc, xmm2); // contains 16 LLRs
// rxF[i] A0 A1 A2 A3 A4 A5 A6 A7 bits 7,6 // rxF[i] A0 A1 A2 A3 A4 A5 A6 A7 bits 7,6
// xmm0 B0 B1 B2 B3 B4 B5 B6 B7 bits 5,4 // xmm0 B0 B1 B2 B3 B4 B5 B6 B7 bits 5,4
// xmm1 C0 C1 C2 C3 C4 C5 C6 C7 bits 3,2 // xmm1 C0 C1 C2 C3 C4 C5 C6 C7 bits 3,2
// xmm2 D0 D1 D2 D3 D4 D5 D6 D7 bits 1,0 // xmm2 D0 D1 D2 D3 D4 D5 D6 D7 bits 1,0
xmm3 = simde_mm256_unpacklo_epi32(*rxF_256, xmm0); // A0 B0 A1 B1 A4 B4 A5 B5 simde__m256i xmm3 = simde_mm256_unpacklo_epi32(*rxF_256, xmm0); // A0 B0 A1 B1 A4 B4 A5 B5
xmm4 = simde_mm256_unpackhi_epi32(*rxF_256, xmm0); // A2 B2 A3 B3 A6 B6 A7 B7 simde__m256i xmm4 = simde_mm256_unpackhi_epi32(*rxF_256, xmm0); // A2 B2 A3 B3 A6 B6 A7 B7
xmm5 = simde_mm256_unpacklo_epi32(xmm1, xmm2); // C0 D0 C1 D1 C4 D4 C5 D5 simde__m256i xmm5 = simde_mm256_unpacklo_epi32(xmm1, xmm2); // C0 D0 C1 D1 C4 D4 C5 D5
xmm6 = simde_mm256_unpackhi_epi32(xmm1, xmm2); // C2 D2 C3 D3 C6 D6 C7 D7 simde__m256i xmm6 = simde_mm256_unpackhi_epi32(xmm1, xmm2); // C2 D2 C3 D3 C6 D6 C7 D7
xmm0 = simde_mm256_unpacklo_epi64(xmm3, xmm5); // A0 B0 C0 D0 A4 B4 C4 D4 xmm0 = simde_mm256_unpacklo_epi64(xmm3, xmm5); // A0 B0 C0 D0 A4 B4 C4 D4
xmm1 = simde_mm256_unpackhi_epi64(xmm3, xmm5); // A1 B1 C1 D1 A5 B5 C5 D5 xmm1 = simde_mm256_unpackhi_epi64(xmm3, xmm5); // A1 B1 C1 D1 A5 B5 C5 D5
@@ -341,16 +318,15 @@ void nr_256qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int
simde__m128i *ch_maga_128 = (simde__m128i *)ch_maga; simde__m128i *ch_maga_128 = (simde__m128i *)ch_maga;
simde__m128i *ch_magb_128 = (simde__m128i *)ch_magb; simde__m128i *ch_magb_128 = (simde__m128i *)ch_magb;
simde__m128i *ch_magc_128 = (simde__m128i *)ch_magc; simde__m128i *ch_magc_128 = (simde__m128i *)ch_magc;
for (int i = 0; i < (nb_re >> 2); i++) { for (int i = 0; i < (nb_re >> 2); i++) {
simde__m128i xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6; simde__m128i xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6;
// registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I| // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm_abs_epi16(*rxF_128); xmm0 = protected_abs128(*rxF_128);
// registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2 // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
xmm0 = simde_mm_subs_epi16(*ch_maga_128, xmm0); xmm0 = simde_mm_subs_epi16(*ch_maga_128, xmm0);
xmm1 = simde_mm_abs_epi16(xmm0); xmm1 = protected_abs128(xmm0);
xmm1 = simde_mm_subs_epi16(*ch_magb_128, xmm1); // contains 8 LLRs xmm1 = simde_mm_subs_epi16(*ch_magb_128, xmm1); // contains 8 LLRs
xmm2 = simde_mm_abs_epi16(xmm1); xmm2 = protected_abs128(xmm1);
xmm2 = simde_mm_subs_epi16(*ch_magc_128, xmm2); // contains 8 LLRs xmm2 = simde_mm_subs_epi16(*ch_magc_128, xmm2); // contains 8 LLRs
// rxF[i] A0 A1 A2 A3 // rxF[i] A0 A1 A2 A3
// xmm0 B0 B1 B2 B3 // xmm0 B0 B1 B2 B3
@@ -372,30 +348,20 @@ void nr_256qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int
ch_magc_128++; ch_magc_128++;
} }
if (nb_re & 3) { nb_re &= 0x3;
for (int i = 0; i < (nb_re & 0x3); i++) { c16_t *rxDataF = (c16_t *)rxF_128;
int16_t *rxDataF_i16 = (int16_t *)rxF_128; c16_t *ch_mag_tail = (c16_t *)ch_maga_128;
int16_t *ch_mag_i16 = (int16_t *)ch_maga_128; c16_t *ch_magb_tail = (c16_t *)ch_magb_128;
int16_t *ch_magb_i16 = (int16_t *)ch_magb_128; c16_t *ch_magc_tail = (c16_t *)ch_magc_128;
int16_t *ch_magc_i16 = (int16_t *)ch_magc_128; c16_t *llr_tail = (c16_t *)llr_128;
int16_t *llr_i16 = (int16_t *)llr_128; for (int i = 0; i < nb_re; i++) {
int16_t real = rxDataF_i16[2 * i + 0]; c16_t tmp = *rxDataF++;
int16_t imag = rxDataF_i16[2 * i + 1]; *llr_tail++ = tmp;
int16_t mag_real = ch_mag_i16[2 * i]; c16_t tmp1 = saturating_sub(*ch_mag_tail++, tmp);
int16_t mag_imag = ch_mag_i16[2 * i + 1]; *llr_tail++ = tmp1;
llr_i16[8 * i] = real; c16_t tmp2 = saturating_sub(*ch_magb_tail++, tmp1);
llr_i16[8 * i + 1] = imag; *llr_tail++ = tmp2;
llr_i16[8 * i + 2] = saturating_sub(mag_real, abs(real)); *llr_tail++ = saturating_sub(*ch_magc_tail++, tmp2);
llr_i16[8 * i + 3] = saturating_sub(mag_imag, abs(imag));
int16_t magb_real = ch_magb_i16[2 * i];
int16_t magb_imag = ch_magb_i16[2 * i + 1];
llr_i16[8 * i + 4] = saturating_sub(magb_real, abs(llr_i16[8 * i + 2]));
llr_i16[8 * i + 5] = saturating_sub(magb_imag, abs(llr_i16[8 * i + 3]));
int16_t magc_real = ch_magc_i16[2 * i];
int16_t magc_imag = ch_magc_i16[2 * i + 1];
llr_i16[8 * i + 6] = saturating_sub(magc_real, abs(llr_i16[8 * i + 4]));
llr_i16[8 * i + 7] = saturating_sub(magc_imag, abs(llr_i16[8 * i + 5]));
}
} }
} }