Merge remote-tracking branch 'origin/develop' into aw2s-n41

Conflicts:
	executables/nr-softmodem.c
	openair1/PHY/NR_TRANSPORT/nr_dlsch.c
	openair1/PHY/NR_TRANSPORT/pucch_rx.c
	openair1/SIMULATION/NR_PHY/dlsim.c
	openair1/SIMULATION/NR_PHY/ulsim.c
	openair2/LAYER2/NR_MAC_gNB/config.c
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
This commit is contained in:
Raymond Knopp
2022-01-24 11:11:46 +01:00
554 changed files with 28495 additions and 19840 deletions
+2 -1
View File
@@ -148,7 +148,8 @@ int openair0_device_load(openair0_device *device,
LOG_E(HW, "%s %d:Unsupported radio head\n", __FILE__, __LINE__);
return -1;
}
}
} else
AssertFatal(false, "can't open the radio device: %s\n", get_devname(device->type));
return rc;
}
+2 -1
View File
@@ -820,7 +820,8 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
AssertFatal((rfsimulator->epollfd = epoll_create1(0)) != -1,"");
//randominit(0);
// we need to call randominit() for telnet server (use gaussdouble=>uniformrand)
randominit(0);
set_taus_seed(0);
/* look for telnet server, if it is loaded, add the channel modeling commands to it */
add_telnetcmd_func_t addcmd = (add_telnetcmd_func_t)get_shlibmodule_fptr("telnetsrv", TELNET_ADDCMD_FNAME);
+8 -4
View File
@@ -59,7 +59,7 @@ int create_tasks(uint32_t enb_nb) {
rc = itti_create_task (TASK_RRC_ENB, rrc_enb_task, NULL);
AssertFatal(rc >= 0, "Create task for RRC eNB failed\n");
if (EPC_MODE_ENABLED && ! ( split73==SPLIT73_DU ) ) {
if (get_softmodem_params()->emulate_l1 || (EPC_MODE_ENABLED && split73 != SPLIT73_DU)) {
rc = itti_create_task(TASK_SCTP, sctp_eNB_task, NULL);
AssertFatal(rc >= 0, "Create task for SCTP failed\n");
}
@@ -73,12 +73,13 @@ int create_tasks(uint32_t enb_nb) {
}
rc = itti_create_task(TASK_GTPV1_U, gtpv1u_eNB_task, NULL);
AssertFatal(rc >= 0, "Create task for GTPV1U failed\n");
if (is_x2ap_enabled()) {
}
if (is_x2ap_enabled()) {
rc = itti_create_task(TASK_X2AP, x2ap_task, NULL);
AssertFatal(rc >= 0, "Create task for X2AP failed\n");
} else {
} else {
LOG_I(X2AP, "X2AP is disabled.\n");
}
}
if (NODE_IS_CU(type)) {
@@ -89,6 +90,9 @@ int create_tasks(uint32_t enb_nb) {
if (NODE_IS_DU(type)) {
rc = itti_create_task(TASK_DU_F1, F1AP_DU_task, NULL);
AssertFatal(rc >= 0, "Create task for DU F1AP failed\n");
// DU is now GTP-U instead of protobuf
rc = itti_create_task(TASK_GTPV1_U, gtpv1u_eNB_task, NULL);
AssertFatal(rc >= 0, "Create task for GTPV1U failed\n");
}
if (!NODE_IS_CU(type)) {
+1
View File
@@ -51,6 +51,7 @@
int create_tasks_mbms(uint32_t enb_nb) {
// LOG_D(ENB_APP, "%s(enb_nb:%d\n", __FUNCTION__, enb_nb);
// ngran_node_t type = RC.rrc[0]->node_type;
AssertFatal(!get_softmodem_params()->nsa, "In NSA mode\n");
int rc;
if (enb_nb == 0) return 0;
+10
View File
@@ -22,6 +22,7 @@
# include "intertask_interface.h"
# include "create_tasks.h"
# include "common/utils/LOG/log.h"
# include "executables/softmodem-common.h"
#include "sctp_eNB_task.h"
#include "s1ap_eNB.h"
@@ -63,6 +64,15 @@ int create_tasks_ue(uint32_t ue_nb) {
LOG_E(RRC, "Create task for RRC UE failed\n");
return -1;
}
if (get_softmodem_params()->nsa) {
init_connections_with_nr_ue();
LOG_I(RRC, "Started LTE-NR link in the LTE UE\n");
if (itti_create_task (TASK_RRC_NSA_UE, recv_msgs_from_nr_ue, NULL) < 0) {
LOG_E(RRC, "Create task for RRC NSA UE failed\n");
return -1;
}
}
}
itti_wait_ready(0);
+1 -1
View File
@@ -28,7 +28,7 @@
# ifndef PHYSIM
# ifndef UE_EXPANSION
# define NUMBER_OF_UE_MAX 4
# define NUMBER_OF_UE_MAX 40
# define NUMBER_OF_NR_UE_MAX 4
# define NUMBER_OF_CONNECTED_eNB_MAX 1
# define NUMBER_OF_CONNECTED_gNB_MAX 1
@@ -55,15 +55,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -120,19 +111,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
#p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,20 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 4;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 4; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot (but is not used here)
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,19 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot (not used here)
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 4; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -118,18 +109,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -118,18 +109,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot (but not used here)
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 63; # this is SS=7 L=5
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 91; # this is SS=7 L=7
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,20 +108,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0; #12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; # used for (full) DL slot
initialDLBWPmappingType_0 = 0; # 0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; # this is SS=1,L=13
initialDLBWPk0_1 = 0; # used for DL part mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; # this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,19 +108,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for (full) UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for UL part mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,16 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -118,19 +108,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,16 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -118,19 +108,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,16 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -118,19 +108,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,16 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -118,19 +108,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,29 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -131,22 +108,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -55,28 +55,7 @@ gNBs =
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -130,21 +109,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -117,18 +108,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,15 +56,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -119,18 +110,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -79,31 +79,9 @@ gNBs =
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 53;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 81;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -158,21 +136,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=2 L=12
initialULBWPstartSymbolAndLength_0 = 53;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -69,29 +69,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -146,21 +123,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -1,4 +1,4 @@
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
@@ -7,7 +7,7 @@ gNBs =
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-Eurecom-5GNRBox";
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
@@ -73,15 +73,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -136,19 +127,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -204,7 +182,7 @@ gNBs =
};
////////// MME parameters:
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
@@ -226,59 +204,61 @@ gNBs =
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
}
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [41];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [41];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
@@ -298,23 +278,23 @@ security = {
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
@@ -0,0 +1,301 @@
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
sd = 0x1; // 0 false, else true
},
{
sst = 1;
sd = 0x112233; // 0 false, else true
}
);
});
nr_cellid = 12345678L;
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 2;
ul_prbblacklist = "51,52,53,54"
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 11;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68
absoluteFrequencySSB = 621312; # 641280
dl_frequencyBand = 78;
# this is 3300.60 MHz
dl_absoluteFrequencyPointA = 620040; # 640008
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875 12952
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 106;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 28875;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 12;
preambleReceivedTargetPower = -104;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -70;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
#pusch_TargetSNRx10 = 150;
#pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 4;
prach_dtx_threshold = 120;
#pucch0_dtx_threshold = 120;
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 2
nb_rx = 2
att_tx = 0
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
sf_extension = 0;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
#clock_src = "internal";
sdr_addrs = "mgmt_addr=192.168.10.2,addr=192.168.10.2,clock_source=internal,time_source=internal"
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
f1ap_log_level ="debug";
f1ap_log_verbosity ="medium";
};
@@ -1,4 +1,4 @@
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
@@ -7,7 +7,7 @@ gNBs =
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-Eurecom-5GNRBox";
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
@@ -73,15 +73,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -136,19 +127,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -204,7 +182,7 @@ gNBs =
};
////////// MME parameters:
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
@@ -226,59 +204,61 @@ gNBs =
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
}
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
@@ -298,23 +278,23 @@ security = {
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
@@ -70,29 +70,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -147,22 +124,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -0,0 +1,862 @@
<UE-NR-Capability>
<accessStratumRelease><rel15/></accessStratumRelease>
<pdcp-Parameters>
<supportedROHC-Profiles>
<profile0x0000><false/></profile0x0000>
<profile0x0001><false/></profile0x0001>
<profile0x0002><false/></profile0x0002>
<profile0x0003><false/></profile0x0003>
<profile0x0004><false/></profile0x0004>
<profile0x0006><false/></profile0x0006>
<profile0x0101><false/></profile0x0101>
<profile0x0102><false/></profile0x0102>
<profile0x0103><false/></profile0x0103>
<profile0x0104><false/></profile0x0104>
</supportedROHC-Profiles>
<maxNumberROHC-ContextSessions><cs2/></maxNumberROHC-ContextSessions>
<shortSN><supported/></shortSN>
</pdcp-Parameters>
<rlc-Parameters>
<am-WithShortSN><supported/></am-WithShortSN>
<um-WithShortSN><supported/></um-WithShortSN>
<um-WithLongSN><supported/></um-WithLongSN>
</rlc-Parameters>
<mac-Parameters>
<mac-ParametersXDD-Diff>
<logicalChannelSR-DelayTimer><supported/></logicalChannelSR-DelayTimer>
<longDRX-Cycle><supported/></longDRX-Cycle>
<shortDRX-Cycle><supported/></shortDRX-Cycle>
<multipleSR-Configurations><supported/></multipleSR-Configurations>
</mac-ParametersXDD-Diff>
</mac-Parameters>
<phy-Parameters>
<phy-ParametersCommon>
<nzp-CSI-RS-IntefMgmt><supported/></nzp-CSI-RS-IntefMgmt>
<dynamicHARQ-ACK-Codebook><supported/></dynamicHARQ-ACK-Codebook>
<semiStaticHARQ-ACK-Codebook><supported/></semiStaticHARQ-ACK-Codebook>
<pdsch-MappingTypeA><supported/></pdsch-MappingTypeA>
<rateMatchingResrcSetSemi-Static><supported/></rateMatchingResrcSetSemi-Static>
<ext2>
<maxLayersMIMO-Indication><supported/></maxLayersMIMO-Indication>
</ext2>
</phy-ParametersCommon>
<phy-ParametersFRX-Diff>
<twoFL-DMRS>
11
</twoFL-DMRS>
<supportedDMRS-TypeDL><type1/></supportedDMRS-TypeDL>
<supportedDMRS-TypeUL><type1And2/></supportedDMRS-TypeUL>
<onePortsPTRS>
01
</onePortsPTRS>
<pucch-F2-WithFH><supported/></pucch-F2-WithFH>
<pucch-F3-WithFH><supported/></pucch-F3-WithFH>
<absoluteTPC-Command><supported/></absoluteTPC-Command>
<pusch-HalfPi-BPSK><supported/></pusch-HalfPi-BPSK>
<pucch-F3-4-HalfPi-BPSK><supported/></pucch-F3-4-HalfPi-BPSK>
<ext1>
<csi-RS-IM-ReceptionForFeedback>
<maxConfigNumberNZP-CSI-RS-PerCC>8</maxConfigNumberNZP-CSI-RS-PerCC>
<maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>64</maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>
<maxConfigNumberCSI-IM-PerCC><n8/></maxConfigNumberCSI-IM-PerCC>
<maxNumberSimultaneousNZP-CSI-RS-PerCC>4</maxNumberSimultaneousNZP-CSI-RS-PerCC>
<totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>32</totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>
</csi-RS-IM-ReceptionForFeedback>
<csi-ReportFramework>
<maxNumberPeriodicCSI-PerBWP-ForCSI-Report>2</maxNumberPeriodicCSI-PerBWP-ForCSI-Report>
<maxNumberAperiodicCSI-PerBWP-ForCSI-Report>2</maxNumberAperiodicCSI-PerBWP-ForCSI-Report>
<maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>0</maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>
<maxNumberPeriodicCSI-PerBWP-ForBeamReport>2</maxNumberPeriodicCSI-PerBWP-ForBeamReport>
<maxNumberAperiodicCSI-PerBWP-ForBeamReport>2</maxNumberAperiodicCSI-PerBWP-ForBeamReport>
<maxNumberAperiodicCSI-triggeringStatePerCC><n63/></maxNumberAperiodicCSI-triggeringStatePerCC>
<maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>0</maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>
<simultaneousCSI-ReportsPerCC>4</simultaneousCSI-ReportsPerCC>
</csi-ReportFramework>
<mux-SR-HARQ-ACK-CSI-PUCCH-OncePerSlot>
<sameSymbol><supported/></sameSymbol>
</mux-SR-HARQ-ACK-CSI-PUCCH-OncePerSlot>
<oneFL-DMRS-TwoAdditionalDMRS-UL><supported/></oneFL-DMRS-TwoAdditionalDMRS-UL>
<twoFL-DMRS-TwoAdditionalDMRS-UL><supported/></twoFL-DMRS-TwoAdditionalDMRS-UL>
</ext1>
</phy-ParametersFRX-Diff>
<phy-ParametersFR1>
<pdsch-256QAM-FR1><supported/></pdsch-256QAM-FR1>
<pdsch-RE-MappingFR1-PerSymbol><n10/></pdsch-RE-MappingFR1-PerSymbol>
<ext1>
<pdsch-RE-MappingFR1-PerSlot><n32/></pdsch-RE-MappingFR1-PerSlot>
</ext1>
</phy-ParametersFR1>
</phy-Parameters>
<rf-Parameters>
<supportedBandListNR>
<BandNR>
<bandNR>78</bandNR>
<mimo-ParametersPerBand>
<tci-StatePDSCH>
<maxNumberConfiguredTCIstatesPerCC><n16/></maxNumberConfiguredTCIstatesPerCC>
<maxNumberActiveTCI-PerBWP><n1/></maxNumberActiveTCI-PerBWP>
</tci-StatePDSCH>
<pusch-TransCoherence><nonCoherent/></pusch-TransCoherence>
<periodicBeamReport><supported/></periodicBeamReport>
<aperiodicBeamReport><supported/></aperiodicBeamReport>
<maxNumberNonGroupBeamReporting><n4/></maxNumberNonGroupBeamReporting>
<maxNumberSSB-BFD>2</maxNumberSSB-BFD>
<maxNumberCSI-RS-SSB-CBD>8</maxNumberCSI-RS-SSB-CBD>
<beamReportTiming>
<scs-15kHz><sym8/></scs-15kHz>
<scs-30kHz><sym14/></scs-30kHz>
</beamReportTiming>
<ext1>
<beamManagementSSB-CSI-RS>
<maxNumberSSB-CSI-RS-ResourceOneTx><n8/></maxNumberSSB-CSI-RS-ResourceOneTx>
<maxNumberCSI-RS-Resource><n32/></maxNumberCSI-RS-Resource>
<maxNumberCSI-RS-ResourceTwoTx><n8/></maxNumberCSI-RS-ResourceTwoTx>
<supportedCSI-RS-Density><oneAndThree/></supportedCSI-RS-Density>
<maxNumberAperiodicCSI-RS-Resource><n32/></maxNumberAperiodicCSI-RS-Resource>
</beamManagementSSB-CSI-RS>
<codebookParameters>
<type1>
<singlePanel>
<supportedCSI-RS-ResourceList>
<SupportedCSI-RS-Resource>
<maxNumberTxPortsPerResource><p8/></maxNumberTxPortsPerResource>
<maxNumberResourcesPerBand>8</maxNumberResourcesPerBand>
<totalNumberTxPortsPerBand>64</totalNumberTxPortsPerBand>
</SupportedCSI-RS-Resource>
<SupportedCSI-RS-Resource>
<maxNumberTxPortsPerResource><p4/></maxNumberTxPortsPerResource>
<maxNumberResourcesPerBand>8</maxNumberResourcesPerBand>
<totalNumberTxPortsPerBand>32</totalNumberTxPortsPerBand>
</SupportedCSI-RS-Resource>
<SupportedCSI-RS-Resource>
<maxNumberTxPortsPerResource><p16/></maxNumberTxPortsPerResource>
<maxNumberResourcesPerBand>4</maxNumberResourcesPerBand>
<totalNumberTxPortsPerBand>64</totalNumberTxPortsPerBand>
</SupportedCSI-RS-Resource>
<SupportedCSI-RS-Resource>
<maxNumberTxPortsPerResource><p32/></maxNumberTxPortsPerResource>
<maxNumberResourcesPerBand>2</maxNumberResourcesPerBand>
<totalNumberTxPortsPerBand>64</totalNumberTxPortsPerBand>
</SupportedCSI-RS-Resource>
</supportedCSI-RS-ResourceList>
<modes><mode1/></modes>
<maxNumberCSI-RS-PerResourceSet>4</maxNumberCSI-RS-PerResourceSet>
</singlePanel>
</type1>
</codebookParameters>
<csi-RS-IM-ReceptionForFeedback>
<maxConfigNumberNZP-CSI-RS-PerCC>8</maxConfigNumberNZP-CSI-RS-PerCC>
<maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>64</maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>
<maxConfigNumberCSI-IM-PerCC><n8/></maxConfigNumberCSI-IM-PerCC>
<maxNumberSimultaneousNZP-CSI-RS-PerCC>4</maxNumberSimultaneousNZP-CSI-RS-PerCC>
<totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>32</totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>
</csi-RS-IM-ReceptionForFeedback>
<csi-ReportFramework>
<maxNumberPeriodicCSI-PerBWP-ForCSI-Report>2</maxNumberPeriodicCSI-PerBWP-ForCSI-Report>
<maxNumberAperiodicCSI-PerBWP-ForCSI-Report>2</maxNumberAperiodicCSI-PerBWP-ForCSI-Report>
<maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>0</maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>
<maxNumberPeriodicCSI-PerBWP-ForBeamReport>2</maxNumberPeriodicCSI-PerBWP-ForBeamReport>
<maxNumberAperiodicCSI-PerBWP-ForBeamReport>2</maxNumberAperiodicCSI-PerBWP-ForBeamReport>
<maxNumberAperiodicCSI-triggeringStatePerCC><n63/></maxNumberAperiodicCSI-triggeringStatePerCC>
<maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>0</maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>
<simultaneousCSI-ReportsPerCC>4</simultaneousCSI-ReportsPerCC>
</csi-ReportFramework>
<csi-RS-ForTracking>
<maxBurstLength>2</maxBurstLength>
<maxSimultaneousResourceSetsPerCC>1</maxSimultaneousResourceSetsPerCC>
<maxConfiguredResourceSetsPerCC>8</maxConfiguredResourceSetsPerCC>
<maxConfiguredResourceSetsAllCC>16</maxConfiguredResourceSetsAllCC>
</csi-RS-ForTracking>
</ext1>
</mimo-ParametersPerBand>
<multipleTCI><supported/></multipleTCI>
<pusch-256QAM><supported/></pusch-256QAM>
<ue-PowerClass><pc2/></ue-PowerClass>
<channelBWs-DL>
<fr1>
<scs-15kHz>
0000000000
</scs-15kHz>
<scs-30kHz>
0001011111
</scs-30kHz>
<scs-60kHz>
0000000000
</scs-60kHz>
</fr1>
</channelBWs-DL>
<channelBWs-UL>
<fr1>
<scs-15kHz>
0000000000
</scs-15kHz>
<scs-30kHz>
0001011111
</scs-30kHz>
<scs-60kHz>
0000000000
</scs-60kHz>
</fr1>
</channelBWs-UL>
<ext1>
<maxUplinkDutyCycle-PC2-FR1><n100/></maxUplinkDutyCycle-PC2-FR1>
</ext1>
<ext4>
<channelBWs-DL-v1590>
<fr1>
<scs-30kHz>
1000000000000000
</scs-30kHz>
</fr1>
</channelBWs-DL-v1590>
<channelBWs-UL-v1590>
<fr1>
<scs-30kHz>
1000000000000000
</scs-30kHz>
</fr1>
</channelBWs-UL-v1590>
</ext4>
</BandNR>
</supportedBandListNR>
<supportedBandCombinationList>
<BandCombination>
<bandList>
<nr>
<bandNR>78</bandNR>
<ca-BandwidthClassDL-NR><a/></ca-BandwidthClassDL-NR>
<ca-BandwidthClassUL-NR><a/></ca-BandwidthClassUL-NR>
</nr>
</bandList>
<featureSetCombination>0</featureSetCombination>
<powerClass-v1530><pc2/></powerClass-v1530>
</BandCombination>
</supportedBandCombinationList>
<appliedFreqBandListFilter>
<bandInformationNR>
<bandNR>78</bandNR>
</bandInformationNR>
</appliedFreqBandListFilter>
<ext1>
<supportedBandCombinationList-v1540>
<BandCombination-v1540>
<bandList-v1540>
<BandParameters-v1540>
<srs-TxSwitch>
<supportedSRS-TxPortSwitch><t2r4/></supportedSRS-TxPortSwitch>
</srs-TxSwitch>
</BandParameters-v1540>
</bandList-v1540>
<ca-ParametersNR-v1540>
<csi-RS-IM-ReceptionForFeedbackPerBandComb>
<maxNumberSimultaneousNZP-CSI-RS-ActBWP-AllCC>8</maxNumberSimultaneousNZP-CSI-RS-ActBWP-AllCC>
<totalNumberPortsSimultaneousNZP-CSI-RS-ActBWP-AllCC>64</totalNumberPortsSimultaneousNZP-CSI-RS-ActBWP-AllCC>
</csi-RS-IM-ReceptionForFeedbackPerBandComb>
<simultaneousCSI-ReportsAllCC>8</simultaneousCSI-ReportsAllCC>
</ca-ParametersNR-v1540>
</BandCombination-v1540>
</supportedBandCombinationList-v1540>
</ext1>
</rf-Parameters>
<measAndMobParameters>
<measAndMobParametersCommon>
<ssb-RLM><supported/></ssb-RLM>
<ext1>
<eventB-MeasAndReport><supported/></eventB-MeasAndReport>
<handoverFDD-TDD><supported/></handoverFDD-TDD>
</ext1>
<ext2>
<periodicEUTRA-MeasAndReport><supported/></periodicEUTRA-MeasAndReport>
</ext2>
</measAndMobParametersCommon>
<measAndMobParametersXDD-Diff>
<intraAndInterF-MeasAndReport><supported/></intraAndInterF-MeasAndReport>
<eventA-MeasAndReport><supported/></eventA-MeasAndReport>
<ext1>
<handoverInterF><supported/></handoverInterF>
<handoverLTE-EPC><supported/></handoverLTE-EPC>
</ext1>
</measAndMobParametersXDD-Diff>
<measAndMobParametersFRX-Diff>
<ss-SINR-Meas><supported/></ss-SINR-Meas>
<ext1>
<handoverInterF><supported/></handoverInterF>
<handoverLTE-EPC><supported/></handoverLTE-EPC>
</ext1>
<ext3>
<simultaneousRxDataSSB-DiffNumerology><supported/></simultaneousRxDataSSB-DiffNumerology>
</ext3>
</measAndMobParametersFRX-Diff>
</measAndMobParameters>
<featureSets>
<featureSetsDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>1</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>2</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>3</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>4</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>5</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>6</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>7</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>8</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>9</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>10</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>11</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
<FeatureSetDownlink>
<featureSetListPerDownlinkCC>
<FeatureSetDownlinkPerCC-Id>12</FeatureSetDownlinkPerCC-Id>
</featureSetListPerDownlinkCC>
<ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
</FeatureSetDownlink>
</featureSetsDownlink>
<featureSetsDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz100/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz100/></fr1>
</supportedBandwidthDL>
<channelBW-90mhz><supported/></channelBW-90mhz>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz20/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><twoLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz40/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz40/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz80/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz20/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz30/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><twoLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz20/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz15/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><twoLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz30/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
<FeatureSetDownlinkPerCC>
<supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
<supportedBandwidthDL>
<fr1><mhz60/></fr1>
</supportedBandwidthDL>
<maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
<supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
</FeatureSetDownlinkPerCC>
</featureSetsDownlinkPerCC>
<featureSetsUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>1</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n2/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>2</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n2/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>3</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>4</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>5</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>6</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>7</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>8</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>9</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>10</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>11</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>12</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
<FeatureSetUplink>
<featureSetListPerUplinkCC>
<FeatureSetUplinkPerCC-Id>11</FeatureSetUplinkPerCC-Id>
</featureSetListPerUplinkCC>
<supportedSRS-Resources>
<maxNumberAperiodicSRS-PerBWP><n1/></maxNumberAperiodicSRS-PerBWP>
<maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
<maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
<maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
<maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
<maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
<maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
</supportedSRS-Resources>
</FeatureSetUplink>
</featureSetsUplink>
<featureSetsUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz100/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><twoLayers/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz100/></fr1>
</supportedBandwidthUL>
<channelBW-90mhz><supported/></channelBW-90mhz>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><twoLayers/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz20/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz40/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz40/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz80/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz20/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz30/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz15/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz100/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz100/></fr1>
</supportedBandwidthUL>
<channelBW-90mhz><supported/></channelBW-90mhz>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
<FeatureSetUplinkPerCC>
<supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
<supportedBandwidthUL>
<fr1><mhz60/></fr1>
</supportedBandwidthUL>
<mimo-CB-PUSCH>
<maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
<maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
</mimo-CB-PUSCH>
<supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
</FeatureSetUplinkPerCC>
</featureSetsUplinkPerCC>
<ext1>
<featureSetsDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
<FeatureSetDownlink-v1540>
<oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
<twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
</FeatureSetDownlink-v1540>
</featureSetsDownlink-v1540>
</ext1>
</featureSets>
<featureSetCombinations>
<FeatureSetCombination>
<FeatureSetsPerBand>
<nr>
<downlinkSetNR>2</downlinkSetNR>
<uplinkSetNR>2</uplinkSetNR>
</nr>
</FeatureSetsPerBand>
</FeatureSetCombination>
</featureSetCombinations>
<nonCriticalExtension>
<interRAT-Parameters>
<eutra>
<supportedBandListEUTRA>
<FreqBandIndicatorEUTRA>7</FreqBandIndicatorEUTRA>
<FreqBandIndicatorEUTRA>38</FreqBandIndicatorEUTRA>
</supportedBandListEUTRA>
<eutra-ParametersCommon>
<mfbi-EUTRA><supported/></mfbi-EUTRA>
</eutra-ParametersCommon>
</eutra>
</interRAT-Parameters>
<inactiveState><supported/></inactiveState>
</nonCriticalExtension>
</UE-NR-Capability>
-231
View File
@@ -1,231 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include <stdio.h>
#include <errno.h>
#include <string.h>
#include <stdlib.h>
#include <pthread.h>
#include <sched.h>
#include "thread_ipc.h"
g_thread_ipc_t thread_ipc = {0};
void loop_buffer_reset(buffer_t *loop_buf)
{
int i;
for (i = 0; i < BUFFERMAX; i++) {
loop_buf[i].subframe_num = -1;
}
return;
}
static void loop_buffer_init(loop_buffer_op_t *loop_buffer)
{
loop_buffer->packet_num = 0;
loop_buffer->isfull = 0;
loop_buffer->isempty = 1;
pthread_mutex_init(&loop_buffer->buffer_mutex, NULL);
pthread_cond_init(&loop_buffer->full_cond, NULL);
pthread_cond_init(&loop_buffer->empty_cond, NULL);
loop_buffer_reset(loop_buffer->loop_buf);
return;
}
static void sync_buffer_init(sync_buffer_t *sync_buffer)
{
sync_buffer->decoding_subframe_num = 0;
pthread_mutex_init(&sync_buffer->buffer_mutex, NULL);
return;
}
int thread_ipc_init(void)
{
//printf("recv %d\n", thread_ipc.sync_buffer.decoding_subframe_num);
thread_ipc.ue_sync_state = 0;
thread_ipc.rx_timestamp = 0;
thread_ipc.tx_timestamp = 0;
thread_ipc.current_subframe = 0;
pthread_mutex_init(&thread_ipc.dl_decode_mutex, NULL);
pthread_mutex_lock(&thread_ipc.dl_decode_mutex);
pthread_mutex_init(&thread_ipc.ul_send_mutex, NULL);
pthread_mutex_lock(&thread_ipc.ul_send_mutex);
pthread_mutex_init(&thread_ipc.sync_mutex, NULL);
pthread_mutex_lock(&thread_ipc.sync_mutex);
loop_buffer_init(&thread_ipc.loop_buffer);
sync_buffer_init(&thread_ipc.sync_buffer);
return 0;
}
int thread_ipc_deinit(void)
{
pthread_mutex_destroy(&thread_ipc.ul_send_mutex);
pthread_mutex_destroy(&thread_ipc.sync_mutex);
pthread_mutex_destroy(&thread_ipc.dl_decode_mutex);
pthread_mutex_destroy(&thread_ipc.loop_buffer.buffer_mutex);
pthread_cond_destroy(&thread_ipc.loop_buffer.full_cond);
pthread_cond_destroy(&thread_ipc.loop_buffer.empty_cond);
pthread_mutex_destroy(&thread_ipc.sync_buffer.buffer_mutex);
return 0;
}
int set_thread_attr(pthread_attr_t *attr, int policy, int priority, int cpuid)
{
struct sched_param param;
cpu_set_t cpu_info;
pthread_attr_init(attr);
if (pthread_attr_setschedpolicy(attr, policy) != 0) {
perror("pthread_attr_setschedpolicy");
return -1;
}
param.sched_priority = priority;
if (pthread_attr_setschedparam(attr, &param) != 0) {
perror("pthread_attr_setschedparam");
return -1;
}
CPU_ZERO(&cpu_info);
CPU_SET(cpuid, &cpu_info);
if (pthread_attr_setaffinity_np(attr,sizeof(cpu_set_t),&cpu_info)) {
perror("pthread_attr_setaffinity_np");
return -1;
}
if (pthread_attr_setinheritsched(attr, PTHREAD_EXPLICIT_SCHED) != 0) {
perror("pthread_attr_setinheritsched");
return -1;
}
return 0;
}
int find_subframe_num(unsigned long long current_subframe_num, buffer_t *buf, int *flag)
{
long long tmp;
int i;
tmp = current_subframe_num;
for ( i = 0; i < HIGHBUFFER + 1; i++) {
if(tmp == buf[i].subframe_num) {
return i;
} else if (tmp < buf[i].subframe_num) {
*flag = 1;
}
}
return -1;
}
int ue_unsync_thread_ipc_reset(void)
{
thread_ipc.ue_sync_state = 0;
pthread_mutex_lock(&thread_ipc.loop_buffer.buffer_mutex);
if (thread_ipc.loop_buffer.isempty) {
pthread_cond_signal(&thread_ipc.loop_buffer.empty_cond);
}
if (thread_ipc.loop_buffer.isfull) {
pthread_cond_signal(&thread_ipc.loop_buffer.full_cond);
}
thread_ipc.loop_buffer.packet_num = 0;
thread_ipc.loop_buffer.isfull = 0;
thread_ipc.loop_buffer.isempty = 1;
loop_buffer_reset(thread_ipc.loop_buffer.loop_buf);
pthread_mutex_unlock(&thread_ipc.loop_buffer.buffer_mutex);
thread_ipc.current_subframe = 0;
return 0;
}
void bind_thread2kernel(int cpu_id)
{
cpu_set_t mask;
cpu_set_t get;
int i;
int num = sysconf(_SC_NPROCESSORS_CONF);
//printf("system has %d processor(s) by super\n", num);
CPU_ZERO(&mask);
CPU_SET(cpu_id, &mask);
if (pthread_setaffinity_np(pthread_self(), sizeof(mask), &mask) < 0) {
fprintf(stderr, "set thread affinity failed\n");
}
/*CPU_ZERO(&get);
if (pthread_getaffinity_np(pthread_self(), sizeof(get), &get) < 0) {
fprintf(stderr, "get thread affinity failed\n");
}
for (i = 0; i < num; i++) {
if (CPU_ISSET(i, &get)) {
printf("thread %d is running in processor %d\n", (int)pthread_self(), i);
}
}
if (CPU_ISSET(cpu_id, &get)) {
printf("thread %d is running in processor %d by super\n", (int)pthread_self(), cpu_id);
}*/
}
void get_thread2kernel(void)
{
cpu_set_t get;
int i;
int num = sysconf(_SC_NPROCESSORS_CONF);
printf("system has %d processor(s) by super\n", num);
CPU_ZERO(&get);
if (pthread_getaffinity_np(pthread_self(), sizeof(get), &get) < 0) {
fprintf(stderr, "get thread affinity failed\n");
}
for (i = 0; i < num; i++) {
if (CPU_ISSET(i, &get)) {
printf("The thread %d is running in processor %d by super\n", (int)pthread_self(), i);
}
}
}
+22 -4
View File
@@ -48,8 +48,6 @@
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
#include "rt_wrapper.h"
#include "assertions.h"
@@ -101,7 +99,6 @@ extern RAN_CONTEXT_t RC;
//#define USRP_DEBUG 1
struct timing_info_t {
//unsigned int frame, hw_slot, last_slot, next_slot;
RTIME time_min, time_max, time_avg, time_last, time_now;
//unsigned int mbox0, mbox1, mbox2, mbox_target;
unsigned int n_samples;
} timing_info;
@@ -398,8 +395,20 @@ static void *L1_thread( void *param ) {
// set default return value
eNB_thread_rxtx_status = 0;
sprintf(thread_name,"RXn_TXnp4_%d\n",&eNB->proc.L1_proc == proc ? 0 : 1);
#if 1
{
struct sched_param sparam =
{
.sched_priority = 79,
};
if (pthread_setschedparam(pthread_self(), SCHED_RR, &sparam) != 0)
{
LOG_E(PHY,"pthread_setschedparam: %s\n", strerror(errno));
}
}
#else
thread_top_init(thread_name,1,470000,500000,500000);
pthread_setname_np( pthread_self(),"rxtx processing");
#endif
LOG_I(PHY,"thread rxtx created id=%ld\n", syscall(__NR_gettid));
while (!oai_exit) {
@@ -943,7 +952,16 @@ void init_eNB_proc(int inst) {
//pthread_create( &proc_rxtx[0].pthread_rxtx, attr0, eNB_thread_rxtx, &proc_rxtx[0] );
//pthread_create( &proc_rxtx[1].pthread_rxtx, attr1, eNB_thread_rxtx, &proc_rxtx[1] );
pthread_create( &L1_proc->pthread, attr0, L1_thread, L1_proc );
if (pthread_setname_np(L1_proc->pthread, "oai:enb-L1-rx") != 0)
{
LOG_E(PHY, "pthread_setname_np: %s\n", strerror(errno));
}
pthread_create( &L1_proc_tx->pthread, attr1, L1_thread, L1_proc_tx);
if (pthread_setname_np(L1_proc_tx->pthread, "oai:enb-L1-tx") != 0)
{
LOG_E(PHY, "pthread_setname_np: %s\n", strerror(errno));
}
}
if (NFAPI_MODE!=NFAPI_MODE_VNF) {
+3 -2
View File
@@ -44,7 +44,6 @@
#include <execinfo.h>
#include <getopt.h>
#include <sys/sysinfo.h>
#include "rt_wrapper.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
@@ -1490,6 +1489,7 @@ static void *ru_stats_thread(void *param) {
static void *ru_thread_tx( void *param ) {
RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc;
__attribute__((unused))
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
PHY_VARS_eNB *eNB;
L1_proc_t *eNB_proc;
@@ -1917,7 +1917,8 @@ static void *ru_thread( void *param ) {
// This thread run the initial synchronization like a UE
void *ru_thread_synch(void *arg) {
RU_t *ru = (RU_t *)arg;
LTE_DL_FRAME_PARMS *fp;
__attribute__((unused))
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
int64_t peak_val, avg;
static int ru_thread_synch_status = 0;
int cnt=0;
+21 -12
View File
@@ -34,7 +34,6 @@
#define _GNU_SOURCE /* See feature_test_macros(7) */
#include <sched.h>
#include "rt_wrapper.h"
#include <common/utils/msc/msc.h>
@@ -94,6 +93,9 @@ unsigned short config_frames[4] = {2,9,11,13};
#include "NB_IoT_interface.h"
#include <executables/split_headers.h>
#if USING_GPROF
# include "sys/gmon.h"
#endif
pthread_cond_t nfapi_sync_cond;
pthread_mutex_t nfapi_sync_mutex;
@@ -178,7 +180,6 @@ eth_params_t *eth_params;
double cpuf;
int oaisim_flag=0;
uint8_t proto_agent_flag = 0;
/* forward declarations */
@@ -479,7 +480,7 @@ int restart_L1L2(module_id_t enb_id) {
return 0;
}
void init_pdcp(void) {
static void init_pdcp(void) {
if (!NODE_IS_DU(RC.rrc[0]->node_type)) {
pdcp_layer_init();
uint32_t pdcp_initmask = (IS_SOFTMODEM_NOS1) ?
@@ -490,16 +491,16 @@ void init_pdcp(void) {
pdcp_initmask = pdcp_initmask | ENB_NAS_USE_TUN_W_MBMS_BIT;
pdcp_module_init(pdcp_initmask);
pdcp_module_init(pdcp_initmask, 0);
if (NODE_IS_CU(RC.rrc[0]->node_type)) {
pdcp_set_rlc_data_req_func((send_rlc_data_req_func_t)proto_agent_send_rlc_data_req);
pdcp_set_rlc_data_req_func(cu_send_to_du);
} else {
pdcp_set_rlc_data_req_func((send_rlc_data_req_func_t) rlc_data_req);
pdcp_set_pdcp_data_ind_func((pdcp_data_ind_func_t) pdcp_data_ind);
pdcp_set_rlc_data_req_func(rlc_data_req);
pdcp_set_pdcp_data_ind_func(pdcp_data_ind);
}
} else {
pdcp_set_pdcp_data_ind_func((pdcp_data_ind_func_t) proto_agent_send_pdcp_data_ind);
pdcp_set_pdcp_data_ind_func(proto_agent_send_pdcp_data_ind);
}
}
@@ -528,8 +529,8 @@ int main ( int argc, char **argv )
}
mode = normal_txrx;
set_latency_target();
logInit();
set_latency_target();
printf("Reading in command-line options\n");
get_options ();
@@ -564,13 +565,10 @@ int main ( int argc, char **argv )
init_opt();
// to make a graceful exit when ctrl-c is pressed
set_softmodem_sighandler();
check_clock();
#ifndef PACKAGE_VERSION
# define PACKAGE_VERSION "UNKNOWN-EXPERIMENTAL"
#endif
LOG_I(HW, "Version: %s\n", PACKAGE_VERSION);
printf("Runtime table\n");
fill_modeled_runtime_table(runtime_phy_rx,runtime_phy_tx);
/* Read configuration */
if (RC.nb_inst > 0) {
@@ -742,10 +740,19 @@ int main ( int argc, char **argv )
if(IS_SOFTMODEM_DOSCOPE)
load_softscope("enb",NULL);
itti_wait_tasks_end();
#if USING_GPROF
// Save the gprof data now (rather than via atexit) in case we crash while shutting down
fprintf(stderr, "Recording gprof data...\n");
_mcleanup();
fprintf(stderr, "Recording gprof data...done\n");
#endif // USING_GPROF
oai_exit=1;
LOG_I(ENB_APP,"oai_exit=%d\n",oai_exit);
// stop threads
#if 0 //Disable clean up because this tends to crash (and unnecessary)
if (RC.nb_inst == 0 || !NODE_IS_CU(node_type)) {
if(IS_SOFTMODEM_DOSCOPE)
end_forms();
@@ -787,7 +794,9 @@ int main ( int argc, char **argv )
}
}
}
#endif
pdcp_module_cleanup();
terminate_opt();
logClean();
printf("Bye.\n");
+9 -3
View File
@@ -6,7 +6,6 @@
#include <fcntl.h>
#include <getopt.h>
#include <linux/sched.h>
#include "rt_wrapper.h"
#include <sched.h>
#include <signal.h>
#include <stdint.h>
@@ -21,7 +20,6 @@
#include <sys/types.h>
#include <unistd.h>
#include "threads_t.h"
#include "rt_wrapper.h"
#include "../../ARCH/COMMON/common_lib.h"
//#undef MALLOC
#include "assertions.h"
@@ -114,7 +112,9 @@
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200",TYPE_STRING, 0}, \
{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"A", CONFIG_HLP_TADV, 0, iptr:&(timingadv), defintval:0, TYPE_INT, 0} \
{"A", CONFIG_HLP_TADV, 0, iptr:&(timingadv), defintval:0, TYPE_INT, 0}, \
{"ue-idx-standalone", NULL, 0, u16ptr:&ue_idx_standalone, defuintval:0xFFFF, TYPE_UINT16, 0}, \
{"node-number", NULL, 0, u16ptr:&node_number, defuintval:2, TYPE_UINT16, 0}, \
}
/*-----------------------------------------------------------------------------------------------------------------------------*/
@@ -138,6 +138,9 @@ extern pthread_cond_t sync_cond;
extern pthread_mutex_t sync_mutex;
extern int sync_var;
extern uint16_t ue_id_g;
extern uint16_t node_number;
extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
@@ -208,7 +211,10 @@ extern int stop_L1L2(module_id_t enb_id);
extern int restart_L1L2(module_id_t enb_id);
extern void init_UE_stub_single_thread(int nb_inst, int eMBMS_active, int uecap_xer_in, char *emul_iface);
extern void init_UE_standalone_thread(int ue_idx);
extern PHY_VARS_UE *init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms, uint8_t UE_id, uint8_t abstraction_flag);
extern void init_bler_table(void);
#endif
+440 -30
View File
@@ -31,7 +31,6 @@
*/
#include "lte-softmodem.h"
#include "rt_wrapper.h"
#include "system.h"
#include "LAYER2/MAC/mac.h"
@@ -81,18 +80,10 @@ void init_UE_threads(int);
void init_UE_threads_stub(int);
void init_UE_single_thread_stub(int);
void *UE_thread(void *arg);
void init_UE(int nb_inst,int eMBMS_active, int uecap_xer_in, int timing_correction, int phy_test, int UE_scan, int UE_scan_carrier, runmode_t mode,int rxgain,int txpowermax,LTE_DL_FRAME_PARMS *fp);
void init_UE_stub(int nb_inst,int,int,char *);
void init_UE_stub_single_thread(int nb_inst,int,int,char *);
int init_timer_thread(void);
extern void oai_subframe_ind(uint16_t sfn, uint16_t sf);
extern void multicast_link_start(void (*rx_handlerP) (unsigned int, char *),
unsigned char _multicast_group, char *multicast_ifname);
extern int oai_nfapi_crc_indication(nfapi_crc_indication_t *crc_ind);
extern int oai_nfapi_cqi_indication(nfapi_cqi_indication_t *cqi_ind);
extern int oai_nfapi_harq_indication(nfapi_harq_indication_t *harq_ind);
extern int oai_nfapi_sr_indication(nfapi_sr_indication_t *ind);
extern int oai_nfapi_rx_ind(nfapi_rx_indication_t *ind);
unsigned char _multicast_group,
char *multicast_ifname);
extern int multicast_link_write_sock(int groupP, char *dataP, uint32_t sizeP);
@@ -194,7 +185,7 @@ PHY_VARS_UE *init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms,
ue->mac_enabled = 1;
// In phy_stub_UE (MAC-to-MAC) mode these init functions don't need to get called. Is this correct?
if (NFAPI_MODE!=NFAPI_UE_STUB_PNF) {
if (NFAPI_MODE!=NFAPI_UE_STUB_PNF && NFAPI_MODE!=NFAPI_MODE_STANDALONE_PNF) {
// initialize all signal buffers
init_lte_ue_signal(ue,1,abstraction_flag);
// intialize transport
@@ -413,15 +404,31 @@ void init_UE_stub_single_thread(int nb_inst,
// PHY_vars_UE_g[inst][0] = init_ue_vars(NULL,inst,0);
}
init_timer_thread();
if(NFAPI_MODE != NFAPI_MODE_STANDALONE_PNF) {
init_timer_thread();
}
init_UE_single_thread_stub(nb_inst);
printf("UE threads created \n");
LOG_I(PHY,"Starting multicast link on %s\n",emul_iface);
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF)
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF && NFAPI_MODE!=NFAPI_MODE_STANDALONE_PNF) {
LOG_I(PHY,"Starting multicast link on %s\n",emul_iface);
multicast_link_start(ue_stub_rx_handler,0,emul_iface);
}
}
void init_UE_standalone_thread(int ue_idx)
{
int standalone_tx_port = 3211 + ue_idx * 2;
int standalone_rx_port = 3212 + ue_idx * 2;
ue_init_standalone_socket(standalone_tx_port, standalone_rx_port);
pthread_t thread;
if (pthread_create(&thread, NULL, ue_standalone_pnf_task, NULL) != 0) {
LOG_E(MAC, "pthread_create failed for calling ue_standalone_pnf_task");
}
pthread_setname_np(thread, "oai:ue-stand");
}
void init_UE_stub(int nb_inst,
int eMBMS_active,
@@ -449,7 +456,7 @@ void init_UE_stub(int nb_inst,
printf("UE threads created \n");
LOG_I(PHY,"Starting multicast link on %s\n",emul_iface);
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF)
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF && NFAPI_MODE!=NFAPI_MODE_STANDALONE_PNF)
multicast_link_start(ue_stub_rx_handler,0,emul_iface);
}
@@ -956,6 +963,396 @@ void ue_stub_rx_handler(unsigned int num_bytes,
}
}
uint64_t clock_usec(void)
{
struct timespec t;
if (clock_gettime(CLOCK_MONOTONIC, &t) == -1)
{
abort();
}
return (uint64_t)t.tv_sec * 1000000 + (t.tv_nsec / 1000);
}
/*!
* \brief This is the UE thread for RX subframe n and TX subframe n+4.
* This thread performs the phy_procedures_UE_RX() on every received slot.
* then, if TX is enabled it performs TX for n+4.
* \param arg is a pointer to a \ref PHY_VARS_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
static void *UE_phy_stub_standalone_pnf_task(void *arg)
{
#if 1
{
struct sched_param sparam =
{
.sched_priority = 79,
};
if (pthread_setschedparam(pthread_self(), SCHED_RR, &sparam) != 0)
{
LOG_E(PHY,"pthread_setschedparam: %s\n", strerror(errno));
}
}
#else
thread_top_init("UE_phy_stub_thread_rxn_txnp4", 1, 870000L, 1000000L, 1000000L);
#endif
// for multipule UE's L2-emulator
//module_id_t Mod_id = 0;
//int init_ra_UE = -1; // This counter is used to initiate the RA of each UE in different SFrames
struct rx_tx_thread_data *rtd = arg;
if (rtd == NULL) {
LOG_E(MAC, "[SCHED][UE] rx_tx_thread_data *rtd: NULL pointer\n");
exit_fun("nothing to add");
}
UE_rxtx_proc_t *proc = rtd->proc;
// settings for nfapi-L2-emulator mode
module_id_t ue_thread_id = rtd->ue_thread_id;
uint16_t ue_index = 0;
uint16_t ue_num = NB_UE_INST / NB_THREAD_INST + ((NB_UE_INST % NB_THREAD_INST > ue_thread_id) ? 1 : 0);
module_id_t ue_Mod_id;
PHY_VARS_UE *UE = NULL;
int ret;
proc = &PHY_vars_UE_g[0][0]->proc.proc_rxtx[0];
UE = rtd->UE;
UL_INFO = (UL_IND_t *)calloc(1, sizeof(UL_IND_t));
UL_INFO->rx_ind.rx_indication_body.rx_pdu_list = calloc(NFAPI_RX_IND_MAX_PDU, sizeof(nfapi_rx_indication_pdu_t));
UL_INFO->rx_ind.rx_indication_body.number_of_pdus = 0;
UL_INFO->crc_ind.crc_indication_body.crc_pdu_list = calloc(NFAPI_CRC_IND_MAX_PDU, sizeof(nfapi_crc_indication_pdu_t));
UL_INFO->crc_ind.crc_indication_body.number_of_crcs = 0;
UL_INFO->harq_ind.harq_indication_body.harq_pdu_list = calloc(NFAPI_HARQ_IND_MAX_PDU, sizeof(nfapi_harq_indication_pdu_t));
UL_INFO->harq_ind.harq_indication_body.number_of_harqs = 0;
UL_INFO->sr_ind.sr_indication_body.sr_pdu_list = calloc(NFAPI_SR_IND_MAX_PDU, sizeof(nfapi_sr_indication_pdu_t));
UL_INFO->sr_ind.sr_indication_body.number_of_srs = 0;
UL_INFO->cqi_ind.cqi_indication_body.cqi_pdu_list = calloc(NFAPI_CQI_IND_MAX_PDU, sizeof(nfapi_cqi_indication_pdu_t));
UL_INFO->cqi_ind.cqi_indication_body.cqi_raw_pdu_list = calloc(NFAPI_CQI_IND_MAX_PDU, sizeof(nfapi_cqi_indication_raw_pdu_t));
UL_INFO->cqi_ind.cqi_indication_body.number_of_cqis = 0;
proc->subframe_rx = proc->sub_frame_start;
proc->subframe_tx = -1;
proc->frame_rx = -1;
proc->frame_tx = -1;
// Initializations for nfapi-L2-emulator mode
sync_var = 0;
//PANOS: CAREFUL HERE!
wait_sync("UE_phy_stub_standalone_pnf_task");
int last_sfn_sf = -1;
LOG_I(MAC, "Clearing Queues\n");
reset_queue(&dl_config_req_tx_req_queue);
reset_queue(&ul_config_req_queue);
reset_queue(&hi_dci0_req_queue);
while (!oai_exit) {
bool sent_any = false;
if (sem_wait(&sfn_semaphore) != 0) {
LOG_E(MAC, "sem_wait() error\n");
abort();
}
int sfn_sf = current_sfn_sf;
if (sfn_sf == last_sfn_sf)
{
LOG_W(MAC, "repeated sfn_sf = %d.%d\n",
sfn_sf >> 4, sfn_sf & 15);
continue;
}
last_sfn_sf = sfn_sf;
nfapi_dl_config_req_tx_req_t *dl_config_req_tx_req = get_queue(&dl_config_req_tx_req_queue);
nfapi_ul_config_request_t *ul_config_req = get_queue(&ul_config_req_queue);
nfapi_hi_dci0_request_t *hi_dci0_req = get_queue(&hi_dci0_req_queue);
LOG_I(MAC, "received from proxy frame %d subframe %d\n",
NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf));
if (ul_config_req != NULL) {
uint8_t ul_num_pdus = ul_config_req->ul_config_request_body.number_of_pdus;
if (ul_num_pdus > 0) {
char *ul_str = nfapi_ul_config_req_to_string(ul_config_req);
LOG_I(MAC, "ul_config_req: %s\n", ul_str);
free(ul_str);
}
}
if (hi_dci0_req != NULL) {
LOG_D(MAC, "hi_dci0_req pdus: %u Frame: %d Subframe: %d\n",
hi_dci0_req->hi_dci0_request_body.number_of_dci,
NFAPI_SFNSF2SFN(hi_dci0_req->sfn_sf), NFAPI_SFNSF2SF(hi_dci0_req->sfn_sf));
}
if (dl_config_req_tx_req != NULL) {
nfapi_tx_req_pdu_list_t *tx_req_pdu_list = dl_config_req_tx_req->tx_req_pdu_list;
nfapi_dl_config_request_t *dl_config_req = dl_config_req_tx_req->dl_config_req;
uint16_t dl_num_pdus = dl_config_req->dl_config_request_body.number_pdu;
LOG_I(MAC, "(OAI UE) Received dl_config_req from proxy at Frame: %d, Subframe: %d,"
" with number of PDUs: %u\n",
NFAPI_SFNSF2SFN(dl_config_req->sfn_sf), NFAPI_SFNSF2SF(dl_config_req->sfn_sf),
dl_num_pdus);
if (dl_num_pdus > 0) {
char *dl_str = nfapi_dl_config_req_to_string(dl_config_req);
LOG_I(MAC, "dl_config_req: %s\n", dl_str);
free(dl_str);
}
LOG_D(MAC, "tx_req pdus: %d\n", tx_req_pdu_list->num_pdus);
// Handling dl_config_req and tx_req:
nfapi_dl_config_request_body_t *dl_config_req_body = &dl_config_req->dl_config_request_body;
for (int i = 0; i < dl_config_req_body->number_pdu; ++i) {
nfapi_dl_config_request_pdu_t *pdu = &dl_config_req_body->dl_config_pdu_list[i];
if (pdu->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE) {
i += 1;
AssertFatal(i < dl_config_req->dl_config_request_body.number_pdu,
"Need PDU following DCI at index %d, but not found\n",
i);
nfapi_dl_config_request_pdu_t *dlsch = &dl_config_req_body->dl_config_pdu_list[i];
if (dlsch->pdu_type != NFAPI_DL_CONFIG_DLSCH_PDU_TYPE) {
LOG_E(MAC, "expected DLSCH PDU at index %d\n", i);
continue;
}
dl_config_req_UE_MAC_dci(NFAPI_SFNSF2SFN(dl_config_req->sfn_sf),
NFAPI_SFNSF2SF(dl_config_req->sfn_sf),
pdu,
dlsch,
ue_num,
tx_req_pdu_list);
} else if (pdu->pdu_type == NFAPI_DL_CONFIG_BCH_PDU_TYPE) {
dl_config_req_UE_MAC_bch(NFAPI_SFNSF2SFN(dl_config_req->sfn_sf),
NFAPI_SFNSF2SF(dl_config_req->sfn_sf),
pdu,
ue_num);
} else if (pdu->pdu_type == NFAPI_DL_CONFIG_MCH_PDU_TYPE) {
dl_config_req_UE_MAC_mch(NFAPI_SFNSF2SFN(dl_config_req->sfn_sf),
NFAPI_SFNSF2SF(dl_config_req->sfn_sf),
pdu,
ue_num,
tx_req_pdu_list);
}
}
}
if (hi_dci0_req) {
nfapi_hi_dci0_request_body_t *hi_dci0_body = &hi_dci0_req->hi_dci0_request_body;
for (int i = 0; i < hi_dci0_body->number_of_dci + hi_dci0_body->number_of_hi; i++) {
nfapi_hi_dci0_request_pdu_t *pdu = &hi_dci0_body->hi_dci0_pdu_list[i];
hi_dci0_req_UE_MAC(NFAPI_SFNSF2SFN(hi_dci0_req->sfn_sf),
NFAPI_SFNSF2SF(hi_dci0_req->sfn_sf),
pdu,
ue_num); // This function doesnt do anything? - Andrew
}
}
for (ue_index = 0; ue_index < ue_num; ue_index++) {
ue_Mod_id = ue_thread_id + NB_THREAD_INST * ue_index; // Always 0 in standalone pnf mode
UE = PHY_vars_UE_g[ue_Mod_id][0];
#if UE_TIMING_TRACE
start_meas(&UE->generic_stat);
#endif
int rx_frame = NFAPI_SFNSF2SF(sfn_sf) < 4 ? (NFAPI_SFNSF2SFN(sfn_sf) + 1023) % 1024 : NFAPI_SFNSF2SFN(sfn_sf); // subtracting 4 from subframe_tx
int rx_subframe = NFAPI_SFNSF2SF(sfn_sf) < 4 ? NFAPI_SFNSF2SF(sfn_sf) + 6 : NFAPI_SFNSF2SF(sfn_sf) - 4;
LOG_D(MAC, "rx_frame %d rx_subframe %d\n", rx_frame, rx_subframe);
if (UE->mac_enabled == 1) {
ret = ue_scheduler(ue_Mod_id,
rx_frame,
rx_subframe,
NFAPI_SFNSF2SFN(sfn_sf),
NFAPI_SFNSF2SF(sfn_sf),
subframe_select(&UE->frame_parms, NFAPI_SFNSF2SF(sfn_sf)),
0,
0 /*FIXME CC_id*/);
if (ret != CONNECTION_OK) {
LOG_E(PHY, "[UE %" PRIu8 "] Frame %" PRIu32 ", subframe %u %s\n",
UE->Mod_id, rx_frame, NFAPI_SFNSF2SF(sfn_sf), get_connectionloss_errstr(ret));
}
}
#if UE_TIMING_TRACE
stop_meas(&UE->generic_stat);
#endif
// Prepare the future Tx data
if ((subframe_select(&UE->frame_parms, NFAPI_SFNSF2SF(sfn_sf)) == SF_UL) ||
(UE->frame_parms.frame_type == FDD))
{
if (UE->mode != loop_through_memory)
{
// We make the start of RA between consecutive UEs differ by 20 frames
//if ((UE_mac_inst[Mod_id].UE_mode[0] == PRACH && Mod_id == 0) || (UE_mac_inst[Mod_id].UE_mode[0] == PRACH && Mod_id>0 && rx_frame >= UE_mac_inst[Mod_id-1].ra_frame + 20) ) {
if (UE_mac_inst[ue_Mod_id].UE_mode[0] == RA_RESPONSE &&
is_prach_subframe(&UE->frame_parms, NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf)))
{
UE_mac_inst[ue_Mod_id].UE_mode[0] = PRACH;
}
LOG_D(MAC, "UE_mode: %d\n", UE_mac_inst[ue_Mod_id].UE_mode[0]);
if (UE_mac_inst[ue_Mod_id].UE_mode[0] == PRACH)
{ //&& ue_Mod_id == next_Mod_id) {
next_ra_frame++;
if (next_ra_frame > 500)
{
// check if we have PRACH opportunity
if (is_prach_subframe(&UE->frame_parms, NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf)) && UE_mac_inst[ue_Mod_id].SI_Decoded == 1)
{
// The one working strangely...
//if (is_prach_subframe(&UE->frame_parms,NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf) && Mod_id == (module_id_t) init_ra_UE) ) {
PRACH_RESOURCES_t *prach_resources = ue_get_rach(ue_Mod_id, 0, NFAPI_SFNSF2SFN(sfn_sf), 0, NFAPI_SFNSF2SF(sfn_sf));
if (prach_resources != NULL)
{
LOG_I(MAC, "preamble_received_tar_power: %d\n",
prach_resources->ra_PREAMBLE_RECEIVED_TARGET_POWER);
UE_mac_inst[ue_Mod_id].ra_frame = NFAPI_SFNSF2SFN(sfn_sf);
LOG_D(MAC, "UE_phy_stub_thread_rxn_txnp4 before RACH, Mod_id: %d frame %d subframe %d\n", ue_Mod_id, NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf));
fill_rach_indication_UE_MAC(ue_Mod_id, NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf), UL_INFO, prach_resources->ra_PreambleIndex, prach_resources->ra_RNTI);
sent_any = true;
Msg1_transmitted(ue_Mod_id, 0, NFAPI_SFNSF2SFN(sfn_sf), 0);
UE_mac_inst[ue_Mod_id].UE_mode[0] = RA_RESPONSE;
next_Mod_id = ue_Mod_id + 1;
//next_ra_frame = (rx_frame + 20)%1000;
next_ra_frame = 0;
}
//ue_prach_procedures(ue,proc,eNB_id,abstraction_flag,mode);
}
}
} // mode is PRACH
// Substitute call to phy_procedures Tx with call to phy_stub functions in order to trigger
// UE Tx procedures directly at the MAC layer, based on the received ul_config requests from the vnf (eNB).
// Generate UL_indications which correspond to UL traffic.
if (ul_config_req != NULL)
{ //&& UE_mac_inst[Mod_id].ul_config_req->ul_config_request_body.ul_config_pdu_list != NULL){
ul_config_req_UE_MAC(ul_config_req, NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf), ue_Mod_id);
}
}
phy_procedures_UE_SL_RX(UE, proc);
}
else
{
LOG_I(MAC, "Skipping subframe select statement proxy SFN.SF: %d.%d\n",
NFAPI_SFNSF2SFN(sfn_sf), NFAPI_SFNSF2SF(sfn_sf));
if (ul_config_req != NULL)
{
LOG_I(MAC, "Skipping subframe select statement ul_config_req SFN.SF: %d.%d\n",
NFAPI_SFNSF2SFN(ul_config_req->sfn_sf), NFAPI_SFNSF2SF(ul_config_req->sfn_sf));
}
}
} //for (Mod_id=0; Mod_id<NB_UE_INST; Mod_id++)
if (UL_INFO->crc_ind.crc_indication_body.number_of_crcs > 0) {
//LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.number_of_crcs:%d CRC_IND:SFN/SF:%d\n", UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf));
//LOG_I(MAC, "ul_config_req_UE_MAC 2.2, SFN/SF of PNF counter:%d.%d, number_of_crcs: %d \n", timer_frame, timer_subframe, UL_INFO->crc_ind.crc_indication_body.number_of_crcs);
send_standalone_msg(UL_INFO, UL_INFO->crc_ind.header.message_id);
sent_any = true;
//LOG_I(MAC, "ul_config_req_UE_MAC 2.21 \n");
UL_INFO->crc_ind.crc_indication_body.number_of_crcs = 0;
}
if (UL_INFO->rx_ind.rx_indication_body.number_of_pdus > 0) {
//LOG_D(PHY,"UL_info->rx_ind.number_of_pdus:%d RX_IND:SFN/SF:%d\n", UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf));
//LOG_I(MAC, "ul_config_req_UE_MAC 2.3, SFN/SF of PNF counter:%d.%d, number_of_pdus: %d \n", timer_frame, timer_subframe, UL_INFO->rx_ind.rx_indication_body.number_of_pdus);
send_standalone_msg(UL_INFO, UL_INFO->rx_ind.header.message_id);
sent_any = true;
//LOG_I(MAC, "ul_config_req_UE_MAC 2.31 \n");
UL_INFO->rx_ind.rx_indication_body.number_of_pdus = 0;
}
if (UL_INFO->cqi_ind.cqi_indication_body.number_of_cqis > 0) {
send_standalone_msg(UL_INFO, UL_INFO->cqi_ind.header.message_id);
sent_any = true;
UL_INFO->cqi_ind.cqi_indication_body.number_of_cqis = 0;
}
if (UL_INFO->harq_ind.harq_indication_body.number_of_harqs > 0) {
//LOG_D(MAC, "ul_config_req_UE_MAC 2.4, SFN/SF of PNF counter:%d.%d, number_of_harqs: %d \n", timer_frame, timer_subframe, UL_INFO->harq_ind.harq_indication_body.number_of_harqs);
send_standalone_msg(UL_INFO, UL_INFO->harq_ind.header.message_id);
sent_any = true;
//LOG_I(MAC, "ul_config_req_UE_MAC 2.41 \n");
UL_INFO->harq_ind.harq_indication_body.number_of_harqs = 0;
}
if (UL_INFO->sr_ind.sr_indication_body.number_of_srs > 0) {
//LOG_I(MAC, "ul_config_req_UE_MAC 2.5, SFN/SF of PNF counter:%d.%d, number_of_srs: %d \n", timer_frame, timer_subframe, UL_INFO->sr_ind.sr_indication_body.number_of_srs);
send_standalone_msg(UL_INFO, UL_INFO->sr_ind.header.message_id);
sent_any = true;
//LOG_I(MAC, "ul_config_req_UE_MAC 2.51 \n");
UL_INFO->sr_ind.sr_indication_body.number_of_srs = 0;
}
// De-allocate memory of nfapi requests copies before next subframe round
if (dl_config_req_tx_req != NULL) {
if (dl_config_req_tx_req->dl_config_req->vendor_extension != NULL) {
free(dl_config_req_tx_req->dl_config_req->vendor_extension);
dl_config_req_tx_req->dl_config_req->vendor_extension = NULL;
}
if (dl_config_req_tx_req->dl_config_req->dl_config_request_body.dl_config_pdu_list != NULL) {
free(dl_config_req_tx_req->dl_config_req->dl_config_request_body.dl_config_pdu_list);
dl_config_req_tx_req->dl_config_req->dl_config_request_body.dl_config_pdu_list = NULL;
}
nfapi_free_tx_req_pdu_list(dl_config_req_tx_req->tx_req_pdu_list);
dl_config_req_tx_req->tx_req_pdu_list = NULL;
free(dl_config_req_tx_req->dl_config_req);
dl_config_req_tx_req->dl_config_req = NULL;
free(dl_config_req_tx_req);
dl_config_req_tx_req = NULL;
}
if (ul_config_req != NULL) {
if (ul_config_req->ul_config_request_body.ul_config_pdu_list != NULL) {
free(ul_config_req->ul_config_request_body.ul_config_pdu_list);
ul_config_req->ul_config_request_body.ul_config_pdu_list = NULL;
}
free(ul_config_req);
ul_config_req = NULL;
}
if (hi_dci0_req != NULL) {
if (hi_dci0_req->hi_dci0_request_body.hi_dci0_pdu_list != NULL) {
free(hi_dci0_req->hi_dci0_request_body.hi_dci0_pdu_list);
hi_dci0_req->hi_dci0_request_body.hi_dci0_pdu_list = NULL;
}
free(hi_dci0_req);
hi_dci0_req = NULL;
}
if (!sent_any)
{
send_standalone_dummy();
}
}
// Free UL_INFO messages
free(UL_INFO->cqi_ind.cqi_indication_body.cqi_raw_pdu_list);
UL_INFO->cqi_ind.cqi_indication_body.cqi_raw_pdu_list = NULL;
free(UL_INFO->cqi_ind.cqi_indication_body.cqi_pdu_list);
UL_INFO->cqi_ind.cqi_indication_body.cqi_pdu_list = NULL;
free(UL_INFO->sr_ind.sr_indication_body.sr_pdu_list);
UL_INFO->sr_ind.sr_indication_body.sr_pdu_list = NULL;
free(UL_INFO->harq_ind.harq_indication_body.harq_pdu_list);
UL_INFO->harq_ind.harq_indication_body.harq_pdu_list = NULL;
free(UL_INFO->crc_ind.crc_indication_body.crc_pdu_list);
UL_INFO->crc_ind.crc_indication_body.crc_pdu_list = NULL;
free(UL_INFO->rx_ind.rx_indication_body.rx_pdu_list);
UL_INFO->rx_ind.rx_indication_body.rx_pdu_list = NULL;
free(UL_INFO);
UL_INFO = NULL;
// thread finished
free(arg);
return NULL;
}
/*!
* \brief This is the UE thread for RX subframe n and TX subframe n+4.
@@ -967,6 +1364,7 @@ void ue_stub_rx_handler(unsigned int num_bytes,
static void *UE_phy_stub_single_thread_rxn_txnp4(void *arg)
{
#if 0 // TODO: doesn't currently compile, obviated by multi-ue proxy
thread_top_init("UE_phy_stub_thread_rxn_txnp4",1,870000L,1000000L,1000000L);
// for multipule UE's L2-emulator
//module_id_t Mod_id = 0;
@@ -1012,7 +1410,7 @@ static void *UE_phy_stub_single_thread_rxn_txnp4(void *arg)
dl_config_req = NULL;
ul_config_req = NULL;
hi_dci0_req = NULL;
tx_request_pdu_list = NULL;
tx_req_pdu_list = NULL;
// waiting for all UE's threads set phy_stub_ticking->num_single_thread[ue_thread_id] = -1.
do {
@@ -1108,7 +1506,7 @@ static void *UE_phy_stub_single_thread_rxn_txnp4(void *arg)
}
}
if (dl_config_req && tx_request_pdu_list) {
if (dl_config_req && tx_req_pdu_list) {
nfapi_dl_config_request_body_t* dl_config_req_body = &dl_config_req->dl_config_request_body;
for (int i = 0; i < dl_config_req_body->number_pdu; ++i) {
nfapi_dl_config_request_pdu_t* pdu = &dl_config_req_body->dl_config_pdu_list[i];
@@ -1322,16 +1720,16 @@ static void *UE_phy_stub_single_thread_rxn_txnp4(void *arg)
dl_config_req = NULL;
}
if(tx_request_pdu_list!=NULL) {
if(tx_req_pdu_list!=NULL) {
for (int i = 0; i < tx_req_num_elems; i++) {
for (int j = 0; j < tx_request_pdu_list[i].num_segments; j++) {
free(tx_request_pdu_list[i].segments[j].segment_data);
tx_request_pdu_list[i].segments[j].segment_data = NULL;
for (int j = 0; j < tx_req_pdu_list[i].num_segments; j++) {
free(tx_req_pdu_list[i].segments[j].segment_data);
tx_req_pdu_list[i].segments[j].segment_data = NULL;
}
}
tx_req_num_elems = 0;
free(tx_request_pdu_list);
tx_request_pdu_list = NULL;
free(tx_req_pdu_list);
tx_req_pdu_list = NULL;
}
if(ul_config_req!=NULL) {
@@ -1371,10 +1769,11 @@ static void *UE_phy_stub_single_thread_rxn_txnp4(void *arg)
UL_INFO->rx_ind.rx_indication_body.rx_pdu_list = NULL;
free(UL_INFO);
UL_INFO = NULL;
#endif // disabled UE_phy_stub_single_thread_rxn_txnp4
// thread finished
free(arg);
return &UE_thread_rxtx_retval;
return NULL;
}
@@ -1388,6 +1787,7 @@ static void *UE_phy_stub_single_thread_rxn_txnp4(void *arg)
static void *UE_phy_stub_thread_rxn_txnp4(void *arg)
{
#if 0
thread_top_init("UE_phy_stub_thread_rxn_txnp4",1,870000L,1000000L,1000000L);
module_id_t Mod_id = 0;
static __thread int UE_thread_rxtx_retval;
@@ -1536,10 +1936,10 @@ static void *UE_phy_stub_thread_rxn_txnp4(void *arg)
phy_procedures_UE_SL_RX(UE,proc);
}
#endif // disabled
// thread finished
free(arg);
return &UE_thread_rxtx_retval;
return NULL; //return &UE_thread_rxtx_retval;
}
@@ -1607,6 +2007,8 @@ void *UE_thread(void *arg)
oai_exit=1;
}
log_scheduler(__func__);
while (!oai_exit) {
if (IS_SOFTMODEM_BASICSIM)
while (!(UE->proc.instance_cnt_synch < 0)) {
@@ -1973,7 +2375,7 @@ void init_UE_single_thread_stub(int nb_inst)
AssertFatal(PHY_vars_UE_g[i]!=NULL,"PHY_vars_UE_g[inst] is NULL\n");
AssertFatal(PHY_vars_UE_g[i][0]!=NULL,"PHY_vars_UE_g[inst][0] is NULL\n");
if(NFAPI_MODE==NFAPI_UE_STUB_PNF) {
if(NFAPI_MODE==NFAPI_UE_STUB_PNF || NFAPI_MODE==NFAPI_MODE_STANDALONE_PNF) {
#ifdef NAS_UE
MessageDef *message_p;
message_p = itti_alloc_new_message(TASK_NAS_UE, 0, INITIALIZE_MESSAGE);
@@ -1993,6 +2395,13 @@ void init_UE_single_thread_stub(int nb_inst)
//int nb_threads=RX_NB_TH;
int nb_threads=1;
void* (*task_func)(void*);
if (NFAPI_MODE == NFAPI_MODE_STANDALONE_PNF) {
task_func = UE_phy_stub_standalone_pnf_task;
} else {
task_func = UE_phy_stub_single_thread_rxn_txnp4;
}
for(uint16_t ue_thread_id = 0; ue_thread_id < NB_THREAD_INST; ue_thread_id++) {
UE = PHY_vars_UE_g[ue_thread_id][0];
@@ -2009,7 +2418,8 @@ void init_UE_single_thread_stub(int nb_inst)
UE->proc.proc_rxtx[i].sub_frame_start=i;
UE->proc.proc_rxtx[i].sub_frame_step=nb_threads;
printf("Init_UE_threads rtd %d proc %d nb_threads %d i %d\n",rtd->proc->sub_frame_start, UE->proc.proc_rxtx[i].sub_frame_start,nb_threads, i);
pthread_create(&UE->proc.proc_rxtx[i].pthread_rxtx, NULL, UE_phy_stub_single_thread_rxn_txnp4, rtd);
pthread_create(&UE->proc.proc_rxtx[i].pthread_rxtx, NULL, task_func, rtd);
pthread_setname_np(UE->proc.proc_rxtx[i].pthread_rxtx, "oai:ue-phy");
}
}
@@ -2239,7 +2649,7 @@ static void *timer_thread( void *param )
pdu.header.packet_type = TTI_SYNC;
pdu.header.absSF = (timer_frame*10)+timer_subframe;
if (NFAPI_MODE != NFAPI_UE_STUB_PNF) {
if (NFAPI_MODE != NFAPI_UE_STUB_PNF && NFAPI_MODE != NFAPI_MODE_STANDALONE_PNF) {
multicast_link_write_sock(0,
(char *)&pdu,
sizeof(UE_tport_header_t));
+107 -62
View File
@@ -34,9 +34,6 @@
#define _GNU_SOURCE /* See feature_test_macros(7) */
#include <sched.h>
#include "rt_wrapper.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
#include "assertions.h"
@@ -66,6 +63,7 @@
#include "LAYER2/MAC/mac_proto.h"
#include "RRC/LTE/rrc_vars.h"
#include "PHY_INTERFACE/phy_interface_vars.h"
#include "PHY_INTERFACE/phy_stub_UE.h"
#include "PHY/TOOLS/phy_scope_interface.h"
#include "common/utils/LOG/log.h"
#include "nfapi/oai_integration/vendor_ext.h"
@@ -78,12 +76,10 @@
#include "create_tasks.h"
#include "system.h"
#include "lte-softmodem.h"
#include "executables/softmodem-common.h"
/* temporary compilation wokaround (UE/eNB split */
uint16_t sf_ahead;
pthread_cond_t nfapi_sync_cond;
@@ -91,7 +87,7 @@ pthread_mutex_t nfapi_sync_mutex;
int nfapi_sync_var=-1; //!< protected by mutex \ref nfapi_sync_mutex
uint16_t sf_ahead=2;
uint16_t sf_ahead=4;
int tddflag;
char *emul_iface;
@@ -188,9 +184,10 @@ int oaisim_flag=0;
*/
uint8_t abstraction_flag=0;
bler_struct bler_data[NUM_MCS];
// needed for pdcp.c
RAN_CONTEXT_t RC;
instance_t CUuniqInstance=0;
/* forward declarations */
void set_default_frame_parms(LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
@@ -276,7 +273,7 @@ void exit_function(const char *file, const char *function, const int line, const
}
extern int16_t dlsch_demod_shift;
uint16_t node_number;
static void get_options(void) {
int CC_id=0;
int tddflag=0;
@@ -520,7 +517,7 @@ int restart_L1L2(module_id_t enb_id) {
return 0;
}
void init_pdcp(void) {
static void init_pdcp(int ue_id) {
uint32_t pdcp_initmask = (!IS_SOFTMODEM_NOS1) ? LINK_ENB_PDCP_TO_GTPV1U_BIT : (LINK_ENB_PDCP_TO_GTPV1U_BIT | PDCP_USE_NETLINK_BIT | LINK_ENB_PDCP_TO_IP_DRIVER_BIT);
if (IS_SOFTMODEM_BASICSIM || IS_SOFTMODEM_RFSIM || (nfapi_getmode()==NFAPI_UE_STUB_PNF)) {
@@ -530,7 +527,7 @@ void init_pdcp(void) {
if (IS_SOFTMODEM_NOKRNMOD)
pdcp_initmask = pdcp_initmask | UE_NAS_USE_TUN_BIT;
pdcp_module_init(pdcp_initmask);
pdcp_module_init(pdcp_initmask, ue_id);
pdcp_set_rlc_data_req_func((send_rlc_data_req_func_t) rlc_data_req);
pdcp_set_pdcp_data_ind_func((pdcp_data_ind_func_t) pdcp_data_ind);
}
@@ -542,6 +539,7 @@ AssertFatal(false,"");
}
int main( int argc, char **argv ) {
int CC_id;
uint8_t abstraction_flag=0;
// Default value for the number of UEs. It will hold,
@@ -558,14 +556,19 @@ int main( int argc, char **argv ) {
mode = normal_txrx;
memset(&openair0_cfg[0],0,sizeof(openair0_config_t)*MAX_CARDS);
set_latency_target();
logInit();
set_latency_target();
printf("Reading in command-line options\n");
for (int i=0; i<MAX_NUM_CCs; i++) tx_max_power[i]=23;
get_options ();
if (NFAPI_MODE == NFAPI_MODE_STANDALONE_PNF) {
sf_ahead = 1;
}
printf("sf_ahead = %d\n", sf_ahead);
EPC_MODE_ENABLED = !IS_SOFTMODEM_NOS1;
printf("Running with %d UE instances\n",NB_UE_INST);
@@ -600,7 +603,16 @@ int main( int argc, char **argv ) {
MSC_INIT(MSC_E_UTRAN, ADDED_QUEUES_MAX+TASK_MAX);
init_opt();
init_pdcp();
ue_id_g = (node_number == 0) ? 0 : node_number-2; //ue_id_g = 0, 1, ...,
if(node_number == 0)
{
init_pdcp(0);
}
else
{
init_pdcp(node_number-1);
}
//TTN for D2D
printf ("RRC control socket\n");
rrc_control_socket_init();
@@ -608,7 +620,6 @@ int main( int argc, char **argv ) {
pdcp_pc5_socket_init();
// to make a graceful exit when ctrl-c is pressed
set_softmodem_sighandler();
check_clock();
#ifndef PACKAGE_VERSION
# define PACKAGE_VERSION "UNKNOWN-EXPERIMENTAL"
#endif
@@ -623,7 +634,7 @@ int main( int argc, char **argv ) {
NB_INST=1;
if(NFAPI_MODE==NFAPI_UE_STUB_PNF) {
if(NFAPI_MODE==NFAPI_UE_STUB_PNF || NFAPI_MODE==NFAPI_MODE_STANDALONE_PNF) {
PHY_vars_UE_g = malloc(sizeof(PHY_VARS_UE **)*NB_UE_INST);
for (int i=0; i<NB_UE_INST; i++) {
@@ -641,59 +652,13 @@ int main( int argc, char **argv ) {
cpuf=get_cpu_freq_GHz();
#if 0 // #ifndef DEADLINE_SCHEDULER
printf("NO deadline scheduler\n");
/* Currently we set affinity for UHD to CPU 0 for eNB/UE and only if number of CPUS >2 */
cpu_set_t cpuset;
int s;
char cpu_affinity[1024];
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
int j;
if (get_nprocs() > 2) {
for (j = 2; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_setaffinity_np");
exit_fun("Error setting processor affinity");
}
LOG_I(HW, "Setting the affinity of main function to all CPUs, for device library to use CPU 0 only!\n");
}
#endif
/* Check the actual affinity mask assigned to the thread */
s = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_getaffinity_np");
exit_fun("Error getting processor affinity ");
}
memset(cpu_affinity, 0, sizeof(cpu_affinity));
for (int j = 0; j < CPU_SETSIZE; j++) {
if (CPU_ISSET(j, &cpuset)) {
char temp[1024];
sprintf(temp, " CPU_%d ", j);
strcat(cpu_affinity, temp);
}
}
LOG_I(HW, "CPU Affinity of main() function is... %s\n", cpu_affinity);
#endif
if (create_tasks_ue(NB_UE_INST) < 0) {
printf("cannot create ITTI tasks\n");
exit(-1); // need a softer mode
}
if (NFAPI_MODE==NFAPI_UE_STUB_PNF) { // UE-STUB-PNF
if (NFAPI_MODE==NFAPI_UE_STUB_PNF || NFAPI_MODE==NFAPI_MODE_STANDALONE_PNF) { // UE-STUB-PNF
UE_config_stub_pnf();
}
@@ -708,6 +673,21 @@ int main( int argc, char **argv ) {
//Panos: Temporarily we will be using single set of threads for multiple UEs.
//init_UE_stub(1,eMBMS_active,uecap_xer_in,emul_iface);
init_UE_stub_single_thread(NB_UE_INST,eMBMS_active,uecap_xer_in,emul_iface);
} else if (NFAPI_MODE==NFAPI_MODE_STANDALONE_PNF) {
init_queue(&dl_config_req_tx_req_queue);
init_queue(&hi_dci0_req_queue);
init_queue(&ul_config_req_queue);
init_bler_table();
config_sync_var=0;
if (sem_init(&sfn_semaphore, 0, 0) != 0)
{
LOG_E(MAC, "sem_init() error\n");
abort();
}
init_UE_stub_single_thread(NB_UE_INST,eMBMS_active,uecap_xer_in,emul_iface);
init_UE_standalone_thread(ue_id_g);
} else {
init_UE(NB_UE_INST,eMBMS_active,uecap_xer_in,0,get_softmodem_params()->phy_test,UE_scan,UE_scan_carrier,mode,(int)rx_gain[0][0],tx_max_power[0],
frame_parms[0]);
@@ -780,8 +760,73 @@ int main( int argc, char **argv ) {
if (PHY_vars_UE_g[0][0]->rfdevice.trx_end_func)
PHY_vars_UE_g[0][0]->rfdevice.trx_end_func(&PHY_vars_UE_g[0][0]->rfdevice);
pdcp_module_cleanup();
terminate_opt();
logClean();
printf("Bye.\n");
return 0;
}
// Read in each MCS file and build BLER-SINR-TB table
void init_bler_table(void)
{
size_t bufSize = 1024;
char * line = NULL;
char * token;
char * temp = NULL;
const char *openair_dir = getenv("OPENAIR_DIR");
if (!openair_dir)
{
LOG_E(MAC, "No $OPENAIR_DIR\n");
abort();
}
// Maybe not needed... and may not work.
memset(bler_data, 0, sizeof(bler_data));
for (unsigned int i = 0; i < NUM_MCS; i++)
{
char fName[1024];
snprintf(fName, sizeof(fName), "%s/openair1/SIMULATION/LTE_PHY/BLER_SIMULATIONS/AWGN/AWGN_results/bler_tx1_chan18_nrx1_mcs%d.csv", openair_dir, i);
FILE *pFile = fopen(fName, "r");
if (!pFile)
{
LOG_E(MAC, "Bler File ERROR! - fopen(), file: %s\n", fName);
abort();
}
int nlines = 0;
while (getline(&line, &bufSize, pFile) > 0)
{
if (!strncmp(line,"SNR",3))
{
continue;
}
if (nlines > NUM_SINR)
{
LOG_E(MAC, "BLER FILE ERROR - num lines greater than expected - file: %s\n", fName);
abort();
}
token = strtok_r(line, ";", &temp);
int ncols = 0;
while (token != NULL)
{
if (ncols > NUM_BLER_COL)
{
LOG_E(MAC, "BLER FILE ERROR - num of cols greater than expected\n");
abort();
}
bler_data[i].bler_table[nlines][ncols] = strtof(token, NULL);
ncols++;
token = strtok_r(NULL, ";", &temp);
}
nlines++;
}
bler_data[i].length = nlines;
fclose(pFile);
}
}
-383
View File
@@ -1,383 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file rt_wrapper.h
* \brief provides a wrapper for the timing function, runtime calculations for real-time opeartions depending on weather RTAI or DEADLINE_SCHEDULER kernels are used or not
* \author F. Kaltenberger and Navid Nikaein
* \date 2013
* \version 0.1
* \company Eurecom
* \email: florian.kaltenberger@eurecom.fr, navid.nikaein@eurecom.fr
* \note
* \warning
*/
#define _GNU_SOURCE
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <sys/types.h>
#include <sys/mman.h>
#include <sched.h>
#include <linux/sched.h>
#include <signal.h>
#include <execinfo.h>
#include <getopt.h>
#include <sys/sysinfo.h>
#include "rt_wrapper.h"
#include "system.h"
#include <errno.h>
#include <common/utils/msc/msc.h>
#include "openair1/PHY/defs_common.h"
static int latency_target_fd = -1;
static int32_t latency_target_value = 0;
/* Latency trick - taken from cyclictest.c
* if the file /dev/cpu_dma_latency exists,
* open it and write a zero into it. This will tell
* the power management system not to transition to
* a high cstate (in fact, the system acts like idle=poll)
* When the fd to /dev/cpu_dma_latency is closed, the behavior
* goes back to the system default.
*
* Documentation/power/pm_qos_interface.txt
*/
void set_latency_target(void) {
struct stat s;
int ret;
if (stat("/dev/cpu_dma_latency", &s) == 0) {
latency_target_fd = open("/dev/cpu_dma_latency", O_RDWR);
if (latency_target_fd == -1)
return;
ret = write(latency_target_fd, &latency_target_value, 4);
if (ret == 0) {
printf("# error setting cpu_dma_latency to %d!: %s\n", latency_target_value, strerror(errno));
close(latency_target_fd);
return;
}
printf("# /dev/cpu_dma_latency set to %dus\n", latency_target_value);
}
}
struct timespec interval, next, now, res;
clockid_t clock_id = CLOCK_MONOTONIC; //other options are CLOCK_MONOTONIC, CLOCK_REALTIME, CLOCK_PROCESS_CPUTIME_ID, CLOCK_THREAD_CPUTIME_ID
RTIME rt_get_time_ns (void)
{
clock_gettime(clock_id, &now);
return(now.tv_sec*1e9+now.tv_nsec);
}
int rt_sleep_ns (RTIME x)
{
int ret;
clock_gettime(clock_id, &now);
interval.tv_sec = x/((RTIME)1000000000);
interval.tv_nsec = x%((RTIME)1000000000);
//rt_printk("sleeping for %d sec and %d ns\n",interval.tv_sec,interval.tv_nsec);
next = now;
next.tv_sec += interval.tv_sec;
next.tv_nsec += interval.tv_nsec;
if (next.tv_nsec>=1000000000) {
next.tv_nsec -= 1000000000;
next.tv_sec++;
}
ret = clock_nanosleep(clock_id, TIMER_ABSTIME, &next, NULL);
/*
if (ret==EFAULT)
rt_printk("rt_sleep_ns returned EFAULT (%d), reqested %d sec and %d ns\n",ret,next.tv_sec,next.tv_nsec);
if (ret==EINVAL)
rt_printk("rt_sleep_ns returned EINVAL (%d), reqested %d sec and %d ns\n",ret,next.tv_sec,next.tv_nsec);
if (ret==EINTR)
rt_printk("rt_sleep_ns returned EINTR (%d), reqested %d sec and %d ns\n",ret,next.tv_sec,next.tv_nsec);
*/
return(ret);
}
void check_clock(void)
{
if (clock_getres(clock_id, &res)) {
printf("clock_getres failed");
} else {
printf("reported resolution = %lld ns\n", (long long int) ((int) 1e9 * res.tv_sec) + (long long int) res.tv_nsec);
}
}
uint16_t cell_processing_dl[6]={10,15,24,42,80,112};
uint16_t platform_processing_dl=20; // upperbound for GPP, LXC, DOCKER and KVM
uint16_t user_processing_dl_a[6]={2,4,5,7,10,12};
uint16_t user_processing_dl_b[6]={10, 15, 25, 70, 110, 150};
uint16_t user_processing_dl_err[6]={20, 40, 60, 90, 120, 160};
uint16_t protocol_processing_dl[6]={150, 250, 350, 450, 650, 800}; // assumption: max MCS 27 --> gives an upper bound for the transport block size : to be measured
uint16_t cell_processing_ul[6]={10,15,24,42,80,112};
uint16_t platform_processing_ul=30; // upperbound for GPP, LXC, DOCKER and KVM
uint16_t user_processing_ul_a[6]={5, 9, 12, 24, 33, 42};
uint16_t user_processing_ul_b[6]={20, 30, 40, 76, 140, 200};
uint16_t user_processing_ul_err[6]={15, 25, 32, 60, 80, 95};
uint16_t protocol_processing_ul[6]={100, 200, 300, 400, 550, 700}; // assumption: max MCS 16 --> gives an upper bound for the transport block size
int fill_modeled_runtime_table(uint16_t runtime_phy_rx[29][6],
uint16_t runtime_phy_tx[29][6]){
//double cpu_freq;
//cpu_freq = get_cpu_freq_GHz();
// target_dl_mcs
// target_ul_mcs
// frame_parms[0]->N_RB_DL
int i,j;
memset(runtime_phy_rx,0,sizeof(uint16_t)*29*6);
memset(runtime_phy_tx,0,sizeof(uint16_t)*29*6);
/* only the BBU/PHY procesing time */
for (i=0;i<29;i++){
for (j=0;j<6;j++){
runtime_phy_rx[i][j] = cell_processing_ul[j] + platform_processing_ul + user_processing_ul_err[j] + user_processing_ul_a[j]*i+ user_processing_ul_b[j];
runtime_phy_tx[i][j] = cell_processing_dl[j] + platform_processing_dl + user_processing_dl_err[j] + user_processing_dl_a[j]*i+ user_processing_dl_b[j];
}
}
return 0;
}
// int runtime_upper_layers[6]; // values for different RBs
// int runtime_phy_rx[29][6]; // SISO [MCS 0-28][RBs 0-5 : 6, 15, 25, 50, 75, 100]
// int runtime_phy_tx[29][6]; // SISO [MCS 0-28][RBs 0-5 : 6, 15, 25, 50, 75, 100]
// target_dl_mcs
// target_ul_mcs
// frame_parms[0]->N_RB_DL
//runtime_upper_layers[6]; // values for different RBs
// int runtime_phy_rx[29][6]; // SISO [MCS 0-28][RBs 0-5 : 6, 15, 25, 50, 75, 100]
// int runtime_phy_tx[29][6]
double get_runtime_tx(int tx_subframe, uint16_t runtime_phy_tx[29][6], uint32_t mcs, int N_RB_DL,double cpuf,int nb_tx_antenna){
int i;
double runtime;
//printf("cpuf =%lf \n",cpuf);
switch(N_RB_DL){
case 6:
i = 0;
break;
case 15:
i = 1;
break;
case 25:
i = 2;
break;
case 50:
i = 3;
break;
case 75:
i = 4;
break;
case 100:
i = 5;
break;
default:
i = 3;
break;
}
runtime = ( (3.2/cpuf)*(double)runtime_phy_tx[mcs][i] + (3.2/cpuf)*(double)protocol_processing_dl[i])/1000 ;
printf("Setting tx %d runtime value (ms) = %lf\n",tx_subframe,runtime);
return runtime;
}
double get_runtime_rx(int rx_subframe, uint16_t runtime_phy_rx[29][6], uint32_t mcs, int N_RB_DL,double cpuf,int nb_rx_antenna){
int i;
double runtime;
//printf("N_RB_DL=%d cpuf =%lf \n",N_RB_DL, cpuf);
switch(N_RB_DL){
case 6:
i = 0;
break;
case 15:
i = 1;
break;
case 25:
i = 2;
break;
case 50:
i = 3;
break;
case 75:
i = 4;
break;
case 100:
i = 5;
break;
default:
i = 3;
break;
}
runtime = ((3.2/cpuf)*(double)runtime_phy_rx[mcs][i] + (3.2/cpuf)*(double)protocol_processing_ul[i])/1000 ;
printf("Setting rx %d runtime value (ms) = %lf \n",rx_subframe, runtime);
return runtime;
}
#ifdef DEADLINE_SCHEDULER
int sched_setattr(pid_t pid, const struct sched_attr *attr, unsigned int flags)
{
return syscall(__NR_sched_setattr, pid, attr, flags);
}
int sched_getattr(pid_t pid,struct sched_attr *attr,unsigned int size, unsigned int flags)
{
return syscall(__NR_sched_getattr, pid, attr, size, flags);
}
#endif
void thread_top_init(char *thread_name,
int affinity,
uint64_t runtime,
uint64_t deadline,
uint64_t period) {
MSC_START_USE();
#ifdef DEADLINE_SCHEDULER
struct sched_attr attr;
unsigned int flags = 0;
attr.size = sizeof(attr);
attr.sched_flags = 0;
attr.sched_nice = 0;
attr.sched_priority = 0;
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = runtime;
attr.sched_deadline = deadline;
attr.sched_period = period;
if (sched_setattr(0, &attr, flags) < 0 ) {
perror("[SCHED] eNB tx thread: sched_setattr failed\n");
fprintf(stderr,"sched_setattr Error = %s",strerror(errno));
exit(1);
}
#else //LOW_LATENCY
int policy, s, j;
struct sched_param sparam;
char cpu_affinity[1024];
cpu_set_t cpuset;
int settingPriority = 1;
/* Set affinity mask to include CPUs 2 to MAX_CPUS */
/* CPU 0 is reserved for UHD threads */
/* CPU 1 is reserved for all RX_TX threads */
/* Enable CPU Affinity only if number of CPUs > 2 */
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
if (affinity == 0) {
LOG_W(HW,"thread_top_init() called with affinity==0, but overruled by #ifdef CPU_AFFINITY\n");
}
else if (get_nprocs() > 2)
{
for (j = 2; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0)
{
perror( "pthread_setaffinity_np");
exit_fun("Error setting processor affinity");
}
}
#else //CPU_AFFINITY
if (affinity) {
LOG_W(HW,"thread_top_init() called with affinity>0, but overruled by #ifndef CPU_AFFINITY.\n");
}
#endif //CPU_AFFINITY
/* Check the actual affinity mask assigned to the thread */
s = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0)
{
perror( "pthread_getaffinity_np");
exit_fun("Error getting processor affinity ");
}
memset(cpu_affinity,0,sizeof(cpu_affinity));
for (j = 0; j < 1024; j++)
{
if (CPU_ISSET(j, &cpuset))
{
char temp[1024];
sprintf (temp, " CPU_%d", j);
strcat(cpu_affinity, temp);
}
}
if (checkIfFedoraDistribution())
if (checkIfGenericKernelOnFedora())
if (checkIfInsideContainer())
settingPriority = 0;
if (settingPriority) {
memset(&sparam, 0, sizeof(sparam));
sparam.sched_priority = sched_get_priority_max(SCHED_FIFO);
policy = SCHED_FIFO;
s = pthread_setschedparam(pthread_self(), policy, &sparam);
if (s != 0) {
perror("pthread_setschedparam : ");
exit_fun("Error setting thread priority");
}
s = pthread_getschedparam(pthread_self(), &policy, &sparam);
if (s != 0) {
perror("pthread_getschedparam : ");
exit_fun("Error getting thread priority");
}
pthread_setname_np(pthread_self(), thread_name);
LOG_I(HW, "[SCHED][eNB] %s started on CPU %d, sched_policy = %s , priority = %d, CPU Affinity=%s \n",thread_name,sched_getcpu(),
(policy == SCHED_FIFO) ? "SCHED_FIFO" :
(policy == SCHED_RR) ? "SCHED_RR" :
(policy == SCHED_OTHER) ? "SCHED_OTHER" :
"???",
sparam.sched_priority, cpu_affinity );
}
#endif //LOW_LATENCY
mlockall(MCL_CURRENT | MCL_FUTURE);
}
-132
View File
@@ -1,132 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file rt_wrapper.h
* \brief provides a wrapper for the timing function for real-time opeartions. It also implements an API for the SCHED_DEADLINE kernel scheduler.
* \author F. Kaltenberger and Navid Nikaein
* \date 2013
* \version 0.1
* \company Eurecom
* \email: florian.kaltenberger@eurecom.fr, navid.nikaein@eurecom.fr
* \note
* \warning This code will be removed when a legacy libc API becomes available.
*/
#ifndef _RT_WRAPPER_H_
#define _RT_WRAPPER_H_
#define _GNU_SOURCE
#include <time.h>
#include <errno.h>
#include <stdint.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <pthread.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <syscall.h>
#include <math.h>
#include <sched.h>
#include <sys/ioctl.h>
#include <sys/types.h>
#include <sys/mman.h>
#include <sched.h>
#include <linux/sched.h>
#include <signal.h>
#include <execinfo.h>
#include <getopt.h>
#include <sys/sysinfo.h>
#include "common/utils/LOG/log_extern.h"
#include "msc.h"
#define RTIME long long int
#define rt_printk printf
void set_latency_target(void);
RTIME rt_get_time_ns (void);
int rt_sleep_ns (RTIME x);
void check_clock(void);
int fill_modeled_runtime_table(uint16_t runtime_phy_rx[29][6],uint16_t runtime_phy_tx[29][6]);
double get_runtime_tx(int tx_subframe, uint16_t runtime_phy_tx[29][6],uint32_t mcs, int N_RB_DL,double cpuf,int nb_tx_antenna);
double get_runtime_rx(int rx_subframe, uint16_t runtime_phy_rx[29][6], uint32_t mcs, int N_RB_DL,double cpuf,int nb_rx_antenna);
/**
* see https://www.kernel.org/doc/Documentation/scheduler/sched-deadline.txt or
* http://www.blaess.fr/christophe/2014/04/05/utiliser-un-appel-systeme-inconnu-de-la-libc/
*/
#ifdef DEADLINE_SCHEDULER
#define gettid() syscall(__NR_gettid)
#define SCHED_DEADLINE 6
/* XXX use the proper syscall numbers */
#ifdef __x86_64__
#define __NR_sched_setattr 314
#define __NR_sched_getattr 315
#endif
#ifdef __i386__
#define __NR_sched_setattr 351
#define __NR_sched_getattr 352
#endif
struct sched_attr {
__u32 size;
__u32 sched_policy;
__u64 sched_flags;
/* SCHED_NORMAL, SCHED_BATCH */
__s32 sched_nice;
/* SCHED_FIFO, SCHED_RR */
__u32 sched_priority;
/* SCHED_DEADLINE (nsec) */
__u64 sched_runtime;
__u64 sched_deadline;
__u64 sched_period;
};
int sched_setattr(pid_t pid, const struct sched_attr *attr, unsigned int flags);
int sched_getattr(pid_t pid,struct sched_attr *attr,unsigned int size, unsigned int flags);
#endif
#define gettid() syscall(__NR_gettid) // for gettid
void thread_top_init(char *thread_name,
int affinity,
uint64_t runtime,
uint64_t deadline,
uint64_t period);
#endif
-1
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@@ -42,7 +42,6 @@
#include <execinfo.h>
#include <getopt.h>
#include <sys/sysinfo.h>
#include "rt_wrapper.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
File diff suppressed because it is too large Load Diff
-840
View File
@@ -1,840 +0,0 @@
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
################################################################################
# file build_oai.bash
# brief OAI automated build tool that can be used to install, compile, run OAI.
# author Navid Nikaein, Lionel GAUTHIER
# company Eurecom
# email: navid.nikaein@eurecom.fr, lionel.gauthier@eurecom.fr
#
#!/bin/bash
################################
# include helper functions
################################
THIS_SCRIPT_PATH=$(dirname $(readlink -f $0))
. $THIS_SCRIPT_PATH/build_helper.bash
check_for_root_rights
#######################################
# Default PARAMETERS
######################################
declare OAI_DB_ADMIN_USER_NAME="root"
declare OAI_DB_ADMIN_USER_PASSWORD="linux"
#only one could be set at the time
declare BUILD_LTE="NONE" # ENB, EPC, HSS
declare HW="EXMIMO" # EXMIMO, USRP, ETHERNET, NONE
declare TARGET="ALL" # ALL, SOFTMODEM, OAISIM, UNISIM, NONE
declare ENB_S1=1
declare REL="REL8" # REL8, REL10
declare RT="NONE" # RTAI, RT_PREMPT, NONE
declare DEBUG=0
declare CONFIG_FILE=" "
declare CONFIG_FILE_ACCESS_OK=0
declare EXE_ARGUMENTS=" "
declare RUN_GDB=0
declare RUN=0
declare DISABLE_CHECK_INSTALLED_SOFTWARE=0
declare OAI_CLEAN=0
declare CLEAN_IPTABLES=0
declare CLEAN_HSS=0
declare OAI_TEST=0
declare XFORMS=0
# script is not currently handling these params
declare EPC=0 # flag to build EPC
declare ITTI_ANALYZER=0
declare VCD_TIMING=0
declare WIRESHARK=0
declare TIME_MEAS=0
declare DOXYGEN=0
declare DEV=0
#EMULATION_DEV_INTERFACE="eth0"
#EMULATION_MULTICAST_GROUP=1
#EMULATION_DEV_ADDRESS=`ifconfig $EMULATION_DEV_INTERFACE | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2 | awk '{ print $1}'`
############## script params #####################
if [ -f ./.lock_oaibuild ]; then
OAI_CLEAN=0
else
OAI_CLEAN=1
fi
#for i in "$@"
#do
# echo "i is : $i"
# case $i in
until [ -z "$1" ]
do
case "$1" in
-a | --doxygen)
DOXYGEN=1
echo "setting doxygen flag to: $DOXYGEN"
shift;
;;
-b | --disable-s1)
ENB_S1=0
echo "disable eNB S1 flag"
shift;
;;
-c | --clean)
rm -rf ./.lock_oaibuild
OAI_CLEAN=1
CLEAN_HSS=1
echo "setting clean flag to: $OAI_CLEAN"
echo "may check package installation, and recompile OAI"
shift;
;;
--clean-iptables)
CLEAN_IPTABLES=1;
shift;
;;
-C | --config-file)
CONFIG_FILE=$2
# may be relative path
if [ -f $(dirname $(readlink -f $0))/$CONFIG_FILE ]; then
CONFIG_FILE=$(dirname $(readlink -f $0))/$CONFIG_FILE
echo "setting config file to: $CONFIG_FILE"
CONFIG_FILE_ACCESS_OK=1
else
# may be absolute path
if [ -f $CONFIG_FILE ]; then
echo "setting config file to: $CONFIG_FILE"
CONFIG_FILE_ACCESS_OK=1
else
echo "config file not found"
exit 1
fi
fi
EXE_ARGUMENTS="$EXE_ARGUMENTS -O $CONFIG_FILE"
shift 2;
;;
-d | --debug)
DEBUG=1
echo "setting debug flag to: $DEBUG"
shift;
;;
-D | --disable-check-installed-software)
DISABLE_CHECK_INSTALLED_SOFTWARE=1
echo "disable check installed software"
shift;
;;
-e | --realtime)
RT=$2
echo "setting realtime flag to: $RT"
shift 2 ;
;;
-g | --run-with-gdb)
DEBUG=1
RUN=1
RUN_GDB=1
echo "Running with gdb"
shift;
;;
-K | --itti-dump-file)
ITTI_ANALYZER=1
ITTI_DUMP_FILE=$2
echo "setting ITTI dump file to: $ITTI_DUMP_FILE"
EXE_ARGUMENTS="$EXE_ARGUMENTS -K $ITTI_DUMP_FILE"
shift 2;
;;
-l | --build-target)
BUILD_LTE=$2
echo "setting top-level build target to: $2"
shift 2;
;;
-h | --help)
print_help
exit -1
;;
-m | --build-from-makefile)
BUILD_FROM_MAKEFILE=1
set_build_from_makefile $BUILD_FROM_MAKEFILE
echo "setting a flag to build from makefile to: $BUILD_FROM_MAKEFILE"
shift;
;;
-r | --3gpp-release)
REL=$2
echo "setting release to: $REL"
shift 2 ;
;;
-R | --run)
RUN=1
echo "setting run to $RUN"
shift;
;;
-s | --check)
OAI_TEST=1
echo "setting sanity check to: $OAI_TEST"
shift;
;;
-t | --enb-build-target)
TARGET=$2
echo "setting enb build target to: $TARGET"
shift 2;
;;
-V | --vcd)
echo "setting gtk-wave output"
VCD_TIMING=1
EXE_ARGUMENTS="$EXE_ARGUMENTS -V"
shift ;
;;
-w | --hardware)
HW="$2" #"${i#*=}"
echo "setting hardware to: $HW"
shift 2 ;
;;
-x | --xforms)
XFORMS=1
EXE_ARGUMENTS="$EXE_ARGUMENTS -d"
echo "setting xforms to: $XFORMS"
shift;
;;
-p | --wireshark)
WIRESHARK=1
echo "enabling Wireshark interface to $WIRESHARK"
shift;
;;
-z | --defaults)
echo "setting all parameters to: default"
rm -rf ./.lock_oaibuild
OAI_CLEAN=1
HW="EXMIMO"
TARGET="ALL"
ENB_S1=1
REL="REL8"
RT="NONE"
DEBUG=0
ENB_CONFIG_FILE=$OPENAIR_TARGETS/"PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.conf"
OAI_TEST=0
shift ;
;;
*)
echo "Unknown option $1"
break ;
# unknown option
;;
esac
done
#####################
# create a bin dir
#####################
echo_info "1. Creating the bin dir ..."
mkdir -m 777 bin
build_date=`date +%Y_%m_%d`
oai_build_date="oai_built_${build_date}"
touch bin/${oai_build_date}
chmod -f 777 bin/${oai_build_date}
touch bin/install_log.txt
chmod -f 777 bin/install_log.txt
################################
# cleanup first
################################
#echo_info "3. Cleaning ..."
#$SUDO kill -9 `ps -ef | grep oaisim | awk '{print $2}'` 2>&1
#$SUDO kill -9 `ps -ef | grep lte-softmodem | awk '{print $2}'` 2>&1
#$SUDO kill -9 `ps -ef | grep dlsim | awk '{print $2}'` 2>&1
#$SUDO kill -9 `ps -ef | grep ulsim | awk '{print $2}'` 2>&1
if [ $CLEAN_IPTABLES -eq 1 ]; then
echo_info "Flushing iptables..."
$SUDO modprobe ip_tables
$SUDO modprobe x_tables
$SUDO iptables -P INPUT ACCEPT
$SUDO iptables -F INPUT
$SUDO iptables -P OUTPUT ACCEPT
$SUDO iptables -F OUTPUT
$SUDO iptables -P FORWARD ACCEPT
$SUDO iptables -F FORWARD
$SUDO iptables -t nat -F
$SUDO iptables -t mangle -F
$SUDO iptables -t filter -F
$SUDO iptables -t raw -F
echo_info "Flushed iptables"
fi
############################################
# setting and printing OAI envs, we should check here
############################################
echo_info "2. Setting the OAI PATHS ..."
set_openair_env
cecho "OPENAIR_HOME = $OPENAIR_HOME" $green
cecho "OPENAIR1_DIR = $OPENAIR1_DIR" $green
cecho "OPENAIR2_DIR = $OPENAIR2_DIR" $green
cecho "OPENAIR3_DIR = $OPENAIR3_DIR" $green
cecho "OPENAIR3_DIR = $OPENAIR3_DIR" $green
cecho "OPENAIR_TARGETS = $OPENAIR_TARGETS" $green
echo "OPENAIR_HOME = $OPENAIR_HOME" >> bin/${oai_build_date}
echo "OPENAIR1_DIR = $OPENAIR1_DIR" >> bin/${oai_build_date}
echo "OPENAIR2_DIR = $OPENAIR2_DIR" >> bin/${oai_build_date}
echo "OPENAIR3_DIR = $OPENAIR3_DIR" >> bin/${oai_build_date}
echo "OPENAIR3_DIR = $OPENAIR3_DIR" >> bin/${oai_build_date}
echo "OPENAIR_TARGETS = $OPENAIR_TARGETS" >> bin/${oai_build_date}
build_enb(){
##########################################
# process parameters
#########################################
echo_info "4. Process the parameters"
echo_info "User-defined Parameters : HW=$HW, TARGET=$TARGET, ENB_S1=$ENB_S1, REL=$REL, RT=$RT, DEBUG=$DEBUG XFORMS=$XFORMS"
echo "User-defined Parameters : HW=$HW, TARGET=$TARGET, ENB_S1=$ENB_S1, REL=$REL, RT=$RT, DEBUG=$DEBUG XFORMS=$XFORMS" >> bin/${oai_build_date}
############################################
# compilation directives
############################################
echo_info "5. building the compilation directives ..."
SOFTMODEM_DIRECTIVES="DEBUG=$DEBUG XFORMS=$XFORMS "
OAISIM_DIRECTIVES="DEBUG=$DEBUG XFORMS=$XFORMS "
if [ $ENB_S1 -eq 1 ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES USE_MME=R10 ENABLE_ITTI=1 LINK_ENB_PDCP_TO_GTPV1U=1 SECU=1 "
#OAISIM_DIRECTIVES="$OAISIM_DIRECTIVES USE_MME=R10 ENABLE_ITTI=1 LINK_ENB_PDCP_TO_GTPV1U=1 SECU=1 "
OAISIM_DIRECTIVES="$OAISIM_DIRECTIVES ENABLE_ITTI=1 LINK_ENB_PDCP_TO_GTPV1U=1 SECU=1 "
fi
if [ $DEBUG -eq 0 ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES DISABLE_XER_PRINT=1 "
OAISIM_DIRECTIVES="$OAISIM_DIRECTIVES DISABLE_XER_PRINT=1 "
fi
if [ $HW = "USRP" ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES USRP=1 "
fi
if [ $HW = "ADRV9371_ZC706" ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES ADRV9371_ZC706=1 "
fi
if [ $HW = "EXMIMO" ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES EXMIMO=1 "
fi
if [ $HW = "ETHERNET" ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES ETHERNET=1 "
fi
if [ $ENB_S1 -eq 0 ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES NAS=1 "
OAISIM_DIRECTIVES="$OAISIM_DIRECTIVES NAS=1 "
fi
if [ $REL = "REL8" ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES Rel8=1 "
OAISIM_DIRECTIVES="$OAISIM_DIRECTIVES Rel8=1 "
else
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES Rel10=1 "
OAISIM_DIRECTIVES="$OAISIM_DIRECTIVES Rel10=1 "
fi
if [ $RT = "RTAI" ]; then
if [ ! -f /usr/realtime/modules/rtai_hal.ko ]; then
echo_warning "RTAI doesn't seem to be installed"
RT="NONE"
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES RTAI=0 "
else
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES HARD_RT=1 "
fi
else
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES RTAI=0 "
RT="NONE"
fi
if [ $TARGET != "ALL" ]; then
if [ $TARGET != "SOFTMODEM" ]; then
HW="NONE"
fi
fi
if [ $UBUNTU_REL = "12.04" ]; then
output=$(check_for_machine_type 2>&1)
MACHINE_ARCH=$?
if [ $MACHINE_ARCH -eq 64 ]; then
SOFTMODEM_DIRECTIVES="$SOFTMODEM_DIRECTIVES LIBCONFIG_LONG=1 "
OAISIM_DIRECTIVES="$OASIM_DIRECTIVES LIBCONFIG_LONG=1 "
fi
fi
echo_success "SOFTMODEM Compilation directives: $SOFTMODEM_DIRECTIVES"
echo_success "OAISIM Compilation directives: $OAISIM_DIRECTIVES"
echo "SOFTMODEM Compilation directives: $SOFTMODEM_DIRECTIVES" >> bin/${oai_build_date}
echo "OAISIM Compilation directive: $OAISIM_DIRECTIVES" >> bin/${oai_build_date}
############################################
# check the installation
############################################
if [ $DISABLE_CHECK_INSTALLED_SOFTWARE -eq 0 ]; then
echo_info "6. Checking the the required softwares/packages ..."
check_install_oai_software
if [ $HW = "USRP" ]; then
check_install_usrp_uhd_driver
fi
check_install_asn1c
check_install_nettle
else
echo_info "6. Not checking the required softwares/packages ..."
touch ./.lock_oaibuild
fi
############################################
# compile
############################################
echo_info "7. compiling and installing the OAI binaries ..."
softmodem_compiled=1
oaisim_compiled=1
unisim_compiled=1
if [ $TARGET = "ALL" ]; then
echo "############# compile_ltesoftmodem #############" >> bin/install_log.txt
output=$(compile_ltesoftmodem >> bin/install_log.txt 2>&1 )
softmodem_compiled=$?
check_for_ltesoftmodem_executable
echo_info "7.1 finished ltesoftmodem target : check the installation log file bin/install_log.txt"
echo "################ compile_oaisim #################" >> bin/install_log.txt
output=$(compile_oaisim >> bin/install_log.txt 2>&1 )
oaisim_compiled=$?
check_for_oaisim_executable
echo_info "7.2 finished oaisim target : check the installation log file bin/install_log.txt"
echo "################## compile_unisim ##################" >> bin/install_log.txt
output=$(compile_unisim >> bin/install_log.txt 2>&1 )
unisim_compiled=$?
check_for_dlsim_executable
check_for_ulsim_executable
check_for_pucchsim_executable
check_for_prachsim_executable
check_for_pdcchsim_executable
check_for_pbchsim_executable
check_for_mbmssim_executable
echo_info "7.3 finished unisim target : check the installation log file bin/install_log.txt"
else
if [ $TARGET == "SOFTMODEM" ]; then
echo "############# compile_ltesoftmodem #############" >> bin/install_log.txt
output=$(compile_ltesoftmodem >> bin/install_log.txt 2>&1 )
softmodem_compiled=$?
check_for_ltesoftmodem_executable
echo_info "7.1 finished ltesoftmodem target: check the installation log file bin/install_log.txt"
if [ $HW == "EXMIMO" ]; then
output=$(compile_exmimo2_driver >> bin/install_log.txt 2>&1)
fi
fi
if [ $TARGET = "OAISIM" ]; then
echo "################ compile_oaisim #################" >> bin/install_log.txt
output=$(compile_oaisim >> bin/install_log.txt 2>&1 )
oaisim_compiled=$?
check_for_oaisim_executable
echo_info "7.2 finished oaisim target: check the installation log file bin/install_log.txt"
if [ $ENB_S1 -eq 1 ]; then
compile_nas_tools 2>&1
nas_tools_compiled=$?
check_for_nas_tools_executable
echo_info "7.2.1 finished nas ue target: check the installation log file bin/install_log.txt"
fi
fi
if [ $TARGET = "UNISIM" ]; then
echo "################## compile_unisim ##################" >> bin/install_log.txt
output=$(compile_unisim >> bin/install_log.txt 2>&1 )
unisim_compiled=$?
check_for_dlsim_executable
check_for_ulsim_executable
check_for_pucchsim_executable
check_for_prachsim_executable
check_for_pdcchsim_executable
check_for_pbchsim_executable
check_for_mbmssim_executable
echo_info "7.3 finished unisim target: check the installation log file bin/install_log.txt"
fi
fi
############################################
# install
############################################
echo_info "8. Installing ..."
if [ $softmodem_compiled -eq 0 ]; then
echo_success "target lte-softmodem built and installed in the bin directory"
echo "target lte-softmodem built and installed in the bin directory" >> bin/${oai_build_date}
output=$(install_ltesoftmodem $RT $HW $ENB_S1 )
fi
if [ $oaisim_compiled -eq 0 ]; then
echo_success "target oaisim built and installed in the bin directory"
echo "target oaisim built and installed in the bin directory" >> bin/${oai_build_date}
output=$(install_oaisim $ENB_S1 )
fi
if [ $unisim_compiled -eq 0 ]; then
echo_success "target unisim built and installed in the bin directory"
echo "target unisim built and installed in the bin directory" >> bin/${oai_build_date}
fi
echo_info "build terminated, binaries are located in bin/"
echo_info "build terminated, logs are located in bin/${oai_build_date} and bin/install_log.txt"
}
build_epc(){
epc_compiled=1
echo_info "Note: this scripts tested only on Ubuntu 14.04x64"
######################################
# CHECK MISC SOFTWARES AND LIBS #
######################################
if [ $DISABLE_CHECK_INSTALLED_SOFTWARE -eq 0 ]; then
echo_info "4. Checking the the required softwares/packages for EPC..."
check_install_epc_software
check_install_asn1c
if [ $OAI_CLEAN -eq 1 ]; then
check_install_freediamter
else
if [ ! -d /usr/local/etc/freeDiameter ]; then
check_install_freediamter
fi
fi
else
echo_info "4. Not checking the required softwares/packages for EPC"
fi
###########################################
# configure and compile
##########################################
echo_info "5. configure and compile epc"
output=$(compile_epc $OAI_CLEAN >> $OPENAIR_TARGETS/bin/install_log.txt 2>&1 )
epc_compiled=$?
if [ $epc_compiled -ne 0 ]; then
echo_error "EPC compilation failed : check the installation log file bin/install_log.txt"
exit 1
fi
check_for_epc_executable
echo_info "finished epc target: check the installation log file bin/install_log.txt"
if [ $CONFIG_FILE_ACCESS_OK -eq 0 ]; then
echo_error "You have to provide a EPC config file"
exit 1
fi
TEMP_FILE=`tempfile`
VARIABLES=" S6A_CONF\|\
HSS_HOSTNAME\|\
REALM"
VARIABLES=$(echo $VARIABLES | sed -e 's/\\r//g')
VARIABLES=$(echo $VARIABLES | tr -d ' ')
cat $CONFIG_FILE | grep -w "$VARIABLES"| tr -d " " | tr -d ";" > $TEMP_FILE
source $TEMP_FILE
rm -f $TEMP_FILE
if [ x"$REALM" == "x" ]; then
echo_error "Your config file do not contain a REALM for S6A configuration"
exit 1
fi
if [ x"$S6A_CONF" != "x./epc_s6a.conf" ]; then
echo_error "Your config file do not contain the good path for the S6A config file,"
echo_error "accordingly to what is done in this script, it should be set to epc_s6a.conf"
exit 1
fi
check_epc_s6a_certificate $REALM
###########################################
# install the binary in bin
##########################################
echo_info "6. install the binary file"
if [ $epc_compiled -eq 0 ]; then
echo_success "target epc built and installed in the bin directory"
echo "target epc built and installed in the bin directory" >> bin/${oai_build_date}
cp -f $CONFIG_FILE $OPENAIR_TARGETS/bin
cp -f $OPENAIR3_DIR/objs/UTILS/CONF/s6a.conf $OPENAIR_TARGETS/bin/epc_s6a.conf
fi
}
build_hss(){
echo_info "Note: this script tested only for Ubuntu 12.04 x64 -> 14.04 x64"
######################################
# CHECK MISC SOFTWARES AND LIBS #
######################################
if [ $DISABLE_CHECK_INSTALLED_SOFTWARE -eq 0 ]; then
echo_info "4. check the required packages for HSS"
check_install_hss_software
if [ $OAI_CLEAN -eq 1 ]; then
check_install_freediamter
else
if [ ! -d /usr/local/etc/freeDiameter ]; then
check_install_freediamter
fi
fi
else
echo_info "4. Not checking the required packages for HSS"
fi
######################################
# compile HSS #
######################################
echo_info "5. compile HSS"
# Bad behaviour of $OAI_CLEAN with ./.lock_oaibuild ...
compile_hss $CLEAN_HSS
hss_compiled=$?
check_for_hss_executable
echo_info "finished hss target"
######################################
# Check certificates #
######################################
TEMP_FILE=`tempfile`
cat $OPENAIR3_DIR/OPENAIRHSS/conf/hss_fd.conf | grep -w "Identity" | tr -d " " | tr -d ";" > $TEMP_FILE
cat $OPENAIR3_DIR/OPENAIRHSS/conf/hss.conf | grep -w "MYSQL_user" | tr -d " " | tr -d ";" >> $TEMP_FILE
cat $OPENAIR3_DIR/OPENAIRHSS/conf/hss.conf | grep -w "MYSQL_pass" | tr -d " " | tr -d ";" >> $TEMP_FILE
cat $OPENAIR3_DIR/OPENAIRHSS/conf/hss.conf | grep -w "MYSQL_db" | tr -d " " | tr -d ";" >> $TEMP_FILE
source $TEMP_FILE
rm -f $TEMP_FILE
if [ x"$Identity" == "x" ]; then
echo_error "Your config file do not contain a host identity for S6A configuration"
exit 1
fi
HSS_REALM=$(echo $Identity | sed 's/.*\.//')
HSS_HOSTNAME=${Identity%.$HSS_REALM}
NEW_HOSTNAME=`hostname -s`
if [ "x$HSS_HOSTNAME" != "x$NEW_HOSTNAME" ]; then
echo_warning "Changing identity of HSS from <$HSS_HOSTNAME.$HSS_REALM> to <$NEW_HOSTNAME.$HSS_REALM>"
sed -ibak "s/$HSS_HOSTNAME/$NEW_HOSTNAME/" $OPENAIR3_DIR/OPENAIRHSS/conf/hss_fd.conf
fi
check_hss_s6a_certificate $HSS_REALM
######################################
# fill the HSS DB
######################################
echo_info "6. create HSS database (for EURECOM SIM CARDS)"
hss_db_created=1
create_hss_database $OAI_DB_ADMIN_USER_NAME $OAI_DB_ADMIN_USER_PASSWORD $MYSQL_user $MYSQL_pass $MYSQL_db
if [ $? -eq 1 ]; then
echo_fatal "hss DB not created"
fi
}
echo_info "3. set the top-level build target"
case "$BUILD_LTE" in
'ENB')
echo_success "build LTE eNB"
build_enb
;;
'EPC')
echo_success "build EPC(MME and xGW)"
build_epc
;;
'HSS')
echo_success "build HSS"
build_hss
;;
'NONE')
;;
*)
;;
esac
# Additional operation
############################################
# Generate doxygen documentation
############################################
if [ $DOXYGEN = 1 ]; then
echo_info "9. Generate doxygen documentation ..."
doxygen $OPENAIR_TARGETS/DOCS/Doxyfile
echo_info "9.1 use your navigator to open $OPENAIR_TARGETS/DOCS/html/index.html "
else
echo_info "9. Bypassing doxygen documentation ..."
fi
############################################
# testing
############################################
if [ $OAI_TEST -eq 1 ]; then
echo_info "10. Running OAI pre commit tests (pre-ci) ..."
python $OPENAIR_TARGETS/TEST/OAI/test01.py -l
else
echo_info "10. Bypassing the Tests ..."
fi
############################################
# run
############################################
if [ $RUN -ne 0 ]; then
echo_info "11. Running ..."
cd $OPENAIR_TARGETS/bin
case "$BUILD_LTE" in
'ENB')
if [ $TARGET == "SOFTMODEM" ]; then
if [ $HW == "EXMIMO" ]; then
$SUDO chmod 777 $OPENAIR_TARGETS/RT/USER/init_exmimo2.sh
$SUDO $OPENAIR_TARGETS/RT/USER/init_exmimo2.sh
fi
if [ $WIRESHARK -eq 1 ]; then
EXE_ARGUMENTS="$EXE_ARGUMENTS -W"
fi
echo "############# running ltesoftmodem #############"
if [ $RUN_GDB -eq 0 ]; then
$SUDO $OPENAIR_TARGETS/bin/lte-softmodem `echo $EXE_ARGUMENTS`
else
$SUDO setenv MALLOC_CHECK_ 2
$SUDO touch ~/.gdb_lte_softmodem
$SUDO echo "file $OPENAIR_TARGETS/bin/lte-softmodem" > ~/.gdb_lte_softmodem
$SUDO echo "set args $EXE_ARGUMENTS" >> ~/.gdb_lte_softmodem
$SUDO echo "run" >> ~/.gdb_lte_softmodem
$SUDO gdb -nh -x ~/.gdb_lte_softmodem 2>&1
fi
elif [ $TARGET == "OAISIM" ]; then
if [ $ENB_S1 -eq 0 ]; then
install_nasmesh
else
# prepare NAS for UE
if [ ! -f .ue.nvram0 ]; then
echo_success "generate .ue_emm.nvram0 .ue.nvram0"
$OPENAIR3_DIR/NAS/EURECOM-NAS/bin/ue_data --gen
fi
if [ ! -f .usim.nvram0 ]; then
echo_success "generate .usim.nvram0"
$OPENAIR3_DIR/NAS/EURECOM-NAS/bin/usim_data --gen
fi
$OPENAIR3_DIR/NAS/EURECOM-NAS/bin/ue_data --print
$OPENAIR3_DIR/NAS/EURECOM-NAS/bin/usim_data --print
insmod $OPENAIR2_DIR/NETWORK_DRIVER/UE_IP/ue_ip.ko
fi
if [ $WIRESHARK -eq 1 ]; then
EXE_ARGUMENTS="$EXE_ARGUMENTS -P wireshark"
fi
if [ $RUN_GDB -eq 0 ]; then
$SUDO exec $OPENAIR_TARGETS/bin/oaisim `echo $EXE_ARGUMENTS`
else
$SUDO setenv MALLOC_CHECK_ 2
$SUDO touch ~/.gdb_oaisim
$SUDO echo "file $OPENAIR_TARGETS/bin/lte-oaisim" > ~/.gdb_oaisim
$SUDO echo "set args $EXE_ARGUMENTS" >> ~/.gdb_oaisim
$SUDO echo "run" >> ~/.gdb_oaisim
$SUDO gdb -nh -x ~/.gdb_oaisim 2>&1
fi
fi
;;
'EPC')
echo "############# running EPC #############"
test_is_host_reachable $HSS_HOSTNAME.$REALM HSS
if [ $RUN_GDB -eq 0 ]; then
$SUDO $OPENAIR_TARGETS/bin/oai_epc `echo $EXE_ARGUMENTS`
else
touch ~/.gdb_epc
chmod 777 ~/.gdb_epc
echo "file $OPENAIR_TARGETS/bin/oai_epc" > ~/.gdb_epc
echo "set args $EXE_ARGUMENTS" >> ~/.gdb_epc
echo "run" >> ~/.gdb_epc
$SUDO gdb -nh -x ~/.gdb_epc 2>&1
fi
;;
'HSS')
echo "############# running HSS #############"
cd $OPENAIR3_DIR/OPENAIRHSS/objs
if [ $RUN_GDB -eq 0 ]; then
$SUDO exec ./openair-hss -c ./conf/hss.conf
else
touch ~/.gdb_hss
chmod 777 ~/.gdb_hss
echo "file ./openair-hss" > ~/.gdb_hss
echo "set args -c ./conf/hss.conf" >> ~/.gdb_hss
echo "run" >> ~/.gdb_hss
$SUDO gdb -nh -x ~/.gdb_hss 2>&1
fi
;;
'NONE')
;;
*)
echo_error "Unknown option $BUILD_LTE: do not execute"
;;
esac
else
echo_info "11. No run requested, end of script"
exit 0
fi