* Change the Linux Sched policy to SCHED_DEADLINE for the kernel version > 3.14

* Add MAC/RRC wireshark interface to LTE softmodem
* Add OTG support to the eNB App, and some cleanup


git-svn-id: http://svn.eurecom.fr/openair4G/trunk@6115 818b1a75-f10b-46b9-bf7c-635c3b92a50f
This commit is contained in:
Navid Nikaein
2014-11-28 13:54:46 +00:00
parent 0b9c724ab4
commit 91dbe8d6f1
20 changed files with 670 additions and 280 deletions
+78 -69
View File
@@ -565,8 +565,7 @@ void *l2l1_task(void *args_p) {
start_meas(&oaisim_stats);
for (frame = 0; (l2l1_state != L2L1_TERMINATED) && (frame < oai_emulation.info.n_frames); frame++) {
start_meas(&oaisim_stats_f);
#if defined(ENABLE_ITTI)
do {
// Checks if a message has been sent to L2L1 task
@@ -660,7 +659,9 @@ void *l2l1_task(void *args_p) {
update_ocm ();
for (slot = 0; slot < 20; slot++) {
if (slot%2==0)
start_meas(&oaisim_stats_f);
wait_for_slot_isr ();
#if defined(ENABLE_ITTI)
@@ -977,7 +978,8 @@ void *l2l1_task(void *args_p) {
}
*/
} // if Channel_Flag==0
if (slot%2==1)
stop_meas(&oaisim_stats_f);
}//end of slot
if ((frame >= 10) && (frame <= 11) && (abstraction_flag == 0)
@@ -1028,8 +1030,9 @@ void *l2l1_task(void *args_p) {
smbv_frame_cnt++;
}
#endif
}
stop_meas(&oaisim_stats_f);
//end of frame
stop_meas(&oaisim_stats);
@@ -1267,75 +1270,81 @@ void *l2l1_task(void *args_p) {
reset_meas(&UE_pdcp_stats[UE_id].pdcp_ip);
reset_meas(&UE_pdcp_stats[UE_id].ip_pdcp);
for (eNB_id=0; eNB_id<NB_eNB_INST; eNB_id++) {
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->phy_proc);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->phy_proc_rx);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->phy_proc_tx);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->rx_prach);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ofdm_mod_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_encoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_modulation_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_scrambling_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_rate_matching_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_turbo_encoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_interleaving_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ofdm_demod_stats);
//reset_meas(&PHY_vars_eNB_g[eNB_id]->rx_dft_stats);
//reset_meas(&PHY_vars_eNB_g[eNB_id]->ulsch_channel_estimation_stats);
//reset_meas(&PHY_vars_eNB_g[eNB_id]->ulsch_freq_offset_estimation_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_decoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_demodulation_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_rate_unmatching_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_turbo_decoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_deinterleaving_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_demultiplexing_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_llr_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_init_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_alpha_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_beta_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_gamma_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_ext_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_intl1_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_intl2_stats);
reset_meas(&eNB2UE[eNB_id][UE_id][0]->random_channel);
reset_meas(&eNB2UE[eNB_id][UE_id][0]->interp_time);
reset_meas(&eNB2UE[eNB_id][UE_id][0]->interp_freq);
reset_meas(&eNB2UE[eNB_id][UE_id][0]->convolution);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->random_channel);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->interp_time);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->interp_freq);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->convolution);
/*
* L2 functions
*/
// eNB MAC
reset_meas(&eNB_mac_inst[eNB_id].eNB_scheduler); // total
reset_meas(&eNB_mac_inst[eNB_id].schedule_si); // only schedule + tx
reset_meas(&eNB_mac_inst[eNB_id].schedule_ra); // only ra
reset_meas(&eNB_mac_inst[eNB_id].schedule_ulsch); // onlu ulsch
reset_meas(&eNB_mac_inst[eNB_id].fill_DLSCH_dci);// only dci
reset_meas(&eNB_mac_inst[eNB_id].schedule_dlsch_preprocessor); // include rlc_data_req + MAC header gen
reset_meas(&eNB_mac_inst[eNB_id].schedule_dlsch); // include rlc_data_req + MAC header gen + pre-processor
reset_meas(&eNB_mac_inst[eNB_id].schedule_mch); // only embms
reset_meas(&eNB_mac_inst[eNB_id].rx_ulsch_sdu); // include rlc_data_ind + mac header parser
reset_meas(&eNB_pdcp_stats[eNB_id].pdcp_run);
reset_meas(&eNB_pdcp_stats[eNB_id].data_req);
reset_meas(&eNB_pdcp_stats[eNB_id].data_ind);
reset_meas(&eNB_pdcp_stats[eNB_id].apply_security);
reset_meas(&eNB_pdcp_stats[eNB_id].validate_security);
reset_meas(&eNB_pdcp_stats[eNB_id].pdcp_ip);
reset_meas(&eNB_pdcp_stats[eNB_id].ip_pdcp);
}
for (eNB_id=0; eNB_id<NB_eNB_INST; eNB_id++) {
for (UE_id=0; UE_id<NB_UE_INST; UE_id++) {
reset_meas(&eNB2UE[eNB_id][UE_id][0]->random_channel);
reset_meas(&eNB2UE[eNB_id][UE_id][0]->interp_time);
reset_meas(&eNB2UE[eNB_id][UE_id][0]->interp_freq);
reset_meas(&eNB2UE[eNB_id][UE_id][0]->convolution);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->random_channel);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->interp_time);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->interp_freq);
reset_meas(&UE2eNB[UE_id][eNB_id][0]->convolution);
}
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->phy_proc);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->phy_proc_rx);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->phy_proc_tx);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->rx_prach);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ofdm_mod_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_encoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_modulation_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_scrambling_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_rate_matching_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_turbo_encoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->dlsch_interleaving_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ofdm_demod_stats);
//reset_meas(&PHY_vars_eNB_g[eNB_id]->rx_dft_stats);
//reset_meas(&PHY_vars_eNB_g[eNB_id]->ulsch_channel_estimation_stats);
//reset_meas(&PHY_vars_eNB_g[eNB_id]->ulsch_freq_offset_estimation_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_decoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_demodulation_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_rate_unmatching_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_turbo_decoding_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_deinterleaving_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_demultiplexing_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_llr_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_init_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_alpha_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_beta_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_gamma_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_ext_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_intl1_stats);
reset_meas(&PHY_vars_eNB_g[eNB_id][0]->ulsch_tc_intl2_stats);
/*
* L2 functions
*/
// eNB MAC
reset_meas(&eNB_mac_inst[eNB_id].eNB_scheduler); // total
reset_meas(&eNB_mac_inst[eNB_id].schedule_si); // only schedule + tx
reset_meas(&eNB_mac_inst[eNB_id].schedule_ra); // only ra
reset_meas(&eNB_mac_inst[eNB_id].schedule_ulsch); // onlu ulsch
reset_meas(&eNB_mac_inst[eNB_id].fill_DLSCH_dci);// only dci
reset_meas(&eNB_mac_inst[eNB_id].schedule_dlsch_preprocessor); // include rlc_data_req + MAC header gen
reset_meas(&eNB_mac_inst[eNB_id].schedule_dlsch); // include rlc_data_req + MAC header gen + pre-processor
reset_meas(&eNB_mac_inst[eNB_id].schedule_mch); // only embms
reset_meas(&eNB_mac_inst[eNB_id].rx_ulsch_sdu); // include rlc_data_ind + mac header parser
reset_meas(&eNB_pdcp_stats[eNB_id].pdcp_run);
reset_meas(&eNB_pdcp_stats[eNB_id].data_req);
reset_meas(&eNB_pdcp_stats[eNB_id].data_ind);
reset_meas(&eNB_pdcp_stats[eNB_id].apply_security);
reset_meas(&eNB_pdcp_stats[eNB_id].validate_security);
reset_meas(&eNB_pdcp_stats[eNB_id].pdcp_ip);
reset_meas(&eNB_pdcp_stats[eNB_id].ip_pdcp);
}
}
void print_opp_meas(void){
uint8_t eNB_id=0,UE_id=0;
void print_opp_meas(void){
uint8_t eNB_id=0,UE_id=0;
print_meas(&oaisim_stats,"[OAI][total_exec_time]", &oaisim_stats,&oaisim_stats);
print_meas(&oaisim_stats_f,"[OAI][SF_exec_time]", &oaisim_stats,&oaisim_stats_f);
+1 -109
View File
@@ -52,7 +52,7 @@
#include "UTIL/OMG/grid.h"
#include "UTIL/OTG/otg_tx.h"
#include "UTIL/OTG/otg.h"
#include "UTIL/OTG/otg_vars.h"
#include "UTIL/OTG/otg_externs.h"
#include "oml.h"
#ifdef ENABLE_RAL
#include "lteRALenb.h"
@@ -84,115 +84,7 @@ mapping omg_rwp_names[] =
{"MAX_RWP_TYPES", MAX_RWP_TYPES},
{NULL, -1}
};
mapping otg_multicast_app_type_names[] = {
{"no_predefined_multicast_traffic", 0},
{"mscbr", 1},
{"mmcbr", 2},
{"mbcbr", 3},
{"msvbr", 4},
{"mmvbr", 5},
{"mbvbr", 6},
{"mvideo_vbr_4mbps", 7},
{NULL, -1}
} ;
mapping otg_app_type_names[] =
{
{"no_predefined_traffic", 0},
{"m2m", 1},
{"scbr", 2},
{"mcbr", 3},
{"bcbr", 4},
{"auto_pilot", 5},
{"bicycle_race", 6},
{"open_arena", 7},
{"team_fortress", 8},
{"full_buffer", 9},
{"m2m_traffic", 10},
{"auto_pilot_l",11},
{"auto_pilot_m", 12},
{"auto_pilot_h", 13},
{"auto_pilot_e", 14},
{"virtual_game_l", 15},
{"virtual_game_m", 16},
{"virtual_game_h", 17},
{"virtual_game_f", 18},
{"alarm_humidity", 19},
{"alarm_smoke",20},
{"alarm_temperature", 21},
{"openarena_dl", 22},
{"openarena_ul", 23},
{"voip_g711", 24},
{"voip_g729", 25},
{"iqsim_mango", 26},
{"iqsim_newsteo", 27},
{"openarena_dl_tarma", 28},
{"video_vbr_10mbps", 29},
{"video_vbr_4mbps", 30},
{"video_vbr_2mbps", 31},
{"video_vbr_768kbps", 32},
{"video_vbr_384kbps", 33},
{"video_vbr_192kpbs", 34},
{"background_users", 35},
{NULL, -1}
};
mapping otg_transport_protocol_names[] =
{
{"no_proto", 0},
{"udp", 1},
{"tcp", 2},
{NULL, -1}
};
mapping otg_ip_version_names[] =
{
{"no_ip", 0},
{"ipv4", 1},
{"ipv6", 2},
{NULL, -1}
};
mapping otg_distribution_names[] =
{
{"no_customized_traffic", 0},
{"uniform", 1},
{"gaussian", 2},
{"exponential", 3},
{"poisson", 4},
{"fixed", 5},
{"weibull", 6},
{"pareto", 7},
{"gamma", 8},
{"cauchy",9},
{"log_normal",10},
{"tarma",11},
{"video",12},
{"background_dist",13},
{NULL, -1}
};
mapping frame_type_names[] =
{
{"TDD", 1},
{"FDD", 0},
{NULL, -1}
};
mapping switch_names[] =
{
{"disable", 0},
{"enable", 1},
{NULL, -1}
};
mapping packet_gen_names[] =
{
{"repeat_string", 0},
{"substract_string", 1},
{"random_position", 2},
{"random_string", 3},
{NULL, -1}
};
void init_oai_emulation(void) {
+2
View File
@@ -58,6 +58,8 @@ The current sturcture of oaisim is shown by the figure.
#include "UTIL/OPT/opt.h" // to test OPT
#include "UTIL/OMG/omg.h"
#include "UTIL/CLI/cli_if.h"
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "SIMULATION/ETH_TRANSPORT/defs.h"
#include "PHY/defs.h"
+17 -5
View File
@@ -811,7 +811,18 @@ void init_openair1(void) {
#endif
// change the nb_connected_eNB
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
init_lte_vars (&frame_parms[CC_id], oai_emulation.info.frame_type[CC_id], oai_emulation.info.tdd_config[CC_id], oai_emulation.info.tdd_config_S[CC_id],oai_emulation.info.extended_prefix_flag[CC_id],oai_emulation.info.N_RB_DL[CC_id], Nid_cell, cooperation_flag, oai_emulation.info.transmission_mode[CC_id], abstraction_flag,nb_antennas_rx, oai_emulation.info.eMBMS_active_state);
init_lte_vars (&frame_parms[CC_id],
oai_emulation.info.frame_type[CC_id],
oai_emulation.info.tdd_config[CC_id],
oai_emulation.info.tdd_config_S[CC_id],
oai_emulation.info.extended_prefix_flag[CC_id],
oai_emulation.info.N_RB_DL[CC_id],
Nid_cell,
cooperation_flag,
oai_emulation.info.transmission_mode[CC_id],
abstraction_flag,
nb_antennas_rx,
oai_emulation.info.eMBMS_active_state);
}
for (eNB_id=0; eNB_id<NB_eNB_INST;eNB_id++){
@@ -830,10 +841,11 @@ void init_openair1(void) {
}
}
printf ("AFTER init: Nid_cell %d\n", PHY_vars_eNB_g[0][0]->lte_frame_parms.Nid_cell);
printf ("AFTER init: frame_type %d,tdd_config %d\n",
PHY_vars_eNB_g[0][0]->lte_frame_parms.frame_type,
PHY_vars_eNB_g[0][0]->lte_frame_parms.tdd_config);
printf ("AFTER init: MAX_NUM_CCs %d, Nid_cell %d frame_type %d,tdd_config %d\n",
MAX_NUM_CCs,
PHY_vars_eNB_g[0][0]->lte_frame_parms.Nid_cell,
PHY_vars_eNB_g[0][0]->lte_frame_parms.frame_type,
PHY_vars_eNB_g[0][0]->lte_frame_parms.tdd_config);
number_of_cards = 1;