updated TCI handling apis
This commit is contained in:
@@ -105,21 +105,80 @@ int get_diff_rsrp(uint8_t index, int strongest_rsrp) {
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return MIN_RSRP_VALUE;
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return MIN_RSRP_VALUE;
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}
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}
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int checkTargetSSBInFirst64TCIStates_pdschConfig(int ssb_index_t) {
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int checkTargetSSBInFirst64TCIStates_pdschConfig(int ssb_index_t, int Mod_idP, int UE_id) {
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//Need to implement once configuration is received
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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return 0;
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NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id] ;
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int nb_tci_states = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList->list.count;
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NR_TCI_State_t *tci =NULL;
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int i;
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for(i=0; i<nb_tci_states && i<64; i++) {
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tci = (NR_TCI_State_t *)secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList->list.array[i];
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if(tci != NULL) {
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if(tci->qcl_Type1.referenceSignal.present == NR_QCL_Info__referenceSignal_PR_ssb) {
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if(tci->qcl_Type1.referenceSignal.choice.ssb == ssb_index_t)
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return tci->tci_StateId; // returned TCI state ID
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}
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// if type2 is configured
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else if(tci->qcl_Type2 != NULL && tci->qcl_Type2->referenceSignal.present == NR_QCL_Info__referenceSignal_PR_ssb) {
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if(tci->qcl_Type2->referenceSignal.choice.ssb == ssb_index_t)
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return tci->tci_StateId; // returned TCI state ID
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} else LOG_I(MAC,"SSB index is not found in first 64 TCI states of TCI_statestoAddModList[%d]", i);
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}
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}
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// tci state not identified in first 64 TCI States of PDSCH Config
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return -1;
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}
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}
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int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t) {
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int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t, int Mod_idP, int UE_id) {
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//Need to implement once configuration is received
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NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
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return 0;
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NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id] ;
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int nb_tci_states = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList->list.count;
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NR_TCI_State_t *tci =NULL;
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NR_TCI_StateId_t *tci_id = NULL;
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int bwp_id = 1;
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NR_BWP_Downlink_t *bwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
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NR_ControlResourceSet_t *coreset = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1];
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int i;
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int flag = 0;
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int tci_stateID = -1;
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for(i=0; i<nb_tci_states && i<128; i++) {
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tci = (NR_TCI_State_t *)secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList->list.array[i];
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if(tci != NULL && tci->qcl_Type1.referenceSignal.present == NR_QCL_Info__referenceSignal_PR_ssb) {
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if(tci->qcl_Type1.referenceSignal.choice.ssb == ssb_index_t) {
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flag = 1;
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tci_stateID = tci->tci_StateId;
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break;
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} else if(tci->qcl_Type2 != NULL && tci->qcl_Type2->referenceSignal.present == NR_QCL_Info__referenceSignal_PR_ssb) {
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flag = 1;
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tci_stateID = tci->tci_StateId;
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break;
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}
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}
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if(flag != 0 && tci_stateID != -1 && coreset != NULL) {
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for(i=0; i<64 && i<coreset->tci_StatesPDCCH_ToAddList->list.count; i++) {
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tci_id = coreset->tci_StatesPDCCH_ToAddList->list.array[i];
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if(tci_id != NULL && *tci_id == tci_stateID)
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return tci_stateID;
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}
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}
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}
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// Need to implement once configuration is received
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return -1;
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}
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}
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int ssb_index_sorted[MAX_NUM_SSB] = {0};
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int ssb_index_sorted[MAX_NUM_SSB] = {0};
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int ssb_rsrp_sorted[MAX_NUM_SSB] = {0};
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int ssb_rsrp_sorted[MAX_NUM_SSB] = {0};
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//Sorts ssb_index and ssb_rsrp array data and keeps in ssb_index_sorted and
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//Sorts ssb_index and ssb_rsrp array data and keeps in ssb_index_sorted and
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//ssb_rsrp_sorted respectively
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//ssb_rsrp_sorted respectively
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int ssb_rsrp_sort(int *ssb_index, int *ssb_rsrp) {
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void ssb_rsrp_sort(int *ssb_index, int *ssb_rsrp) {
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int i, j;
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int i, j;
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for(i = 0; *(ssb_index+i) != 0; i++) {
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for(i = 0; *(ssb_index+i) != 0; i++) {
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@@ -292,7 +351,7 @@ void tci_handling(int Mod_idP, int UE_id, int CC_id, NR_UE_sched_ctrl_t *sched_c
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The length of the field is 7 bits
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The length of the field is 7 bits
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*/
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*/
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if(sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.coresetId == 0) {
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if(sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.coresetId == 0) {
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int tci_state_id = checkTargetSSBInFirst64TCIStates_pdschConfig(ssb_index[target_ssb_beam_index]);
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int tci_state_id = checkTargetSSBInFirst64TCIStates_pdschConfig(ssb_index[target_ssb_beam_index], Mod_idP, UE_id);
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if( tci_state_id != -1)
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if( tci_state_id != -1)
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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@@ -302,7 +361,7 @@ void tci_handling(int Mod_idP, int UE_id, int CC_id, NR_UE_sched_ctrl_t *sched_c
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int flag = 0;
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int flag = 0;
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for(i =0; ssb_index_sorted[i]!=0; i++) {
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for(i =0; ssb_index_sorted[i]!=0; i++) {
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tci_state_id = checkTargetSSBInFirst64TCIStates_pdschConfig(ssb_index_sorted[i]);
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tci_state_id = checkTargetSSBInFirst64TCIStates_pdschConfig(ssb_index_sorted[i], Mod_idP, UE_id) ;
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if(tci_state_id != -1 && ssb_rsrp_sorted[i] > ssb_rsrp[curr_ssb_beam_index] && ssb_rsrp_sorted[i] - ssb_rsrp[curr_ssb_beam_index] > L1_RSRP_HYSTERIS) {
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if(tci_state_id != -1 && ssb_rsrp_sorted[i] > ssb_rsrp[curr_ssb_beam_index] && ssb_rsrp_sorted[i] - ssb_rsrp[curr_ssb_beam_index] > L1_RSRP_HYSTERIS) {
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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@@ -316,7 +375,7 @@ void tci_handling(int Mod_idP, int UE_id, int CC_id, NR_UE_sched_ctrl_t *sched_c
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}
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}
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}
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}
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} else {
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} else {
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int tci_state_id = checkTargetSSBInTCIStates_pdcchConfig(ssb_index[target_ssb_beam_index]);
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int tci_state_id = checkTargetSSBInTCIStates_pdcchConfig(ssb_index[target_ssb_beam_index], Mod_idP, UE_id);
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if (tci_state_id !=-1)
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if (tci_state_id !=-1)
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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@@ -326,7 +385,7 @@ void tci_handling(int Mod_idP, int UE_id, int CC_id, NR_UE_sched_ctrl_t *sched_c
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int flag = 0;
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int flag = 0;
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for(i =0; ssb_index_sorted[i]!=0; i++) {
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for(i =0; ssb_index_sorted[i]!=0; i++) {
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tci_state_id = checkTargetSSBInTCIStates_pdcchConfig(ssb_index_sorted[i]);
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tci_state_id = checkTargetSSBInTCIStates_pdcchConfig(ssb_index_sorted[i], Mod_idP, UE_id);
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if( tci_state_id != -1 && ssb_rsrp_sorted[i] > ssb_rsrp[curr_ssb_beam_index] && ssb_rsrp_sorted[i] - ssb_rsrp[curr_ssb_beam_index] > L1_RSRP_HYSTERIS) {
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if( tci_state_id != -1 && ssb_rsrp_sorted[i] > ssb_rsrp[curr_ssb_beam_index] && ssb_rsrp_sorted[i] - ssb_rsrp[curr_ssb_beam_index] > L1_RSRP_HYSTERIS) {
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId = tci_state_id;
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@@ -376,8 +435,7 @@ void tci_handling(int Mod_idP, int UE_id, int CC_id, NR_UE_sched_ctrl_t *sched_c
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}//tci_presentInDCI
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}//tci_presentInDCI
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}//is-triggering_beam_switch
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}//is-triggering_beam_switch
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}//tci handling
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}//tci handling
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void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
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void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
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int CC_idP,
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int CC_idP,
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frame_t frameP,
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frame_t frameP,
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sub_frame_t slotP){
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sub_frame_t slotP){
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@@ -644,7 +702,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
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start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
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pdcp_run(&ctxt);
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pdcp_run(&ctxt);
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/* send tick to RLC and RRC every ms */
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/* send tick to RLC and RRC every ms */
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if ((slot & ((1 << *scc->ssbSubcarrierSpacing) - 1)) == 0) {
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if ((slot & ((1 << *scc->ssbSubcarrierSpacing) - 1)) == 0) {
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