From df9e492d02fd23f7b916ee7ae8116273177b6e6a Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 29 Nov 2021 16:39:05 +0100 Subject: [PATCH 01/16] removing bwp from pdcch_pdu_idx and cce_list --- openair1/SIMULATION/NR_PHY/dlsim.c | 4 ++-- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 10 ++++------ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 12 ++++++------ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 9 ++++----- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c | 9 ++------- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 8 ++------ openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 6 +++--- 8 files changed, 24 insertions(+), 36 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 51fdfc917e..72e8d11be6 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -1038,8 +1038,8 @@ int main(int argc, char **argv) while ((roundack==0)) { - memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int)); - memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int)); + memset(RC.nrmac[0]->cce_list[0],0,MAX_NUM_CCE*sizeof(int)); + memset(RC.nrmac[0]->cce_list[1],0,MAX_NUM_CCE*sizeof(int)); clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot); UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 4c0e9dab9f..c4e1fbff96 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -67,7 +67,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t ***pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t ***)gNB->pdcch_pdu_idx[CC_idP]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP]; nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; @@ -80,7 +80,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, DL_req[CC_idP].dl_tti_request_body.nPDUs = 0; DL_req[CC_idP].dl_tti_request_body.nGroup = 0; //DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000; - memset(pdcch, 0, sizeof(**pdcch) * MAX_NUM_BWP * MAX_NUM_CORESET); + memset(pdcch, 0, sizeof(*pdcch) * MAX_NUM_CORESET); UL_dci_req[CC_idP].SFN = frameP; UL_dci_req[CC_idP].Slot = slotP; @@ -276,7 +276,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, protocol_ctxt_t ctxt={0}; PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP); - const int bwp_id = 1; char stats_output[16384]; gNB_MAC_INST *gNB = RC.nrmac[module_idP]; @@ -307,9 +306,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, nr_rrc_trigger(&ctxt, 0 /*CC_id*/, frame, slot >> *scc->ssbSubcarrierSpacing); } - memset(RC.nrmac[module_idP]->cce_list[0][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0 - memset(RC.nrmac[module_idP]->cce_list[0][1],0,MAX_NUM_CCE*sizeof(int)); // coreset1 on initialBWP - memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1 + memset(RC.nrmac[module_idP]->cce_list[0],0,MAX_NUM_CCE*sizeof(int)); // coreset0 + memset(RC.nrmac[module_idP]->cce_list[1],0,MAX_NUM_CCE*sizeof(int)); // coreset1 NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info; for (int UE_id = UE_info->list.head; UE_id >= 0; UE_id = UE_info->list.next[UE_id]) for (int i=0; iUL_dci_req[CC_id]; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][ra->bwp_id][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu_rel15) { nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); @@ -789,7 +789,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); - nr_mac->pdcch_pdu_idx[CC_id][ra->bwp_id][coresetid] = pdcch_pdu_rel15; + nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } uint8_t aggregation_level; @@ -1196,7 +1196,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them const int bwpid = bwp ? bwp->bwp_Id : 0; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu_rel15) { nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t)); @@ -1205,7 +1205,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); - nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; + nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; @@ -1572,7 +1572,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them const int bwpid = bwp ? bwp->bwp_Id : 0; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu_rel15) { nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t)); @@ -1581,7 +1581,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); - nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; + nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 0e01702d77..bbae3c48a2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -627,7 +627,7 @@ bool allocate_dl_retransmission(module_id_t module_id, slot); int cid = sched_ctrl->coreset->controlResourceSetId; UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp?sched_ctrl->active_bwp->bwp_Id:0][cid]; + int *cce_list = RC.nrmac[module_id]->cce_list[cid]; for (int i = 0; i < sched_ctrl->aggregation_level; i++) cce_list[sched_ctrl->cce_index + i] = 0; return false; @@ -732,7 +732,6 @@ void pf_dl(module_id_t module_id, NR_BWP_DownlinkDedicated_t *bwpd= cg ? cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP:NULL; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - int bwp_Id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0; const uint16_t rnti = UE_info->rnti[UE_id]; NR_BWP_t *genericParameters = sched_ctrl->active_bwp ? &sched_ctrl->active_bwp->bwp_Common->genericParameters: @@ -764,7 +763,7 @@ void pf_dl(module_id_t module_id, slot); int cid = sched_ctrl->coreset->controlResourceSetId; UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = mac->cce_list[bwp_Id][cid]; + int *cce_list = mac->cce_list[cid]; for (int i = 0; i < sched_ctrl->aggregation_level; i++) cce_list[sched_ctrl->cce_index + i] = 0; return; @@ -995,7 +994,7 @@ void nr_schedule_ue_spec(module_id_t module_id, const int bwpid = bwp ? bwp->bwp_Id : 0; const int coresetid = (bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu) { nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t)); @@ -1007,7 +1006,7 @@ void nr_schedule_ue_spec(module_id_t module_id, NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space:gNB_mac->sched_ctrlCommon->search_space; NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset; nr_configure_pdcch(gNB_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); - gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu; + gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; } nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index f1005cea70..75f3a1ae8d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -358,7 +358,7 @@ void nr_preprocessor_phytest(module_id_t module_id, frame, slot); UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid]; + int *cce_list = RC.nrmac[module_id]->cce_list[cid]; for (int i = 0; i < sched_ctrl->aggregation_level; i++) cce_list[sched_ctrl->cce_index + i] = 0; return; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 7387bfe698..4f455e0b92 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -218,12 +218,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, int coreset_id = coreset->controlResourceSetId; - int *cce_list; - if(bwp == NULL) { - cce_list = nr_mac->cce_list[0][coreset_id]; - } else { - cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id]; - } + int *cce_list = nr_mac->cce_list[coreset_id]; int n_rb=0; for (int i=0;i<6;i++) @@ -2410,7 +2405,7 @@ bool find_free_CCE(module_id_t module_id, const int cid = sched_ctrl->coreset->controlResourceSetId; const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid][slot]; const int m = RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid]; - if (UE_id >= 0) LOG_D(NR_MAC,"calling allocate_nr_CCEs with L %d, nr_of_candidates %d, Y %x\n",sched_ctrl->aggregation_level,nr_of_candidates,Y); + if (UE_id >= 0) LOG_D(NR_MAC,"slot %d calling allocate_nr_CCEs with L %d, nr_of_candidates %d, Y %x\n",slot, sched_ctrl->aggregation_level,nr_of_candidates,Y); sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], sched_ctrl->active_bwp, sched_ctrl->coreset, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 9a6fa32b5f..bcc0832863 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1388,10 +1388,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[CC_id]; ul_dci_req->SFN = frame; ul_dci_req->Slot = slot; - /* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each - * allocated PDCCH so we can easily allocate UE's DCIs independent of any - * CORESET order */ - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_bwp_coreset[MAX_NUM_BWP][MAX_NUM_CORESET] = {{0}}; NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; @@ -1628,7 +1624,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) NR_SearchSpace_t *ss = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->search_space: RC.nrmac[module_id]->sched_ctrlCommon->search_space; NR_ControlResourceSet_t *coreset = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->coreset: RC.nrmac[module_id]->sched_ctrlCommon->coreset; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pdcch_pdu_bwp_coreset[bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu) { nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); @@ -1637,7 +1633,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; nr_configure_pdcch(nr_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); - pdcch_pdu_bwp_coreset[bwpid][coresetid] = pdcch_pdu; + nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; } LOG_D(NR_MAC,"Configuring ULDCI/PDCCH in %d.%d at CCE %d, rnti %x\n", frame,slot,sched_ctrl->cce_index,rnti); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 27f42f4b1d..99e21b6560 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -73,7 +73,7 @@ /* Defs */ #define MAX_NUM_BWP 2 -#define MAX_NUM_CORESET 2 +#define MAX_NUM_CORESET 12 #define MAX_NUM_CCE 90 #define MAX_HARQ_ROUNDS 4 /*!\brief Maximum number of random access process */ @@ -703,7 +703,7 @@ typedef struct gNB_MAC_INST_s { /// a PDCCH PDU groups DCIs per BWP and CORESET. The following structure /// keeps pointers to PDCCH PDUs within DL_req so that we can easily track /// PDCCH PDUs per CC/BWP/CORESET - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_idx[NFAPI_CC_MAX][MAX_NUM_BWP][MAX_NUM_CORESET]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_idx[NFAPI_CC_MAX][MAX_NUM_CORESET]; /// NFAPI UL TTI Request Structure, simple pointer into structure /// UL_tti_req_ahead for current frame/slot nfapi_nr_ul_tti_request_t *UL_tti_req[NFAPI_CC_MAX]; @@ -743,7 +743,7 @@ typedef struct gNB_MAC_INST_s { /// processing time of eNB PCH scheduler time_stats_t schedule_pch; /// CCE lists - int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE]; + int cce_list[MAX_NUM_CORESET][MAX_NUM_CCE]; /// list of allocated beams per period int16_t *tdd_beam_association; From 99250c95249c1f40acc90d94da2e31356db93997 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 30 Nov 2021 09:27:07 +0100 Subject: [PATCH 02/16] fix for Y --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 4 ++-- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 75f3a1ae8d..596169cc29 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -334,7 +334,7 @@ void nr_preprocessor_phytest(module_id_t module_id, AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][slot]; + const uint16_t Y = UE_info->Y[UE_id][cid%3][slot]; const int m = UE_info->num_pdcch_cand[UE_id][cid]; sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], sched_ctrl->active_bwp, @@ -501,7 +501,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][slot]; + const uint16_t Y = UE_info->Y[UE_id][cid%3][slot]; const int m = UE_info->num_pdcch_cand[UE_id][cid]; sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], sched_ctrl->active_bwp, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 4f455e0b92..36ae3c607f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2403,7 +2403,7 @@ bool find_free_CCE(module_id_t module_id, } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid][slot]; + const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; const int m = RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid]; if (UE_id >= 0) LOG_D(NR_MAC,"slot %d calling allocate_nr_CCEs with L %d, nr_of_candidates %d, Y %x\n",slot, sched_ctrl->aggregation_level,nr_of_candidates,Y); sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], From 3d10b9fc41eace583216ac3f40fb622b28360036 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 2 Dec 2021 10:08:55 +0100 Subject: [PATCH 03/16] symbol-wise vrb map occupation for dl --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 24 +++---- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 5 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 63 ++++++++++++------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 24 ++++--- 4 files changed, 70 insertions(+), 46 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 28c95e87f7..8a9c5b3f52 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -1144,13 +1144,19 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra BWPSize = type0_PDCCH_CSS_config->num_rbs; } + // Calculate number of symbols + int startSymbolIndex, nrOfSymbols; + const int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); + AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n"); + coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common); AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n"); uint16_t *vrb_map = cc[CC_id].vrb_map; for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) { - if (vrb_map[BWPStart + rbStart + i]) { + if (vrb_map[BWPStart + rbStart + i]&(((1<list.array[time_domain_assignment]->startSymbolAndLength; - SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); - AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n"); - LOG_D(NR_MAC,"Msg2 startSymbolIndex.nrOfSymbols %d.%d\n",startSymbolIndex,nrOfSymbols); int mappingtype = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType; @@ -1362,9 +1362,9 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra nr_mac->TX_req[CC_id].Number_of_PDUs++; nr_mac->TX_req[CC_id].Slot = slotP; - // Mark the corresponding RBs as used + // Mark the corresponding symbols RBs as used for (int rb = 0; rb < rbSize; rb++) { - vrb_map[BWPStart + rb + rbStart] = 1; + vrb_map[BWPStart + rb + rbStart] = ((1<state = WAIT_Msg3; @@ -1547,7 +1547,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra int i = 0; while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) { - if (vrb_map[BWPStart + rbStart + i]) { + if (vrb_map[BWPStart + rbStart + i]&(((1<TX_req[CC_id].Number_of_PDUs++; nr_mac->TX_req[CC_id].Slot = slotP; - // Mark the corresponding RBs as used + // Mark the corresponding symbols and RBs as used for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { - vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = 1; + vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = ((1<BWPSize); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index df25b085e6..7f7a202fc4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -384,7 +384,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, int rbSize = 0; uint32_t TBS = 0; do { - if(rbSize < bwpSize && !vrb_map[rbStart + rbSize]) + if(rbSize < bwpSize && !(vrb_map[rbStart + rbSize]&(((1<sched_ctrlCommon->sched_pdsch.mcs<10) @@ -411,10 +411,9 @@ uint32_t schedule_control_sib1(module_id_t module_id, LOG_D(MAC,"dmrs_length %d\n",dmrs_length); LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS); LOG_D(MAC,"mappingtype = %d\n", mappingtype); - // Mark the corresponding RBs as used for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) { - vrb_map[rb + rbStart] = 1; + vrb_map[rb + rbStart] = ((1<rbSize) { rbStart += rbSize; /* last iteration rbSize was not enough, skip it */ rbSize = 0; - while (rbStart < bwpSize && !rballoc_mask[rbStart]) + while (rbStart < bwpSize && + !(rballoc_mask[rbStart]&(((1<nrOfSymbols)-1)<startSymbolIndex))) rbStart++; if (rbStart >= bwpSize) { LOG_D(NR_MAC, "cannot allocate retransmission for UE %d/RNTI %04x: no resources\n", UE_id, UE_info->rnti[UE_id]); return false; } - while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize] && rbSize < retInfo->rbSize) + while (rbStart + rbSize < bwpSize && + (rballoc_mask[rbStart + rbSize]&(((1<nrOfSymbols)-1)<startSymbolIndex)) && + rbSize < retInfo->rbSize) rbSize++; } /* check whether we need to switch the TDA allocation since the last @@ -577,13 +580,15 @@ bool allocate_dl_retransmission(module_id_t module_id, } else { /* the retransmission will use a different time domain allocation, check * that we have enough resources */ - while (rbStart < bwpSize && !rballoc_mask[rbStart]) - rbStart++; - while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize]) - rbSize++; NR_pdsch_semi_static_t temp_ps; temp_ps.nrOfLayers = 1; nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps); + while (rbStart < bwpSize && + !(rballoc_mask[rbStart]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + rbStart++; + while (rbStart + rbSize < bwpSize && + (rballoc_mask[rbStart + rbSize]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + rbSize++; uint32_t new_tbs; uint16_t new_rbSize; bool success = nr_find_nb_rb(retInfo->Qm, @@ -642,7 +647,7 @@ bool allocate_dl_retransmission(module_id_t module_id, /* retransmissions: directly allocate */ *n_rb_sched -= sched_ctrl->sched_pdsch.rbSize; for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++) - rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] = 0; + rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= (((1<nrOfSymbols)-1)<startSymbolIndex); return true; } @@ -655,7 +660,7 @@ void pf_dl(module_id_t module_id, NR_list_t *UE_list, int max_num_ue, int n_rb_sched, - uint8_t *rballoc_mask) { + uint16_t *rballoc_mask) { gNB_MAC_INST *mac = RC.nrmac[module_id]; NR_UE_info_t *UE_info = &mac->UE_info; @@ -769,13 +774,6 @@ void pf_dl(module_id_t module_id, return; } - // Freq-demain allocation - while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++; - - uint16_t max_rbSize = 1; - while (rbStart + max_rbSize < bwpSize && rballoc_mask[rbStart + max_rbSize]) - max_rbSize++; - /* MCS has been set above */ const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; @@ -785,6 +783,17 @@ void pf_dl(module_id_t module_id, const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; if (ps->time_domain_allocation != tda) nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps); + + // Freq-demain allocation + while (rbStart < bwpSize && + !(rballoc_mask[rbStart]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + rbStart++; + + uint16_t max_rbSize = 1; + while (rbStart + max_rbSize < bwpSize && + (rballoc_mask[rbStart + max_rbSize]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + max_rbSize++; + sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx); sched_pdsch->pucch_allocation = alloc; @@ -806,7 +815,7 @@ void pf_dl(module_id_t module_id, /* transmissions: directly allocate */ n_rb_sched -= sched_pdsch->rbSize; for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - rballoc_mask[rb + sched_pdsch->rbStart] = 0; + rballoc_mask[rb + sched_pdsch->rbStart] -= (((1<nrOfSymbols)-1)<startSymbolIndex); } } @@ -819,9 +828,18 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; const int CC_id = 0; - /* Get bwpSize from the first UE */ + /* Get bwpSize and TDAfrom the first UE */ + /* This is temporary and it assumes all UEs have the same BWP and TDA*/ int UE_id = UE_info->list.head; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; + int startSymbolIndex, nrOfSymbols; + const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_bwp ? + sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList : + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count); + const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth: @@ -833,13 +851,16 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t MAX_BWP_SIZE); uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; - uint8_t rballoc_mask[bwpSize]; + uint16_t rballoc_mask[bwpSize]; int n_rb_sched = 0; for (int i = 0; i < bwpSize; i++) { // calculate mask: init with "NOT" vrb_map: // if any RB in vrb_map is blocked (1), the current RBG will be 0 - rballoc_mask[i] = !vrb_map[i+BWPStart]; - n_rb_sched += rballoc_mask[i]; + rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols + // if all the pdsch symbols are free + if((rballoc_mask[i]&(((1<UE_sched_ctrl[UE_id]; + const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1; + const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; + NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; + ps->nrOfLayers = target_dl_Nl; + if (ps->time_domain_allocation != tda) + nr_set_pdsch_semi_static( + scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps); + /* find largest unallocated chunk */ const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); @@ -289,11 +297,14 @@ void nr_preprocessor_phytest(module_id_t module_id, /* loop ensures that we allocate exactly target_dl_bw, or return */ while (true) { /* advance to first free RB */ - while (rbStart < bwpSize && vrb_map[rbStart + BWPStart]) + while (rbStart < bwpSize && + (vrb_map[rbStart + BWPStart]&(((1<nrOfSymbols)-1)<startSymbolIndex))) rbStart++; rbSize = 1; /* iterate until we are at target_dl_bw or no available RBs */ - while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize + BWPStart] && rbSize < target_dl_bw) + while (rbStart + rbSize < bwpSize && + !(vrb_map[rbStart + rbSize + BWPStart]&(((1<nrOfSymbols)-1)<startSymbolIndex)) && + rbSize < target_dl_bw) rbSize++; /* found target_dl_bw? */ if (rbSize == target_dl_bw) @@ -369,16 +380,9 @@ void nr_preprocessor_phytest(module_id_t module_id, // rnti, frame, slot); NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch; - NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; sched_pdsch->pucch_allocation = alloc; sched_pdsch->rbStart = rbStart; sched_pdsch->rbSize = rbSize; - const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1; - const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; - ps->nrOfLayers = target_dl_Nl; - if (ps->time_domain_allocation != tda) - nr_set_pdsch_semi_static( - scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps); sched_pdsch->mcs = target_dl_mcs; sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); @@ -398,7 +402,7 @@ void nr_preprocessor_phytest(module_id_t module_id, /* mark the corresponding RBs as used */ for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - vrb_map[rb + sched_pdsch->rbStart + BWPStart] = 1; + vrb_map[rb + sched_pdsch->rbStart + BWPStart] = ((1<nrOfSymbols)-1)<startSymbolIndex; if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize); } From 5f0a9fba894e6623b51765606822a25dfc6c5253 Mon Sep 17 00:00:00 2001 From: francescomani Date: Sat, 4 Dec 2021 15:49:33 +0100 Subject: [PATCH 04/16] reworking handling pdcch at mac, including support for multiple pdcch pdu --- openair1/SIMULATION/NR_PHY/dlsim.c | 4 +- openair2/LAYER2/NR_MAC_gNB/config.c | 11 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 8 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 68 +++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 36 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 77 ++++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 57 ++-- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 316 +++++++++++------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 95 +++++- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 28 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 25 +- 11 files changed, 510 insertions(+), 215 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 72e8d11be6..affa7fd803 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -1038,8 +1038,6 @@ int main(int argc, char **argv) while ((roundack==0)) { - memset(RC.nrmac[0]->cce_list[0],0,MAX_NUM_CCE*sizeof(int)); - memset(RC.nrmac[0]->cce_list[1],0,MAX_NUM_CCE*sizeof(int)); clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot); UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1); @@ -1047,7 +1045,7 @@ int main(int argc, char **argv) UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round; for (int i=0; iUE_info.num_pdcch_cand[0][i] = 0; + gNB_mac->UE_info.pdcch_cand[i] = 0; if (css_flag == 0) { nr_schedule_ue_spec(0, frame, slot); diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index cedd095794..a99f08b641 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -535,7 +535,6 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, if (CellGroup) { const NR_ServingCellConfig_t *servingCellConfig = CellGroup->spCellConfig->spCellConfigDedicated; - const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = servingCellConfig->downlinkBWP_ToAddModList; if(bwpList) { AssertFatal(bwpList->list.count > 0, "downlinkBWP_ToAddModList has no BWPs!\n"); @@ -605,6 +604,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, } LOG_I(NR_MAC,"Added new RA process for UE RNTI %04x with initial CellGroup\n", rnti); } else { // CellGroup has been updated + NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon; const int UE_id = find_nr_UE_id(Mod_idP,rnti); int target_ss; UE_info->CellGroup[UE_id] = CellGroup; @@ -612,19 +612,28 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, process_CellGroup(CellGroup,&UE_info->UE_sched_ctrl[UE_id]); // update coreset/searchspace void *bwpd = NULL; + NR_BWP_t *genericParameters = NULL; target_ss = NR_SearchSpace__searchSpaceType_PR_common; if ((UE_info->UE_sched_ctrl[UE_id].active_bwp)) { target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; bwpd = (void*)UE_info->UE_sched_ctrl[UE_id].active_bwp->bwp_Dedicated; + genericParameters = &UE_info->UE_sched_ctrl[UE_id].active_bwp->bwp_Common->genericParameters; } else if (CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated && (CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP)) { target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; bwpd = (void*)CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP; + genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; } UE_info->UE_sched_ctrl[UE_id].search_space = get_searchspace(scc, bwpd, target_ss); UE_info->UE_sched_ctrl[UE_id].coreset = get_coreset(Mod_idP, scc, bwpd, UE_info->UE_sched_ctrl[UE_id].search_space, target_ss); + UE_info->UE_sched_ctrl[UE_id].sched_pdcch = set_pdcch_structure(RC.nrmac[Mod_idP], + UE_info->UE_sched_ctrl[UE_id].search_space, + UE_info->UE_sched_ctrl[UE_id].coreset, + scc, + genericParameters, + NULL); UE_info->UE_sched_ctrl[UE_id].maxL = 2; } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index c4e1fbff96..1fd6417214 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -306,12 +306,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, nr_rrc_trigger(&ctxt, 0 /*CC_id*/, frame, slot >> *scc->ssbSubcarrierSpacing); } - memset(RC.nrmac[module_idP]->cce_list[0],0,MAX_NUM_CCE*sizeof(int)); // coreset0 - memset(RC.nrmac[module_idP]->cce_list[1],0,MAX_NUM_CCE*sizeof(int)); // coreset1 - NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info; - for (int UE_id = UE_info->list.head; UE_id >= 0; UE_id = UE_info->list.next[UE_id]) - for (int i=0; inum_pdcch_cand[UE_id][i] = 0; + for (int i=0; ipdcch_cand[i] = 0; for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { //mbsfn_status[CC_id] = 0; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 8a9c5b3f52..e5b96ccaa5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -581,12 +581,15 @@ void nr_initiate_ra_proc(module_id_t module_idP, NR_SearchSpaceId_t ra_SearchSpace = 0; struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = NULL; + NR_BWP_t *genericParameters = NULL; if(bwp) { commonSearchSpaceList = bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList; ra_SearchSpace = *bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace; + genericParameters = &bwp->bwp_Common->genericParameters; } else { commonSearchSpaceList = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList; ra_SearchSpace = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->ra_SearchSpace; + genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; } AssertFatal(commonSearchSpaceList->list.count > 0, "common SearchSpace list has 0 elements\n"); @@ -599,6 +602,14 @@ void nr_initiate_ra_proc(module_id_t module_idP, AssertFatal(ra->ra_ss!=NULL,"SearchSpace cannot be null for RA\n"); + ra->coreset = get_coreset(module_idP, scc, bwp, ra->ra_ss, NR_SearchSpace__searchSpaceType_PR_common); + ra->sched_pdcch = set_pdcch_structure(nr_mac, + ra->ra_ss, + ra->coreset, + scc, + genericParameters, + NULL); + // retrieving ra pdcch monitoring period and offset find_monitoring_periodicity_offset_common(ra->ra_ss, &monitoring_slot_period, &monitoring_offset); @@ -774,7 +785,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t // generation of DCI 0_0 to schedule msg3 retransmission NR_SearchSpace_t *ss = ra->ra_ss; - NR_ControlResourceSet_t *coreset = get_coreset(module_idP, scc, NULL, ss, NR_SearchSpace__searchSpaceType_PR_common); + NR_ControlResourceSet_t *coreset = ra->coreset; AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg3 retransmission\n"); nfapi_nr_ul_dci_request_t *ul_dci_req = &nr_mac->UL_dci_req[CC_id]; @@ -788,7 +799,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } @@ -800,7 +811,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t if(nr_of_candidates>0) break; } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - int CCEIndex = allocate_nr_CCEs(nr_mac, NULL, coreset, aggregation_level, 0, 0, nr_of_candidates); + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + aggregation_level, + nr_of_candidates, + ra->sched_pdcch, + coreset, + 0); if (CCEIndex < 0) { LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti); return; @@ -841,6 +858,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ra->bwp_id); // Mark the corresponding RBs as used + + fill_pdcch_vrb_map(nr_mac, + CC_id, + ra->sched_pdcch, + CCEIndex, + aggregation_level); + for (int rb = 0; rb < ra->msg3_nb_rb; rb++) { vrb_map_UL[rbStart + BWPStart + rb] = 1; } @@ -1150,7 +1174,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n"); - coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common); + coreset = ra->coreset; AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n"); @@ -1182,7 +1206,15 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra if(nr_of_candidates>0) break; } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level,0,0,nr_of_candidates); + + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + aggregation_level, + nr_of_candidates, + ra->sched_pdcch, + coreset, + 0); + if (CCEIndex < 0) { LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti); return; @@ -1204,7 +1236,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } @@ -1363,6 +1395,11 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra nr_mac->TX_req[CC_id].Slot = slotP; // Mark the corresponding symbols RBs as used + fill_pdcch_vrb_map(nr_mac, + CC_id, + ra->sched_pdcch, + CCEIndex, + aggregation_level); for (int rb = 0; rb < rbSize; rb++) { vrb_map[BWPStart + rb + rbStart] = ((1<downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; } - coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common); + coreset = ra->coreset; AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg4\n"); @@ -1447,7 +1484,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra if(nr_of_candidates>0) break; } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level,0,0,nr_of_candidates); + + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + aggregation_level, + nr_of_candidates, + ra->sched_pdcch, + coreset, + 0); + if (CCEIndex < 0) { LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti); return; @@ -1580,7 +1625,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } @@ -1722,6 +1767,11 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra nr_mac->TX_req[CC_id].Slot = slotP; // Mark the corresponding symbols and RBs as used + fill_pdcch_vrb_map(nr_mac, + CC_id, + ra->sched_pdcch, + CCEIndex, + aggregation_level); for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = ((1<common_channels[CC_id].vrb_map; + NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id]; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + uint16_t *vrb_map = cc->vrb_map; if (gNB_mac->sched_ctrlCommon == NULL){ LOG_D(NR_MAC,"schedule_control_common: Filling nr_mac->sched_ctrlCommon\n"); @@ -340,6 +342,12 @@ uint32_t schedule_control_sib1(module_id_t module_id, fill_coresetZero(gNB_mac->sched_ctrlCommon->coreset,type0_PDCCH_CSS_config); gNB_mac->cset0_bwp_start = type0_PDCCH_CSS_config->cset_start_rb; gNB_mac->cset0_bwp_size = type0_PDCCH_CSS_config->num_rbs; + gNB_mac->sched_ctrlCommon->sched_pdcch = set_pdcch_structure(NULL, + gNB_mac->sched_ctrlCommon->search_space, + gNB_mac->sched_ctrlCommon->coreset, + scc, + NULL, + type0_PDCCH_CSS_config); } gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation; @@ -354,13 +362,13 @@ uint32_t schedule_control_sib1(module_id_t module_id, if (nr_of_candidates>0) break; // choosing the lower value of aggregation level available } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - gNB_mac->sched_ctrlCommon->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - NULL, - gNB_mac->sched_ctrlCommon->coreset, - gNB_mac->sched_ctrlCommon->aggregation_level, - 0, - candidate_idx, - nr_of_candidates); + gNB_mac->sched_ctrlCommon->cce_index = find_pdcch_candidate(gNB_mac, + CC_id, + gNB_mac->sched_ctrlCommon->aggregation_level, + nr_of_candidates, + gNB_mac->sched_ctrlCommon->sched_pdcch, + gNB_mac->sched_ctrlCommon->coreset, + 0); AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n"); @@ -412,6 +420,11 @@ uint32_t schedule_control_sib1(module_id_t module_id, LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS); LOG_D(MAC,"mappingtype = %d\n", mappingtype); // Mark the corresponding RBs as used + fill_pdcch_vrb_map(gNB_mac, + CC_id, + gNB_mac->sched_ctrlCommon->sched_pdcch, + gNB_mac->sched_ctrlCommon->cce_index, + gNB_mac->sched_ctrlCommon->aggregation_level); for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) { vrb_map[rb + rbStart] = ((1<PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(NULL, - pdcch_pdu_rel15, - gNB_mac->sched_ctrlCommon->search_space, + nr_configure_pdcch(pdcch_pdu_rel15, gNB_mac->sched_ctrlCommon->coreset, - scc, NULL, - type0_PDCCH_CSS_config); + gNB_mac->sched_ctrlCommon->sched_pdcch); nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 30724db595..fd07b66bf6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -612,8 +612,27 @@ bool allocate_dl_retransmission(module_id_t module_id, } /* Find a free CCE */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + /* CC_id = */ 0, + sched_ctrl->aggregation_level, + nr_of_candidates, + sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(MAC, "%4d.%2d could not find CCE for DL DCI retransmission UE %d/RNTI %04x\n", frame, slot, UE_id, UE_info->rnti[UE_id]); return false; @@ -630,14 +649,18 @@ bool allocate_dl_retransmission(module_id_t module_id, UE_info->rnti[UE_id], frame, slot); - int cid = sched_ctrl->coreset->controlResourceSetId; - UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = RC.nrmac[module_id]->cce_list[cid]; - for (int i = 0; i < sched_ctrl->aggregation_level; i++) - cce_list[sched_ctrl->cce_index + i] = 0; + RC.nrmac[module_id]->pdcch_cand[cid]--; return false; } + sched_ctrl->cce_index = CCEIndex; + + fill_pdcch_vrb_map(RC.nrmac[module_id], + /* CC_id = */ 0, + sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + /* just reuse from previous scheduling opportunity, set new start RB */ sched_ctrl->sched_pdsch = *retInfo; sched_ctrl->sched_pdsch.rbStart = rbStart; @@ -746,8 +769,27 @@ void pf_dl(module_id_t module_id, int rbStart = 0; // start wrt BWPstart /* Find a free CCE */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + + int CCEIndex = find_pdcch_candidate(mac, + /* CC_id = */ 0, + sched_ctrl->aggregation_level, + nr_of_candidates, + sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d could not find CCE for DL DCI UE %d/RNTI %04x\n", frame, slot, UE_id, rnti); continue; } @@ -766,14 +808,18 @@ void pf_dl(module_id_t module_id, rnti, frame, slot); - int cid = sched_ctrl->coreset->controlResourceSetId; - UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = mac->cce_list[cid]; - for (int i = 0; i < sched_ctrl->aggregation_level; i++) - cce_list[sched_ctrl->cce_index + i] = 0; + mac->pdcch_cand[cid]--; return; } + sched_ctrl->cce_index = CCEIndex; + + fill_pdcch_vrb_map(mac, + /* CC_id = */ 0, + sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + /* MCS has been set above */ const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; @@ -1024,9 +1070,8 @@ void nr_schedule_ue_spec(module_id_t module_id, dl_req->nPDUs += 1; pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid); - NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space:gNB_mac->sched_ctrlCommon->search_space; NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset; - nr_configure_pdcch(gNB_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch); gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index f5f8a91299..b691674b3e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -346,15 +346,16 @@ void nr_preprocessor_phytest(module_id_t module_id, const int cid = sched_ctrl->coreset->controlResourceSetId; const uint16_t Y = UE_info->Y[UE_id][cid%3][slot]; - const int m = UE_info->num_pdcch_cand[UE_id][cid]; - sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - sched_ctrl->active_bwp, - sched_ctrl->coreset, - sched_ctrl->aggregation_level, - Y, - m, - nr_of_candidates); - AssertFatal(sched_ctrl->cce_index >= 0, + + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + AssertFatal(CCEIndex >= 0, "%s(): could not find CCE for UE %d\n", __func__, UE_id); @@ -368,13 +369,18 @@ void nr_preprocessor_phytest(module_id_t module_id, rnti, frame, slot); - UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = RC.nrmac[module_id]->cce_list[cid]; - for (int i = 0; i < sched_ctrl->aggregation_level; i++) - cce_list[sched_ctrl->cce_index + i] = 0; + RC.nrmac[module_id]->pdcch_cand[cid]--; return; } + sched_ctrl->cce_index = CCEIndex; + + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + //AssertFatal(alloc, // "could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n", // rnti, frame, slot); @@ -506,19 +512,20 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ const int cid = sched_ctrl->coreset->controlResourceSetId; const uint16_t Y = UE_info->Y[UE_id][cid%3][slot]; - const int m = UE_info->num_pdcch_cand[UE_id][cid]; - sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - sched_ctrl->active_bwp, - sched_ctrl->coreset, - sched_ctrl->aggregation_level, - Y, - m, - nr_of_candidates); + + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + if (sched_ctrl->cce_index < 0) { LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); + nr_mac->pdcch_cand[cid]--; return false; } - UE_info->num_pdcch_cand[UE_id][cid]++; const int mcs = target_ul_mcs; NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; @@ -547,6 +554,12 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ >> 3; /* mark the corresponding RBs as used */ + fill_pdcch_vrb_map(nr_mac, + CC_id, + sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + for (int rb = rbStart; rb < rbStart + rbSize; rb++) vrb_map_UL[rb+BWPStart] = 1; return true; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 36ae3c607f..97405b6f32 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -159,6 +159,7 @@ NR_ControlResourceSet_t *get_coreset(module_id_t module_idP, NR_SearchSpace_t *ss, NR_SearchSpace__searchSpaceType_PR ss_type) { NR_ControlResourceSetId_t coreset_id = *ss->controlResourceSetId; + if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) { // common search space NR_ControlResourceSet_t *coreset; if(coreset_id == 0) { @@ -208,48 +209,183 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc, AssertFatal(0, "Couldn't find an adequate searchspace bwp_Dedicated %p\n",bwp_Dedicated); } -int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, - NR_BWP_Downlink_t *bwp, - NR_ControlResourceSet_t *coreset, - int aggregation, - uint16_t Y, - int m, - int nr_of_candidates) { +NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac, + NR_SearchSpace_t *ss, + NR_ControlResourceSet_t *coreset, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_t *bwp, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) { - int coreset_id = coreset->controlResourceSetId; + NR_sched_pdcch_t *pdcch = calloc(1,sizeof(NR_sched_pdcch_t)); - int *cce_list = nr_mac->cce_list[coreset_id]; + int sps; + AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId, + "coreset id in SS %ld does not correspond to the one in coreset %ld", + *ss->controlResourceSetId, coreset->controlResourceSetId); - int n_rb=0; - for (int i=0;i<6;i++) - for (int j=0;j<8;j++) { - n_rb+=((coreset->frequencyDomainResources.buf[i]>>j)&1); + if (bwp) { // This is not for SIB1 + if(coreset->controlResourceSetId == 0){ + pdcch->BWPSize = gNB_mac->cset0_bwp_size; + pdcch->BWPStart = gNB_mac->cset0_bwp_start; } - n_rb*=6; + else { + pdcch->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); + pdcch->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); + } + pdcch->SubcarrierSpacing = bwp->subcarrierSpacing; + pdcch->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix; - uint16_t N_reg = n_rb * coreset->duration; - uint16_t n_CI = 0; + //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored"); + sps = bwp->cyclicPrefix == NULL ? 14 : 12; + } + else { + AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp); + pdcch->BWPSize = type0_PDCCH_CSS_config->num_rbs; + pdcch->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; + pdcch->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch; + pdcch->CyclicPrefix = 0; + sps = 14; + } - const uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE; - const uint16_t M_s_max = nr_of_candidates; + AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n"); + AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n"); - LOG_D(PHY,"allocate_NR_CCes : bwp_id %d, coreset_id %d : N_cce %d, m %d, nr_of_candidates %d, Y %d\n", - (int)(bwp ? bwp->bwp_Id : 0),coreset_id,N_cce,m,nr_of_candidates, Y); - //PDCCH candidate index m in CORESET exceeds the maximum number of PDCCH candidates - if(m >= nr_of_candidates) - return -1; + // for SPS=14 8 MSBs in positions 13 downto 6 + uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | + (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); - int first_cce = aggregation * (( Y + CEILIDIV((m*N_cce),(aggregation*M_s_max)) + n_CI ) % CEILIDIV(N_cce,aggregation)); + for (int i=0; i>(sps-1-i))&1) { + pdcch->StartSymbolIndex=i; + break; + } + } - for (int i=0;iDurationSymbols = coreset->duration; - return(first_cce); + //cce-REG-MappingType + pdcch->CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved? + NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED; + if (pdcch->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { + pdcch->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize == + NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize); + pdcch->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize == + NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize); + AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n"); + pdcch->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId; + } + else { + pdcch->RegBundleSize = 6; + pdcch->InterleaverSize = 0; + pdcch->ShiftIndex = 0; + } + + int N_rb = 0; // nb of rbs of coreset per symbol + for (int i=0;i<6;i++) { + for (int t=0;t<8;t++) { + N_rb+=((coreset->frequencyDomainResources.buf[i]>>t)&1); + } + } + pdcch->n_rb = N_rb*=6; // each bit of frequencyDomainResources represents 6 PRBs + + return pdcch; } + +uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, + int cc_id, + int aggregation, + int nr_of_candidates, + NR_sched_pdcch_t *pdcch, + NR_ControlResourceSet_t *coreset, + uint16_t Y){ + + uint16_t *vrb_map = mac->common_channels[cc_id].vrb_map; + const int next_cand = mac->pdcch_cand[coreset->controlResourceSetId]; + const int N_ci = 0; + + if(next_cand>=nr_of_candidates) { + LOG_D(NR_MAC,"No more available candidates for this coreset\n"); + return -1; + } + + int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol + int N_symb = coreset->duration; // nb of coreset symbols + int N_regs = N_rb*N_symb; // nb of REGs per coreset + int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset + + int L = pdcch->RegBundleSize; + int R = pdcch->InterleaverSize; + int n_shift = pdcch->ShiftIndex; + int C = R>0 ? N_regs/(L*R) : 0; + int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle + + int first_cce; + bool taken = false; // flag if the resource for a given candidate are taken + // loop over all the available candidates + for(int m=next_cand; mBWPStart + f*B_rb + rb]&(((1<StartSymbolIndex)) { + taken = true; + break; + } + } + } + } + if(!taken){ + mac->pdcch_cand[coreset->controlResourceSetId] = m++; // using candidate m, next available is m+1 + return first_cce; + } + } + return -1; +} + +void fill_pdcch_vrb_map(gNB_MAC_INST *mac, + int CC_id, + NR_sched_pdcch_t *pdcch, + int first_cce, + int aggregation){ + + uint16_t *vrb_map = mac->common_channels[CC_id].vrb_map; + + int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol + int L = pdcch->RegBundleSize; + int R = pdcch->InterleaverSize; + int n_shift = pdcch->ShiftIndex; + int N_symb = pdcch->DurationSymbols; + int N_regs = N_rb*N_symb; // nb of REGs per coreset + int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle + int C = R>0 ? N_regs/(L*R) : 0; + + for (int j=first_cce; jBWPStart + f*B_rb + rb] = ((1<StartSymbolIndex; + } + } +} + + bool nr_find_nb_rb(uint16_t Qm, uint16_t R, uint16_t nb_symb_sch, @@ -346,7 +482,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc, void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc, const NR_BWP_Uplink_t *ubwp, - const NR_BWP_UplinkDedicated_t *ubwpd, + const NR_BWP_UplinkDedicated_t *ubwpd, long dci_format, int tda, uint8_t num_dmrs_cdm_grps_no_data, @@ -718,81 +854,32 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) { return(default_pucch_csset[pucch_ResourceCommon]); } -void nr_configure_pdcch(gNB_MAC_INST *gNB_mac, - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, - NR_SearchSpace_t *ss, + + +void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_ControlResourceSet_t *coreset, - NR_ServingCellConfigCommon_t *scc, NR_BWP_t *bwp, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) { + NR_sched_pdcch_t *pdcch) { - int sps; - AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId, - "coreset id in SS %ld does not correspond to the one in coreset %ld", - *ss->controlResourceSetId, coreset->controlResourceSetId); - if (bwp) { // This is not for SIB1 - if(coreset->controlResourceSetId == 0){ - pdcch_pdu->BWPSize = gNB_mac->cset0_bwp_size; - pdcch_pdu->BWPStart = gNB_mac->cset0_bwp_start; - } - else { - pdcch_pdu->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); - pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); - } - pdcch_pdu->SubcarrierSpacing = bwp->subcarrierSpacing; - pdcch_pdu->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix; - - //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored"); - sps = bwp->cyclicPrefix == NULL ? 14 : 12; - } - else { - AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp); - pdcch_pdu->BWPSize = type0_PDCCH_CSS_config->num_rbs; - pdcch_pdu->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; - pdcch_pdu->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch; - pdcch_pdu->CyclicPrefix = 0; - sps = 14; - } - - AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n"); - AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n"); - - // for SPS=14 8 MSBs in positions 13 downto 6 - uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | - (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); - - for (int i=0; i>(sps-1-i))&1) { - pdcch_pdu->StartSymbolIndex=i; - break; - } - } + pdcch_pdu->BWPSize = pdcch->BWPSize; + pdcch_pdu->BWPStart = pdcch->BWPStart; + pdcch_pdu->SubcarrierSpacing = pdcch->SubcarrierSpacing; + pdcch_pdu->CyclicPrefix = pdcch->CyclicPrefix; + pdcch_pdu->StartSymbolIndex = pdcch->StartSymbolIndex; pdcch_pdu->DurationSymbols = coreset->duration; for (int i=0;i<6;i++) pdcch_pdu->FreqDomainResource[i] = coreset->frequencyDomainResources.buf[i]; - LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d, \n",pdcch_pdu->BWPStart,pdcch_pdu->BWPSize,(int)pdcch_pdu->SubcarrierSpacing,(int)coreset->frequencyDomainResources.buf[0],(int)coreset->duration); + LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d, \n", + pdcch_pdu->BWPStart,pdcch_pdu->BWPSize,(int)pdcch_pdu->SubcarrierSpacing,(int)coreset->frequencyDomainResources.buf[0],(int)coreset->duration); - //cce-REG-MappingType - pdcch_pdu->CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved? - NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED; - - if (pdcch_pdu->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { - pdcch_pdu->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize == - NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize); - pdcch_pdu->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize == - NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize); - AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n"); - pdcch_pdu->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId; - } - else { - pdcch_pdu->RegBundleSize = 0; - pdcch_pdu->InterleaverSize = 0; - pdcch_pdu->ShiftIndex = 0; - } + pdcch_pdu->CceRegMappingType = pdcch->CceRegMappingType; + pdcch_pdu->RegBundleSize = pdcch->RegBundleSize; + pdcch_pdu->InterleaverSize = pdcch->InterleaverSize; + pdcch_pdu->ShiftIndex = pdcch->ShiftIndex; if(coreset->controlResourceSetId == 0) { if(bwp == NULL) @@ -1968,6 +2055,9 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG bwpList->list.count); const int bwp_id = 1; sched_ctrl->active_bwp = bwpList ? bwpList->list.array[bwp_id - 1] : NULL; + NR_BWP_t *genericParameters = sched_ctrl->active_bwp ? + &sched_ctrl->active_bwp->bwp_Common->genericParameters: + &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; const int target_ss = sched_ctrl->active_bwp ? NR_SearchSpace__searchSpaceType_PR_ue_Specific : NR_SearchSpace__searchSpaceType_PR_common; sched_ctrl->search_space = get_searchspace(scc, sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Dedicated : NULL, @@ -1975,6 +2065,12 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG sched_ctrl->coreset = get_coreset(mod_idP, scc, sched_ctrl->active_bwp ? (void*)sched_ctrl->active_bwp->bwp_Dedicated : NULL, sched_ctrl->search_space, target_ss); + sched_ctrl->sched_pdcch = set_pdcch_structure(RC.nrmac[mod_idP], + sched_ctrl->search_space, + sched_ctrl->coreset, + scc, + genericParameters, + NULL); const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL; if (ubwpList) AssertFatal(ubwpList->list.count == 1, "uplinkBWP_ToAddModList has %d BWP!\n", @@ -2388,38 +2484,6 @@ void nr_csirs_scheduling(int Mod_idP, } } -bool find_free_CCE(module_id_t module_id, - sub_frame_t slot, - int UE_id){ - NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[module_id]->UE_info.UE_sched_ctrl[UE_id]; - uint8_t nr_of_candidates; - for (int i=0; i<5; i++) { - // for now taking the lowest value among the available aggregation levels - find_aggregation_candidates(&sched_ctrl->aggregation_level, - &nr_of_candidates, - sched_ctrl->search_space, - 1<0) break; - } - AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; - const int m = RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid]; - if (UE_id >= 0) LOG_D(NR_MAC,"slot %d calling allocate_nr_CCEs with L %d, nr_of_candidates %d, Y %x\n",slot, sched_ctrl->aggregation_level,nr_of_candidates,Y); - sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - sched_ctrl->active_bwp, - sched_ctrl->coreset, - sched_ctrl->aggregation_level, - Y, - m, - nr_of_candidates); - if (sched_ctrl->cce_index < 0) - return false; - - RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid]++; - return true; -} - /*void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg, nfapi_nr_coreset_t *coreset, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index bcc0832863..30f5ba1476 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -963,13 +963,38 @@ bool allocate_ul_retransmission(module_id_t module_id, sched_ctrl->pusch_semi_static = temp_ps; } - /* Find free CCE */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + /* Find a free CCE */ + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d no free CCE for retransmission UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]); return false; } + sched_ctrl->cce_index = CCEIndex; + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + /* frame/slot in sched_pusch has been set previously. In the following, we * overwrite the information in the retransmission information before storing * as the new scheduling instruction */ @@ -1084,8 +1109,27 @@ void pf_ul(module_id_t module_id, * based on data to transmit) */ if (B == 0 && do_sched) { /* if no data, pre-allocate 5RB */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + /* Find a free CCE */ + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x (BSR 0)\n", frame, slot, UE_info->rnti[UE_id]); continue; } @@ -1102,6 +1146,13 @@ void pf_ul(module_id_t module_id, return; } + sched_ctrl->cce_index = CCEIndex; + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + /* Save PUSCH field */ /* we want to avoid a lengthy deduction of DMRS and other parameters in * every TTI if we can save it, so check whether dci_format, TDA, or @@ -1167,8 +1218,27 @@ void pf_ul(module_id_t module_id, *max = UE_sched.next[*max]; *p = -1; - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]); continue; } @@ -1179,7 +1249,6 @@ void pf_ul(module_id_t module_id, if (max_num_ue < 0) return; - NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_CellGroupConfig_t *cg = UE_info->CellGroup[UE_id]; NR_BWP_UplinkDedicated_t *ubwpd= cg ? cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP:NULL; NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ? &sched_ctrl->active_ubwp->bwp_Common->genericParameters : &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; @@ -1232,6 +1301,14 @@ void pf_ul(module_id_t module_id, rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS); /* Mark the corresponding RBs as used */ + + sched_ctrl->cce_index = CCEIndex; + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + n_rb_sched -= sched_pusch->rbSize; for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++) rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0; @@ -1632,7 +1709,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(nr_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 62d70f4f2c..56a24c5b94 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -248,13 +248,31 @@ void find_search_space(int ss_type, NR_BWP_Downlink_t *bwp, NR_SearchSpace_t *ss); -void nr_configure_pdcch(gNB_MAC_INST *gNB_mac, - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, - NR_SearchSpace_t *ss, +void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_ControlResourceSet_t *coreset, - NR_ServingCellConfigCommon_t *scc, NR_BWP_t *bwp, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); + NR_sched_pdcch_t *pdcch); + +NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac, + NR_SearchSpace_t *ss, + NR_ControlResourceSet_t *coreset, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_t *bwp, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); + +uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, + int cc_id, + int aggregation, + int nr_of_candidates, + NR_sched_pdcch_t *pdcch, + NR_ControlResourceSet_t *coreset, + uint16_t Y); + +void fill_pdcch_vrb_map(gNB_MAC_INST *mac, + int CC_id, + NR_sched_pdcch_t *pdcch, + int first_cce, + int aggregation); void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, const NR_CellGroupConfig_t *CellGroup, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 99e21b6560..f7bd2a5ac8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -103,6 +103,20 @@ typedef struct NR_preamble_ue { uint8_t *preamble_list; } NR_preamble_ue_t; +typedef struct NR_sched_pdcch { + uint16_t BWPSize; + uint16_t BWPStart; + uint8_t CyclicPrefix; + uint8_t SubcarrierSpacing; + uint8_t StartSymbolIndex; + uint8_t CceRegMappingType; + uint8_t RegBundleSize; + uint8_t InterleaverSize; + uint16_t ShiftIndex; + uint8_t DurationSymbols; + int n_rb; +} NR_sched_pdcch_t; + /*! \brief gNB template for the Random access information */ typedef struct { /// Flag to indicate this process is active @@ -163,6 +177,9 @@ typedef struct { int mac_pdu_length; /// RA search space NR_SearchSpace_t *ra_ss; + /// RA Coreset + NR_ControlResourceSet_t *coreset; + NR_sched_pdcch_t *sched_pdcch; // Beam index uint8_t beam_id; /// CellGroup for UE that is to come (NSA is non-null, null for SA) @@ -298,7 +315,6 @@ typedef struct UE_info { pdschTciStatesActDeact_t pdsch_TCI_States_ActDeact; } NR_UE_mac_ce_ctrl_t; - typedef struct NR_sched_pucch { int frame; int ul_slot; @@ -533,6 +549,7 @@ typedef struct { /// CCE index and aggregation, should be coherent with cce_list NR_SearchSpace_t *search_space; NR_ControlResourceSet_t *coreset; + NR_sched_pdcch_t *sched_pdcch; /// CCE index and Aggr. Level are shared for PUSCH/PDSCH allocation decisions /// corresponding to the sched_pusch/sched_pdsch structures below @@ -652,10 +669,10 @@ typedef struct { /// CCE indexing int Y[MAX_MOBILES_PER_GNB][3][160]; int m[MAX_MOBILES_PER_GNB]; - int num_pdcch_cand[MAX_MOBILES_PER_GNB][MAX_NUM_CORESET]; // UE selected beam index uint8_t UE_beam_index[MAX_MOBILES_PER_GNB]; bool Msg4_ACKed[MAX_MOBILES_PER_GNB]; + } NR_UE_info_t; typedef void (*nr_pp_impl_dl)(module_id_t mod_id, @@ -714,7 +731,7 @@ typedef struct gNB_MAC_INST_s { nfapi_nr_ul_dci_request_t UL_dci_req[NFAPI_CC_MAX]; /// NFAPI DL PDU structure nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX]; - + int pdcch_cand[MAX_NUM_CORESET]; NR_UE_info_t UE_info; /// UL handle @@ -742,8 +759,6 @@ typedef struct gNB_MAC_INST_s { time_stats_t rx_ulsch_sdu; // include rlc_data_ind /// processing time of eNB PCH scheduler time_stats_t schedule_pch; - /// CCE lists - int cce_list[MAX_NUM_CORESET][MAX_NUM_CCE]; /// list of allocated beams per period int16_t *tdd_beam_association; From 82dc3430f7a3ac4f21ffd112e64213ee79523abe Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 6 Dec 2021 11:20:51 +0100 Subject: [PATCH 05/16] function for bitmap from start symbol and length --- common/utils/nr/nr_common.c | 5 +++ common/utils/nr/nr_common.h | 1 + openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 8 ++--- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 6 ++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 20 +++++------ .../NR_MAC_gNB/gNB_scheduler_primitives.c | 36 +++++++++---------- 6 files changed, 41 insertions(+), 35 deletions(-) diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index a704a66c76..42c7ef9c7e 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -472,6 +472,11 @@ int get_subband_size(int NPRB,int size) { } +// from start symbol index and nb or symbols to symbol occupation bitmap in a slot +uint16_t startandlength_to_bitmat(int startSymbolIndex, int nrOfSymbols) { + return (((1<state = WAIT_Msg3; @@ -1592,7 +1592,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra int i = 0; while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) { - if (vrb_map[BWPStart + rbStart + i]&(((1<rbSize; rb++) { - vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = ((1<rbStart] |= startandlength_to_bitmat(startSymbolIndex, nrOfSymbols); } LOG_D(NR_MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 342e441673..7945042ba5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -314,7 +314,7 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, uint16_t symStart uint16_t *vrb_map = cc[CC_id].vrb_map; for (int rb = 0; rb < 20; rb++) - vrb_map[rbStart + rb] = 15<sched_ctrlCommon->sched_pdsch.mcs<10) @@ -426,7 +426,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, gNB_mac->sched_ctrlCommon->cce_index, gNB_mac->sched_ctrlCommon->aggregation_level); for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) { - vrb_map[rb + rbStart] = ((1<nrOfSymbols)-1)<startSymbolIndex))) + !(rballoc_mask[rbStart]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; if (rbStart >= bwpSize) { LOG_D(NR_MAC, "cannot allocate retransmission for UE %d/RNTI %04x: no resources\n", UE_id, UE_info->rnti[UE_id]); return false; } while (rbStart + rbSize < bwpSize && - (rballoc_mask[rbStart + rbSize]&(((1<nrOfSymbols)-1)<startSymbolIndex)) && + (rballoc_mask[rbStart + rbSize]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols)) && rbSize < retInfo->rbSize) rbSize++; } @@ -584,10 +584,10 @@ bool allocate_dl_retransmission(module_id_t module_id, temp_ps.nrOfLayers = 1; nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps); while (rbStart < bwpSize && - !(rballoc_mask[rbStart]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + !(rballoc_mask[rbStart]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; while (rbStart + rbSize < bwpSize && - (rballoc_mask[rbStart + rbSize]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + (rballoc_mask[rbStart + rbSize]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) rbSize++; uint32_t new_tbs; uint16_t new_rbSize; @@ -670,7 +670,7 @@ bool allocate_dl_retransmission(module_id_t module_id, /* retransmissions: directly allocate */ *n_rb_sched -= sched_ctrl->sched_pdsch.rbSize; for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++) - rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= (((1<nrOfSymbols)-1)<startSymbolIndex); + rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols); return true; } @@ -832,12 +832,12 @@ void pf_dl(module_id_t module_id, // Freq-demain allocation while (rbStart < bwpSize && - !(rballoc_mask[rbStart]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + !(rballoc_mask[rbStart]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; uint16_t max_rbSize = 1; while (rbStart + max_rbSize < bwpSize && - (rballoc_mask[rbStart + max_rbSize]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + (rballoc_mask[rbStart + max_rbSize]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) max_rbSize++; sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); @@ -861,7 +861,7 @@ void pf_dl(module_id_t module_id, /* transmissions: directly allocate */ n_rb_sched -= sched_pdsch->rbSize; for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - rballoc_mask[rb + sched_pdsch->rbStart] -= (((1<nrOfSymbols)-1)<startSymbolIndex); + rballoc_mask[rb + sched_pdsch->rbStart] -= startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols); } } @@ -904,8 +904,8 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t // if any RB in vrb_map is blocked (1), the current RBG will be 0 rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols // if all the pdsch symbols are free - if((rballoc_mask[i]&(((1<BWPStart + f*B_rb + rb] = ((1<StartSymbolIndex; + vrb_map[pdcch->BWPStart + f*B_rb + rb] |= startandlength_to_bitmat(pdcch->StartSymbolIndex, N_symb); } } } @@ -2359,20 +2359,20 @@ void nr_csirs_scheduling(int Mod_idP, csirs_pdu_rel15->row = 1; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row1.buf[0])>>4)&0x0f; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2: csirs_pdu_rel15->row = 2; csirs_pdu_rel15->freq_domain = (((resourceMapping.frequencyDomainAllocation.choice.row2.buf[1]>>4)&0x0f) | ((resourceMapping.frequencyDomainAllocation.choice.row2.buf[0]<<8)&0xff0)); for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4: csirs_pdu_rel15->row = 4; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row4.buf[0])>>5)&0x07; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other: csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.other.buf[0])>>2)&0x3f; @@ -2383,18 +2383,18 @@ void nr_csirs_scheduling(int Mod_idP, case NR_CSI_RS_ResourceMapping__nrofPorts_p2: csirs_pdu_rel15->row = 3; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p4: csirs_pdu_rel15->row = 5; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p8: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 8; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); } else{ int num_k = 0; @@ -2403,12 +2403,12 @@ void nr_csirs_scheduling(int Mod_idP, if(num_k==4) { csirs_pdu_rel15->row = 6; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); } else { csirs_pdu_rel15->row = 7; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); } } break; @@ -2416,12 +2416,12 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 10; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); } else { csirs_pdu_rel15->row = 9; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); } break; case NR_CSI_RS_ResourceMapping__nrofPorts_p16: @@ -2430,24 +2430,24 @@ void nr_csirs_scheduling(int Mod_idP, else csirs_pdu_rel15->row = 11; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p24: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 14; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 15; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (7 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 3); } else { csirs_pdu_rel15->row = 13; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); } } break; @@ -2455,18 +2455,18 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 17; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 18; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (7 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 3); } else { csirs_pdu_rel15->row = 16; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); } } break; From d6dedc1f49b4caeeb28344d50d0a04c5e7599b55 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 9 Dec 2021 13:14:19 +0100 Subject: [PATCH 06/16] handling multiple pdcch pdu at fapi and phy --- nfapi/oai_integration/nfapi_pnf.c | 16 +++++++------- .../nfapi/public_inc/nfapi_nr_interface_scf.h | 5 +---- openair1/PHY/NR_TRANSPORT/nr_dci.c | 22 ++++++++----------- openair1/PHY/NR_TRANSPORT/nr_dci.h | 11 +++++----- openair1/PHY/defs_gNB.h | 6 +++-- openair1/SCHED_NR/fapi_nr_l1.c | 17 +++++++------- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 12 +++++----- openair1/SIMULATION/NR_PHY/dlsim.c | 2 +- 8 files changed, 41 insertions(+), 50 deletions(-) diff --git a/nfapi/oai_integration/nfapi_pnf.c b/nfapi/oai_integration/nfapi_pnf.c index 4edbeee342..a0b4a03e04 100644 --- a/nfapi/oai_integration/nfapi_pnf.c +++ b/nfapi/oai_integration/nfapi_pnf.c @@ -1132,8 +1132,8 @@ notifiedFIFO_elt_t *l1tx_message_extract(PHY_VARS_gNB *gNB, int frame, int slot) if (freeRes) { msgTx = (processingData_L1tx_t *)NotifiedFifoData(res); msgTx->num_pdsch_slot=0; - msgTx->pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0; - msgTx->ul_pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0; + msgTx->num_dl_pdcch = 0; + msgTx->num_ul_pdcch = 0; msgTx->slot = slot; msgTx->frame = frame; return freeRes; @@ -1158,11 +1158,11 @@ int pnf_phy_ul_dci_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, proc = &gNB->proc.L1_proc; if (req->numPdus > 0) { - if (req->ul_dci_pdu_list[req->numPdus-1].PDUType == 0) { // copy only the last PDU (PHY can have only one UL PDCCH pdu) - msgTx->ul_pdcch_pdu = req->ul_dci_pdu_list[req->numPdus-1]; // copy the last pdu - } - else { - LOG_E(PHY,"[PNF] UL_DCI_REQ sfn_slot:%d PDU[%d] - unknown pdu type:%d\n", NFAPI_SFNSLOT2DEC(req->SFN, req->Slot), req->numPdus-1, req->ul_dci_pdu_list[req->numPdus-1].PDUType); + for (int i=0; inumPdus; i++) { + if (req->ul_dci_pdu_list[i].PDUType == 0) // only possible value 0: PDCCH PDU + msgTx->ul_pdcch_pdu[i] = req->ul_dci_pdu_list[i]; + else + LOG_E(PHY,"[PNF] UL_DCI_REQ sfn_slot:%d PDU[%d] - unknown pdu type:%d\n", NFAPI_SFNSLOT2DEC(req->SFN, req->Slot), req->numPdus-1, req->ul_dci_pdu_list[req->numPdus-1].PDUType); } } @@ -1244,7 +1244,7 @@ int pnf_phy_dl_tti_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE) { // we trust the scheduler sends only one PDCCH PDU per slot - msgTx->pdcch_pdu = dl_tti_pdu_list[i].pdcch_pdu; // fills the last received PDCCH PDU + msgTx->pdcch_pdu[i] = dl_tti_pdu_list[i].pdcch_pdu; // fills the last received PDCCH PDU } else if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_SSB_PDU_TYPE) { //NFAPI_TRACE(NFAPI_TRACE_INFO, "%s() PDU:%d BCH: pdu_index:%u pdu_length:%d sdu_length:%d BCH_SDU:%x,%x,%x\n", __FUNCTION__, i, pdu_index, bch_pdu->bch_pdu_rel8.length, tx_request_pdu[sfn][sf][pdu_index]->segments[0].segment_length, sdu[0], sdu[1], sdu[2]); diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index 9d245446c8..b7337538ed 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -1400,9 +1400,6 @@ typedef struct } nfapi_nr_ul_dci_request_t; */ - // normally one PDU per coreset per BWP -#define NFAPI_NR_MAX_UL_DCI_PDUS 4 - typedef struct { /// only possible value 0: PDCCH PDU uint16_t PDUType; @@ -1416,7 +1413,7 @@ typedef struct { uint16_t SFN; uint16_t Slot; uint8_t numPdus; - nfapi_nr_ul_dci_request_pdus_t ul_dci_pdu_list[NFAPI_NR_MAX_UL_DCI_PDUS]; + nfapi_nr_ul_dci_request_pdus_t ul_dci_pdu_list[NFAPI_NR_MAX_NB_CORESETS]; } nfapi_nr_ul_dci_request_t; //3.4.5 slot_errors diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 3dd44a7896..ba67822b9f 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -251,20 +251,16 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, } void nr_generate_dci_top(PHY_VARS_gNB *gNB, - nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, - nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu, - uint32_t **gold_pdcch_dmrs, - int32_t *txdataF, - int16_t amp, - NR_DL_FRAME_PARMS *frame_parms) { + processingData_L1tx_t *msgTx, + uint32_t **gold_pdcch_dmrs, + int32_t *txdataF, + int16_t amp, + NR_DL_FRAME_PARMS *frame_parms) { - AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n"); + for (int i=0; inum_ul_pdcch; i++) + nr_generate_dci(gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); + for (int i=0; inum_dl_pdcch; i++) + nr_generate_dci(gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); - if (pdcch_pdu) { - nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); - } - if (ul_dci_pdu) { - nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); - } } diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.h b/openair1/PHY/NR_TRANSPORT/nr_dci.h index 07baaf2728..0077bd2f38 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.h +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.h @@ -30,12 +30,11 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format, uint16_t N_RB); void nr_generate_dci_top(PHY_VARS_gNB *gNB, - nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, - nfapi_nr_dl_tti_pdcch_pdu *ul_pdcch_pdu, - uint32_t **gold_pdcch_dmrs, - int32_t *txdataF, - int16_t amp, - NR_DL_FRAME_PARMS *frame_parms); + processingData_L1tx_t *msgTx, + uint32_t **gold_pdcch_dmrs, + int32_t *txdataF, + int16_t amp, + NR_DL_FRAME_PARMS *frame_parms); void nr_pdcch_scrambling(uint32_t *in, uint32_t size, diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index 11b5112a6c..ff77854898 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -962,12 +962,14 @@ typedef struct processingData_L1tx { int slot; openair0_timestamp timestamp_tx; PHY_VARS_gNB *gNB; - nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu; - nfapi_nr_ul_dci_request_pdus_t ul_pdcch_pdu; + nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu[NFAPI_NR_MAX_NB_CORESETS]; + nfapi_nr_ul_dci_request_pdus_t ul_pdcch_pdu[NFAPI_NR_MAX_NB_CORESETS]; NR_gNB_CSIRS_t csirs_pdu[NUMBER_OF_NR_CSIRS_MAX]; NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; NR_gNB_SSB_t ssb[64]; uint16_t num_pdsch_slot; + int num_dl_pdcch; + int num_ul_pdcch; time_stats_t phy_proc_tx; } processingData_L1tx_t; diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c index 8f315ba214..cfe29690b6 100644 --- a/openair1/SCHED_NR/fapi_nr_l1.c +++ b/openair1/SCHED_NR/fapi_nr_l1.c @@ -166,10 +166,9 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs, number_ul_dci_pdu,number_ul_tti_pdu); - int pdcch_received=0; msgTx->num_pdsch_slot=0; - msgTx->pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0; - msgTx->ul_pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0; + msgTx->num_dl_pdcch=0; + msgTx->num_ul_pdcch=number_ul_dci_pdu; msgTx->slot = slot; msgTx->frame = frame; @@ -183,10 +182,9 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ break; case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE: - AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n"); - msgTx->pdcch_pdu = dl_tti_pdu->pdcch_pdu; - - pdcch_received = 1; + LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot); + msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu; + msgTx->num_dl_pdcch++; break; case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE: @@ -208,8 +206,9 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ } } - if (number_ul_dci_pdu > 0) - msgTx->ul_pdcch_pdu = UL_dci_req->ul_dci_pdu_list[number_ul_dci_pdu-1]; // copy the last pdu + for (int i=0; iul_pdcch_pdu[i] = UL_dci_req->ul_dci_pdu_list[i]; + } pushNotifiedFIFO(gNB->resp_L1_tx,res); diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 1685e206ae..c32463b681 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -158,18 +158,16 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx, VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,0); - int num_dl_dci = msgTx->pdcch_pdu.pdcch_pdu_rel15.numDlDci; - int num_ul_dci = msgTx->ul_pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci; + int num_pdcch_pdus = msgTx->num_ul_pdcch + msgTx->num_dl_pdcch; - if (num_dl_dci > 0 || num_ul_dci > 0) { - LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", - gNB->Mod_id, frame, slot, num_ul_dci, num_dl_dci); + if (num_pdcch_pdus > 0) { + LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL PDCCH PDUs %d/%d)\n", + gNB->Mod_id, frame, slot, msgTx->num_ul_pdcch, msgTx->num_dl_pdcch); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1); nr_generate_dci_top(gNB, - num_dl_dci > 0 ? &msgTx->pdcch_pdu : NULL, - num_ul_dci > 0 ? &msgTx->ul_pdcch_pdu.pdcch_pdu : NULL, + msgTx, gNB->nr_gold_pdcch_dmrs[slot], &gNB->common_vars.txdataF[0][txdataF_offset], AMP, fp); diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index affa7fd803..28e6379adf 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -1045,7 +1045,7 @@ int main(int argc, char **argv) UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round; for (int i=0; iUE_info.pdcch_cand[i] = 0; + gNB_mac->pdcch_cand[i] = 0; if (css_flag == 0) { nr_schedule_ue_spec(0, frame, slot); From bdf5d26b821246c3eb78e7ac7cc9d53b098b7f8b Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 15 Dec 2021 08:44:53 +0100 Subject: [PATCH 07/16] changing the name of a function --- common/utils/nr/nr_common.c | 4 +-- common/utils/nr/nr_common.h | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 8 ++--- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 6 ++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 20 +++++------ .../NR_MAC_gNB/gNB_scheduler_primitives.c | 36 +++++++++---------- 6 files changed, 38 insertions(+), 38 deletions(-) diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index 42c7ef9c7e..65fecea96f 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -473,8 +473,8 @@ int get_subband_size(int NPRB,int size) { } // from start symbol index and nb or symbols to symbol occupation bitmap in a slot -uint16_t startandlength_to_bitmat(int startSymbolIndex, int nrOfSymbols) { - return (((1<state = WAIT_Msg3; @@ -1609,7 +1609,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra int i = 0; while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) { - if (vrb_map[BWPStart + rbStart + i]&startandlength_to_bitmat(startSymbolIndex, nrOfSymbols)) { + if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) { rbStart += i+1; i = 0; } else { @@ -1790,7 +1790,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra CCEIndex, aggregation_level); for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { - vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] |= startandlength_to_bitmat(startSymbolIndex, nrOfSymbols); + vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] |= SL_to_bitmap(startSymbolIndex, nrOfSymbols); } LOG_D(NR_MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 7945042ba5..8212cba08d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -314,7 +314,7 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, uint16_t symStart uint16_t *vrb_map = cc[CC_id].vrb_map; for (int rb = 0; rb < 20; rb++) - vrb_map[rbStart + rb] = startandlength_to_bitmat(symStart, 4); + vrb_map[rbStart + rb] = SL_to_bitmap(symStart, 4); } @@ -392,7 +392,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, int rbSize = 0; uint32_t TBS = 0; do { - if(rbSize < bwpSize && !(vrb_map[rbStart + rbSize]&startandlength_to_bitmat(startSymbolIndex, nrOfSymbols))) + if(rbSize < bwpSize && !(vrb_map[rbStart + rbSize]&SL_to_bitmap(startSymbolIndex, nrOfSymbols))) rbSize++; else{ if (gNB_mac->sched_ctrlCommon->sched_pdsch.mcs<10) @@ -426,7 +426,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, gNB_mac->sched_ctrlCommon->cce_index, gNB_mac->sched_ctrlCommon->aggregation_level); for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) { - vrb_map[rb + rbStart] = startandlength_to_bitmat(startSymbolIndex, nrOfSymbols); + vrb_map[rb + rbStart] = SL_to_bitmap(startSymbolIndex, nrOfSymbols); } return TBS; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 1f5eb4af2b..e5e9bf8f18 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -562,14 +562,14 @@ bool allocate_dl_retransmission(module_id_t module_id, rbStart += rbSize; /* last iteration rbSize was not enough, skip it */ rbSize = 0; while (rbStart < bwpSize && - !(rballoc_mask[rbStart]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) + !(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; if (rbStart >= bwpSize) { LOG_D(NR_MAC, "cannot allocate retransmission for UE %d/RNTI %04x: no resources\n", UE_id, UE_info->rnti[UE_id]); return false; } while (rbStart + rbSize < bwpSize && - (rballoc_mask[rbStart + rbSize]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols)) && + (rballoc_mask[rbStart + rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) && rbSize < retInfo->rbSize) rbSize++; } @@ -584,10 +584,10 @@ bool allocate_dl_retransmission(module_id_t module_id, temp_ps.nrOfLayers = 1; nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps); while (rbStart < bwpSize && - !(rballoc_mask[rbStart]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) + !(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; while (rbStart + rbSize < bwpSize && - (rballoc_mask[rbStart + rbSize]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) + (rballoc_mask[rbStart + rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) rbSize++; uint32_t new_tbs; uint16_t new_rbSize; @@ -670,7 +670,7 @@ bool allocate_dl_retransmission(module_id_t module_id, /* retransmissions: directly allocate */ *n_rb_sched -= sched_ctrl->sched_pdsch.rbSize; for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++) - rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols); + rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); return true; } @@ -832,12 +832,12 @@ void pf_dl(module_id_t module_id, // Freq-demain allocation while (rbStart < bwpSize && - !(rballoc_mask[rbStart]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) + !(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; uint16_t max_rbSize = 1; while (rbStart + max_rbSize < bwpSize && - (rballoc_mask[rbStart + max_rbSize]&startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols))) + (rballoc_mask[rbStart + max_rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) max_rbSize++; sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); @@ -861,7 +861,7 @@ void pf_dl(module_id_t module_id, /* transmissions: directly allocate */ n_rb_sched -= sched_pdsch->rbSize; for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - rballoc_mask[rb + sched_pdsch->rbStart] -= startandlength_to_bitmat(ps->startSymbolIndex, ps->nrOfSymbols); + rballoc_mask[rb + sched_pdsch->rbStart] -= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); } } @@ -904,8 +904,8 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t // if any RB in vrb_map is blocked (1), the current RBG will be 0 rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols // if all the pdsch symbols are free - if((rballoc_mask[i]&startandlength_to_bitmat(startSymbolIndex, nrOfSymbols)) == - startandlength_to_bitmat(startSymbolIndex, nrOfSymbols)) + if((rballoc_mask[i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) == + SL_to_bitmap(startSymbolIndex, nrOfSymbols)) n_rb_sched++; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index a5ba558deb..61168994c8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -380,7 +380,7 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac, f = (r*C + c + n_shift)%(N_regs/L); } for(int rb=0; rbBWPStart + f*B_rb + rb] |= startandlength_to_bitmat(pdcch->StartSymbolIndex, N_symb); + vrb_map[pdcch->BWPStart + f*B_rb + rb] |= SL_to_bitmap(pdcch->StartSymbolIndex, N_symb); } } } @@ -2371,20 +2371,20 @@ void nr_csirs_scheduling(int Mod_idP, csirs_pdu_rel15->row = 1; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row1.buf[0])>>4)&0x0f; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2: csirs_pdu_rel15->row = 2; csirs_pdu_rel15->freq_domain = (((resourceMapping.frequencyDomainAllocation.choice.row2.buf[1]>>4)&0x0f) | ((resourceMapping.frequencyDomainAllocation.choice.row2.buf[0]<<8)&0xff0)); for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4: csirs_pdu_rel15->row = 4; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row4.buf[0])>>5)&0x07; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other: csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.other.buf[0])>>2)&0x3f; @@ -2395,18 +2395,18 @@ void nr_csirs_scheduling(int Mod_idP, case NR_CSI_RS_ResourceMapping__nrofPorts_p2: csirs_pdu_rel15->row = 3; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p4: csirs_pdu_rel15->row = 5; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p8: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 8; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); } else{ int num_k = 0; @@ -2415,12 +2415,12 @@ void nr_csirs_scheduling(int Mod_idP, if(num_k==4) { csirs_pdu_rel15->row = 6; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); } else { csirs_pdu_rel15->row = 7; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); } } break; @@ -2428,12 +2428,12 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 10; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); } else { csirs_pdu_rel15->row = 9; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 1); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); } break; case NR_CSI_RS_ResourceMapping__nrofPorts_p16: @@ -2442,24 +2442,24 @@ void nr_csirs_scheduling(int Mod_idP, else csirs_pdu_rel15->row = 11; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p24: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 14; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 15; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 3); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 3); } else { csirs_pdu_rel15->row = 13; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } } break; @@ -2467,18 +2467,18 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 17; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 18; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 3); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 3); } else { csirs_pdu_rel15->row = 16; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (startandlength_to_bitmat(csirs_pdu_rel15->symb_l0, 2) | startandlength_to_bitmat(csirs_pdu_rel15->symb_l1, 2)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } } break; From bc04d7209b19cc827bb3a1415028b0073ce184ba Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 20 Dec 2021 11:54:57 +0100 Subject: [PATCH 08/16] some improvements from review --- nfapi/oai_integration/nfapi_pnf.c | 5 +-- openair2/LAYER2/NR_MAC_gNB/config.c | 14 +++--- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 12 +++--- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 4 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 43 +++++++++++-------- 5 files changed, 43 insertions(+), 35 deletions(-) diff --git a/nfapi/oai_integration/nfapi_pnf.c b/nfapi/oai_integration/nfapi_pnf.c index a0b4a03e04..639b32b08c 100644 --- a/nfapi/oai_integration/nfapi_pnf.c +++ b/nfapi/oai_integration/nfapi_pnf.c @@ -1159,7 +1159,7 @@ int pnf_phy_ul_dci_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, if (req->numPdus > 0) { for (int i=0; inumPdus; i++) { - if (req->ul_dci_pdu_list[i].PDUType == 0) // only possible value 0: PDCCH PDU + if (req->ul_dci_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE) // only possible value 0: PDCCH PDU msgTx->ul_pdcch_pdu[i] = req->ul_dci_pdu_list[i]; else LOG_E(PHY,"[PNF] UL_DCI_REQ sfn_slot:%d PDU[%d] - unknown pdu type:%d\n", NFAPI_SFNSLOT2DEC(req->SFN, req->Slot), req->numPdus-1, req->ul_dci_pdu_list[req->numPdus-1].PDUType); @@ -1243,8 +1243,7 @@ int pnf_phy_dl_tti_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res); if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE) { - // we trust the scheduler sends only one PDCCH PDU per slot - msgTx->pdcch_pdu[i] = dl_tti_pdu_list[i].pdcch_pdu; // fills the last received PDCCH PDU + msgTx->pdcch_pdu[i] = dl_tti_pdu_list[i].pdcch_pdu; // copies all the received PDCCH PDUs } else if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_SSB_PDU_TYPE) { //NFAPI_TRACE(NFAPI_TRACE_INFO, "%s() PDU:%d BCH: pdu_index:%u pdu_length:%d sdu_length:%d BCH_SDU:%x,%x,%x\n", __FUNCTION__, i, pdu_index, bch_pdu->bch_pdu_rel8.length, tx_request_pdu[sfn][sf][pdu_index]->segments[0].segment_length, sdu[0], sdu[1], sdu[2]); diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index a56206a1d2..7b89e4e993 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -641,14 +641,16 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, bwpd = (void*)CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP; genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; } + else + AssertFatal(1==0,"Either initial BWP or active BWP should always be present\n"); sched_ctrl->search_space = get_searchspace(scc, bwpd, target_ss); sched_ctrl->coreset = get_coreset(Mod_idP, scc, bwpd, sched_ctrl->search_space, target_ss); - UE_info->UE_sched_ctrl[UE_id].sched_pdcch = set_pdcch_structure(RC.nrmac[Mod_idP], - sched_ctrl->search_space, - sched_ctrl->coreset, - scc, - genericParameters, - NULL); + sched_ctrl->sched_pdcch = set_pdcch_structure(RC.nrmac[Mod_idP], + sched_ctrl->search_space, + sched_ctrl->coreset, + scc, + genericParameters, + NULL); sched_ctrl->maxL = 2; } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index e5e9bf8f18..f9a87456f4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -830,14 +830,15 @@ void pf_dl(module_id_t module_id, if (ps->time_domain_allocation != tda) nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps); + const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); // Freq-demain allocation while (rbStart < bwpSize && - !(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) + !(rballoc_mask[rbStart]&slbitmap)) rbStart++; uint16_t max_rbSize = 1; while (rbStart + max_rbSize < bwpSize && - (rballoc_mask[rbStart + max_rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) + (rballoc_mask[rbStart + max_rbSize]&slbitmap)) max_rbSize++; sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); @@ -861,7 +862,7 @@ void pf_dl(module_id_t module_id, /* transmissions: directly allocate */ n_rb_sched -= sched_pdsch->rbSize; for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - rballoc_mask[rb + sched_pdsch->rbStart] -= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); + rballoc_mask[rb + sched_pdsch->rbStart] -= slbitmap; } } @@ -896,6 +897,7 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const uint16_t slbitmap = SL_to_bitmap(startSymbolIndex, nrOfSymbols); uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; uint16_t rballoc_mask[bwpSize]; int n_rb_sched = 0; @@ -904,8 +906,8 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t // if any RB in vrb_map is blocked (1), the current RBG will be 0 rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols // if all the pdsch symbols are free - if((rballoc_mask[i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) == - SL_to_bitmap(startSymbolIndex, nrOfSymbols)) + if((rballoc_mask[i]&slbitmap) == + slbitmap) n_rb_sched++; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 2de5117229..9d3d015aae 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -298,12 +298,12 @@ void nr_preprocessor_phytest(module_id_t module_id, while (true) { /* advance to first free RB */ while (rbStart < bwpSize && - (vrb_map[rbStart + BWPStart]&(((1<nrOfSymbols)-1)<startSymbolIndex))) + (vrb_map[rbStart + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; rbSize = 1; /* iterate until we are at target_dl_bw or no available RBs */ while (rbStart + rbSize < bwpSize && - !(vrb_map[rbStart + rbSize + BWPStart]&(((1<nrOfSymbols)-1)<startSymbolIndex)) && + !(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) && rbSize < target_dl_bw) rbSize++; /* found target_dl_bw? */ diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 61168994c8..5c82beb0df 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -293,6 +293,19 @@ NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac, } +int cce_to_reg_interleaving(const int R, int k, int n_shift, const int C, int L, const int N_regs) { + + int f; // interleaving function + if(R==0) + f = k; + else { + int c = k/R; + int r = k%R; + f = (r*C + c + n_shift)%(N_regs/L); + } + return f; +} + uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, int cc_id, int aggregation, @@ -310,34 +323,26 @@ uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, return -1; } - int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol - int N_symb = coreset->duration; // nb of coreset symbols - int N_regs = N_rb*N_symb; // nb of REGs per coreset - int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset - - int L = pdcch->RegBundleSize; - int R = pdcch->InterleaverSize; - int n_shift = pdcch->ShiftIndex; - int C = R>0 ? N_regs/(L*R) : 0; - int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle + const int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol + const int N_symb = coreset->duration; // nb of coreset symbols + const int N_regs = N_rb*N_symb; // nb of REGs per coreset + const int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset + const int R = pdcch->InterleaverSize; + const int L = pdcch->RegBundleSize; + const int C = R>0 ? N_regs/(L*R) : 0; + const int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle int first_cce; bool taken = false; // flag if the resource for a given candidate are taken // loop over all the available candidates + // this implements TS 38.211 Sec. 7.3.2.2 for(int m=next_cand; mShiftIndex, C, L, N_regs); for(int rb=0; rbBWPStart + f*B_rb + rb]&(((1<StartSymbolIndex)) { + if(vrb_map[pdcch->BWPStart + f*B_rb + rb]&SL_to_bitmap(pdcch->StartSymbolIndex,N_symb)) { taken = true; break; } From 6947202c80e2ea87c8169382e2df4b929f5b1afc Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 20 Dec 2021 15:53:53 +0100 Subject: [PATCH 09/16] sched_pdcch not a pointer in structures --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 18 +++--- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 6 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 10 ++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 8 +-- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 58 +++++++++---------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 14 ++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 12 ++-- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 4 +- 8 files changed, 65 insertions(+), 65 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index c622d67c97..5cca08fc93 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -799,7 +799,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch); + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } @@ -815,7 +815,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t CC_id, aggregation_level, nr_of_candidates, - ra->sched_pdcch, + &ra->sched_pdcch, coreset, 0); if (CCEIndex < 0) { @@ -861,7 +861,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t fill_pdcch_vrb_map(nr_mac, CC_id, - ra->sched_pdcch, + &ra->sched_pdcch, CCEIndex, aggregation_level); @@ -1211,7 +1211,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra CC_id, aggregation_level, nr_of_candidates, - ra->sched_pdcch, + &ra->sched_pdcch, coreset, 0); @@ -1236,7 +1236,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch); + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } @@ -1397,7 +1397,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // Mark the corresponding symbols RBs as used fill_pdcch_vrb_map(nr_mac, CC_id, - ra->sched_pdcch, + &ra->sched_pdcch, CCEIndex, aggregation_level); for (int rb = 0; rb < rbSize; rb++) { @@ -1500,7 +1500,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra CC_id, aggregation_level, nr_of_candidates, - ra->sched_pdcch, + &ra->sched_pdcch, coreset, 0); @@ -1642,7 +1642,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch); + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } @@ -1786,7 +1786,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // Mark the corresponding symbols and RBs as used fill_pdcch_vrb_map(nr_mac, CC_id, - ra->sched_pdcch, + &ra->sched_pdcch, CCEIndex, aggregation_level); for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 8212cba08d..eca68d8573 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -366,7 +366,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, CC_id, gNB_mac->sched_ctrlCommon->aggregation_level, nr_of_candidates, - gNB_mac->sched_ctrlCommon->sched_pdcch, + &gNB_mac->sched_ctrlCommon->sched_pdcch, gNB_mac->sched_ctrlCommon->coreset, 0); @@ -422,7 +422,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, // Mark the corresponding RBs as used fill_pdcch_vrb_map(gNB_mac, CC_id, - gNB_mac->sched_ctrlCommon->sched_pdcch, + &gNB_mac->sched_ctrlCommon->sched_pdcch, gNB_mac->sched_ctrlCommon->cce_index, gNB_mac->sched_ctrlCommon->aggregation_level); for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) { @@ -452,7 +452,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, nr_configure_pdcch(pdcch_pdu_rel15, gNB_mac->sched_ctrlCommon->coreset, NULL, - gNB_mac->sched_ctrlCommon->sched_pdcch); + &gNB_mac->sched_ctrlCommon->sched_pdcch); nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index f9a87456f4..ed796ef007 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -628,7 +628,7 @@ bool allocate_dl_retransmission(module_id_t module_id, /* CC_id = */ 0, sched_ctrl->aggregation_level, nr_of_candidates, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, sched_ctrl->coreset, Y); @@ -657,7 +657,7 @@ bool allocate_dl_retransmission(module_id_t module_id, fill_pdcch_vrb_map(RC.nrmac[module_id], /* CC_id = */ 0, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level); @@ -785,7 +785,7 @@ void pf_dl(module_id_t module_id, /* CC_id = */ 0, sched_ctrl->aggregation_level, nr_of_candidates, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, sched_ctrl->coreset, Y); @@ -816,7 +816,7 @@ void pf_dl(module_id_t module_id, fill_pdcch_vrb_map(mac, /* CC_id = */ 0, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level); @@ -1073,7 +1073,7 @@ void nr_schedule_ue_spec(module_id_t module_id, pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid); NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset; - nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch); + nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch); gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 9d3d015aae..8f32cf136e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -351,7 +351,7 @@ void nr_preprocessor_phytest(module_id_t module_id, CC_id, sched_ctrl->aggregation_level, nr_of_candidates, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, sched_ctrl->coreset, Y); @@ -377,7 +377,7 @@ void nr_preprocessor_phytest(module_id_t module_id, fill_pdcch_vrb_map(RC.nrmac[module_id], CC_id, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level); @@ -517,7 +517,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ CC_id, sched_ctrl->aggregation_level, nr_of_candidates, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, sched_ctrl->coreset, Y); @@ -556,7 +556,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ /* mark the corresponding RBs as used */ fill_pdcch_vrb_map(nr_mac, CC_id, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 5c82beb0df..4f3e04bd07 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -209,41 +209,41 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc, AssertFatal(0, "Couldn't find an adequate searchspace bwp_Dedicated %p\n",bwp_Dedicated); } -NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac, - NR_SearchSpace_t *ss, - NR_ControlResourceSet_t *coreset, - NR_ServingCellConfigCommon_t *scc, - NR_BWP_t *bwp, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) { - - NR_sched_pdcch_t *pdcch = calloc(1,sizeof(NR_sched_pdcch_t)); +NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac, + NR_SearchSpace_t *ss, + NR_ControlResourceSet_t *coreset, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_t *bwp, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) { int sps; + NR_sched_pdcch_t pdcch; + AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId, "coreset id in SS %ld does not correspond to the one in coreset %ld", *ss->controlResourceSetId, coreset->controlResourceSetId); if (bwp) { // This is not for SIB1 if(coreset->controlResourceSetId == 0){ - pdcch->BWPSize = gNB_mac->cset0_bwp_size; - pdcch->BWPStart = gNB_mac->cset0_bwp_start; + pdcch.BWPSize = gNB_mac->cset0_bwp_size; + pdcch.BWPStart = gNB_mac->cset0_bwp_start; } else { - pdcch->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); - pdcch->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); + pdcch.BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); + pdcch.BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); } - pdcch->SubcarrierSpacing = bwp->subcarrierSpacing; - pdcch->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix; + pdcch.SubcarrierSpacing = bwp->subcarrierSpacing; + pdcch.CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix; //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored"); sps = bwp->cyclicPrefix == NULL ? 14 : 12; } else { AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp); - pdcch->BWPSize = type0_PDCCH_CSS_config->num_rbs; - pdcch->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; - pdcch->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch; - pdcch->CyclicPrefix = 0; + pdcch.BWPSize = type0_PDCCH_CSS_config->num_rbs; + pdcch.BWPStart = type0_PDCCH_CSS_config->cset_start_rb; + pdcch.SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch; + pdcch.CyclicPrefix = 0; sps = 14; } @@ -256,29 +256,29 @@ NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac, for (int i=0; i>(sps-1-i))&1) { - pdcch->StartSymbolIndex=i; + pdcch.StartSymbolIndex=i; break; } } - pdcch->DurationSymbols = coreset->duration; + pdcch.DurationSymbols = coreset->duration; //cce-REG-MappingType - pdcch->CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved? + pdcch.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved? NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED; - if (pdcch->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { - pdcch->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize == + if (pdcch.CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { + pdcch.RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize); - pdcch->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize == + pdcch.InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize); AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n"); - pdcch->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId; + pdcch.ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId; } else { - pdcch->RegBundleSize = 6; - pdcch->InterleaverSize = 0; - pdcch->ShiftIndex = 0; + pdcch.RegBundleSize = 6; + pdcch.InterleaverSize = 0; + pdcch.ShiftIndex = 0; } int N_rb = 0; // nb of rbs of coreset per symbol @@ -287,7 +287,7 @@ NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac, N_rb+=((coreset->frequencyDomainResources.buf[i]>>t)&1); } } - pdcch->n_rb = N_rb*=6; // each bit of frequencyDomainResources represents 6 PRBs + pdcch.n_rb = N_rb*=6; // each bit of frequencyDomainResources represents 6 PRBs return pdcch; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 7b33e029d8..2fa5a55d0e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1024,7 +1024,7 @@ bool allocate_ul_retransmission(module_id_t module_id, CC_id, sched_ctrl->aggregation_level, nr_of_candidates, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, sched_ctrl->coreset, Y); @@ -1036,7 +1036,7 @@ bool allocate_ul_retransmission(module_id_t module_id, sched_ctrl->cce_index = CCEIndex; fill_pdcch_vrb_map(RC.nrmac[module_id], CC_id, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level); @@ -1170,7 +1170,7 @@ void pf_ul(module_id_t module_id, CC_id, sched_ctrl->aggregation_level, nr_of_candidates, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, sched_ctrl->coreset, Y); @@ -1194,7 +1194,7 @@ void pf_ul(module_id_t module_id, sched_ctrl->cce_index = CCEIndex; fill_pdcch_vrb_map(RC.nrmac[module_id], CC_id, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level); @@ -1280,7 +1280,7 @@ void pf_ul(module_id_t module_id, CC_id, sched_ctrl->aggregation_level, nr_of_candidates, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, sched_ctrl->coreset, Y); if (CCEIndex<0) { @@ -1350,7 +1350,7 @@ void pf_ul(module_id_t module_id, sched_ctrl->cce_index = CCEIndex; fill_pdcch_vrb_map(RC.nrmac[module_id], CC_id, - sched_ctrl->sched_pdcch, + &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level); @@ -1754,7 +1754,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch); + nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch); nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 524f4598b3..4b876fcf04 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -253,12 +253,12 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_BWP_t *bwp, NR_sched_pdcch_t *pdcch); -NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac, - NR_SearchSpace_t *ss, - NR_ControlResourceSet_t *coreset, - NR_ServingCellConfigCommon_t *scc, - NR_BWP_t *bwp, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); +NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac, + NR_SearchSpace_t *ss, + NR_ControlResourceSet_t *coreset, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_t *bwp, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, int cc_id, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index c18f4b8bba..1073cef16c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -181,7 +181,7 @@ typedef struct { NR_SearchSpace_t *ra_ss; /// RA Coreset NR_ControlResourceSet_t *coreset; - NR_sched_pdcch_t *sched_pdcch; + NR_sched_pdcch_t sched_pdcch; // Beam index uint8_t beam_id; /// CellGroup for UE that is to come (NSA is non-null, null for SA) @@ -551,7 +551,7 @@ typedef struct { /// CCE index and aggregation, should be coherent with cce_list NR_SearchSpace_t *search_space; NR_ControlResourceSet_t *coreset; - NR_sched_pdcch_t *sched_pdcch; + NR_sched_pdcch_t sched_pdcch; /// CCE index and Aggr. Level are shared for PUSCH/PDSCH allocation decisions /// corresponding to the sched_pusch/sched_pdsch structures below From 5eb9e1f421d30155dc57a2b8d56a34e70764a86f Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 26 Jan 2022 10:31:10 +0100 Subject: [PATCH 10/16] compute Y every time --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 4 ++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 4 ++-- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 18 ++++++++---------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 6 +++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 ++ openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 1 - 6 files changed, 17 insertions(+), 18 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 8c3b839f5a..0e98f4d3c9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -613,7 +613,7 @@ bool allocate_dl_retransmission(module_id_t module_id, /* Find a free CCE */ const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); uint8_t nr_of_candidates; for (int i=0; i<5; i++) { // for now taking the lowest value among the available aggregation levels @@ -775,7 +775,7 @@ void pf_dl(module_id_t module_id, /* Find a free CCE */ const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); uint8_t nr_of_candidates; for (int i=0; i<5; i++) { // for now taking the lowest value among the available aggregation levels diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 8f32cf136e..c447708125 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -345,7 +345,7 @@ void nr_preprocessor_phytest(module_id_t module_id, AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid%3][slot]; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], CC_id, @@ -511,7 +511,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid%3][slot]; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); int CCEIndex = find_pdcch_candidate(nr_mac, CC_id, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 4f3e04bd07..89e8d344ed 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1936,19 +1936,18 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP) return -1; } -void set_Y(int Y[3][160], rnti_t rnti) { +uint16_t get_Y(int cid, int slot, rnti_t rnti) { + const int A[3] = {39827, 39829, 39839}; const int D = 65537; + int Y; - Y[0][0] = (A[0] * rnti) % D; - Y[1][0] = (A[1] * rnti) % D; - Y[2][0] = (A[2] * rnti) % D; + Y = (A[cid] * rnti) % D; - for (int s = 1; s < 160; s++) { - Y[0][s] = (A[0] * Y[0][s - 1]) % D; - Y[1][s] = (A[1] * Y[1][s - 1]) % D; - Y[2][s] = (A[2] * Y[2][s - 1]) % D; - } + for (int s = 0; s < slot; s++) + Y = (A[cid] * Y) % D; + + return Y; } int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) { @@ -2032,7 +2031,6 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG UE_info->CellGroup[UE_id] = CellGroup; add_nr_list(&UE_info->list, UE_id); memset(&UE_info->mac_stats[UE_id], 0, sizeof(NR_mac_stats_t)); - set_Y(UE_info->Y[UE_id], rntiP); if (CellGroup && CellGroup->spCellConfig && CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated) compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, mod_idP); NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 8db8062280..e4fcecf059 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1012,7 +1012,7 @@ bool allocate_ul_retransmission(module_id_t module_id, /* Find a free CCE */ const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); uint8_t nr_of_candidates; for (int i=0; i<5; i++) { // for now taking the lowest value among the available aggregation levels @@ -1158,7 +1158,7 @@ void pf_ul(module_id_t module_id, /* if no data, pre-allocate 5RB */ /* Find a free CCE */ const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); uint8_t nr_of_candidates; for (int i=0; i<5; i++) { // for now taking the lowest value among the available aggregation levels @@ -1268,7 +1268,7 @@ void pf_ul(module_id_t module_id, NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid%3][slot]; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); uint8_t nr_of_candidates; for (int i=0; i<5; i++) { // for now taking the lowest value among the available aggregation levels diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 4b876fcf04..ed125fddb0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -318,6 +318,8 @@ void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc, uint8_t num_dmrs_cdm_grps_no_data, NR_pusch_semi_static_t *ps); +uint16_t get_Y(int cid, int slot, rnti_t rnti); + uint8_t nr_get_tpc(int target, uint8_t cqi, int incr); int get_spf(nfapi_nr_config_request_scf_t *cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 1073cef16c..ac0711e936 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -669,7 +669,6 @@ typedef struct { rnti_t rnti[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *CellGroup[MAX_MOBILES_PER_GNB]; /// CCE indexing - int Y[MAX_MOBILES_PER_GNB][3][160]; int m[MAX_MOBILES_PER_GNB]; // UE selected beam index uint8_t UE_beam_index[MAX_MOBILES_PER_GNB]; From aec56c9a860c177b37ccdff94fdd593c0897b4ca Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 27 Jan 2022 12:22:03 +0100 Subject: [PATCH 11/16] additional review comments --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c | 9 +-------- 2 files changed, 2 insertions(+), 9 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index c447708125..30e1d2cc3d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -408,7 +408,7 @@ void nr_preprocessor_phytest(module_id_t module_id, /* mark the corresponding RBs as used */ for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - vrb_map[rb + sched_pdsch->rbStart + BWPStart] = ((1<nrOfSymbols)-1)<startSymbolIndex; + vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 89e8d344ed..8f1bc986fe 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -376,14 +376,7 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac, for (int j=first_cce; jBWPStart + f*B_rb + rb] |= SL_to_bitmap(pdcch->StartSymbolIndex, N_symb); } From e4acf7e21df69669cb708909a48004df7fe9cbf5 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 31 Jan 2022 19:21:06 +0100 Subject: [PATCH 12/16] bugfix for pdu_index in sib1 sched function --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index eca68d8573..0af340725a 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -433,6 +433,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, nfapi_nr_dl_tti_request_body_t *dl_req, + int pdu_index, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, uint32_t TBS, int StartSymbolIndex, @@ -465,7 +466,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, pdsch_pdu_rel15->pduBitmap = 0; pdsch_pdu_rel15->rnti = SI_RNTI; - pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++; + pdsch_pdu_rel15->pduIndex = pdu_index; pdsch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs; pdsch_pdu_rel15->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; @@ -632,7 +633,8 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) candidate_idx, sib1_sdu_length); nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; - nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos); + int pdu_index = gNB_mac->pdu_index[0]++; + nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos); const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs; nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req]; @@ -642,7 +644,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) memcpy(tx_req->TLVs[0].value.direct, sib1_payload, sib1_sdu_length); tx_req->PDU_length = TBS; - tx_req->PDU_index = gNB_mac->pdu_index[0]++; + tx_req->PDU_index = pdu_index; tx_req->num_TLV = 1; tx_req->TLVs[0].length = TBS + 2; gNB_mac->TX_req[CC_id].Number_of_PDUs++; From e346608b048eb41ae2788eefbb584e1faf9de770 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 31 Jan 2022 19:28:08 +0100 Subject: [PATCH 13/16] bugfix after nr_set_pdsch_semi_static --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 0e98f4d3c9..89fccece07 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -584,10 +584,10 @@ bool allocate_dl_retransmission(module_id_t module_id, temp_ps.nrOfLayers = 1; nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps); while (rbStart < bwpSize && - !(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) + !(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols))) rbStart++; while (rbStart + rbSize < bwpSize && - (rballoc_mask[rbStart + rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) + (rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols))) rbSize++; uint32_t new_tbs; uint16_t new_rbSize; From 8dcf0d011d4d65af34cfa3fce29d400fdc0b8681 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 7 Feb 2022 13:40:15 +0100 Subject: [PATCH 14/16] two bugfixes: local pdcch_pdu in ul and wrong initialization place in find_candidate --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 1 + .../NR_MAC_gNB/gNB_scheduler_primitives.c | 19 +++++++++---------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 9 +++++++-- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 14 +++++++------- 4 files changed, 24 insertions(+), 19 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 89fccece07..499ceb859b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -1163,6 +1163,7 @@ void nr_schedule_ue_spec(module_id_t module_id, pdsch_pdu->pduBitmap |= 0x1; // Bit 0: pdschPtrs - Indicates PTRS included (FR2) } + LOG_D(NR_MAC,"Configuring DCI/PDCCH in %d.%d at CCE %d, rnti %x\n", frame,slot,sched_ctrl->cce_index,rnti); /* Fill PDCCH DL DCI PDU */ nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci]; pdcch_pdu->numDlDci++; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 8f1bc986fe..f42fda5092 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -306,13 +306,13 @@ int cce_to_reg_interleaving(const int R, int k, int n_shift, const int C, int L, return f; } -uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, - int cc_id, - int aggregation, - int nr_of_candidates, - NR_sched_pdcch_t *pdcch, - NR_ControlResourceSet_t *coreset, - uint16_t Y){ +int find_pdcch_candidate(gNB_MAC_INST *mac, + int cc_id, + int aggregation, + int nr_of_candidates, + NR_sched_pdcch_t *pdcch, + NR_ControlResourceSet_t *coreset, + uint16_t Y){ uint16_t *vrb_map = mac->common_channels[cc_id].vrb_map; const int next_cand = mac->pdcch_cand[coreset->controlResourceSetId]; @@ -332,12 +332,11 @@ uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, const int C = R>0 ? N_regs/(L*R) : 0; const int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle - int first_cce; - bool taken = false; // flag if the resource for a given candidate are taken // loop over all the available candidates // this implements TS 38.211 Sec. 7.3.2.2 for(int m=next_cand; mShiftIndex, C, L, N_regs); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index e4fcecf059..ccefe94cd6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1512,6 +1512,11 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[CC_id]; ul_dci_req->SFN = frame; ul_dci_req->Slot = slot; + /* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each + * allocated PDCCH so we can easily allocate UE's DCIs independent of any + * CORESET order */ + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_coreset[MAX_NUM_CORESET] = {0}; + NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; @@ -1750,7 +1755,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) NR_SearchSpace_t *ss = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->search_space: RC.nrmac[module_id]->sched_ctrlCommon->search_space; NR_ControlResourceSet_t *coreset = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->coreset: RC.nrmac[module_id]->sched_ctrlCommon->coreset; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pdcch_pdu_coreset[coresetid]; if (!pdcch_pdu) { nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); @@ -1759,7 +1764,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch); - nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; + pdcch_pdu_coreset[coresetid] = pdcch_pdu; } LOG_D(NR_MAC,"Configuring ULDCI/PDCCH in %d.%d at CCE %d, rnti %x\n", frame,slot,sched_ctrl->cce_index,rnti); diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index ed125fddb0..2dbb924d7b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -260,13 +260,13 @@ NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac, NR_BWP_t *bwp, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); -uint8_t find_pdcch_candidate(gNB_MAC_INST *mac, - int cc_id, - int aggregation, - int nr_of_candidates, - NR_sched_pdcch_t *pdcch, - NR_ControlResourceSet_t *coreset, - uint16_t Y); +int find_pdcch_candidate(gNB_MAC_INST *mac, + int cc_id, + int aggregation, + int nr_of_candidates, + NR_sched_pdcch_t *pdcch, + NR_ControlResourceSet_t *coreset, + uint16_t Y); void fill_pdcch_vrb_map(gNB_MAC_INST *mac, int CC_id, From b13ea677a22e29055d52f47608353c780aadaaf9 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 7 Feb 2022 14:22:20 +0100 Subject: [PATCH 15/16] Give warning when UL Failure on NR link --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index ccefe94cd6..843b8678fd 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -711,7 +711,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, UE_info->mac_stats[UE_id].ulsch_DTX++; } if (UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt >= pusch_failure_thres) { - LOG_D(NR_MAC,"Detected UL Failure on PUSCH, stopping scheduling\n"); + LOG_W(NR_MAC,"Detected UL Failure on PUSCH after %d PUSCH DTX, stopping scheduling\n", + UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt); UE_info->UE_sched_ctrl[UE_id].ul_failure = 1; nr_mac_gNB_rrc_ul_failure(gnb_mod_idP,CC_idP,frameP,slotP,rntiP); } From ce9d1bd7c542d3e5f85f203978d13932cd6e09ad Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 7 Feb 2022 14:23:05 +0100 Subject: [PATCH 16/16] Always schedule PUCCH to prevent stale PUCCH config --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index ca641ed1ba..9a1841d088 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -141,7 +141,6 @@ void nr_schedule_pucch(int Mod_idP, for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - if (sched_ctrl->ul_failure==1 && get_softmodem_params()->phy_test==0) continue; const int n = sizeof(sched_ctrl->sched_pucch) / sizeof(*sched_ctrl->sched_pucch); for (int i = 0; i < n; i++) { NR_sched_pucch_t *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[i];