diff --git a/ci-scripts/conf_files/benetel-5g.conf b/ci-scripts/conf_files/benetel-5g.conf index 79b2f7f877..dc86567c1f 100644 --- a/ci-scripts/conf_files/benetel-5g.conf +++ b/ci-scripts/conf_files/benetel-5g.conf @@ -215,11 +215,11 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; +} ); RUs = ( diff --git a/ci-scripts/conf_files/episci/episci_gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/episci/episci_gnb.band78.sa.fr1.106PRB.usrpn310.conf index 01add06e3a..682fb376cf 100644 --- a/ci-scripts/conf_files/episci/episci_gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/episci/episci_gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -36,7 +36,7 @@ gNBs = pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; ul_prbblacklist = "51,52,53,54" - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; pdcch_ConfigSIB1 = ( { controlResourceSetZero = 12; @@ -241,13 +241,13 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - prach_dtx_threshold = 120; - pucch0_dtx_threshold = 150; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + prach_dtx_threshold = 120; + pucch0_dtx_threshold = 150; +} ); RUs = ( diff --git a/ci-scripts/conf_files/episci/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/episci/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf index ab0cf5f469..c0d4c6d4c9 100644 --- a/ci-scripts/conf_files/episci/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/episci/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -36,7 +36,7 @@ gNBs = pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; ul_prbblacklist = "51,52,53,54" - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; pdcch_ConfigSIB1 = ( { @@ -242,13 +242,13 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - prach_dtx_threshold = 120; - pucch0_dtx_threshold = 150; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + prach_dtx_threshold = 120; + pucch0_dtx_threshold = 150; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gNB_SA_DU.conf b/ci-scripts/conf_files/gNB_SA_DU.conf index b03758a006..adcbcd45d0 100644 --- a/ci-scripts/conf_files/gNB_SA_DU.conf +++ b/ci-scripts/conf_files/gNB_SA_DU.conf @@ -227,14 +227,14 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - prach_dtx_threshold = 120; - pucch0_dtx_threshold = 150; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + prach_dtx_threshold = 120; + pucch0_dtx_threshold = 150; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 +} ); RUs = ( diff --git a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf index 16f72c68e5..e3bdde8469 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf @@ -229,13 +229,13 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - prach_dtx_threshold = 120; - pucch0_dtx_threshold = 150; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + prach_dtx_threshold = 120; + pucch0_dtx_threshold = 150; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf index 1a940a51c4..3955b1542e 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf @@ -226,12 +226,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - prach_dtx_threshold = 120; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + prach_dtx_threshold = 120; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf index 4338c00b36..dd9c210c0d 100644 --- a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf @@ -211,12 +211,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf index 1c2133bebe..2400136f9f 100644 --- a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf @@ -195,12 +195,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf index b0a757c9d0..adb79ceb8d 100644 --- a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf @@ -210,12 +210,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - prach_dtx_threshold = 120; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + prach_dtx_threshold = 120; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf index 16456f939c..f5d2da91b7 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf @@ -226,18 +226,17 @@ MACRLCs = ( tr_n_preference = "local_RRC"; # pusch_TargetSNRx10 = 200; # pucch_TargetSNRx10 = 150; - ulsch_max_frame_inactivity = 1; + ulsch_max_frame_inactivity = 0; } ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 4; - prach_dtx_threshold = 120; -# pucch0_dtx_threshold = 150; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 120; +# pucch0_dtx_threshold = 150; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf index 70892930c9..11931d1700 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -236,13 +236,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 4; - prach_dtx_threshold = 120; -# pucch0_dtx_threshold = 150; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 120; +# pucch0_dtx_threshold = 150; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf index 70892930c9..f28c3167b6 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf @@ -82,11 +82,11 @@ gNBs = # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 dl_subcarrierSpacing = 1; - dl_carrierBandwidth = 106; + dl_carrierBandwidth = 162; #initialDownlinkBWP #genericParameters # this is RBstart=0,L=106 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 28875; + initialDLBWPlocationAndBandwidth = 31889; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialDLBWPsubcarrierSpacing = 1; @@ -104,11 +104,11 @@ gNBs = # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 ul_subcarrierSpacing = 1; - ul_carrierBandwidth = 106; + ul_carrierBandwidth = 162; pMax = 20; #initialUplinkBWP #genericParameters - initialULBWPlocationAndBandwidth = 28875; + initialULBWPlocationAndBandwidth = 31889; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialULBWPsubcarrierSpacing = 1; @@ -236,13 +236,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 4; - prach_dtx_threshold = 120; -# pucch0_dtx_threshold = 150; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 120; +# pucch0_dtx_threshold = 150; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf index 6ade355053..9cc8f554e8 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf @@ -194,11 +194,11 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf index b7a04b1f36..249b7e4527 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf @@ -210,12 +210,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 6; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 6; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 +} ); RUs = ( diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf index 3aa8696234..f232106d56 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf @@ -211,11 +211,11 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 6; - } + thread_pool_size = 6; +} ); RUs = ( diff --git a/ci-scripts/xml_files/fr1_sa_quectel.xml b/ci-scripts/xml_files/fr1_sa_quectel.xml index 8b0fc3b541..cd67637ec0 100644 --- a/ci-scripts/xml_files/fr1_sa_quectel.xml +++ b/ci-scripts/xml_files/fr1_sa_quectel.xml @@ -31,9 +31,13 @@ 010000 000001 050000 + 000001 050001 + 000001 070000 + 000001 070001 + 000001 070002 000001 010002 @@ -84,7 +88,7 @@ Ping - Ping: 20pings in 20sec + Ping: 40pings in 40sec nrmodule2_quectel -c 40 1 diff --git a/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml b/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml index 696ec790ff..23cc6d25b8 100644 --- a/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml +++ b/ci-scripts/xml_files/fr1_sa_quectel_162prb.xml @@ -22,18 +22,21 @@ --> TEST-SA-FR1-Tab3 - SA Ping DL UL with QUECTEL + SA 162PRB tasks 1 - 040000 + 042000 000002 010000 000001 - 050000 - 050001 - 070000 - 070001 + 052000 + 000001 + 072000 + 000001 + 072001 + 000001 + 072002 000001 010002 080000 @@ -55,7 +58,7 @@ - + Initialize_eNB Initialize gNB -O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 --log_config.global_log_options level,nocolor,time @@ -81,39 +84,44 @@ - + Ping - Ping: 20pings in 20sec + Ping: 40pings in 40sec nrmodule2_quectel - -c 20 - 5 + -c 40 + 1 + 20 - - Ping - Ping: 100pings in 20sec - nrmodule2_quectel - -c 100 -i 0,2 - 5 - - + Iperf iperf (DL/140Mbps/UDP)(60 sec)(single-ue profile) -u -b 140M -t 60 DL nrmodule2_quectel - 5 + 50 + 50 single-ue - + Iperf iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile) -u -b 3M -t 60 UL nrmodule2_quectel 5 + 95 + single-ue + + + + Iperf + iperf (BIDIR TCP)(10 sec)(single-ue profile) + -t 10 --bidir + BIDIR + nrmodule2_quectel single-ue diff --git a/ci-scripts/xml_files/fr1_sa_quectel_stages.xml b/ci-scripts/xml_files/fr1_sa_quectel_stages.xml index edc4440612..1e10d02180 100644 --- a/ci-scripts/xml_files/fr1_sa_quectel_stages.xml +++ b/ci-scripts/xml_files/fr1_sa_quectel_stages.xml @@ -26,21 +26,21 @@ tasks 1 - 040000 + 041000 000002 010000 000001 - 050000 + 051000 000001 - 070000 + 071000 000001 - 070001 + 071001 000001 - 070002 + 071002 000001 - 070003 + 071003 000001 - 070004 + 071004 000001 010002 080000 @@ -62,7 +62,7 @@ - + Initialize_eNB Initialize gNB -O ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 --log_config.global_log_options level,nocolor,time @@ -88,9 +88,9 @@ - + Ping - Ping: 20pings in 20sec + Ping: 40pings in 40sec nrmodule2_quectel -c 40 1 @@ -98,7 +98,7 @@ - + Iperf iperf (DL/10Mbps/UDP)(30 sec)(single-ue profile) -u -b 10M -t 30 @@ -108,7 +108,7 @@ 95 single-ue - + Iperf iperf (DL/20Mbps/UDP)(30 sec)(single-ue profile) -u -b 20M -t 30 @@ -118,7 +118,7 @@ 95 single-ue - + Iperf iperf (DL/40Mbps/UDP)(30 sec)(single-ue profile) -u -b 40M -t 30 @@ -128,7 +128,7 @@ 95 single-ue - + Iperf iperf (DL/60Mbps/UDP)(30 sec)(single-ue profile) -u -b 60M -t 30 @@ -138,14 +138,14 @@ 95 single-ue - + Iperf iperf (DL/90Mbps/UDP)(30 sec)(single-ue profile) -u -b 90M -t 30 DL nrmodule2_quectel - 5 - 95 + 10 + 90 single-ue diff --git a/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml b/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml index fcc772b8f4..e6520fc5fc 100644 --- a/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml +++ b/ci-scripts/xml_files/lte_2x2_tm2_quectel.xml @@ -102,8 +102,8 @@ Iperf - iperf (DL/26Mbps/UDP)(60 sec)(single-ue profile) - -u -b 26M -t 60 + iperf (DL/1Mbps/UDP)(60 sec)(single-ue profile) + -u -b 1M -t 60 DL nrmodule2_quectel 5 diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 7160a52620..52d551875e 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1,4 +1,4 @@ -#/* +#/* # * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more # * contributor license agreements. See the NOTICE file distributed with # * this work for additional information regarding copyright ownership. diff --git a/common/utils/LOG/DOC/addconsoletrace.md b/common/utils/LOG/DOC/addconsoletrace.md index 9ab90cf120..d5ede8c57d 100644 --- a/common/utils/LOG/DOC/addconsoletrace.md +++ b/common/utils/LOG/DOC/addconsoletrace.md @@ -3,6 +3,7 @@ ```C LOG_E(,,,...) LOG_W(,,,...) +LOG_A(,,,...) LOG_I(,,,...) LOG_D(,,,...) LOG_T(,,,...) @@ -14,9 +15,10 @@ these macros are used in place of the printf C function. The additionnal ***comp |:---------|:---------------|:---------------|----------------:| | LOG_E | E | 0 | error | | LOG_W | W | 1 | warning | -| LOG_I | I | 2 | informational | -| LOG_D | D | 3 | debug | -| LOG_T | T | 4 | trace | +| LOG_A | A | 2 | analysis | +| LOG_I | I | 3 | informational | +| LOG_D | D | 4 | debug | +| LOG_T | T | 5 | trace | component list is defined as an `enum` in [log.h](https://gitlab.eurecom.fr/oai/openairinterface5g/blob/develop/common/utils/LOG/log.h). A new component can be defined by adding an item in this type, it must also be defined in the T tracer [T_messages.txt ](https://gitlab.eurecom.fr/oai/openairinterface5g/blob/develop/common/utils/T/T_messages.txt). diff --git a/common/utils/LOG/DOC/rtusage.md b/common/utils/LOG/DOC/rtusage.md index d7c748952d..041c29e688 100644 --- a/common/utils/LOG/DOC/rtusage.md +++ b/common/utils/LOG/DOC/rtusage.md @@ -7,9 +7,9 @@ All logging facility parameters are defined in the log_config section. Some para | name | type | default | description | |:---:|:---:|:---:|:----| -| `global_log_level` | `pre-defined string of char` | `info` | Allows printing of messages up to the specified level. Available levels, from lower to higher are `error`,`warn`,`info`,`debug`,`trace` | +| `global_log_level` | `pre-defined string of char` | `info` | Allows printing of messages up to the specified level. Available levels, from lower to higher are `error`,`warn`,`analysis`,`info`,`debug`,`trace` | | `global_log_online` | `boolean` | 1 (=true) | If false, all console messages are discarded, whatever their level | -| `global_log_options` | `list of pre-defined string of char` | | 3 options can be specified to trigger the information added in the header of the message: `nocolor`, disable color usage in log messages, usefull when redirecting logs to a file, where escape sequences used for color selection can be annoying, `level`, add a one letter level id in the message header (T,D,I,W,E for trace, debug, info, warning, error),`thread`, add the thread name in the message header, `function`, adds the function name, `line_num`, adds the line number, `time` adds the time since process starts| +| `global_log_options` | `list of pre-defined string of char` | | 5 options can be specified to trigger the information added in the header of the message: `nocolor`, disable color usage in log messages, usefull when redirecting logs to a file, where escape sequences used for color selection can be annoying, `level`, add a one letter level id in the message header (T,D,I,A,W,E for trace, debug, info, analysis, warning, error),`thread`, add the thread name in the message header, `thread_id`, adds the thread ID in the message header, `function`, adds the function name, `line_num`, adds the line number, `time` adds the time since process starts| ### Component specific parameters | name | type | default | description | diff --git a/common/utils/LOG/log.c b/common/utils/LOG/log.c index 28134d6db1..29e4f718c6 100644 --- a/common/utils/LOG/log.c +++ b/common/utils/LOG/log.c @@ -65,6 +65,7 @@ char logmem_filename[1024] = {0}; mapping log_level_names[] = { {"error", OAILOG_ERR}, {"warn", OAILOG_WARNING}, + {"analysis", OAILOG_ANALYSIS}, {"info", OAILOG_INFO}, {"debug", OAILOG_DEBUG}, {"trace", OAILOG_TRACE}, @@ -78,14 +79,15 @@ mapping log_options[] = { {"line_num", FLAG_FILE_LINE }, {"function", FLAG_FUNCT}, {"time", FLAG_TIME}, + {"thread_id", FLAG_THREAD_ID}, {NULL,-1} }; mapping log_maskmap[] = LOG_MASKMAP_INIT; -char *log_level_highlight_start[] = {LOG_RED, LOG_ORANGE, "", LOG_BLUE, LOG_CYBL}; /*!< \brief Optional start-format strings for highlighting */ -char *log_level_highlight_end[] = {LOG_RESET,LOG_RESET,LOG_RESET, LOG_RESET,LOG_RESET}; /*!< \brief Optional end-format strings for highlighting */ +char *log_level_highlight_start[] = {LOG_RED, LOG_ORANGE, LOG_GREEN, "", LOG_BLUE, LOG_CYBL}; /*!< \brief Optional start-format strings for highlighting */ +char *log_level_highlight_end[] = {LOG_RESET, LOG_RESET, LOG_RESET, LOG_RESET, LOG_RESET, LOG_RESET}; /*!< \brief Optional end-format strings for highlighting */ static void log_output_memory(log_component_t *c, const char *file, const char *func, int line, int comp, int level, const char* format,va_list args); @@ -501,6 +503,7 @@ int logInit (void) return 0; } +#include static inline int log_header(log_component_t *c, char *log_buffer, int buffsize, @@ -514,32 +517,45 @@ static inline int log_header(log_component_t *c, char threadname[64]; if (flag & FLAG_THREAD ) { threadname[0]='{'; - if ( pthread_getname_np(pthread_self(), threadname+1,61) != 0) + if (pthread_getname_np(pthread_self(), threadname + 1, sizeof(threadname) - 3) != 0) strcpy(threadname+1, "?thread?"); - strcat(threadname,"}"); + strcat(threadname,"} "); } else { threadname[0]=0; } - + char l[32]; if (flag & FLAG_FILE_LINE && flag & FLAG_FUNCT ) - snprintf(l, sizeof l," (%s:%d) ", func, line); + snprintf(l, sizeof l, "(%s:%d) ", func, line); else if (flag & FLAG_FILE_LINE) - sprintf(l," (%d) ", line); + snprintf(l, sizeof l, "(%d) ", line); + else if (flag & FLAG_FUNCT) + snprintf(l, sizeof l, "(%s) ", func); else - l[0]=0; + l[0] = 0; char timeString[32]; if ( flag & FLAG_TIME ) { struct timespec t; - clock_gettime(CLOCK_MONOTONIC, &t); - snprintf(timeString, sizeof t,"%05.3f",t.tv_sec+t.tv_nsec/1.0e9); + if (clock_gettime(CLOCK_MONOTONIC, &t) == -1) + abort(); + snprintf(timeString, sizeof(timeString), "%lu.%06lu ", + t.tv_sec, + t.tv_nsec / 1000); } else { - timeString[0]=0; + timeString[0] = 0; } - return snprintf(log_buffer, buffsize, "%s%s[%s]%c%s %s ", - timeString, + + char threadIdString[32]; + if (flag & FLAG_THREAD_ID) { + snprintf(threadIdString, sizeof(threadIdString), "%08lx ", syscall(__NR_gettid)); + } else { + threadIdString[0] = 0; + } + return snprintf(log_buffer, buffsize, "%s%s%s[%s] %c %s%s", flag & FLAG_NOCOLOR ? "" : log_level_highlight_start[level], + timeString, + threadIdString, c->name, flag & FLAG_LEVEL ? g_log->level2string[level] : ' ', l, @@ -547,53 +563,6 @@ static inline int log_header(log_component_t *c, ); } -#if LOG_MINIMAL -#include -void logMinimal(int comp, int level, const char *format, ...) -{ - struct timespec ts; - if (clock_gettime(CLOCK_MONOTONIC, &ts) == -1) - abort(); - - char buf[MAX_LOG_TOTAL]; - int n = snprintf(buf, sizeof(buf), "%lu.%06lu %08lx [%s] %c ", - ts.tv_sec, - ts.tv_nsec / 1000, - syscall(__NR_gettid), - g_log->log_component[comp].name, - level); - if (n < 0 || n >= sizeof(buf)) - { - fprintf(stderr, "%s: n=%d\n", __func__, n); - return; - } - - va_list args; - va_start(args, format); - int m = vsnprintf(buf + n, sizeof(buf) - n, format, args); - va_end(args); - - if (m < 0) - { - fprintf(stderr, "%s: n=%d m=%d\n", __func__, n, m); - return; - } - - int len = n + m; - if (len > sizeof(buf) - 1) - { - len = sizeof(buf) - 1; - } - if (buf[len - 1] != '\n') - { - buf[len++] = '\n'; - } - - __attribute__((unused)) - int unused = write(STDOUT_FILENO, buf, len); -} -#endif // LOG_MINIMAL - void logRecord_mt(const char *file, const char *func, int line, @@ -864,7 +833,14 @@ void flush_mem_to_file(void) } } -char logmem_log_level[NUM_LOG_LEVEL]={'E','W','I','D','T'}; +const char logmem_log_level[NUM_LOG_LEVEL] = { + [OAILOG_ERR] = 'E', + [OAILOG_WARNING] = 'W', + [OAILOG_ANALYSIS] = 'A', + [OAILOG_INFO] = 'I', + [OAILOG_DEBUG] = 'D', + [OAILOG_TRACE] = 'T', +}; static void log_output_memory(log_component_t *c, const char *file, const char *func, int line, int comp, int level, const char* format,va_list args) { @@ -878,12 +854,32 @@ static void log_output_memory(log_component_t *c, const char *file, const char * char log_buffer[MAX_LOG_TOTAL]; // make sure that for log trace the extra info is only printed once, reset when the level changes - if (level < OAILOG_TRACE) - len += log_header(c, log_buffer, MAX_LOG_TOTAL, file, func, line, level); - len += vsnprintf(log_buffer+len, MAX_LOG_TOTAL-len, format, args); - if ( !((g_log->flag | c->flag) & FLAG_NOCOLOR) ) - len+=snprintf(log_buffer+len, MAX_LOG_TOTAL-len, "%s", log_level_highlight_end[level]); - + if (level < OAILOG_TRACE) { + int n = log_header(c, log_buffer+len, MAX_LOG_TOTAL, file, func, line, level); + if (n > 0) { + len += n; + if (len > MAX_LOG_TOTAL) { + len = MAX_LOG_TOTAL; + } + } + } + int n = vsnprintf(log_buffer+len, MAX_LOG_TOTAL-len, format, args); + if (n > 0) { + len += n; + if (len > MAX_LOG_TOTAL) { + len = MAX_LOG_TOTAL; + } + } + if ( !((g_log->flag | c->flag) & FLAG_NOCOLOR) ) { + int n = snprintf(log_buffer+len, MAX_LOG_TOTAL-len, "%s", log_level_highlight_end[level]); + if (n > 0) { + len += n; + if (len > MAX_LOG_TOTAL) { + len = MAX_LOG_TOTAL; + } + } + } + // OAI printf compatibility if(log_mem_flag==1){ if(log_mem_d[log_mem_side].enable_flag==1){ @@ -919,6 +915,7 @@ static void log_output_memory(log_component_t *c, const char *file, const char * } } }else{ + AssertFatal(len >= 0 && len <= MAX_LOG_TOTAL, "Bad len %d\n", len); if (write(fileno(c->stream), log_buffer, len)) {}; } } diff --git a/common/utils/LOG/log.h b/common/utils/LOG/log.h index 350337b61b..46c73427c1 100644 --- a/common/utils/LOG/log.h +++ b/common/utils/LOG/log.h @@ -90,11 +90,12 @@ extern "C" { # define OAILOG_DISABLE -1 /*!< \brief disable all LOG messages, cannot be used in LOG macros, use only in LOG module */ # define OAILOG_ERR 0 /*!< \brief critical error conditions, impact on "must have" functionalities */ # define OAILOG_WARNING 1 /*!< \brief warning conditions, shouldn't happen but doesn't impact "must have" functionalities */ -# define OAILOG_INFO 2 /*!< \brief informational messages most people don't need, shouldn't impact real-time behavior */ -# define OAILOG_DEBUG 3 /*!< \brief first level debug-level messages, for developers, may impact real-time behavior */ -# define OAILOG_TRACE 4 /*!< \brief second level debug-level messages, for developers, likely impact real-time behavior*/ +# define OAILOG_ANALYSIS 2 /*!< \brief informational messages most people don't need, shouldn't impact real-time behavior */ +# define OAILOG_INFO 3 /*!< \brief informational messages most people don't need, shouldn't impact real-time behavior */ +# define OAILOG_DEBUG 4 /*!< \brief first level debug-level messages, for developers, may impact real-time behavior */ +# define OAILOG_TRACE 5 /*!< \brief second level debug-level messages, for developers, likely impact real-time behavior*/ -#define NUM_LOG_LEVEL 5 /*!< \brief the number of message levels users have with LOG (OAILOG_DISABLE is not available to user as a level, so it is not included)*/ +#define NUM_LOG_LEVEL 6 /*!< \brief the number of message levels users have with LOG (OAILOG_DISABLE is not available to user as a level, so it is not included)*/ /* @}*/ @@ -127,6 +128,7 @@ extern "C" { #define FLAG_FUNCT 0x0020 #define FLAG_FILE_LINE 0x0040 #define FLAG_TIME 0x0100 +#define FLAG_THREAD_ID 0x0200 #define FLAG_INITIALIZED 0x8000 #define SET_LOG_OPTION(O) g_log->flag = (g_log->flag | O) @@ -390,7 +392,7 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int /* optname help paramflags XXXptr defXXXval type numelt */ /*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ #define LOG_GLOBALPARAMS_DESC { \ - {LOG_CONFIG_STRING_GLOBAL_LOG_LEVEL, "Default log level for all componemts\n", 0, strptr:(char **)&gloglevel, defstrval:log_level_names[2].name, TYPE_STRING, 0}, \ + {LOG_CONFIG_STRING_GLOBAL_LOG_LEVEL, "Default log level for all componemts\n", 0, strptr:(char **)&gloglevel, defstrval:log_level_names[3].name, TYPE_STRING, 0}, \ {LOG_CONFIG_STRING_GLOBAL_LOG_ONLINE, "Default console output option, for all components\n", 0, iptr:&(consolelog), defintval:1, TYPE_INT, 0}, \ {LOG_CONFIG_STRING_GLOBAL_LOG_OPTIONS, LOG_CONFIG_HELP_OPTIONS, 0, strlistptr:NULL, defstrlistval:NULL, TYPE_STRINGLIST, 0} \ } @@ -408,32 +410,14 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int // debugging macros #define LOG_F LOG_I /* because LOG_F was originaly to dump a message or buffer but is also used as a regular level...., to dump use LOG_DUMPMSG */ -#if LOG_MINIMAL - - void logMinimal(int component, int level, const char *format, ...) __attribute__((format(printf, 3, 4))); -# define LOG_E(COMPONENT, ...) do if (1) logMinimal(COMPONENT, 'E', __VA_ARGS__); while (0) -# define LOG_W(COMPONENT, ...) do if (1) logMinimal(COMPONENT, 'W', __VA_ARGS__); while (0) -# define LOG_A(COMPONENT, ...) do if (1) logMinimal(COMPONENT, 'A', __VA_ARGS__); while (0) /* logs intended for analysis */ -# define LOG_I(COMPONENT, ...) do if (1) logMinimal(COMPONENT, 'I', __VA_ARGS__); while (0) -# define LOG_D(COMPONENT, ...) do if (0) logMinimal(COMPONENT, 'D', __VA_ARGS__); while (0) -# define LOG_T(COMPONENT, ...) do if (0) logMinimal(COMPONENT, 'T', __VA_ARGS__); while (0) - -# define LOG_M(FILE, VECTOR, DATA, LEN, DEC, FORMAT) ((void) 0) -# define LOG_DUMPFLAG(D) 0 -# define LOG_DEBUGFLAG(D) 0 -# define LOG_DUMPMSG(C, B, S, X...) ((void) 0) -# define VLOG(C, L, F, ARGS) ((void) 0) - -#else // LOG_MINIMAL - # if T_TRACER /* per component, level dependent macros */ -# define LOG_E(c, x...) do { T(T_LEGACY_ ## c ## _ERROR, T_PRINTF(x)) ; if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_ERR ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ERR, x) ;} } while (0) -# define LOG_W(c, x...) do { T(T_LEGACY_ ## c ## _WARNING, T_PRINTF(x)); if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_WARNING) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_WARNING, x);} } while (0) -# define LOG_A LOG_I -# define LOG_I(c, x...) do { T(T_LEGACY_ ## c ## _INFO, T_PRINTF(x)) ; if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_INFO ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ;} } while (0) -# define LOG_D(c, x...) do { T(T_LEGACY_ ## c ## _DEBUG, T_PRINTF(x)) ; if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_DEBUG ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_DEBUG, x) ;} } while (0) -# define LOG_T(c, x...) do { T(T_LEGACY_ ## c ## _TRACE, T_PRINTF(x)) ; if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_TRACE ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_TRACE, x) ;} } while (0) +# define LOG_E(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_ERR ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ERR, x) ;} else { T(T_LEGACY_ ## c ## _ERROR, T_PRINTF(x)) ;}} while (0) +# define LOG_W(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_WARNING) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_WARNING, x) ;} else { T(T_LEGACY_ ## c ## _WARNING, T_PRINTF(x)) ;}} while (0) +# define LOG_A(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_ANALYSIS) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ANALYSIS, x) ;} else { T(T_LEGACY_ ## c ## _INFO, T_PRINTF(x)) ;}} while (0) +# define LOG_I(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_INFO ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ;} else { T(T_LEGACY_ ## c ## _INFO, T_PRINTF(x)) ;}} while (0) +# define LOG_D(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_DEBUG ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_DEBUG, x) ;} else { T(T_LEGACY_ ## c ## _DEBUG, T_PRINTF(x)) ;}} while (0) +# define LOG_T(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_TRACE ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_TRACE, x) ;} else { T(T_LEGACY_ ## c ## _TRACE, T_PRINTF(x)) ;}} while (0) # define VLOG(c,l, f, args) do { if (T_stdout) { if( g_log->log_component[c].level >= l ) vlogRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, l, f, args) ;} } while (0) /* macro used to dump a buffer or a message as in openair2/RRC/LTE/RRC_eNB.c, replaces LOG_F macro */ # define LOG_DUMPMSG(c, f, b, s, x...) do { if(g_log->dump_mask & f) log_dump(c, b, s, LOG_DUMP_CHAR, x) ;} while (0) /* */ @@ -449,8 +433,8 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int # define LOG_E(c, x...) do { if( g_log->log_component[c].level >= OAILOG_ERR ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ERR, x) ;} while (0) # define LOG_W(c, x...) do { if( g_log->log_component[c].level >= OAILOG_WARNING) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_WARNING, x) ;} while (0) +# define LOG_A(c, x...) do { if( g_log->log_component[c].level >= OAILOG_ANALYSIS) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ANALYSIS, x);} while (0) # define LOG_I(c, x...) do { if( g_log->log_component[c].level >= OAILOG_INFO ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ;} while (0) -# define LOG_A LOG_I # define LOG_D(c, x...) do { if( g_log->log_component[c].level >= OAILOG_DEBUG ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_DEBUG, x) ;} while (0) # define LOG_T(c, x...) do { if( g_log->log_component[c].level >= OAILOG_TRACE ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_TRACE, x) ;} while (0) # define VLOG(c,l, f, args) do { if( g_log->log_component[c].level >= l ) vlogRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, l, f, args) ; } while (0) @@ -464,7 +448,6 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int # define LOG_VAR(A,B) A B # define T_ACTIVE(a) (0) # endif /* T_TRACER */ -#endif // LOG_MINIMAL /* avoid warnings for variables only used in LOG macro's but set outside debug section */ #define GCC_NOTUSED __attribute__((unused)) diff --git a/common/utils/T/tracer/macpdu2wireshark.c b/common/utils/T/tracer/macpdu2wireshark.c index b9284748e4..a024f18145 100644 --- a/common/utils/T/tracer/macpdu2wireshark.c +++ b/common/utils/T/tracer/macpdu2wireshark.c @@ -362,6 +362,16 @@ void nr_dl_retx(void *_d, event e) e.e[d->nr_dl_retx_data].bsize, NO_PREAMBLE); } +void nr_dl_retx(void *_d, event e) +{ + ev_data *d = _d; + + trace_nr(d, NR_DIRECTION_DOWNLINK, NR_C_RNTI, e.e[d->nr_dl_retx_rnti].i, + e.e[d->nr_dl_retx_frame].i, e.e[d->nr_dl_retx_slot].i, + e.e[d->nr_dl_retx_data].b, e.e[d->nr_dl_retx_data].bsize, + NO_PREAMBLE); +} + void nr_mib(void *_d, event e) { ev_data *d = _d; @@ -396,6 +406,7 @@ void setup_data(ev_data *d, void *database, int ul_id, int dl_id, int mib_id, { database_event_format f; int i; + d->ul_rnti = -1; d->ul_frame = -1; d->ul_subframe = -1; @@ -568,6 +579,20 @@ void setup_data(ev_data *d, void *database, int ul_id, int dl_id, int mib_id, d->nr_dl_retx_data == -1) goto error; + /* NR dl retx: rnti, frame, slot, data */ + f = get_format(database, nr_dl_retx_id); + + for (i = 0; i < f.count; i++) { + G("rnti", "int", d->nr_dl_retx_rnti); + G("frame", "int", d->nr_dl_retx_frame); + G("slot", "int", d->nr_dl_retx_slot); + G("data", "buffer", d->nr_dl_retx_data); + } + + if (d->nr_dl_retx_rnti == -1 || d->nr_dl_retx_frame == -1 || + d->nr_dl_retx_slot == -1 || d->nr_dl_retx_data == -1) + goto error; + /* NR MIB: frame, slot, data */ f = get_format(database, nr_mib_id); diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index de8a0522e0..d823fcc1c4 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -500,6 +500,12 @@ int get_subband_size(int NPRB,int size) { } + +// from start symbol index and nb or symbols to symbol occupation bitmap in a slot +uint16_t SL_to_bitmap(int startSymbolIndex, int nrOfSymbols) { + return ((1<ul_indication_stats, "UL Indication", NULL, NULL, output+stroff); stroff += print_meas_log(&gNB->rx_pusch_stats, "PUSCH inner-receiver", NULL, NULL, output+stroff); stroff += print_meas_log(&gNB->ulsch_decoding_stats, "PUSCH decoding", NULL, NULL, output+stroff); + stroff += print_meas_log(&gNB->schedule_response_stats, "Schedule Response",NULL,NULL, output+stroff); if (ru->feprx) stroff += print_meas_log(&ru->ofdm_demod_stats,"feprx",NULL,NULL, output+stroff); if (ru->feptx_ofdm) { @@ -343,6 +344,7 @@ void *nrL1_stats_thread(void *param) { reset_meas(&gNB->ul_indication_stats); reset_meas(&gNB->rx_pusch_stats); reset_meas(&gNB->ulsch_decoding_stats); + reset_meas(&gNB->schedule_response_stats); while (!oai_exit) { sleep(1); @@ -412,8 +414,8 @@ void init_gNB_Tpool(int inst) { // ULSCH decoding threadpool gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); int numCPU = sysconf(_SC_NPROCESSORS_ONLN); - LOG_I(PHY,"Number of threads requested in config file: %d, Number of threads available on this machine: %d\n",gNB->pusch_proc_threads,numCPU); - int threadCnt = min(numCPU, gNB->pusch_proc_threads); + LOG_I(PHY,"Number of threads requested in config file: %d, Number of threads available on this machine: %d\n",gNB->thread_pool_size,numCPU); + int threadCnt = min(numCPU, gNB->thread_pool_size); if (threadCnt < 2) LOG_E(PHY,"Number of threads for gNB should be more than 1. Allocated only %d\n",threadCnt); char pool[80]; sprintf(pool,"-1"); @@ -443,7 +445,7 @@ void init_gNB_Tpool(int inst) { initNotifiedFIFO(gNB->L1_tx_out); // we create 2 threads for L1 tx processing - for (int i=0; i < 1; i++) { + for (int i=0; i < 2; i++) { notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t),0,gNB->L1_tx_out,tx_func); processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx); init_DLSCH_struct(gNB, msgDataTx); diff --git a/nfapi/oai_integration/nfapi_pnf.c b/nfapi/oai_integration/nfapi_pnf.c index 2c317687cf..205f879964 100644 --- a/nfapi/oai_integration/nfapi_pnf.c +++ b/nfapi/oai_integration/nfapi_pnf.c @@ -1122,11 +1122,11 @@ int pnf_phy_ul_dci_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, proc = &gNB->proc.L1_proc; if (req->numPdus > 0) { - if (req->ul_dci_pdu_list[req->numPdus-1].PDUType == 0) { // copy only the last PDU (PHY can have only one UL PDCCH pdu) - msgTx->ul_pdcch_pdu = req->ul_dci_pdu_list[req->numPdus-1]; // copy the last pdu - } - else { - LOG_E(PHY,"[PNF] UL_DCI_REQ sfn_slot:%d PDU[%d] - unknown pdu type:%d\n", NFAPI_SFNSLOT2DEC(req->SFN, req->Slot), req->numPdus-1, req->ul_dci_pdu_list[req->numPdus-1].PDUType); + for (int i=0; inumPdus; i++) { + if (req->ul_dci_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE) // only possible value 0: PDCCH PDU + msgTx->ul_pdcch_pdu[i] = req->ul_dci_pdu_list[i]; + else + LOG_E(PHY,"[PNF] UL_DCI_REQ sfn_slot:%d PDU[%d] - unknown pdu type:%d\n", NFAPI_SFNSLOT2DEC(req->SFN, req->Slot), req->numPdus-1, req->ul_dci_pdu_list[req->numPdus-1].PDUType); } } @@ -1207,8 +1207,7 @@ int pnf_phy_dl_tti_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res); if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE) { - // we trust the scheduler sends only one PDCCH PDU per slot - msgTx->pdcch_pdu = dl_tti_pdu_list[i].pdcch_pdu; // fills the last received PDCCH PDU + msgTx->pdcch_pdu[i] = dl_tti_pdu_list[i].pdcch_pdu; // copies all the received PDCCH PDUs } else if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_SSB_PDU_TYPE) { //NFAPI_TRACE(NFAPI_TRACE_INFO, "%s() PDU:%d BCH: pdu_index:%u pdu_length:%d sdu_length:%d BCH_SDU:%x,%x,%x\n", __FUNCTION__, i, pdu_index, bch_pdu->bch_pdu_rel8.length, tx_request_pdu[sfn][sf][pdu_index]->segments[0].segment_length, sdu[0], sdu[1], sdu[2]); diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index c124ad9fb9..9681c1d19b 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -1402,9 +1402,6 @@ typedef struct } nfapi_nr_ul_dci_request_t; */ - // normally one PDU per coreset per BWP -#define NFAPI_NR_MAX_UL_DCI_PDUS 4 - typedef struct { /// only possible value 0: PDCCH PDU uint16_t PDUType; @@ -1418,7 +1415,7 @@ typedef struct { uint16_t SFN; uint16_t Slot; uint8_t numPdus; - nfapi_nr_ul_dci_request_pdus_t ul_dci_pdu_list[NFAPI_NR_MAX_UL_DCI_PDUS]; + nfapi_nr_ul_dci_request_pdus_t ul_dci_pdu_list[NFAPI_NR_MAX_NB_CORESETS]; } nfapi_nr_ul_dci_request_t; //3.4.5 slot_errors diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi_p5.c b/nfapi/open-nFAPI/nfapi/src/nfapi_p5.c index 32b87f80e0..ce9c22f7f7 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi_p5.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi_p5.c @@ -263,8 +263,8 @@ static uint8_t pack_nr_pnf_config_request(void *msg, uint8_t **ppWritePackedMsg, static uint8_t pack_pnf_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) { nfapi_pnf_config_request_t *pNfapiMsg = (nfapi_pnf_config_request_t *)msg; - return (pack_tlv(NFAPI_PNF_PHY_RF_TAG, &pNfapiMsg->pnf_phy_rf_config, ppWritePackedMsg, end, &pack_pnf_phy_rf_config_value) && - push8(pNfapiMsg->num_tlvs,ppWritePackedMsg,end) && + return (push8(pNfapiMsg->num_tlvs,ppWritePackedMsg,end) && + pack_tlv(NFAPI_PNF_PHY_RF_TAG, &pNfapiMsg->pnf_phy_rf_config, ppWritePackedMsg, end, &pack_pnf_phy_rf_config_value) && pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config)); } @@ -697,8 +697,7 @@ static uint8_t pack_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_ pack_tlv(NFAPI_NFAPI_NMM_GSM_FREQUENCY_BANDS_TAG, &(pNfapiMsg->nfapi_config.nmm_gsm_frequency_bands), ppWritePackedMsg, end, &pack_nmm_frequency_bands_value) && pack_tlv(NFAPI_NFAPI_NMM_UMTS_FREQUENCY_BANDS_TAG, &(pNfapiMsg->nfapi_config.nmm_umts_frequency_bands), ppWritePackedMsg, end, &pack_nmm_frequency_bands_value) && pack_tlv(NFAPI_NFAPI_NMM_LTE_FREQUENCY_BANDS_TAG, &(pNfapiMsg->nfapi_config.nmm_lte_frequency_bands), ppWritePackedMsg, end, &pack_nmm_frequency_bands_value) && - pack_tlv(NFAPI_NFAPI_NMM_UPLINK_RSSI_SUPPORTED_TAG, &(pNfapiMsg->nfapi_config.nmm_uplink_rssi_supported), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config) ); + pack_tlv(NFAPI_NFAPI_NMM_UPLINK_RSSI_SUPPORTED_TAG, &(pNfapiMsg->nfapi_config.nmm_uplink_rssi_supported), ppWritePackedMsg, end, &pack_uint8_tlv_value)); } @@ -724,47 +723,50 @@ static uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uin pack_tlv(NFAPI_NR_CONFIG_UL_K0_TAG, &(pNfapiMsg->carrier_config.ul_k0[1]), ppWritePackedMsg, end, &pack_uint16_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG, &(pNfapiMsg->carrier_config.uplink_bandwidth), ppWritePackedMsg, end, &pack_uint16_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG, &(pNfapiMsg->carrier_config.uplink_frequency), ppWritePackedMsg, end, &pack_uint32_tlv_value) && - + pack_tlv(NFAPI_NR_CONFIG_FREQUENCY_SHIFT_7P5KHZ_TAG, &(pNfapiMsg->carrier_config.frequency_shift_7p5khz), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG, &(pNfapiMsg->cell_config.frame_duplex_type), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - pack_tlv(NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - + pack_tlv(NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), ppWritePackedMsg, end, &pack_uint16_tlv_value) && + + pack_tlv(NFAPI_NR_CONFIG_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->prach_config.prach_multiple_carriers_in_a_band), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_PRACH_CONFIG_INDEX_TAG, &(pNfapiMsg->prach_config.prach_ConfigurationIndex), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG, &(pNfapiMsg->prach_config.prach_sequence_length), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG, &(pNfapiMsg->prach_config.restricted_set_config), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_SSB_PER_RACH_TAG, &(pNfapiMsg->prach_config.ssb_per_rach), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - pack_tlv(NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG, &(pNfapiMsg->prach_config.prach_sub_c_spacing), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - pack_tlv(NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_root_sequence_index), ppWritePackedMsg, end, &pack_uint16_tlv_value) && - pack_tlv(NFAPI_NR_CONFIG_K1_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].k1), ppWritePackedMsg, end, &pack_uint16_tlv_value) && - pack_tlv(NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_zero_corr_conf), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG, &(pNfapiMsg->prach_config.prach_sub_c_spacing), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_root_sequence_index), ppWritePackedMsg, end, &pack_uint16_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_K1_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].k1), ppWritePackedMsg, end, &pack_uint16_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_zero_corr_conf), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].num_root_sequences), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - pack_tlv(NFAPI_NR_CONFIG_SCS_COMMON_TAG, &(pNfapiMsg->ssb_config.scs_common), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_BCH_PAYLOAD_TAG, &(pNfapiMsg->ssb_config.bch_payload), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG, &(pNfapiMsg->ssb_config.ss_pbch_power), ppWritePackedMsg, end, &pack_uint32_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_BETA_PSS_TAG, &(pNfapiMsg->ssb_table.beta_pss), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_MIB_TAG, &(pNfapiMsg->ssb_table.MIB), ppWritePackedMsg, end, &pack_uint32_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[0].ssb_mask), ppWritePackedMsg, end, &pack_uint32_tlv_value) && - pack_tlv(NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), ppWritePackedMsg, end, &pack_uint32_tlv_value) && - + // TODO: Not sure what's going on, ssb_mask_list[1] packing below seems to match unpack, but is causing problems + // pack_tlv(NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), ppWritePackedMsg, end, &pack_uint32_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_BEAM_ID_TAG, &(pNfapiMsg->ssb_table.ssb_beam_id_list[0].beam_id), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG, &(pNfapiMsg->ssb_table.ssb_offset_point_a), ppWritePackedMsg, end, &pack_uint16_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_SSB_PERIOD_TAG, &(pNfapiMsg->ssb_table.ssb_period), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG, &(pNfapiMsg->ssb_table.ssb_subcarrier_offset), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->ssb_table.ss_pbch_multiple_carriers_in_a_band), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_CONFIG_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, &(pNfapiMsg->ssb_table.multiple_cells_ss_pbch_in_a_carrier), ppWritePackedMsg, end, &pack_uint8_tlv_value) && pack_tlv(NFAPI_NR_CONFIG_TDD_PERIOD_TAG, &(pNfapiMsg->tdd_table.tdd_period), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv4), ppWritePackedMsg, end, &pack_ipv4_address_value) && - pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), ppWritePackedMsg, end, &pack_ipv6_address_value) && - pack_tlv(NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), ppWritePackedMsg, end, &pack_uint16_tlv_value) && + pack_tlv(NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv4), ppWritePackedMsg, end, &pack_ipv4_address_value) && pack_tlv(NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv6), ppWritePackedMsg, end, &pack_ipv6_address_value) && pack_tlv(NFAPI_NR_NFAPI_P7_VNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_port), ppWritePackedMsg, end, &pack_uint16_tlv_value) && - //pack_tlv(NFAPI_NR_NFAPI_RF_BANDS_TAG, &(pNfapiMsg->nfapi_config.rf_bands), ppWritePackedMsg, end, &pack_rf_bands_value) && - pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG, &(pNfapiMsg->nfapi_config.timing_info_mode), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG, &(pNfapiMsg->nfapi_config.timing_info_period), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv4), ppWritePackedMsg, end, &pack_ipv4_address_value) && + pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), ppWritePackedMsg, end, &pack_ipv6_address_value) && + pack_tlv(NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), ppWritePackedMsg, end, &pack_uint16_tlv_value) && pack_tlv(NFAPI_NR_NFAPI_TIMING_WINDOW_TAG, &(pNfapiMsg->nfapi_config.timing_window), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - //pack_tlv(NFAPI_NR_NFAPI_UPLINK_UES_PER_SUBFRAME_TAG, &(pNfapiMsg->nfapi_config.ul_ue_per_sf), ppWritePackedMsg, end, &pack_uint8_tlv_value) && - - pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config) ); + pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG, &(pNfapiMsg->nfapi_config.timing_info_mode), ppWritePackedMsg, end, &pack_uint8_tlv_value) && + pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG, &(pNfapiMsg->nfapi_config.timing_info_period), ppWritePackedMsg, end, &pack_uint8_tlv_value)); } static uint8_t pack_nr_config_response(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) { @@ -775,7 +777,7 @@ static uint8_t pack_nr_config_response(void *msg, uint8_t **ppWritePackedMsg, ui static uint8_t pack_config_response(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) { nfapi_config_response_t *pNfapiMsg = (nfapi_config_response_t *)msg; - return ( push8(pNfapiMsg->error_code, ppWritePackedMsg, end) && + return ( push32(pNfapiMsg->error_code, ppWritePackedMsg, end) && pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config) ); } @@ -1346,7 +1348,8 @@ static uint8_t unpack_pnf_config_request(uint8_t **ppReadPackedMsg, uint8_t *end unpack_tlv_t unpack_fns[] = { { NFAPI_PNF_PHY_RF_TAG, &pNfapiMsg->pnf_phy_rf_config, &unpack_pnf_phy_rf_config_value}, }; - return unpack_tlv_list(unpack_fns, sizeof(unpack_fns)/sizeof(unpack_tlv_t), ppReadPackedMsg, end, config, &pNfapiMsg->vendor_extension); + return (pull8(ppReadPackedMsg, &pNfapiMsg->num_tlvs, end) && + unpack_tlv_list(unpack_fns, sizeof(unpack_fns)/sizeof(unpack_tlv_t), ppReadPackedMsg, end, config, &pNfapiMsg->vendor_extension)); } @@ -1722,13 +1725,14 @@ static uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, for(int i=0;i<40;i++) pNfapiMsg->tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list = (nfapi_nr_max_num_of_symbol_per_slot_t*) malloc(14*sizeof(nfapi_nr_max_num_of_symbol_per_slot_t)); - pNfapiMsg->prach_config.num_prach_fd_occasions_list=(nfapi_nr_num_prach_fd_occasions_t *) malloc(sizeof(nfapi_nr_num_prach_fd_occasions_t)); for(int i = 0; i < 40; i++){ //unpacking tdd slot config for(int symbol = 0; symbol<14;symbol++){ pull8(ppReadPackedMsg,&pNfapiMsg->tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list[symbol].slot_config.value, end); } } + pNfapiMsg->prach_config.num_prach_fd_occasions_list=(nfapi_nr_num_prach_fd_occasions_t *) malloc(sizeof(nfapi_nr_num_prach_fd_occasions_t)); + unpack_tlv_t unpack_fns[] = { { NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG, &(pNfapiMsg->carrier_config.dl_bandwidth), &unpack_uint16_tlv_value}, @@ -1741,8 +1745,13 @@ static uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, { NFAPI_NR_CONFIG_UL_K0_TAG, &(pNfapiMsg->carrier_config.ul_k0[1]), &unpack_uint16_tlv_value}, { NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG, &(pNfapiMsg->carrier_config.uplink_bandwidth), &unpack_uint16_tlv_value}, { NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG, &(pNfapiMsg->carrier_config.uplink_frequency), &unpack_uint32_tlv_value}, + { NFAPI_NR_CONFIG_FREQUENCY_SHIFT_7P5KHZ_TAG, &(pNfapiMsg->carrier_config.frequency_shift_7p5khz), &unpack_uint8_tlv_value}, + { NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG, &(pNfapiMsg->cell_config.frame_duplex_type), &unpack_uint8_tlv_value}, - { NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), &unpack_uint8_tlv_value}, + { NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), &unpack_uint16_tlv_value}, + + { NFAPI_NR_CONFIG_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->prach_config.prach_multiple_carriers_in_a_band), &unpack_uint8_tlv_value}, + { NFAPI_NR_CONFIG_PRACH_CONFIG_INDEX_TAG, &(pNfapiMsg->prach_config.prach_ConfigurationIndex), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG, &(pNfapiMsg->prach_config.prach_sequence_length), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG, &(pNfapiMsg->prach_config.restricted_set_config), &unpack_uint8_tlv_value}, @@ -1754,24 +1763,32 @@ static uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, { NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].num_root_sequences), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_SCS_COMMON_TAG, &(pNfapiMsg->ssb_config.scs_common), &unpack_uint8_tlv_value}, + { NFAPI_NR_CONFIG_BCH_PAYLOAD_TAG, &(pNfapiMsg->ssb_config.bch_payload), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG, &(pNfapiMsg->ssb_config.ss_pbch_power), &unpack_uint32_tlv_value}, + { NFAPI_NR_CONFIG_BETA_PSS_TAG, &(pNfapiMsg->ssb_table.beta_pss), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_MIB_TAG, &(pNfapiMsg->ssb_table.MIB), &unpack_uint32_tlv_value}, { NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[0].ssb_mask), &unpack_uint32_tlv_value}, - { NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), &unpack_uint32_tlv_value}, - + // TODO: Not sure what's going on, ssb_mask_list[1] unpacking below seems to match pack, but is causing problems + // { NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), &unpack_uint32_tlv_value}, + { NFAPI_NR_CONFIG_BEAM_ID_TAG, &(pNfapiMsg->ssb_table.ssb_beam_id_list[0].beam_id), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG, &(pNfapiMsg->ssb_table.ssb_offset_point_a), &unpack_uint16_tlv_value}, { NFAPI_NR_CONFIG_SSB_PERIOD_TAG, &(pNfapiMsg->ssb_table.ssb_period), &unpack_uint8_tlv_value}, { NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG, &(pNfapiMsg->ssb_table.ssb_subcarrier_offset), &unpack_uint8_tlv_value}, + { NFAPI_NR_CONFIG_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->ssb_table.ss_pbch_multiple_carriers_in_a_band), &unpack_uint8_tlv_value}, + { NFAPI_NR_CONFIG_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, &(pNfapiMsg->ssb_table.multiple_cells_ss_pbch_in_a_carrier), &unpack_uint8_tlv_value}, + { NFAPI_NR_CONFIG_TDD_PERIOD_TAG, &(pNfapiMsg->tdd_table.tdd_period), &unpack_uint8_tlv_value}, - { NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), &unpack_ipv6_address_value}, - { NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), &unpack_uint16_tlv_value}, + { NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv4), &unpack_ipv4_address_value}, { NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv6), &unpack_ipv6_address_value}, { NFAPI_NR_NFAPI_P7_VNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_port), &unpack_uint16_tlv_value}, + { NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv4), &unpack_ipv4_address_value}, + { NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), &unpack_ipv6_address_value}, + { NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), &unpack_uint16_tlv_value}, + { NFAPI_NR_NFAPI_TIMING_WINDOW_TAG, &(pNfapiMsg->nfapi_config.timing_window), &unpack_uint8_tlv_value}, { NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG, &(pNfapiMsg->nfapi_config.timing_info_mode), &unpack_uint8_tlv_value}, { NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG, &(pNfapiMsg->nfapi_config.timing_info_period), &unpack_uint8_tlv_value}, - { NFAPI_NR_NFAPI_TIMING_WINDOW_TAG, &(pNfapiMsg->nfapi_config.timing_window), &unpack_uint8_tlv_value}, }; return ( pull8(ppReadPackedMsg, &pNfapiMsg->num_tlv, end) && diff --git a/openair1/PHY/CODING/crc_byte.c b/openair1/PHY/CODING/crc_byte.c index d1c3917c2c..7e37abcf81 100644 --- a/openair1/PHY/CODING/crc_byte.c +++ b/openair1/PHY/CODING/crc_byte.c @@ -38,7 +38,7 @@ #include "coding_defs.h" #include "assertions.h" -#if USE_INTEL_CRC +#if USE_INTEL_CRC #include "crc.h" #endif /*ref 36-212 v8.6.0 , pp 8-9 */ @@ -159,7 +159,7 @@ unsigned int crc24a (unsigned char * inptr, if ( bitlen % 8 || !USE_INTEL_CRC ) { unsigned int crc = 0; int resbit= (bitlen % 8); - + while (octetlen-- > 0) { // printf("crc24a: in %x => crc %x\n",crc,*inptr); crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)]; @@ -192,7 +192,7 @@ unsigned int crc24b (unsigned char * inptr, int bitlen) { int octetlen = bitlen / 8; /* Change in octets */ - + if ( bitlen % 8 || !USE_INTEL_CRC ) { unsigned int crc = 0; int resbit = (bitlen % 8); diff --git a/openair1/PHY/INIT/nr_init_ue.c b/openair1/PHY/INIT/nr_init_ue.c index c193733aef..a516f20165 100644 --- a/openair1/PHY/INIT/nr_init_ue.c +++ b/openair1/PHY/INIT/nr_init_ue.c @@ -20,28 +20,19 @@ */ #include "phy_init.h" -#include "SCHED_UE/sched_UE.h" #include "PHY/phy_extern_nr_ue.h" -//#include "SIMULATION/TOOLS/sim.h" -/*#include "RadioResourceConfigCommonSIB.h" -#include "RadioResourceConfigDedicated.h" -#include "TDD-Config.h" -#include "MBSFN-SubframeConfigList.h"*/ #include "openair1/PHY/defs_RU.h" #include "openair1/PHY/impl_defs_nr.h" #include "common/utils/LOG/vcd_signal_dumper.h" #include "assertions.h" -#include +#include "PHY/MODULATION/nr_modulation.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" -//#include "PHY/LTE_REFSIG/lte_refsig.h" -#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h" -#include "PHY/INIT/phy_init.h" #include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_REFSIG/ul_ref_seq_nr.h" #include "PHY/NR_REFSIG/refsig_defs_ue.h" #include "PHY/NR_REFSIG/nr_refsig.h" -#include +#include "PHY/MODULATION/nr_modulation.h" #if 0 void phy_config_harq_ue(module_id_t Mod_id, diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 523a86b99d..d233eb9ba6 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -250,20 +250,16 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, } // for (int d=0;dnumDlDci;d++) } -void nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, - nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu, +void nr_generate_dci_top(processingData_L1tx_t *msgTx, uint32_t **gold_pdcch_dmrs, int32_t *txdataF, int16_t amp, NR_DL_FRAME_PARMS *frame_parms) { - AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n"); + for (int i=0; inum_ul_pdcch; i++) + nr_generate_dci(&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); + for (int i=0; inum_dl_pdcch; i++) + nr_generate_dci(&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); - if (pdcch_pdu) { - nr_generate_dci(&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); - } - if (ul_dci_pdu) { - nr_generate_dci(&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms); - } } diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.h b/openair1/PHY/NR_TRANSPORT/nr_dci.h index d763891f28..bdc8509d12 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.h +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.h @@ -29,13 +29,11 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format, nfapi_nr_rnti_type_e rnti_type, uint16_t N_RB); -void nr_generate_dci_top( - nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, - nfapi_nr_dl_tti_pdcch_pdu *ul_pdcch_pdu, - uint32_t **gold_pdcch_dmrs, - int32_t *txdataF, - int16_t amp, - NR_DL_FRAME_PARMS *frame_parms); +void nr_generate_dci_top(processingData_L1tx_t *msgTx, + uint32_t **gold_pdcch_dmrs, + int32_t *txdataF, + int16_t amp, + NR_DL_FRAME_PARMS *frame_parms); void nr_pdcch_scrambling(uint32_t *in, uint32_t size, diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c index 2e8813cbd2..920522aa35 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c @@ -183,12 +183,13 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32))); bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); start_meas(dlsch_encoding_stats); - nr_dlsch_encoding(gNB, - harq->pdu, frame, slot, dlsch, frame_parms, output, - tinput,tprep,tparity,toutput, - dlsch_rate_matching_stats, - dlsch_interleaving_stats, - dlsch_segmentation_stats); + + if (nr_dlsch_encoding(gNB, + harq->pdu, frame, slot, dlsch, frame_parms,output,tinput,tprep,tparity,toutput, + dlsch_rate_matching_stats, + dlsch_interleaving_stats, + dlsch_segmentation_stats) == -1) + return; stop_meas(dlsch_encoding_stats); #ifdef DEBUG_DLSCH printf("PDSCH encoding:\nPayload:\n"); diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c index 819fccc588..b006eaae89 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c @@ -254,7 +254,7 @@ void ldpc8blocks( void *p) { #ifdef DEBUG_DLSCH_CODING for (int i =0; i<16; i++) - printf("output ratematching e[%d]= %d r_offset %u\n", i,harq->e[i+r_offset], r_offset); + printf("output ratematching e[%d]= %d r_offset %u\n", i,e[i], r_offset); #endif nr_interleaving_ldpc(E, @@ -370,11 +370,11 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, //d_tmp[r] = &harq->d[r][0]; //channel_input[r] = &harq->d[r][0]; #ifdef DEBUG_DLSCH_CODING - LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, impp->F); + LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, impp.F); LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,impp.n_segments); LOG_D(PHY,"input %d %d %d %d %d \n", harq->c[r][0], harq->c[r][1], harq->c[r][2],harq->c[r][3], harq->c[r][4]); - for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++) { + for (int cnt =0 ; cnt < 22*(*impp.Zc)/8; cnt ++) { LOG_D(PHY,"%d ", harq->c[r][cnt]); } @@ -405,6 +405,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req=pullTpool(&nf, gNB->threadPool); delNotifiedFIFO_elt(req); nbJobs--; + } VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_OUT); return 0; diff --git a/openair1/PHY/NR_TRANSPORT/nr_pss.c b/openair1/PHY/NR_TRANSPORT/nr_pss.c index 44f74f1230..8564efe3de 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_pss.c +++ b/openair1/PHY/NR_TRANSPORT/nr_pss.c @@ -30,49 +30,41 @@ int nr_generate_pss( int32_t *txdataF, nfapi_nr_config_request_scf_t* config, NR_DL_FRAME_PARMS *frame_parms) { - int i,k,l,m; - int16_t a; - int16_t d_pss[NR_PSS_LENGTH]; int16_t x[NR_PSS_LENGTH]; const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1}; - uint8_t Nid2 = config->cell_config.phy_cell_id.value % 3; - /// Sequence generation - for (i=0; i < 7; i++) + for (int i=0; i < 7; i++) x[i] = x_initial[i]; - for (i=0; i < (NR_PSS_LENGTH - 7); i++) { + for (int i=0; i < (NR_PSS_LENGTH - 7); i++) { x[i+7] = (x[i + 4] + x[i]) %2; } - for (i=0; i < NR_PSS_LENGTH; i++) { - m = (i + 43*Nid2)%(NR_PSS_LENGTH); - d_pss[i] = (1 - 2*x[m]) * 23170; - } - #ifdef NR_PSS_DEBUG write_output("d_pss.m", "d_pss", (void*)d_pss, NR_PSS_LENGTH, 1, 0); printf("PSS: ofdm_symbol_size %d, first_carrier_offset %d\n",frame_parms->ofdm_symbol_size,frame_parms->first_carrier_offset); #endif /// Resource mapping - a = amp; - // PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from - k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and - if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size; + // PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from + int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and + if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size; - l = ssb_start_symbol; + int l = ssb_start_symbol; - for (m = 0; m < NR_PSS_LENGTH; m++) { - // printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size); - ((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15; - k++; + uint8_t Nid2 = config->cell_config.phy_cell_id.value % 3; + for (int i = 0; i < NR_PSS_LENGTH; i++) { + int m = (i + 43*Nid2)%(NR_PSS_LENGTH); + int16_t d_pss = (1 - 2*x[m]) * 23170; + // printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size); + ((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (((int16_t)amp) * d_pss) >> 15; + k++; - if (k >= frame_parms->ofdm_symbol_size) - k-=frame_parms->ofdm_symbol_size; - } + if (k >= frame_parms->ofdm_symbol_size) + k-=frame_parms->ofdm_symbol_size; + } #ifdef NR_PSS_DEBUG LOG_M("pss_0.m", "pss_0", diff --git a/openair1/PHY/NR_TRANSPORT/nr_sss.c b/openair1/PHY/NR_TRANSPORT/nr_sss.c index 12f89ba36f..5181f6bac1 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_sss.c +++ b/openair1/PHY/NR_TRANSPORT/nr_sss.c @@ -29,36 +29,28 @@ int nr_generate_sss( int32_t *txdataF, nfapi_nr_config_request_scf_t* config, NR_DL_FRAME_PARMS *frame_parms) { - int i,k,l; - int m0, m1; - int Nid, Nid1, Nid2; - //int16_t a; - int16_t d_sss[NR_SSS_LENGTH]; - int16_t x0[NR_SSS_LENGTH], x1[NR_SSS_LENGTH]; + int16_t x0[NR_SSS_LENGTH]; + int16_t x1[NR_SSS_LENGTH]; const int x0_initial[7] = { 1, 0, 0, 0, 0, 0, 0 }; const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 }; /// Sequence generation - Nid = config->cell_config.phy_cell_id.value; - Nid2 = Nid % 3; - Nid1 = (Nid - Nid2)/3; + int Nid = config->cell_config.phy_cell_id.value; + int Nid2 = Nid % 3; + int Nid1 = (Nid - Nid2)/3; - for ( i=0 ; i < 7 ; i++) { + for (int i=0; i < 7; i++) { x0[i] = x0_initial[i]; x1[i] = x1_initial[i]; } - for ( i=0 ; i < NR_SSS_LENGTH - 7 ; i++) { + for (int i=0; i < NR_SSS_LENGTH - 7; i++) { x0[i+7] = (x0[i + 4] + x0[i]) % 2; x1[i+7] = (x1[i + 1] + x1[i]) % 2; } - m0 = 15*(Nid1/112) + (5*Nid2); - m1 = Nid1 % 112; - - for (i = 0; i < NR_SSS_LENGTH ; i++) { - d_sss[i] = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 23170; - } + int m0 = 15*(Nid1/112) + (5*Nid2); + int m1 = Nid1 % 112; #ifdef NR_SSS_DEBUG write_output("d_sss.m", "d_sss", (void*)d_sss, NR_SSS_LENGTH, 1, 1); @@ -66,17 +58,18 @@ int nr_generate_sss( int32_t *txdataF, /// Resource mapping - // SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from - k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and - l = ssb_start_symbol + 2; + // SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from + int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and + int l = ssb_start_symbol + 2; - for (int m = 0; m < NR_SSS_LENGTH; m++) { - ((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (amp * d_sss[m]) >> 15; - k++; + for (int i = 0; i < NR_SSS_LENGTH; i++) { + int16_t d_sss = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 23170; + ((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (((int16_t)amp) * d_sss) >> 15; + k++; - if (k >= frame_parms->ofdm_symbol_size) - k-=frame_parms->ofdm_symbol_size; - } + if (k >= frame_parms->ofdm_symbol_size) + k-=frame_parms->ofdm_symbol_size; + } #ifdef NR_SSS_DEBUG // write_output("sss_0.m", "sss_0", (void*)txdataF[0][l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1); #endif diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 22c8ff0b0e..56d87866ed 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -328,7 +328,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, LOG_D(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n", mcs[i],seq_index,corr_re[0][0],corr_im[0][0], 10*log10((double)corr_re[0][0]*corr_re[0][0] + (double)corr_im[0][0]*corr_im[0][0])); - if (pucch_pdu->nr_of_symbols==2) + if (pucch_pdu->nr_of_symbols==2) LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n", mcs[i],seq_index,corr_re[0][1],corr_im[0][1], 10*log10((double)corr_re[0][1]*corr_re[0][1] + (double)corr_im[0][1]*corr_im[0][1])); @@ -431,9 +431,11 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->num_harq = 1; uci_pdu->harq->harq_confidence_level = no_conf ? 1 : 0; uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1); + uci_pdu->harq->harq_list[0].harq_value = !(index&0x01); LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d (0 pass, 1 fail) with confidence level %d (0 is good, 1 is bad) xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d, energy %f, sync_pos %d\n", frame,slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10,10*log10((double)sigenergy),gNB->ulsch_stats[0].sync_pos); + if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); uci_pdu->sr->sr_indication = (index>1) ? 1 : 0; @@ -447,6 +449,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->num_harq = 2; uci_pdu->harq->harq_confidence_level = (no_conf) ? 1 : 0; uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2); + uci_pdu->harq->harq_list[1].harq_value = !(index&0x01); uci_pdu->harq->harq_list[0].harq_value = !((index>>1)&0x01); LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d (0 pass, 1 fail) and %d with confidence level %d (0 is good, 1 is bad), xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d,sync_pos %d\n", diff --git a/openair1/PHY/TOOLS/time_meas.h b/openair1/PHY/TOOLS/time_meas.h index 56d8299470..023640aa0e 100644 --- a/openair1/PHY/TOOLS/time_meas.h +++ b/openair1/PHY/TOOLS/time_meas.h @@ -142,6 +142,7 @@ static inline void start_meas(time_stats_t *ts) { } else { ts->in = rdtsc_oai(); } + if ((ts->trials&16383)<10) ts->max=0; } } diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index e0a67f29e7..0ba2a5dfd1 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -865,6 +865,7 @@ typedef struct PHY_VARS_gNB_s { time_stats_t rx_pusch_stats; time_stats_t ul_indication_stats; + time_stats_t schedule_response_stats; time_stats_t ulsch_decoding_stats; time_stats_t ulsch_rate_unmatching_stats; time_stats_t ulsch_ldpc_decoding_stats; @@ -889,7 +890,7 @@ typedef struct PHY_VARS_gNB_s { notifiedFIFO_t *resp_RU_tx; tpool_t *threadPool; int nbDecode; - uint8_t pusch_proc_threads; + uint8_t thread_pool_size; int number_of_nr_dlsch_max; int number_of_nr_ulsch_max; void * scopeData; @@ -950,12 +951,14 @@ typedef struct processingData_L1tx { int slot; openair0_timestamp timestamp_tx; PHY_VARS_gNB *gNB; - nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu; - nfapi_nr_ul_dci_request_pdus_t ul_pdcch_pdu; + nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu[NFAPI_NR_MAX_NB_CORESETS]; + nfapi_nr_ul_dci_request_pdus_t ul_pdcch_pdu[NFAPI_NR_MAX_NB_CORESETS]; NR_gNB_CSIRS_t csirs_pdu[NUMBER_OF_NR_CSIRS_MAX]; NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; NR_gNB_SSB_t ssb[64]; uint16_t num_pdsch_slot; + int num_dl_pdcch; + int num_ul_pdcch; time_stats_t phy_proc_tx; } processingData_L1tx_t; diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c index 7819e04b5e..5a996d8222 100644 --- a/openair1/SCHED_NR/fapi_nr_l1.c +++ b/openair1/SCHED_NR/fapi_nr_l1.c @@ -148,6 +148,8 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id); gNB = RC.gNB[Mod_id]; + start_meas(&gNB->schedule_response_stats); + nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config; int slot_type = nr_slot_select(cfg,frame,slot); @@ -164,10 +166,9 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ res = pullTpool(gNB->L1_tx_free, gNB->threadPool); processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res); - int pdcch_received=0; msgTx->num_pdsch_slot=0; - msgTx->pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0; - msgTx->ul_pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0; + msgTx->num_dl_pdcch=0; + msgTx->num_ul_pdcch=number_ul_dci_pdu; msgTx->slot = slot; msgTx->frame = frame; @@ -181,16 +182,14 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ break; case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE: - AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n"); - msgTx->pdcch_pdu = dl_tti_pdu->pdcch_pdu; - - pdcch_received = 1; + LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot); + msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu; + msgTx->num_dl_pdcch++; break; case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE: LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot); - handle_nfapi_nr_csirs_pdu(msgTx,frame,slot, - &dl_tti_pdu->csi_rs_pdu); + handle_nfapi_nr_csirs_pdu(msgTx,frame,slot,&dl_tti_pdu->csi_rs_pdu); break; case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE: @@ -201,13 +200,13 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ pduIndex,TX_req->pdu_list[pduIndex].num_TLV); uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct; AssertFatal(msgTx->num_pdsch_slot < gNB->number_of_nr_dlsch_max,"Number of PDSCH PDUs %d exceeded the limit %d\n", - msgTx->num_pdsch_slot,gNB->number_of_nr_dlsch_max); + msgTx->num_pdsch_slot,gNB->number_of_nr_dlsch_max); handle_nr_nfapi_pdsch_pdu(msgTx,&dl_tti_pdu->pdsch_pdu, sdu); } } - if (number_ul_dci_pdu > 0) - msgTx->ul_pdcch_pdu = UL_dci_req->ul_dci_pdu_list[number_ul_dci_pdu-1]; // copy the last pdu + for (int i=0; iul_pdcch_pdu[i] = UL_dci_req->ul_dci_pdu_list[i]; pushNotifiedFIFO(gNB->L1_tx_filled,res); } @@ -246,6 +245,6 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ if (number_dl_pdu>0) oai_nfapi_dl_tti_req(DL_req); - } - + } + stop_meas(&gNB->schedule_response_stats); } diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 4a916593c3..e1f951ca7d 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -158,18 +158,15 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx, VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,0); - int num_dl_dci = msgTx->pdcch_pdu.pdcch_pdu_rel15.numDlDci; - int num_ul_dci = msgTx->ul_pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci; + int num_pdcch_pdus = msgTx->num_ul_pdcch + msgTx->num_dl_pdcch; - if (num_dl_dci > 0 || num_ul_dci > 0) { - LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", - gNB->Mod_id, frame, slot, num_ul_dci, num_dl_dci); + if (num_pdcch_pdus > 0) { + LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL PDCCH PDUs %d/%d)\n", + gNB->Mod_id, frame, slot, msgTx->num_ul_pdcch, msgTx->num_dl_pdcch); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1); - nr_generate_dci_top( - num_dl_dci > 0 ? &msgTx->pdcch_pdu : NULL, - num_ul_dci > 0 ? &msgTx->ul_pdcch_pdu.pdcch_pdu : NULL, + nr_generate_dci_top(msgTx, gNB->nr_gold_pdcch_dmrs[slot], &gNB->common_vars.txdataF[0][txdataF_offset], AMP, fp); diff --git a/openair1/SIMULATION/NR_PHY/dlschsim.c b/openair1/SIMULATION/NR_PHY/dlschsim.c index ee1eca1e06..f566b93d9c 100644 --- a/openair1/SIMULATION/NR_PHY/dlschsim.c +++ b/openair1/SIMULATION/NR_PHY/dlschsim.c @@ -118,7 +118,7 @@ int main(int argc, char **argv) double DS_TDL = .03; cpuf = get_cpu_freq_GHz(); char gNBthreads[128]="n"; - + if (load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY) == 0) { exit_fun("[NR_DLSCHSIM] Error, configuration module init failed\n"); } @@ -531,12 +531,12 @@ int main(int argc, char **argv) //if (i<16) // printf("encoder output f[%d] = %d\n",i,dlsch->harq_processes[0]->f[i]); - + if (output[i] == 0) modulated_input[i] = 1.0; ///sqrt(2); //QPSK else modulated_input[i] = -1.0; ///sqrt(2); - + //if (i<16) printf("modulated_input[%d] = %d\n",i,modulated_input[i]); //SNR =10; SNR_lin = pow(10, SNR / 10.0); diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index c4e98a1bc0..71f2d9f1b7 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -1054,8 +1054,6 @@ int main(int argc, char **argv) while ((roundack==0)) { - memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int)); - memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int)); clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot); UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1); @@ -1063,7 +1061,7 @@ int main(int argc, char **argv) UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round; for (int i=0; iUE_info.num_pdcch_cand[0][i] = 0; + gNB_mac->pdcch_cand[i] = 0; if (css_flag == 0) { nr_schedule_ue_spec(0, frame, slot); diff --git a/openair2/GNB_APP/L1_nr_paramdef.h b/openair2/GNB_APP/L1_nr_paramdef.h index 6545408b9b..90cd9aae29 100644 --- a/openair2/GNB_APP/L1_nr_paramdef.h +++ b/openair2/GNB_APP/L1_nr_paramdef.h @@ -46,7 +46,7 @@ #define CONFIG_STRING_L1_LOCAL_N_PORTD "local_n_portd" #define CONFIG_STRING_L1_REMOTE_N_PORTD "remote_n_portd" #define CONFIG_STRING_L1_TRANSPORT_N_PREFERENCE "tr_n_preference" -#define CONFIG_STRING_L1_PUSCH_PROC_THREADS "pusch_proc_threads" +#define CONFIG_STRING_L1_THREAD_POOL_SIZE "thread_pool_size" #define CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR "ofdm_offset_divisor" #define CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD "pucch0_dtx_threshold" #define CONFIG_STRING_L1_PRACH_DTX_THRESHOLD "prach_dtx_threshold" @@ -65,8 +65,8 @@ {CONFIG_STRING_L1_REMOTE_N_PORTC, NULL, 0, uptr:NULL, defintval:50030, TYPE_UINT, 0}, \ {CONFIG_STRING_L1_LOCAL_N_PORTD, NULL, 0, uptr:NULL, defintval:50031, TYPE_UINT, 0}, \ {CONFIG_STRING_L1_REMOTE_N_PORTD, NULL, 0, uptr:NULL, defintval:50031, TYPE_UINT, 0}, \ -{CONFIG_STRING_L1_PUSCH_PROC_THREADS, NULL, 0, uptr:NULL, defintval:4, TYPE_UINT, 0}, \ -{CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR, NULL, 0, uptr:NULL, defuintval:8, TYPE_UINT, 0}, \ +{CONFIG_STRING_L1_THREAD_POOL_SIZE, "Maximum number of CPU cores for L1 processing (either max HW CPU cores or this value is used)", 0, uptr:NULL, defintval:4, TYPE_UINT, 0}, \ +{CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR, NULL, 0, uptr:NULL, defuintval:8, TYPE_UINT, 0}, \ {CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:100, TYPE_UINT, 0}, \ {CONFIG_STRING_L1_PRACH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:150, TYPE_UINT, 0}, \ {CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:50, TYPE_UINT, 0} \ @@ -80,7 +80,7 @@ #define L1_REMOTE_N_PORTC_IDX 6 #define L1_LOCAL_N_PORTD_IDX 7 #define L1_REMOTE_N_PORTD_IDX 8 -#define L1_PUSCH_PROC_THREADS 9 +#define L1_THREAD_POOL_SIZE 9 #define L1_OFDM_OFFSET_DIVISOR 10 #define L1_PUCCH0_DTX_THRESHOLD 11 #define L1_PRACH_DTX_THRESHOLD 12 diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 076ba4f7b4..738889aa3d 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -653,7 +653,7 @@ void RCconfig_NR_L1(void) { RC.gNB[j]->Mod_id = j; } - RC.gNB[j]->pusch_proc_threads = *(L1_ParamList.paramarray[j][L1_PUSCH_PROC_THREADS].uptr); + RC.gNB[j]->thread_pool_size = *(L1_ParamList.paramarray[j][L1_THREAD_POOL_SIZE].uptr); RC.gNB[j]->ofdm_offset_divisor = *(L1_ParamList.paramarray[j][L1_OFDM_OFFSET_DIVISOR].uptr); RC.gNB[j]->pucch0_thres = *(L1_ParamList.paramarray[j][L1_PUCCH0_DTX_THRESHOLD].uptr); RC.gNB[j]->prach_thres = *(L1_ParamList.paramarray[j][L1_PRACH_DTX_THRESHOLD].uptr); diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 3b8b5b72bf..e7fdb980b3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -611,6 +611,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ra->msg3_dcch_dtch = false; LOG_I(NR_MAC,"Added new RA process for UE RNTI %04x with initial CellGroup\n", rnti); } else { // CellGroup has been updated + NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon; const int UE_id = find_nr_UE_id(Mod_idP,rnti); int target_ss; UE_info->CellGroup[UE_id] = CellGroup; @@ -630,19 +631,28 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, } // update coreset/searchspace void *bwpd = NULL; + NR_BWP_t *genericParameters = NULL; target_ss = NR_SearchSpace__searchSpaceType_PR_common; if ((sched_ctrl->active_bwp)) { target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; bwpd = (void*)sched_ctrl->active_bwp->bwp_Dedicated; + genericParameters = &sched_ctrl->active_bwp->bwp_Common->genericParameters; } else if (CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated && (CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP)) { target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; bwpd = (void*)CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP; + genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; } sched_ctrl->search_space = get_searchspace(Mod_idP, scc, bwpd, target_ss); sched_ctrl->coreset = get_coreset(Mod_idP, scc, bwpd, sched_ctrl->search_space, target_ss); + sched_ctrl->sched_pdcch = set_pdcch_structure(RC.nrmac[Mod_idP], + sched_ctrl->search_space, + sched_ctrl->coreset, + scc, + genericParameters, + NULL); sched_ctrl->maxL = 2; } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 03ac004d85..0c9908d261 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -68,7 +68,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t ***pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t ***)gNB->pdcch_pdu_idx[CC_idP]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP]; nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; @@ -81,7 +81,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, DL_req[CC_idP].dl_tti_request_body.nPDUs = 0; DL_req[CC_idP].dl_tti_request_body.nGroup = 0; //DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000; - memset(pdcch, 0, sizeof(**pdcch) * MAX_NUM_BWP * MAX_NUM_CORESET); + memset(pdcch, 0, sizeof(*pdcch) * MAX_NUM_CORESET); UL_dci_req[CC_idP].SFN = frameP; UL_dci_req[CC_idP].Slot = slotP; @@ -278,7 +278,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, protocol_ctxt_t ctxt={0}; PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP); - const int bwp_id = 1; char stats_output[16384]; gNB_MAC_INST *gNB = RC.nrmac[module_idP]; @@ -309,13 +308,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, nr_rrc_trigger(&ctxt, 0 /*CC_id*/, frame, slot >> *scc->ssbSubcarrierSpacing); } - memset(RC.nrmac[module_idP]->cce_list[0][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0 - memset(RC.nrmac[module_idP]->cce_list[0][1],0,MAX_NUM_CCE*sizeof(int)); // coreset1 on initialBWP - memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1 - NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info; - for (int UE_id = UE_info->list.head; UE_id >= 0; UE_id = UE_info->list.next[UE_id]) - for (int i=0; inum_pdcch_cand[UE_id][i] = 0; + for (int i=0; ipdcch_cand[i] = 0; for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { //mbsfn_status[CC_id] = 0; @@ -395,7 +389,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, nr_schedule_ulsch(module_idP, frame, slot); // This schedules the DCI for Downlink and PDSCH - nr_schedule_ue_spec(module_idP, frame, slot); + start_meas(&gNB->schedule_dlsch); + nr_schedule_ue_spec(module_idP, frame, slot); + stop_meas(&gNB->schedule_dlsch); nr_schedule_pucch(module_idP, frame, slot); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 483e4be692..d33946a122 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -587,12 +587,15 @@ void nr_initiate_ra_proc(module_id_t module_idP, NR_SearchSpaceId_t ra_SearchSpace = 0; struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = NULL; + NR_BWP_t *genericParameters = NULL; if(bwp) { commonSearchSpaceList = bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList; ra_SearchSpace = *bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace; + genericParameters = &bwp->bwp_Common->genericParameters; } else { commonSearchSpaceList = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList; ra_SearchSpace = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->ra_SearchSpace; + genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; } AssertFatal(commonSearchSpaceList->list.count > 0, "common SearchSpace list has 0 elements\n"); @@ -605,6 +608,14 @@ void nr_initiate_ra_proc(module_id_t module_idP, AssertFatal(ra->ra_ss!=NULL,"SearchSpace cannot be null for RA\n"); + ra->coreset = get_coreset(module_idP, scc, bwp, ra->ra_ss, NR_SearchSpace__searchSpaceType_PR_common); + ra->sched_pdcch = set_pdcch_structure(nr_mac, + ra->ra_ss, + ra->coreset, + scc, + genericParameters, + NULL); + // retrieving ra pdcch monitoring period and offset find_monitoring_periodicity_offset_common(ra->ra_ss, &monitoring_slot_period, &monitoring_offset); @@ -781,13 +792,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t // generation of DCI 0_0 to schedule msg3 retransmission NR_SearchSpace_t *ss = ra->ra_ss; - NR_ControlResourceSet_t *coreset = get_coreset(module_idP, scc, NULL, ss, NR_SearchSpace__searchSpaceType_PR_common); + NR_ControlResourceSet_t *coreset = ra->coreset; AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg3 retransmission\n"); nfapi_nr_ul_dci_request_t *ul_dci_req = &nr_mac->UL_dci_req[CC_id]; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][ra->bwp_id][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu_rel15) { nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); @@ -795,8 +806,8 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); - nr_mac->pdcch_pdu_idx[CC_id][ra->bwp_id][coresetid] = pdcch_pdu_rel15; + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch); + nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } uint8_t aggregation_level; @@ -807,7 +818,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t if(nr_of_candidates>0) break; } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - int CCEIndex = allocate_nr_CCEs(nr_mac, NULL, coreset, aggregation_level, 0, 0, nr_of_candidates); + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + aggregation_level, + nr_of_candidates, + &ra->sched_pdcch, + coreset, + 0); if (CCEIndex < 0) { LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI 0x%04x!\n", __func__, ra->rnti); return; @@ -850,6 +867,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t nr_mac->cset0_bwp_size); // Mark the corresponding RBs as used + + fill_pdcch_vrb_map(nr_mac, + CC_id, + &ra->sched_pdcch, + CCEIndex, + aggregation_level); + for (int rb = 0; rb < ra->msg3_nb_rb; rb++) { vrb_map_UL[rbStart + BWPStart + rb] = 1; } @@ -1167,13 +1191,19 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra BWPSize = type0_PDCCH_CSS_config->num_rbs; } - coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common); + // Calculate number of symbols + int startSymbolIndex, nrOfSymbols; + const int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); + AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n"); + + coreset = ra->coreset; AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n"); uint16_t *vrb_map = cc[CC_id].vrb_map; for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) { - if (vrb_map[BWPStart + rbStart + i]) { + if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) { rbStart += i; i = 0; } @@ -1199,18 +1229,20 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra if(nr_of_candidates>0) break; } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level,0,0,nr_of_candidates); + + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + aggregation_level, + nr_of_candidates, + &ra->sched_pdcch, + coreset, + 0); + if (CCEIndex < 0) { LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI 0x%04x!\n", __func__, ra->rnti); return; } - // Calculate number of symbols - int startSymbolIndex, nrOfSymbols; - const int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength; - SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); - AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n"); - LOG_D(NR_MAC,"Msg2 startSymbolIndex.nrOfSymbols %d.%d\n",startSymbolIndex,nrOfSymbols); int mappingtype = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType; @@ -1219,7 +1251,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them const int bwpid = bwp ? bwp->bwp_Id : 0; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu_rel15) { nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t)); @@ -1227,8 +1259,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); - nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch); + nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; @@ -1388,9 +1420,14 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra nr_mac->TX_req[CC_id].Number_of_PDUs++; nr_mac->TX_req[CC_id].Slot = slotP; - // Mark the corresponding RBs as used + // Mark the corresponding symbols RBs as used + fill_pdcch_vrb_map(nr_mac, + CC_id, + &ra->sched_pdcch, + CCEIndex, + aggregation_level); for (int rb = 0; rb < rbSize; rb++) { - vrb_map[BWPStart + rb + rbStart] = 1; + vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(startSymbolIndex, nrOfSymbols); } ra->state = WAIT_Msg3; @@ -1427,7 +1464,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra pdsch_TimeDomainAllocationList = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; } - coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common); + coreset = ra->coreset; AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg4\n"); @@ -1484,7 +1521,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra if(nr_of_candidates>0) break; } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - int CCEIndex = allocate_nr_CCEs(nr_mac, bwp, coreset, aggregation_level,0,0,nr_of_candidates); + + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + aggregation_level, + nr_of_candidates, + &ra->sched_pdcch, + coreset, + 0); + if (CCEIndex < 0) { LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI 0x%04x!\n", __func__, ra->rnti); return; @@ -1586,7 +1631,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra int i = 0; while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) { - if (vrb_map[BWPStart + rbStart + i]) { + if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) { rbStart += i+1; i = 0; } else { @@ -1611,7 +1656,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them const int bwpid = bwp ? bwp->bwp_Id : 0; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu_rel15) { nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t)); @@ -1619,8 +1664,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); - nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; + nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch); + nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15; } nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; @@ -1761,9 +1806,14 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra nr_mac->TX_req[CC_id].Number_of_PDUs++; nr_mac->TX_req[CC_id].Slot = slotP; - // Mark the corresponding RBs as used + // Mark the corresponding symbols and RBs as used + fill_pdcch_vrb_map(nr_mac, + CC_id, + &ra->sched_pdcch, + CCEIndex, + aggregation_level); for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { - vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = 1; + vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] |= SL_to_bitmap(startSymbolIndex, nrOfSymbols); } LOG_D(NR_MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index d57aa43483..4a6d682630 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -314,7 +314,7 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, uint16_t symStart uint16_t *vrb_map = cc[CC_id].vrb_map; for (int rb = 0; rb < 20; rb++) - vrb_map[rbStart + rb] = 15<common_channels[CC_id].vrb_map; + NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id]; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + uint16_t *vrb_map = cc->vrb_map; if (gNB_mac->sched_ctrlCommon == NULL){ LOG_D(NR_MAC,"schedule_control_common: Filling nr_mac->sched_ctrlCommon\n"); @@ -340,6 +342,12 @@ uint32_t schedule_control_sib1(module_id_t module_id, fill_coresetZero(gNB_mac->sched_ctrlCommon->coreset,type0_PDCCH_CSS_config); gNB_mac->cset0_bwp_start = type0_PDCCH_CSS_config->cset_start_rb; gNB_mac->cset0_bwp_size = type0_PDCCH_CSS_config->num_rbs; + gNB_mac->sched_ctrlCommon->sched_pdcch = set_pdcch_structure(NULL, + gNB_mac->sched_ctrlCommon->search_space, + gNB_mac->sched_ctrlCommon->coreset, + scc, + NULL, + type0_PDCCH_CSS_config); } gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation; @@ -354,13 +362,13 @@ uint32_t schedule_control_sib1(module_id_t module_id, if (nr_of_candidates>0) break; // choosing the lower value of aggregation level available } AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - gNB_mac->sched_ctrlCommon->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - NULL, - gNB_mac->sched_ctrlCommon->coreset, - gNB_mac->sched_ctrlCommon->aggregation_level, - 0, - candidate_idx, - nr_of_candidates); + gNB_mac->sched_ctrlCommon->cce_index = find_pdcch_candidate(gNB_mac, + CC_id, + gNB_mac->sched_ctrlCommon->aggregation_level, + nr_of_candidates, + &gNB_mac->sched_ctrlCommon->sched_pdcch, + gNB_mac->sched_ctrlCommon->coreset, + 0); AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n"); @@ -384,7 +392,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, int rbSize = 0; uint32_t TBS = 0; do { - if(rbSize < bwpSize && !vrb_map[rbStart + rbSize]) + if(rbSize < bwpSize && !(vrb_map[rbStart + rbSize]&SL_to_bitmap(startSymbolIndex, nrOfSymbols))) rbSize++; else{ if (gNB_mac->sched_ctrlCommon->sched_pdsch.mcs<10) @@ -411,16 +419,21 @@ uint32_t schedule_control_sib1(module_id_t module_id, LOG_D(MAC,"dmrs_length %d\n",dmrs_length); LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS); LOG_D(MAC,"mappingtype = %d\n", mappingtype); - // Mark the corresponding RBs as used + fill_pdcch_vrb_map(gNB_mac, + CC_id, + &gNB_mac->sched_ctrlCommon->sched_pdcch, + gNB_mac->sched_ctrlCommon->cce_index, + gNB_mac->sched_ctrlCommon->aggregation_level); for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) { - vrb_map[rb + rbStart] = 1; + vrb_map[rb + rbStart] = SL_to_bitmap(startSymbolIndex, nrOfSymbols); } return TBS; } void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, nfapi_nr_dl_tti_request_body_t *dl_req, + int pdu_index, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, uint32_t TBS, int StartSymbolIndex, @@ -437,13 +450,10 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(NULL, - pdcch_pdu_rel15, - gNB_mac->sched_ctrlCommon->search_space, + nr_configure_pdcch(pdcch_pdu_rel15, gNB_mac->sched_ctrlCommon->coreset, - scc, NULL, - type0_PDCCH_CSS_config); + &gNB_mac->sched_ctrlCommon->sched_pdcch); nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); @@ -456,7 +466,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, pdsch_pdu_rel15->pduBitmap = 0; pdsch_pdu_rel15->rnti = SI_RNTI; - pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++; + pdsch_pdu_rel15->pduIndex = pdu_index; pdsch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs; pdsch_pdu_rel15->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; @@ -624,7 +634,8 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) candidate_idx, sib1_sdu_length); nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; - nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos); + int pdu_index = gNB_mac->pdu_index[0]++; + nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos); const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs; nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req]; @@ -634,7 +645,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) memcpy(tx_req->TLVs[0].value.direct, sib1_payload, sib1_sdu_length); tx_req->PDU_length = TBS; - tx_req->PDU_index = gNB_mac->pdu_index[0]++; + tx_req->PDU_index = pdu_index; tx_req->num_TLV = 1; tx_req->TLVs[0].length = TBS + 2; gNB_mac->TX_req[CC_id].Number_of_PDUs++; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index d7d136a06c..17277576ac 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -416,7 +416,7 @@ int get_mcs_from_bler(module_id_t mod_id, int CC_id, frame_t frame, sub_frame_t /*const int dret3x = stats->dlsch_rounds[3] - bler_stats->dlsch_rounds[3]; if (dret3x > 0) { if there is a third retransmission, decrease MCS for stabilization and - restart averaging window to stabilize transmission + restart averaging window to stabilize transmission bler_stats->last_frame_slot = now; bler_stats->mcs = max(9, bler_stats->mcs - 1); memcpy(bler_stats->dlsch_rounds, stats->dlsch_rounds, sizeof(stats->dlsch_rounds)); @@ -438,7 +438,7 @@ int get_mcs_from_bler(module_id_t mod_id, int CC_id, frame_t frame, sub_frame_t int new_mcs = old_mcs; // TODO put back this condition when relevant /* first ensure that number of 2nd retx is below threshold. If this is the - * case, use 1st retx to adjust faster + * case, use 1st retx to adjust faster if (bler_stats->rd2_bler > nrmac->dl_rd2_bler_threshold && old_mcs > 6) { new_mcs -= 2; } else if (bler_stats->rd2_bler < nrmac->dl_rd2_bler_threshold) {*/ @@ -493,7 +493,8 @@ void nr_store_dlsch_buffer(module_id_t module_id, DL_SCH_LCID_DCCH, 0, 0); - if ((sched_ctrl->lcid_mask&(1<<4)) > 0) + if ((sched_ctrl->lcid_mask&(1<<4)) > 0) { + start_meas(&RC.nrmac[module_id]->rlc_status_ind); sched_ctrl->rlc_status[DL_SCH_LCID_DTCH] = mac_rlc_status_ind(module_id, rnti, module_id, @@ -504,16 +505,17 @@ void nr_store_dlsch_buffer(module_id_t module_id, DL_SCH_LCID_DTCH, 0, 0); - - if(sched_ctrl->rlc_status[DL_SCH_LCID_DCCH].bytes_in_buffer > 0){ - lcid = DL_SCH_LCID_DCCH; - } - else if (sched_ctrl->rlc_status[DL_SCH_LCID_DCCH1].bytes_in_buffer > 0) - { - lcid = DL_SCH_LCID_DCCH1; - }else{ - lcid = DL_SCH_LCID_DTCH; - } + stop_meas(&RC.nrmac[module_id]->rlc_status_ind); + } + if(sched_ctrl->rlc_status[DL_SCH_LCID_DCCH].bytes_in_buffer > 0){ + lcid = DL_SCH_LCID_DCCH; + } + else if (sched_ctrl->rlc_status[DL_SCH_LCID_DCCH1].bytes_in_buffer > 0) + { + lcid = DL_SCH_LCID_DCCH1; + }else{ + lcid = DL_SCH_LCID_DTCH; + } sched_ctrl->num_total_bytes += sched_ctrl->rlc_status[lcid].bytes_in_buffer; //later multiplex here. Just select DCCH/SRB before DTCH/DRB @@ -538,7 +540,7 @@ void nr_store_dlsch_buffer(module_id_t module_id, bool allocate_dl_retransmission(module_id_t module_id, frame_t frame, sub_frame_t slot, - uint8_t *rballoc_mask, + uint16_t *rballoc_mask, int *n_rb_sched, int UE_id, int current_harq_pid) { @@ -581,13 +583,16 @@ bool allocate_dl_retransmission(module_id_t module_id, while (rbSize < retInfo->rbSize) { rbStart += rbSize; /* last iteration rbSize was not enough, skip it */ rbSize = 0; - while (rbStart < bwpSize && !rballoc_mask[rbStart]) + while (rbStart < bwpSize && + !(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; if (rbStart >= bwpSize) { LOG_D(NR_MAC, "cannot allocate retransmission for UE %d/RNTI %04x: no resources\n", UE_id, UE_info->rnti[UE_id]); return false; } - while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize] && rbSize < retInfo->rbSize) + while (rbStart + rbSize < bwpSize && + (rballoc_mask[rbStart + rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) && + rbSize < retInfo->rbSize) rbSize++; } /* check whether we need to switch the TDA allocation since the last @@ -597,13 +602,15 @@ bool allocate_dl_retransmission(module_id_t module_id, } else { /* the retransmission will use a different time domain allocation, check * that we have enough resources */ - while (rbStart < bwpSize && !rballoc_mask[rbStart]) - rbStart++; - while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize]) - rbSize++; NR_pdsch_semi_static_t temp_ps; temp_ps.nrOfLayers = 1; nr_set_pdsch_semi_static(module_id, scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps); + while (rbStart < bwpSize && + !(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols))) + rbStart++; + while (rbStart + rbSize < bwpSize && + (rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols))) + rbSize++; uint32_t new_tbs; uint16_t new_rbSize; bool success = nr_find_nb_rb(retInfo->Qm, @@ -627,8 +634,27 @@ bool allocate_dl_retransmission(module_id_t module_id, } /* Find a free CCE */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + /* CC_id = */ 0, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(MAC, "%4d.%2d could not find CCE for DL DCI retransmission UE %d/RNTI %04x\n", frame, slot, UE_id, UE_info->rnti[UE_id]); return false; @@ -651,14 +677,18 @@ bool allocate_dl_retransmission(module_id_t module_id, UE_info->rnti[UE_id], frame, slot); - int cid = sched_ctrl->coreset->controlResourceSetId; - UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp?sched_ctrl->active_bwp->bwp_Id:0][cid]; - for (int i = 0; i < sched_ctrl->aggregation_level; i++) - cce_list[sched_ctrl->cce_index + i] = 0; + RC.nrmac[module_id]->pdcch_cand[cid]--; return false; } + sched_ctrl->cce_index = CCEIndex; + + fill_pdcch_vrb_map(RC.nrmac[module_id], + /* CC_id = */ 0, + &sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + /* just reuse from previous scheduling opportunity, set new start RB */ sched_ctrl->sched_pdsch = *retInfo; sched_ctrl->sched_pdsch.rbStart = rbStart; @@ -668,7 +698,7 @@ bool allocate_dl_retransmission(module_id_t module_id, /* retransmissions: directly allocate */ *n_rb_sched -= sched_ctrl->sched_pdsch.rbSize; for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++) - rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] = 0; + rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); return true; } @@ -681,7 +711,7 @@ void pf_dl(module_id_t module_id, NR_list_t *UE_list, int max_num_ue, int n_rb_sched, - uint8_t *rballoc_mask) { + uint16_t *rballoc_mask) { gNB_MAC_INST *mac = RC.nrmac[module_id]; NR_UE_info_t *UE_info = &mac->UE_info; @@ -763,7 +793,6 @@ void pf_dl(module_id_t module_id, cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP : NULL; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - int bwp_Id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0; const uint16_t rnti = UE_info->rnti[UE_id]; NR_BWP_t *genericParameters = NULL; @@ -786,8 +815,27 @@ void pf_dl(module_id_t module_id, } /* Find a free CCE */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + + int CCEIndex = find_pdcch_candidate(mac, + /* CC_id = */ 0, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d could not find CCE for DL DCI UE %d/RNTI %04x\n", frame, slot, UE_id, rnti); continue; } @@ -812,20 +860,17 @@ void pf_dl(module_id_t module_id, rnti, frame, slot); - int cid = sched_ctrl->coreset->controlResourceSetId; - UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = mac->cce_list[bwp_Id][cid]; - for (int i = 0; i < sched_ctrl->aggregation_level; i++) - cce_list[sched_ctrl->cce_index + i] = 0; + mac->pdcch_cand[cid]--; return; } - // Freq-demain allocation - while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++; + sched_ctrl->cce_index = CCEIndex; - uint16_t max_rbSize = 1; - while (rbStart + max_rbSize < bwpSize && rballoc_mask[rbStart + max_rbSize]) - max_rbSize++; + fill_pdcch_vrb_map(mac, + /* CC_id = */ 0, + &sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); /* MCS has been set above */ @@ -838,6 +883,18 @@ void pf_dl(module_id_t module_id, sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; if (ps->time_domain_allocation != tda) nr_set_pdsch_semi_static(module_id, scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps); + + const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); + // Freq-demain allocation + while (rbStart < bwpSize && + !(rballoc_mask[rbStart]&slbitmap)) + rbStart++; + + uint16_t max_rbSize = 1; + while (rbStart + max_rbSize < bwpSize && + (rballoc_mask[rbStart + max_rbSize]&slbitmap)) + max_rbSize++; + sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx); sched_pdsch->pucch_allocation = alloc; @@ -859,7 +916,7 @@ void pf_dl(module_id_t module_id, /* transmissions: directly allocate */ n_rb_sched -= sched_pdsch->rbSize; for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - rballoc_mask[rb + sched_pdsch->rbStart] = 0; + rballoc_mask[rb + sched_pdsch->rbStart] -= slbitmap; } } @@ -872,9 +929,18 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; const int CC_id = 0; - /* Get bwpSize from the first UE */ + /* Get bwpSize and TDAfrom the first UE */ + /* This is temporary and it assumes all UEs have the same BWP and TDA*/ int UE_id = UE_info->list.head; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; + int startSymbolIndex, nrOfSymbols; + const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_bwp ? + sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList : + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count); + const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); NR_BWP_t *genericParameters = NULL; if(sched_ctrl->active_bwp) { @@ -897,14 +963,18 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : NRRIV2BW(genericParameters->locationAndBandwidth,MAX_BWP_SIZE); const uint16_t BWPStart = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_start : NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE); + const uint16_t slbitmap = SL_to_bitmap(startSymbolIndex, nrOfSymbols); uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; - uint8_t rballoc_mask[bwpSize]; + uint16_t rballoc_mask[bwpSize]; int n_rb_sched = 0; for (int i = 0; i < bwpSize; i++) { // calculate mask: init with "NOT" vrb_map: // if any RB in vrb_map is blocked (1), the current RBG will be 0 - rballoc_mask[i] = !vrb_map[i+BWPStart]; - n_rb_sched += rballoc_mask[i]; + rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols + // if all the pdsch symbols are free + if((rballoc_mask[i]&slbitmap) == + slbitmap) + n_rb_sched++; } /* Retrieve amount of data to send for this UE */ @@ -1074,7 +1144,7 @@ void nr_schedule_ue_spec(module_id_t module_id, const int bwpid = bwp ? bwp->bwp_Id : 0; const int coresetid = (bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][coresetid]; if (!pdcch_pdu) { LOG_D(NR_MAC, "creating pdcch pdu, pdcch_pdu = NULL. \n"); nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; @@ -1085,8 +1155,8 @@ void nr_schedule_ue_spec(module_id_t module_id, pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid); NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset; - nr_configure_pdcch(gNB_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); - gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu; + nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch); + gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; } nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; @@ -1175,6 +1245,7 @@ void nr_schedule_ue_spec(module_id_t module_id, pdsch_pdu->pduBitmap |= 0x1; // Bit 0: pdschPtrs - Indicates PTRS included (FR2) } + LOG_D(NR_MAC,"Configuring DCI/PDCCH in %d.%d at CCE %d, rnti %x\n", frame,slot,sched_ctrl->cce_index,rnti); /* Fill PDCCH DL DCI PDU */ nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci]; pdcch_pdu->numDlDci++; @@ -1303,6 +1374,7 @@ void nr_schedule_ue_spec(module_id_t module_id, // const int lcid = DL_SCH_LCID_DTCH; const int lcid = sched_ctrl->lcid_to_schedule; int dlsch_total_bytes = 0; + start_meas(&gNB_mac->rlc_data_req); if (sched_ctrl->num_total_bytes > 0) { tbs_size_t len = 0; while (size > 3) { @@ -1316,6 +1388,7 @@ void nr_schedule_ue_spec(module_id_t module_id, /* limit requested number of bytes to what preprocessor specified, or * such that TBS is full */ const rlc_buffer_occupancy_t ndata = min(sched_ctrl->rlc_status[lcid].bytes_in_buffer, size); + len = mac_rlc_data_req(module_id, rnti, module_id, @@ -1376,6 +1449,7 @@ void nr_schedule_ue_spec(module_id_t module_id, buf += size; dlsch_total_bytes += size; } + stop_meas(&gNB_mac->rlc_data_req); // Add padding header and zero rest out if there is space left if (size > 0) { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index ddbf9a7af0..ce97a483e8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -277,6 +277,16 @@ void nr_preprocessor_phytest(module_id_t module_id, __func__, UE_id); NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1; + const long f = (sched_ctrl->active_bwp && sched_ctrl->search_space && + sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) ? + sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; + NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; + ps->nrOfLayers = target_dl_Nl; + if (ps->time_domain_allocation != tda) + nr_set_pdsch_semi_static( + module_id, scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps); + /* find largest unallocated chunk */ const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); @@ -288,11 +298,14 @@ void nr_preprocessor_phytest(module_id_t module_id, /* loop ensures that we allocate exactly target_dl_bw, or return */ while (true) { /* advance to first free RB */ - while (rbStart < bwpSize && vrb_map[rbStart + BWPStart]) + while (rbStart < bwpSize && + (vrb_map[rbStart + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols))) rbStart++; rbSize = 1; /* iterate until we are at target_dl_bw or no available RBs */ - while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize + BWPStart] && rbSize < target_dl_bw) + while (rbStart + rbSize < bwpSize && + !(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) && + rbSize < target_dl_bw) rbSize++; /* found target_dl_bw? */ if (rbSize == target_dl_bw) @@ -333,16 +346,17 @@ void nr_preprocessor_phytest(module_id_t module_id, AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][slot]; - const int m = UE_info->num_pdcch_cand[UE_id][cid]; - sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - sched_ctrl->active_bwp, - sched_ctrl->coreset, - sched_ctrl->aggregation_level, - Y, - m, - nr_of_candidates); - AssertFatal(sched_ctrl->cce_index >= 0, + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); + + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + AssertFatal(CCEIndex >= 0, "%s(): could not find CCE for UE %d\n", __func__, UE_id); @@ -362,31 +376,26 @@ void nr_preprocessor_phytest(module_id_t module_id, rnti, frame, slot); - UE_info->num_pdcch_cand[UE_id][cid]--; - int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid]; - for (int i = 0; i < sched_ctrl->aggregation_level; i++) - cce_list[sched_ctrl->cce_index + i] = 0; + RC.nrmac[module_id]->pdcch_cand[cid]--; return; } + sched_ctrl->cce_index = CCEIndex; + + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + &sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + //AssertFatal(alloc, // "could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n", // rnti, frame, slot); NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch; - NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; sched_pdsch->pucch_allocation = alloc; sched_pdsch->rbStart = rbStart; sched_pdsch->rbSize = rbSize; - const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1; - const long f = (sched_ctrl->active_bwp && sched_ctrl->search_space && - sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) ? - sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; - - ps->nrOfLayers = target_dl_Nl; - if (ps->time_domain_allocation != tda) - nr_set_pdsch_semi_static( - module_id, scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps); sched_pdsch->mcs = target_dl_mcs; sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); @@ -406,7 +415,7 @@ void nr_preprocessor_phytest(module_id_t module_id, /* mark the corresponding RBs as used */ for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - vrb_map[rb + sched_pdsch->rbStart + BWPStart] = 1; + vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize); } @@ -511,20 +520,21 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = UE_info->Y[UE_id][cid][slot]; - const int m = UE_info->num_pdcch_cand[UE_id][cid]; - sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - sched_ctrl->active_bwp, - sched_ctrl->coreset, - sched_ctrl->aggregation_level, - Y, - m, - nr_of_candidates); + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); + + int CCEIndex = find_pdcch_candidate(nr_mac, + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + if (sched_ctrl->cce_index < 0) { LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); + nr_mac->pdcch_cand[cid]--; return false; } - UE_info->num_pdcch_cand[UE_id][cid]++; const int mcs = target_ul_mcs; NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; @@ -553,6 +563,12 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ >> 3; /* mark the corresponding RBs as used */ + fill_pdcch_vrb_map(nr_mac, + CC_id, + &sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + for (int rb = rbStart; rb < rbStart + rbSize; rb++) vrb_map_UL[rb+BWPStart] = 1; return true; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 51c2aa5516..6a354e2722 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -159,6 +159,7 @@ NR_ControlResourceSet_t *get_coreset(module_id_t module_idP, NR_SearchSpace_t *ss, NR_SearchSpace__searchSpaceType_PR ss_type) { NR_ControlResourceSetId_t coreset_id = *ss->controlResourceSetId; + if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) { // common search space NR_ControlResourceSet_t *coreset; if(coreset_id == 0) { @@ -222,53 +223,180 @@ NR_SearchSpace_t *get_searchspace(module_id_t module_id, AssertFatal(0, "Couldn't find an adequate searchspace bwp_Dedicated %p\n",bwp_Dedicated); } -int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, - NR_BWP_Downlink_t *bwp, - NR_ControlResourceSet_t *coreset, - int aggregation, - uint16_t Y, - int m, - int nr_of_candidates) { +NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac, + NR_SearchSpace_t *ss, + NR_ControlResourceSet_t *coreset, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_t *bwp, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) { - int coreset_id = coreset->controlResourceSetId; + int sps; + NR_sched_pdcch_t pdcch; - int *cce_list; - if(bwp == NULL) { - cce_list = nr_mac->cce_list[0][coreset_id]; - } else { - cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id]; + AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId, + "coreset id in SS %ld does not correspond to the one in coreset %ld", + *ss->controlResourceSetId, coreset->controlResourceSetId); + + if (bwp) { // This is not for SIB1 + if(coreset->controlResourceSetId == 0){ + pdcch.BWPSize = gNB_mac->cset0_bwp_size; + pdcch.BWPStart = gNB_mac->cset0_bwp_start; + } + else { + pdcch.BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); + pdcch.BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); + } + pdcch.SubcarrierSpacing = bwp->subcarrierSpacing; + pdcch.CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix; + + //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored"); + sps = bwp->cyclicPrefix == NULL ? 14 : 12; + } + else { + AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp); + pdcch.BWPSize = type0_PDCCH_CSS_config->num_rbs; + pdcch.BWPStart = type0_PDCCH_CSS_config->cset_start_rb; + pdcch.SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch; + pdcch.CyclicPrefix = 0; + sps = 14; } - int n_rb=0; - for (int i=0;i<6;i++) - for (int j=0;j<8;j++) { - n_rb+=((coreset->frequencyDomainResources.buf[i]>>j)&1); + AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n"); + AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n"); + + // for SPS=14 8 MSBs in positions 13 downto 6 + uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | + (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); + + for (int i=0; i>(sps-1-i))&1) { + pdcch.StartSymbolIndex=i; + break; } - n_rb*=6; + } - uint16_t N_reg = n_rb * coreset->duration; - uint16_t n_CI = 0; + pdcch.DurationSymbols = coreset->duration; - const uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE; - const uint16_t M_s_max = nr_of_candidates; + //cce-REG-MappingType + pdcch.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved? + NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED; - LOG_D(PHY,"allocate_NR_CCes : bwp_id %d, coreset_id %d : N_cce %d, m %d, nr_of_candidates %d, Y %d\n", - (int)(bwp ? bwp->bwp_Id : 0),coreset_id,N_cce,m,nr_of_candidates, Y); - //PDCCH candidate index m in CORESET exceeds the maximum number of PDCCH candidates - if(m >= nr_of_candidates) - return -1; + if (pdcch.CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { + pdcch.RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize == + NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize); + pdcch.InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize == + NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize); + AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n"); + pdcch.ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId; + } + else { + pdcch.RegBundleSize = 6; + pdcch.InterleaverSize = 0; + pdcch.ShiftIndex = 0; + } - int first_cce = aggregation * (( Y + CEILIDIV((m*N_cce),(aggregation*M_s_max)) + n_CI ) % CEILIDIV(N_cce,aggregation)); - - for (int i=0;ifrequencyDomainResources.buf[i]>>t)&1); + } + } + pdcch.n_rb = N_rb*=6; // each bit of frequencyDomainResources represents 6 PRBs + return pdcch; } + +int cce_to_reg_interleaving(const int R, int k, int n_shift, const int C, int L, const int N_regs) { + + int f; // interleaving function + if(R==0) + f = k; + else { + int c = k/R; + int r = k%R; + f = (r*C + c + n_shift)%(N_regs/L); + } + return f; +} + +int find_pdcch_candidate(gNB_MAC_INST *mac, + int cc_id, + int aggregation, + int nr_of_candidates, + NR_sched_pdcch_t *pdcch, + NR_ControlResourceSet_t *coreset, + uint16_t Y){ + + uint16_t *vrb_map = mac->common_channels[cc_id].vrb_map; + const int next_cand = mac->pdcch_cand[coreset->controlResourceSetId]; + const int N_ci = 0; + + if(next_cand>=nr_of_candidates) { + LOG_D(NR_MAC,"No more available candidates for this coreset\n"); + return -1; + } + + const int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol + const int N_symb = coreset->duration; // nb of coreset symbols + const int N_regs = N_rb*N_symb; // nb of REGs per coreset + const int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset + const int R = pdcch->InterleaverSize; + const int L = pdcch->RegBundleSize; + const int C = R>0 ? N_regs/(L*R) : 0; + const int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle + + // loop over all the available candidates + // this implements TS 38.211 Sec. 7.3.2.2 + for(int m=next_cand; mShiftIndex, C, L, N_regs); + for(int rb=0; rbBWPStart + f*B_rb + rb]&SL_to_bitmap(pdcch->StartSymbolIndex,N_symb)) { + taken = true; + break; + } + } + } + } + if(!taken){ + mac->pdcch_cand[coreset->controlResourceSetId] = m++; // using candidate m, next available is m+1 + return first_cce; + } + } + return -1; +} + +void fill_pdcch_vrb_map(gNB_MAC_INST *mac, + int CC_id, + NR_sched_pdcch_t *pdcch, + int first_cce, + int aggregation){ + + uint16_t *vrb_map = mac->common_channels[CC_id].vrb_map; + + int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol + int L = pdcch->RegBundleSize; + int R = pdcch->InterleaverSize; + int n_shift = pdcch->ShiftIndex; + int N_symb = pdcch->DurationSymbols; + int N_regs = N_rb*N_symb; // nb of REGs per coreset + int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle + int C = R>0 ? N_regs/(L*R) : 0; + + for (int j=first_cce; jBWPStart + f*B_rb + rb] |= SL_to_bitmap(pdcch->StartSymbolIndex, N_symb); + } + } +} + + bool nr_find_nb_rb(uint16_t Qm, uint16_t R, uint16_t nb_symb_sch, @@ -762,81 +890,32 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) { return(default_pucch_csset[pucch_ResourceCommon]); } -void nr_configure_pdcch(gNB_MAC_INST *gNB_mac, - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, - NR_SearchSpace_t *ss, + + +void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_ControlResourceSet_t *coreset, - NR_ServingCellConfigCommon_t *scc, NR_BWP_t *bwp, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) { + NR_sched_pdcch_t *pdcch) { - int sps; - AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId, - "coreset id in SS %ld does not correspond to the one in coreset %ld", - *ss->controlResourceSetId, coreset->controlResourceSetId); - if (bwp) { // This is not for SIB1 - if(coreset->controlResourceSetId == 0){ - pdcch_pdu->BWPSize = gNB_mac->cset0_bwp_size; - pdcch_pdu->BWPStart = gNB_mac->cset0_bwp_start; - } - else { - pdcch_pdu->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); - pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); - } - pdcch_pdu->SubcarrierSpacing = bwp->subcarrierSpacing; - pdcch_pdu->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix; - - //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored"); - sps = bwp->cyclicPrefix == NULL ? 14 : 12; - } - else { - AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp); - pdcch_pdu->BWPSize = type0_PDCCH_CSS_config->num_rbs; - pdcch_pdu->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; - pdcch_pdu->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch; - pdcch_pdu->CyclicPrefix = 0; - sps = 14; - } - - AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n"); - AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n"); - - // for SPS=14 8 MSBs in positions 13 downto 6 - uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | - (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); - - for (int i=0; i>(sps-1-i))&1) { - pdcch_pdu->StartSymbolIndex=i; - break; - } - } + pdcch_pdu->BWPSize = pdcch->BWPSize; + pdcch_pdu->BWPStart = pdcch->BWPStart; + pdcch_pdu->SubcarrierSpacing = pdcch->SubcarrierSpacing; + pdcch_pdu->CyclicPrefix = pdcch->CyclicPrefix; + pdcch_pdu->StartSymbolIndex = pdcch->StartSymbolIndex; pdcch_pdu->DurationSymbols = coreset->duration; for (int i=0;i<6;i++) pdcch_pdu->FreqDomainResource[i] = coreset->frequencyDomainResources.buf[i]; - LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d, \n",pdcch_pdu->BWPStart,pdcch_pdu->BWPSize,(int)pdcch_pdu->SubcarrierSpacing,(int)coreset->frequencyDomainResources.buf[0],(int)coreset->duration); + LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d, \n", + pdcch_pdu->BWPStart,pdcch_pdu->BWPSize,(int)pdcch_pdu->SubcarrierSpacing,(int)coreset->frequencyDomainResources.buf[0],(int)coreset->duration); - //cce-REG-MappingType - pdcch_pdu->CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved? - NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED; - - if (pdcch_pdu->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { - pdcch_pdu->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize == - NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize); - pdcch_pdu->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize == - NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize); - AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n"); - pdcch_pdu->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId; - } - else { - pdcch_pdu->RegBundleSize = 0; - pdcch_pdu->InterleaverSize = 0; - pdcch_pdu->ShiftIndex = 0; - } + pdcch_pdu->CceRegMappingType = pdcch->CceRegMappingType; + pdcch_pdu->RegBundleSize = pdcch->RegBundleSize; + pdcch_pdu->InterleaverSize = pdcch->InterleaverSize; + pdcch_pdu->ShiftIndex = pdcch->ShiftIndex; if(coreset->controlResourceSetId == 0) { if(bwp == NULL) @@ -1910,19 +1989,18 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP) return -1; } -void set_Y(int Y[3][160], rnti_t rnti) { +uint16_t get_Y(int cid, int slot, rnti_t rnti) { + const int A[3] = {39827, 39829, 39839}; const int D = 65537; + int Y; - Y[0][0] = (A[0] * rnti) % D; - Y[1][0] = (A[1] * rnti) % D; - Y[2][0] = (A[2] * rnti) % D; + Y = (A[cid] * rnti) % D; - for (int s = 1; s < 160; s++) { - Y[0][s] = (A[0] * Y[0][s - 1]) % D; - Y[1][s] = (A[1] * Y[1][s - 1]) % D; - Y[2][s] = (A[2] * Y[2][s - 1]) % D; - } + for (int s = 0; s < slot; s++) + Y = (A[cid] * Y) % D; + + return Y; } int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) { @@ -2006,8 +2084,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG UE_info->CellGroup[UE_id] = CellGroup; add_nr_list(&UE_info->list, UE_id); memset(&UE_info->mac_stats[UE_id], 0, sizeof(NR_mac_stats_t)); - set_Y(UE_info->Y[UE_id], rntiP); - if (CellGroup && CellGroup->spCellConfig && CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated) + if (CellGroup && CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated) compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, mod_idP); NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; memset(sched_ctrl, 0, sizeof(*sched_ctrl)); @@ -2032,8 +2109,12 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG if (bwpList) AssertFatal(bwpList->list.count == 1, "downlinkBWP_ToAddModList has %d BWP!\n", bwpList->list.count); + const int bwp_id = servingCellConfig ? *servingCellConfig->firstActiveDownlinkBWP_Id : 0; sched_ctrl->active_bwp = bwpList && bwp_id > 0 ? bwpList->list.array[bwp_id - 1] : NULL; + NR_BWP_t *genericParameters = sched_ctrl->active_bwp ? + &sched_ctrl->active_bwp->bwp_Common->genericParameters: + &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; const int target_ss = sched_ctrl->active_bwp ? NR_SearchSpace__searchSpaceType_PR_ue_Specific : NR_SearchSpace__searchSpaceType_PR_common; sched_ctrl->search_space = get_searchspace(mod_idP, scc, sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Dedicated : NULL, @@ -2041,6 +2122,12 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG sched_ctrl->coreset = get_coreset(mod_idP, scc, sched_ctrl->active_bwp ? (void*)sched_ctrl->active_bwp->bwp_Dedicated : NULL, sched_ctrl->search_space, target_ss); + sched_ctrl->sched_pdcch = set_pdcch_structure(RC.nrmac[mod_idP], + sched_ctrl->search_space, + sched_ctrl->coreset, + scc, + genericParameters, + NULL); const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL; if (ubwpList) AssertFatal(ubwpList->list.count == 1, "uplinkBWP_ToAddModList has %d BWP!\n", @@ -2340,20 +2427,20 @@ void nr_csirs_scheduling(int Mod_idP, csirs_pdu_rel15->row = 1; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row1.buf[0])>>4)&0x0f; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2: csirs_pdu_rel15->row = 2; csirs_pdu_rel15->freq_domain = (((resourceMapping.frequencyDomainAllocation.choice.row2.buf[1]>>4)&0x0f) | ((resourceMapping.frequencyDomainAllocation.choice.row2.buf[0]<<8)&0xff0)); for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4: csirs_pdu_rel15->row = 4; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row4.buf[0])>>5)&0x07; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other: csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.other.buf[0])>>2)&0x3f; @@ -2364,18 +2451,18 @@ void nr_csirs_scheduling(int Mod_idP, case NR_CSI_RS_ResourceMapping__nrofPorts_p2: csirs_pdu_rel15->row = 3; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p4: csirs_pdu_rel15->row = 5; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p8: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 8; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); } else{ int num_k = 0; @@ -2384,12 +2471,12 @@ void nr_csirs_scheduling(int Mod_idP, if(num_k==4) { csirs_pdu_rel15->row = 6; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); } else { csirs_pdu_rel15->row = 7; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); } } break; @@ -2397,12 +2484,12 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 10; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); } else { csirs_pdu_rel15->row = 9; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 1); } break; case NR_CSI_RS_ResourceMapping__nrofPorts_p16: @@ -2411,24 +2498,24 @@ void nr_csirs_scheduling(int Mod_idP, else csirs_pdu_rel15->row = 11; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p24: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 14; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 15; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (7 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 3); } else { csirs_pdu_rel15->row = 13; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } } break; @@ -2436,18 +2523,18 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 17; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 18; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (7 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= SL_to_bitmap(csirs_pdu_rel15->symb_l0, 3); } else { csirs_pdu_rel15->row = 16; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (SL_to_bitmap(csirs_pdu_rel15->symb_l0, 2) | SL_to_bitmap(csirs_pdu_rel15->symb_l1, 2)); } } break; @@ -2465,38 +2552,6 @@ void nr_csirs_scheduling(int Mod_idP, } } -bool find_free_CCE(module_id_t module_id, - sub_frame_t slot, - int UE_id){ - NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[module_id]->UE_info.UE_sched_ctrl[UE_id]; - uint8_t nr_of_candidates; - for (int i=0; i<5; i++) { - // for now taking the lowest value among the available aggregation levels - find_aggregation_candidates(&sched_ctrl->aggregation_level, - &nr_of_candidates, - sched_ctrl->search_space, - 1<0) break; - } - AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n"); - const int cid = sched_ctrl->coreset->controlResourceSetId; - const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid][slot]; - const int m = RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid]; - if (UE_id >= 0) LOG_D(NR_MAC,"calling allocate_nr_CCEs with L %d, nr_of_candidates %d, Y %x\n",sched_ctrl->aggregation_level,nr_of_candidates,Y); - sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], - sched_ctrl->active_bwp, - sched_ctrl->coreset, - sched_ctrl->aggregation_level, - Y, - m, - nr_of_candidates); - if (sched_ctrl->cce_index < 0) - return false; - - RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid]++; - return true; -} - /*void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg, nfapi_nr_coreset_t *coreset, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 0c474baf13..52d6bd63c0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -143,7 +143,6 @@ void nr_schedule_pucch(int Mod_idP, for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - if (sched_ctrl->ul_failure==1 && get_softmodem_params()->phy_test==0) continue; const int n = sizeof(sched_ctrl->sched_pucch) / sizeof(*sched_ctrl->sched_pucch); for (int i = 0; i < n; i++) { NR_sched_pucch_t *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[i]; @@ -1126,7 +1125,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, // tpc (power control) only if we received AckNack or positive SR. For a // negative SR, the UE won't have sent anything, and the SNR is not valid - if (((uci_01->pduBitmap >> 1) & 0x1) || sched_ctrl->SR) { + if (((uci_01->pduBitmap >> 1) & 0x1) ) { if ((uci_01->harq) && (uci_01->harq->harq_confidence_level==0)) sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10, uci_01->ul_cqi, 30); else sched_ctrl->tpc1 = 3; sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 15ed27e5c7..943e75d809 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -718,7 +718,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, UE_info->mac_stats[UE_id].ulsch_DTX++; } if (UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt >= pusch_failure_thres) { - LOG_D(NR_MAC,"Detected UL Failure on PUSCH, stopping scheduling\n"); + LOG_W(NR_MAC,"Detected UL Failure on PUSCH after %d PUSCH DTX, stopping scheduling\n", + UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt); UE_info->UE_sched_ctrl[UE_id].ul_failure = 1; nr_mac_gNB_rrc_ul_failure(gnb_mod_idP,CC_idP,frameP,slotP,rntiP); } @@ -927,13 +928,22 @@ bool nr_UE_is_to_be_scheduled(module_id_t mod_id, int CC_id, int UE_id, frame_t const NR_UE_sched_ctrl_t *sched_ctrl = &nrmac->UE_info.UE_sched_ctrl[UE_id]; const int last_ul_sched = sched_ctrl->last_ul_frame * n + sched_ctrl->last_ul_slot; + const NR_TDD_UL_DL_Pattern_t *tdd = + scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + int num_slots_per_period; + int tdd_period_len[8] = {500,625,1000,1250,2000,2500,5000,10000}; + if (tdd) + num_slots_per_period = n*tdd_period_len[tdd->dl_UL_TransmissionPeriodicity]/10000; + else + num_slots_per_period = n; + const int diff = (now - last_ul_sched + 1024 * n) % (1024 * n); /* UE is to be scheduled if * (1) we think the UE has more bytes awaiting than what we scheduled * (2) there is a scheduling request * (3) or we did not schedule it in more than 10 frames */ const bool has_data = sched_ctrl->estimated_ul_buffer > sched_ctrl->sched_ul_bytes; - const bool high_inactivity = diff >= nrmac->ulsch_max_frame_inactivity * n; + const bool high_inactivity = diff >= (nrmac->ulsch_max_frame_inactivity>0 ? (nrmac->ulsch_max_frame_inactivity * n) : num_slots_per_period); LOG_D(NR_MAC, "%4d.%2d UL inactivity %d slots has_data %d SR %d\n", frame, @@ -1040,13 +1050,38 @@ bool allocate_ul_retransmission(module_id_t module_id, sched_ctrl->pusch_semi_static = temp_ps; } - /* Find free CCE */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + /* Find a free CCE */ + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d no free CCE for retransmission UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]); return false; } + sched_ctrl->cce_index = CCEIndex; + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + &sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + /* frame/slot in sched_pusch has been set previously. In the following, we * overwrite the information in the retransmission information before storing * as the new scheduling instruction */ @@ -1173,8 +1208,27 @@ void pf_ul(module_id_t module_id, * based on data to transmit) */ if (B == 0 && do_sched) { /* if no data, pre-allocate 5RB */ - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + /* Find a free CCE */ + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x (BSR 0)\n", frame, slot, UE_info->rnti[UE_id]); continue; } @@ -1191,6 +1245,13 @@ void pf_ul(module_id_t module_id, return; } + sched_ctrl->cce_index = CCEIndex; + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + &sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + /* Save PUSCH field */ /* we want to avoid a lengthy deduction of DMRS and other parameters in * every TTI if we can save it, so check whether dci_format, TDA, or @@ -1256,8 +1317,27 @@ void pf_ul(module_id_t module_id, *max = UE_sched.next[*max]; *p = -1; - bool freeCCE = find_free_CCE(module_id, slot, UE_id); - if (!freeCCE) { + NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; + + const int cid = sched_ctrl->coreset->controlResourceSetId; + const uint16_t Y = get_Y(cid%3, slot, UE_info->rnti[UE_id]); + uint8_t nr_of_candidates; + for (int i=0; i<5; i++) { + // for now taking the lowest value among the available aggregation levels + find_aggregation_candidates(&sched_ctrl->aggregation_level, + &nr_of_candidates, + sched_ctrl->search_space, + 1<0) break; + } + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + CC_id, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + if (CCEIndex<0) { LOG_D(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]); continue; } @@ -1268,7 +1348,6 @@ void pf_ul(module_id_t module_id, if (max_num_ue < 0) return; - NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_CellGroupConfig_t *cg = UE_info->CellGroup[UE_id]; NR_BWP_UplinkDedicated_t *ubwpd = cg && cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated && cg->spCellConfig->spCellConfigDedicated->uplinkConfig ? @@ -1333,6 +1412,14 @@ void pf_ul(module_id_t module_id, rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS); /* Mark the corresponding RBs as used */ + + sched_ctrl->cce_index = CCEIndex; + fill_pdcch_vrb_map(RC.nrmac[module_id], + CC_id, + &sched_ctrl->sched_pdcch, + CCEIndex, + sched_ctrl->aggregation_level); + n_rb_sched -= sched_pusch->rbSize; for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++) rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0; @@ -1512,7 +1599,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) /* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each * allocated PDCCH so we can easily allocate UE's DCIs independent of any * CORESET order */ - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_bwp_coreset[MAX_NUM_BWP][MAX_NUM_CORESET] = {{0}}; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_coreset[MAX_NUM_CORESET] = {0}; + NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; @@ -1764,7 +1852,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) NR_SearchSpace_t *ss = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->search_space: RC.nrmac[module_id]->sched_ctrlCommon->search_space; NR_ControlResourceSet_t *coreset = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->coreset: RC.nrmac[module_id]->sched_ctrlCommon->coreset; const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pdcch_pdu_bwp_coreset[bwpid][coresetid]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pdcch_pdu_coreset[coresetid]; if (!pdcch_pdu) { nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); @@ -1772,8 +1860,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(nr_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); - pdcch_pdu_bwp_coreset[bwpid][coresetid] = pdcch_pdu; + nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch); + pdcch_pdu_coreset[coresetid] = pdcch_pdu; } LOG_D(NR_MAC,"Configuring ULDCI/PDCCH in %d.%d at CCE %d, rnti %x\n", frame,slot,sched_ctrl->cce_index,rnti); diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 4af58b3de4..80b8022301 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -251,13 +251,31 @@ void find_search_space(int ss_type, NR_BWP_Downlink_t *bwp, NR_SearchSpace_t *ss); -void nr_configure_pdcch(gNB_MAC_INST *gNB_mac, - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, - NR_SearchSpace_t *ss, +void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_ControlResourceSet_t *coreset, - NR_ServingCellConfigCommon_t *scc, NR_BWP_t *bwp, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); + NR_sched_pdcch_t *pdcch); + +NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac, + NR_SearchSpace_t *ss, + NR_ControlResourceSet_t *coreset, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_t *bwp, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); + +int find_pdcch_candidate(gNB_MAC_INST *mac, + int cc_id, + int aggregation, + int nr_of_candidates, + NR_sched_pdcch_t *pdcch, + NR_ControlResourceSet_t *coreset, + uint16_t Y); + +void fill_pdcch_vrb_map(gNB_MAC_INST *mac, + int CC_id, + NR_sched_pdcch_t *pdcch, + int first_cce, + int aggregation); void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, const NR_CellGroupConfig_t *CellGroup, @@ -311,6 +329,8 @@ void nr_set_pusch_semi_static(module_id_t module_id, uint8_t num_dmrs_cdm_grps_no_data, NR_pusch_semi_static_t *ps); +uint16_t get_Y(int cid, int slot, rnti_t rnti); + uint8_t nr_get_tpc(int target, uint8_t cqi, int incr); int get_spf(nfapi_nr_config_request_scf_t *cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index 5e5de9a8e1..b9da84ead2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -128,7 +128,10 @@ void dump_mac_stats(gNB_MAC_INST *gNB, char *output, int strlen, bool reset_rsrp } } } - print_meas_log(&gNB->eNB_scheduler, "DL & UL scheduling timing stats", NULL, NULL, output+stroff); + print_meas(&gNB->eNB_scheduler, "DL & UL scheduling timing stats", NULL, NULL); + print_meas(&gNB->schedule_dlsch,"dlsch scheduler",NULL,NULL); + print_meas(&gNB->rlc_data_req, "rlc_data_req",NULL,NULL); + print_meas(&gNB->rlc_status_ind,"rlc_status_ind",NULL,NULL); } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index a7f1a2cd90..3ead11c41d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -73,7 +73,7 @@ /* Defs */ #define MAX_NUM_BWP 2 -#define MAX_NUM_CORESET 2 +#define MAX_NUM_CORESET 12 #define MAX_NUM_CCE 90 #define MAX_HARQ_ROUNDS 4 /*!\brief Maximum number of random access process */ @@ -103,6 +103,20 @@ typedef struct NR_preamble_ue { uint8_t *preamble_list; } NR_preamble_ue_t; +typedef struct NR_sched_pdcch { + uint16_t BWPSize; + uint16_t BWPStart; + uint8_t CyclicPrefix; + uint8_t SubcarrierSpacing; + uint8_t StartSymbolIndex; + uint8_t CceRegMappingType; + uint8_t RegBundleSize; + uint8_t InterleaverSize; + uint16_t ShiftIndex; + uint8_t DurationSymbols; + int n_rb; +} NR_sched_pdcch_t; + /*! \brief gNB template for the Random access information */ typedef struct { /// Flag to indicate this process is active @@ -165,6 +179,9 @@ typedef struct { int mac_pdu_length; /// RA search space NR_SearchSpace_t *ra_ss; + /// RA Coreset + NR_ControlResourceSet_t *coreset; + NR_sched_pdcch_t sched_pdcch; // Beam index uint8_t beam_id; /// CellGroup for UE that is to come (NSA is non-null, null for SA) @@ -301,7 +318,6 @@ typedef struct UE_info { pdschTciStatesActDeact_t pdsch_TCI_States_ActDeact; } NR_UE_mac_ce_ctrl_t; - typedef struct NR_sched_pucch { int frame; int ul_slot; @@ -536,6 +552,7 @@ typedef struct { /// CCE index and aggregation, should be coherent with cce_list NR_SearchSpace_t *search_space; NR_ControlResourceSet_t *coreset; + NR_sched_pdcch_t sched_pdcch; /// CCE index and Aggr. Level are shared for PUSCH/PDSCH allocation decisions /// corresponding to the sched_pusch/sched_pdsch structures below @@ -653,12 +670,11 @@ typedef struct { rnti_t rnti[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *CellGroup[MAX_MOBILES_PER_GNB]; /// CCE indexing - int Y[MAX_MOBILES_PER_GNB][3][160]; int m[MAX_MOBILES_PER_GNB]; - int num_pdcch_cand[MAX_MOBILES_PER_GNB][MAX_NUM_CORESET]; // UE selected beam index uint8_t UE_beam_index[MAX_MOBILES_PER_GNB]; bool Msg4_ACKed[MAX_MOBILES_PER_GNB]; + } NR_UE_info_t; typedef void (*nr_pp_impl_dl)(module_id_t mod_id, @@ -706,7 +722,7 @@ typedef struct gNB_MAC_INST_s { /// a PDCCH PDU groups DCIs per BWP and CORESET. The following structure /// keeps pointers to PDCCH PDUs within DL_req so that we can easily track /// PDCCH PDUs per CC/BWP/CORESET - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_idx[NFAPI_CC_MAX][MAX_NUM_BWP][MAX_NUM_CORESET]; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_idx[NFAPI_CC_MAX][MAX_NUM_CORESET]; /// NFAPI UL TTI Request Structure, simple pointer into structure /// UL_tti_req_ahead for current frame/slot nfapi_nr_ul_tti_request_t *UL_tti_req[NFAPI_CC_MAX]; @@ -717,7 +733,7 @@ typedef struct gNB_MAC_INST_s { nfapi_nr_ul_dci_request_t UL_dci_req[NFAPI_CC_MAX]; /// NFAPI DL PDU structure nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX]; - + int pdcch_cand[MAX_NUM_CORESET]; NR_UE_info_t UE_info; /// UL handle @@ -739,14 +755,16 @@ typedef struct gNB_MAC_INST_s { time_stats_t schedule_dlsch_preprocessor; /// processing time of eNB DLSCH scheduler time_stats_t schedule_dlsch; // include rlc_data_req + MAC header + preprocessor + /// processing time of rlc_data_req + time_stats_t rlc_data_req; + /// processing time of rlc_status_ind + time_stats_t rlc_status_ind; /// processing time of eNB MCH scheduler time_stats_t schedule_mch; /// processing time of eNB ULSCH reception time_stats_t rx_ulsch_sdu; // include rlc_data_ind /// processing time of eNB PCH scheduler time_stats_t schedule_pch; - /// CCE lists - int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE]; /// list of allocated beams per period int16_t *tdd_beam_association; diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index d4f4bff745..57bb411dcc 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -490,13 +490,11 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { dump_dl(sched_info); #endif - if (ifi->NR_Schedule_response) { - AssertFatal(ifi->NR_Schedule_response!=NULL, - "nr_schedule_response is null (mod %d, cc %d)\n", - module_id, - CC_id); - ifi->NR_Schedule_response(sched_info); - } + AssertFatal(ifi->NR_Schedule_response!=NULL, + "nr_schedule_response is null (mod %d, cc %d)\n", + module_id, + CC_id); + ifi->NR_Schedule_response(sched_info); LOG_D(NR_PHY,"NR_Schedule_response: SFN SLOT:%d %d dl_pdus:%d\n", sched_info->frame, diff --git a/openair2/RRC/LTE/MESSAGES/asn1_msg.c b/openair2/RRC/LTE/MESSAGES/asn1_msg.c index b069591316..b1f2e6d9b3 100644 --- a/openair2/RRC/LTE/MESSAGES/asn1_msg.c +++ b/openair2/RRC/LTE/MESSAGES/asn1_msg.c @@ -4293,7 +4293,7 @@ ssize_t do_nrMeasurementReport(uint8_t *buffer, LTE_MeasResultListEUTRA_t *measResultListEUTRA2=&measResultNeighCells->choice.measResultListEUTRA; asn1cSequenceAdd(measResultListEUTRA2->list, struct LTE_MeasResultEUTRA, measresulteutra_list); measresulteutra_list->physCellId = phy_id; - //asn1cCalloc(measresulteutra_list->cgi_Info, measresult_cgi2); + asn1cCalloc(measresulteutra_list->cgi_Info, measresult_cgi2); //measresult_cgi2->cellGlobalId= {0}; //measresult_cgi2->trackingAreaCode= {0}; struct LTE_MeasResultEUTRA__measResult* measResult= &measresulteutra_list->measResult; diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 43ee16e3ea..5dd8ce1675 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -619,7 +619,7 @@ rrc_gNB_process_RRCSetupComplete( ) //----------------------------------------------------------------------------- { - LOG_I(NR_RRC, PROTOCOL_NR_RRC_CTXT_UE_FMT" [RAPROC] Logical Channel UL-DCCH, " "processing NR_RRCSetupComplete from UE (SRB1 Active)\n", + LOG_A(NR_RRC, PROTOCOL_NR_RRC_CTXT_UE_FMT" [RAPROC] Logical Channel UL-DCCH, " "processing NR_RRCSetupComplete from UE (SRB1 Active)\n", PROTOCOL_NR_RRC_CTXT_UE_ARGS(ctxt_pP)); ue_context_pP->ue_context.Srb1.Active = 1; ue_context_pP->ue_context.Srb1.Srb_info.Srb_id = 1; @@ -711,7 +711,7 @@ rrc_gNB_generate_defaultRRCReconfiguration( DRB_config->pdcp_Config->moreThanOneRLC = NULL; DRB_config->pdcp_Config->t_Reordering = calloc(1, sizeof(*DRB_config->pdcp_Config->t_Reordering)); - *DRB_config->pdcp_Config->t_Reordering = NR_PDCP_Config__t_Reordering_ms0; + *DRB_config->pdcp_Config->t_Reordering = NR_PDCP_Config__t_Reordering_ms100; DRB_config->pdcp_Config->ext1 = NULL; ASN_SEQUENCE_ADD(&(*DRB_configList)->list, DRB_config); @@ -1350,7 +1350,7 @@ rrc_gNB_process_RRCReconfigurationComplete( for (int i = 0; i < DRB_configList->list.count; i++) { if (DRB_configList->list.array[i]) { drb_id = (int)DRB_configList->list.array[i]->drb_Identity; - LOG_I(NR_RRC, "[gNB %d] Frame %d : Logical Channel UL-DCCH, Received NR_RRCReconfigurationComplete from UE rnti %x, reconfiguring DRB %d\n", + LOG_A(NR_RRC, "[gNB %d] Frame %d : Logical Channel UL-DCCH, Received NR_RRCReconfigurationComplete from UE rnti %x, reconfiguring DRB %d\n", ctxt_pP->module_id, ctxt_pP->frame, ctxt_pP->rnti, diff --git a/openair2/UTIL/OPT/probe.c b/openair2/UTIL/OPT/probe.c index e64f7724c6..8731eb294a 100644 --- a/openair2/UTIL/OPT/probe.c +++ b/openair2/UTIL/OPT/probe.c @@ -408,7 +408,7 @@ static void SendFrameNR(guint8 radioType, guint8 direction, guint8 rntiType, guint8 isPredefinedData, guint8 retx, guint8 crcStatus, guint8 oob_event, guint8 oob_event_value, uint8_t *pdu_buffer, unsigned int pdu_buffer_size) { - unsigned char frameBuffer[9000]; + unsigned char frameBuffer[12000]; unsigned int frameOffset; ssize_t bytesSent; frameOffset = 0; diff --git a/openair3/NAS/COMMON/IES/EpsNetworkFeatureSupport.c b/openair3/NAS/COMMON/IES/EpsNetworkFeatureSupport.c index 3a842406f0..2ef36d7595 100644 --- a/openair3/NAS/COMMON/IES/EpsNetworkFeatureSupport.c +++ b/openair3/NAS/COMMON/IES/EpsNetworkFeatureSupport.c @@ -41,8 +41,11 @@ int decode_eps_network_feature_support(EpsNetworkFeatureSupport *epsnetworkfeatu ielen = *(buffer + decoded); decoded++; CHECK_LENGTH_DECODER(len - decoded, ielen); - *epsnetworkfeaturesupport = *buffer & 0x1; - decoded++; + /* note: only the bit "IMS voice over PS session in S1 mode" is processed + * TODO: deal with other bits? + */ + *epsnetworkfeaturesupport = (*(buffer + decoded)) & 0x1; + decoded += ielen; #if defined (NAS_DEBUG) dump_eps_network_feature_support_xml(epsnetworkfeaturesupport, iei); #endif diff --git a/openair3/NAS/NR_UE/nr_nas_msg_sim.c b/openair3/NAS/NR_UE/nr_nas_msg_sim.c index 2628c5b0b2..7cf1378d8b 100644 --- a/openair3/NAS/NR_UE/nr_nas_msg_sim.c +++ b/openair3/NAS/NR_UE/nr_nas_msg_sim.c @@ -674,7 +674,7 @@ void decodeDownlinkNASTransport(as_nas_info_t *initialNasMsg, uint8_t * pdu_buff sprintf(baseNetAddress, "%d.%d", *(pdu_buffer + 39),*(pdu_buffer + 40)); int third_octet = *(pdu_buffer + 41); int fourth_octet = *(pdu_buffer + 42); - LOG_I(NAS, "Received PDU Session Establishment Accept\n"); + LOG_A(NAS, "Received PDU Session Establishment Accept\n"); nas_config(1,third_octet,fourth_octet,"ue"); } else { LOG_E(NAS, "Received unexpected message in DLinformationTransfer %d\n", msg_type); diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf index c6a4a90a14..575fddda2b 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf @@ -216,11 +216,11 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf index fd9399f89e..c3faa198dd 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf @@ -210,12 +210,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf index 59e71a6225..8fa8fcf992 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf @@ -196,12 +196,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf index 3fc81c0d6c..c2e364b75e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf @@ -193,12 +193,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf index a40a93c789..813a0e58e3 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf @@ -210,12 +210,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf index 3860aba935..d81655e5d5 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf @@ -194,12 +194,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf index 7c527e07c8..b063989fd2 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf @@ -194,12 +194,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf index 4f8c785baa..856eed4fc2 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf @@ -209,12 +209,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf index b6b9252560..2e4dc540f3 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf @@ -242,12 +242,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf index 0817d7373e..a454af7b21 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf @@ -193,12 +193,12 @@ MACRLCs = ( ); L1s = ( - { +{ num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf index fd4c23cfdb..af26091260 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf @@ -192,12 +192,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf index 965408332c..928c70113f 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf @@ -192,12 +192,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf index e36748a3a9..76bc5bf992 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf @@ -209,12 +209,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf index 7b2d369919..7ff9d0ea77 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf @@ -193,12 +193,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf index dbf4f58348..5c0434b57e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf @@ -192,12 +192,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf index 6d23726a78..4b1476a76d 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf @@ -192,12 +192,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf index c3fa56f15e..50169f4bce 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf @@ -192,12 +192,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf index 15aa368fdf..e217f39b94 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf @@ -193,12 +193,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/oaiL1.nfapi.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/oaiL1.nfapi.usrpx300.conf index 06ae5af066..0b384958ae 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/oaiL1.nfapi.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/oaiL1.nfapi.usrpx300.conf @@ -18,18 +18,18 @@ log_config = { L1s = ( - { - num_cc = 1; - tr_n_preference = "nfapi"; - local_n_if_name = "lo"; - remote_n_address = "127.0.0.2"; // vnf addr - local_n_address = "127.0.0.1"; // pnf addr - local_n_portc = 50000; // pnf p5 port [!] - remote_n_portc = 50001; // vnf p5 port - local_n_portd = 50010; // pnf p7 port - remote_n_portd = 50011; // vnf p7 port - pusch_proc_threads = 8; - } +{ + num_cc = 1; + tr_n_preference = "nfapi"; + local_n_if_name = "lo"; + remote_n_address = "127.0.0.2"; // vnf addr + local_n_address = "127.0.0.1"; // pnf addr + local_n_portc = 50000; // pnf p5 port [!] + remote_n_portc = 50001; // vnf p5 port + local_n_portd = 50010; // pnf p7 port + remote_n_portd = 50011; // vnf p7 port + thread_pool_size = 8; +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf index 8dfcfb2b88..5591ed082d 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf @@ -210,12 +210,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf index d01b0947c0..dd8113e059 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf @@ -211,12 +211,12 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 - } +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf index 2f4839fd3b..96335f23ca 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf @@ -210,11 +210,11 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf index 01050b0d00..215a57b95c 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf @@ -210,11 +210,11 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index 9238ea1809..0e884d77e5 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -35,6 +35,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime = 6; sib1_tda = 0; pdcch_ConfigSIB1 = ( @@ -66,7 +67,7 @@ gNBs = #initialDownlinkBWP #genericParameters # this is RBstart=27,L=48 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 12952; # 6366 12925 12956 28875 12952 + initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875 12952 # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialDLBWPsubcarrierSpacing = 1; @@ -86,7 +87,7 @@ gNBs = pMax = 20; #initialUplinkBWP #genericParameters - initialULBWPlocationAndBandwidth = 12952; + initialULBWPlocationAndBandwidth = 28875; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialULBWPsubcarrierSpacing = 1; @@ -210,7 +211,7 @@ MACRLCs = ( tr_n_preference = "local_RRC"; pusch_TargetSNRx10 = 150; pucch_TargetSNRx10 = 200; - ulsch_max_frame_inactivity = 1; + ulsch_max_frame_inactivity = 0; } ); @@ -218,7 +219,6 @@ L1s = ( { num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; prach_dtx_threshold = 120; pucch0_dtx_threshold = 150; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 @@ -296,5 +296,7 @@ log_config : rrc_log_verbosity ="medium"; ngap_log_level ="debug"; ngap_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; }; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf index 9717462176..531f8a34fc 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf @@ -210,7 +210,7 @@ MACRLCs = ( tr_n_preference = "local_RRC"; #pusch_TargetSNRx10 = 150; #pucch_TargetSNRx10 = 200; - ulsch_max_frame_inactivity = 1; + ulsch_max_frame_inactivity = 0; } ); @@ -218,7 +218,6 @@ L1s = ( { num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 4; prach_dtx_threshold = 120; #pucch0_dtx_threshold = 120; } diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index d9b62064c1..e96c545a4e 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -35,7 +35,9 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime = 6; sib1_tda = 0; + do_SRS = 1; pdcch_ConfigSIB1 = ( { @@ -210,7 +212,7 @@ MACRLCs = ( tr_n_preference = "local_RRC"; pusch_TargetSNRx10 = 150; pucch_TargetSNRx10 = 200; - ulsch_max_frame_inactivity = 1; + ulsch_max_frame_inactivity = 0; } ); @@ -218,7 +220,6 @@ L1s = ( { num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; prach_dtx_threshold = 120; pucch0_dtx_threshold = 150; ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 @@ -296,5 +297,7 @@ log_config : rrc_log_verbosity ="medium"; ngap_log_level ="debug"; ngap_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; }; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf index e9577ee265..c8a0bace37 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf @@ -225,11 +225,11 @@ MACRLCs = ( ); L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - } +{ + num_cc = 1; + tr_n_preference = "local_mac"; + thread_pool_size = 8; +} ); RUs = ( diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf new file mode 100644 index 0000000000..befceae695 --- /dev/null +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf @@ -0,0 +1,330 @@ +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + gNB_name = "gNB-OAI"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ({ + mcc = 208; + mnc = 99; + mnc_length = 2; + snssaiList = ( + { + sst = 1; + sd = 0x1; // 0 false, else true + }, + { + sst = 1; + sd = 0x112233; // 0 false, else true + } + ); + + }); + + nr_cellid = 12345678L; + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 2; +# do_CSIRS = 1; + min_rxtxtime_pdsch = 2; + ul_prbblacklist = "79,80,81,82" + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 10; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3300.60 MHz + 81*12*30e-3 MHz = 3329.76 + absoluteFrequencySSB = 621984; + # this is 3300.60 MHz + dl_absoluteFrequencyPointA = 620040; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 162; + #initialDownlinkBWP + #genericParameters + # this is RBstart=0,L=162 (275*(275-L+1))+(274-RBstart)) + initialDLBWPlocationAndBandwidth = 31899; + # +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 10; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; + + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_1 = 57; + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 162; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 31899; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 12; + preambleReceivedTargetPower = -104; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 2; + initialULBWPmappingType_0 = 1 + # this is SS=2 L=13 + initialULBWPstartSymbolAndLength_0 = 41; + + initialULBWPk2_1 = 2; + initialULBWPmappingType_1 = 1; + # this is SS=0 L=4 + initialULBWPstartSymbolAndLength_1 = 52; + + initialULBWPk2_2 = 7; + initialULBWPmappingType_2 = 1; + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -70; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = -25; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// AMF parameters: + amf_ip_address = ( { ipv4 = "192.168.70.132"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + + NETWORK_INTERFACES : + { + GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24"; + GNB_INTERFACE_NAME_FOR_NGU = "demo-oai"; + GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + + } +); + +MACRLCs = ( +{ + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + ulsch_max_frame_inactivity = 0; +} +); + +L1s = ( +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 120; + pucch0_dtx_threshold = 120; +} +); + +RUs = ( +{ + local_rf = "yes" + nb_tx = 2 + nb_rx = 2 + att_tx = 0 + att_rx = 0; + bands = [78]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + sf_extension = 0; + eNB_instances = [0]; + ##beamforming 1x2 matrix: 1 layer x 2 antennas + bf_weights = [0x00007fff, 0x0000]; + #clock_src = "internal"; + sdr_addrs = "mgmt_addr=192.168.10.2,addr=192.168.10.2,clock_source=internal,time_source=internal" +} +); + +THREAD_STRUCT = ( +{ + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; +} +); + +rfsimulator : +{ + serveraddr = "server"; + serverport = "4043"; + options = (); #("saviq"); or/and "chanmod" + modelname = "AWGN"; + IQfile = "/tmp/rfsimulator.iqs"; +}; + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + +log_config : +{ + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + ngap_log_level ="debug"; + ngap_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; +};