From 974bb21dda8cc78f5399bbacea72b789b5b7b2d7 Mon Sep 17 00:00:00 2001 From: rmagueta Date: Mon, 13 Sep 2021 11:40:34 +0100 Subject: [PATCH] Fix phy-test --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index c057fba260..4f526649ab 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -56,7 +56,7 @@ //#define UL_HARQ_PRINT extern RAN_CONTEXT_t RC; -const uint8_t nr_rv_round_map[4] = {0, 2, 3, 1}; +const uint8_t nr_rv_round_map[4] = {0, 2, 3, 1}; //#define ENABLE_MAC_PAYLOAD_DEBUG 1 //uint8_t mac_pdu[MAX_NR_DLSCH_PAYLOAD_BYTES]; @@ -264,6 +264,7 @@ extern uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData); uint32_t target_dl_mcs = 9; uint32_t target_dl_Nl = 1; uint32_t target_dl_bw = 50; +int dl_maxL = 4; uint64_t dlsch_slot_bitmap = (1<<1); /* schedules whole bandwidth for first user, all the time */ void nr_preprocessor_phytest(module_id_t module_id, @@ -323,6 +324,7 @@ void nr_preprocessor_phytest(module_id_t module_id, 0); sched_ctrl->num_total_bytes += sched_ctrl->rlc_status[lcid].bytes_in_buffer; + sched_ctrl->maxL = dl_maxL; uint8_t nr_of_candidates; find_aggregation_candidates(&sched_ctrl->aggregation_level, &nr_of_candidates, @@ -402,6 +404,7 @@ void nr_preprocessor_phytest(module_id_t module_id, uint32_t target_ul_mcs = 9; uint32_t target_ul_bw = 50; +int ul_maxL = 4; uint64_t ulsch_slot_bitmap = (1 << 8); bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot) { @@ -484,10 +487,11 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ sched_ctrl->sched_pusch.frame = sched_frame; uint8_t nr_of_candidates; + sched_ctrl->maxL = ul_maxL; find_aggregation_candidates(&sched_ctrl->aggregation_level, &nr_of_candidates, sched_ctrl->search_space, - sched_ctrl->maxL); + sched_ctrl->maxL); const int cid = sched_ctrl->coreset->controlResourceSetId; const uint16_t Y = UE_info->Y[UE_id][cid][slot]; const int m = UE_info->num_pdcch_cand[UE_id][cid];